drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <ttm/ttm_bo_api.h>
  33 #include <ttm/ttm_bo_driver.h>
  34 #include <ttm/ttm_placement.h>
  35 #include <ttm/ttm_module.h>
  36 #include <drm/drmP.h>
  37 #include <drm/radeon_drm.h>
  38 #include <linux/seq_file.h>
  39 #include "radeon_reg.h"
  40 #include "radeon.h"
  41
  42 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  43
  44 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  45
  46 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  47 {
  48         struct radeon_mman *mman;
  49         struct radeon_device *rdev;
  50
  51         mman = container_of(bdev, struct radeon_mman, bdev);
  52         rdev = container_of(mman, struct radeon_device, mman);
  53         return rdev;
  54 }
  55
  56
  57 /*
  58  * Global memory.
  59  */
  60 static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
  61 {
  62         return ttm_mem_global_init(ref->object);
  63 }
  64
  65 static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
  66 {
  67         ttm_mem_global_release(ref->object);
  68 }
  69
  70 static int radeon_ttm_global_init(struct radeon_device *rdev)
  71 {
  72         struct ttm_global_reference *global_ref;
  73         int r;
  74
  75         rdev->mman.mem_global_referenced = false;
  76         global_ref = &rdev->mman.mem_global_ref;
  77         global_ref->global_type = TTM_GLOBAL_TTM_MEM;
  78         global_ref->size = sizeof(struct ttm_mem_global);
  79         global_ref->init = &radeon_ttm_mem_global_init;
  80         global_ref->release = &radeon_ttm_mem_global_release;
  81         r = ttm_global_item_ref(global_ref);
  82         if (r != 0) {
  83                 DRM_ERROR("Failed setting up TTM memory accounting "
  84                           "subsystem.\n");
  85                 return r;
  86         }
  87
  88         rdev->mman.bo_global_ref.mem_glob =
  89                 rdev->mman.mem_global_ref.object;
  90         global_ref = &rdev->mman.bo_global_ref.ref;
  91         global_ref->global_type = TTM_GLOBAL_TTM_BO;
  92         global_ref->size = sizeof(struct ttm_bo_global);
  93         global_ref->init = &ttm_bo_global_init;
  94         global_ref->release = &ttm_bo_global_release;
  95         r = ttm_global_item_ref(global_ref);
  96         if (r != 0) {
  97                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
  98                 ttm_global_item_unref(&rdev->mman.mem_global_ref);
  99                 return r;
 100         }
 101
 102         rdev->mman.mem_global_referenced = true;
 103         return 0;
 104 }
 105
 106 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 107 {
 108         if (rdev->mman.mem_global_referenced) {
 109                 ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
 110                 ttm_global_item_unref(&rdev->mman.mem_global_ref);
 111                 rdev->mman.mem_global_referenced = false;
 112         }
 113 }
 114
 115 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
 116
 117 static struct ttm_backend*
 118 radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
 119 {
 120         struct radeon_device *rdev;
 121
 122         rdev = radeon_get_rdev(bdev);
 123 #if __OS_HAS_AGP
 124         if (rdev->flags & RADEON_IS_AGP) {
 125                 return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
 126         } else
 127 #endif
 128         {
 129                 return radeon_ttm_backend_create(rdev);
 130         }
 131 }
 132
 133 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 134 {
 135         return 0;
 136 }
 137
 138 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 139                                 struct ttm_mem_type_manager *man)
 140 {
 141         struct radeon_device *rdev;
 142
 143         rdev = radeon_get_rdev(bdev);
 144
 145         switch (type) {
 146         case TTM_PL_SYSTEM:
 147                 /* System memory */
 148                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 149                 man->available_caching = TTM_PL_MASK_CACHING;
 150                 man->default_caching = TTM_PL_FLAG_CACHED;
 151                 break;
 152         case TTM_PL_TT:
 153                 man->gpu_offset = rdev->mc.gtt_start;
 154                 man->available_caching = TTM_PL_MASK_CACHING;
 155                 man->default_caching = TTM_PL_FLAG_CACHED;
 156                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
 157 #if __OS_HAS_AGP
 158                 if (rdev->flags & RADEON_IS_AGP) {
 159                         if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
 160                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
 161                                           (unsigned)type);
 162                                 return -EINVAL;
 163                         }
 164                         if (!rdev->ddev->agp->cant_use_aperture)
 165                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 166                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 167                                                  TTM_PL_FLAG_WC;
 168                         man->default_caching = TTM_PL_FLAG_WC;
 169                 }
 170 #endif
 171                 break;
 172         case TTM_PL_VRAM:
 173                 /* "On-card" video ram */
 174                 man->gpu_offset = rdev->mc.vram_start;
 175                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 176                              TTM_MEMTYPE_FLAG_MAPPABLE;
 177                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 178                 man->default_caching = TTM_PL_FLAG_WC;
 179                 break;
 180         default:
 181                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 182                 return -EINVAL;
 183         }
 184         return 0;
 185 }
 186
 187 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 188                                 struct ttm_placement *placement)
 189 {
 190         struct radeon_bo *rbo;
 191         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 192
 193         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 194                 placement->fpfn = 0;
 195                 placement->lpfn = 0;
 196                 placement->placement = &placements;
 197                 placement->busy_placement = &placements;
 198                 placement->num_placement = 1;
 199                 placement->num_busy_placement = 1;
 200                 return;
 201         }
 202         rbo = container_of(bo, struct radeon_bo, tbo);
 203         switch (bo->mem.mem_type) {
 204         case TTM_PL_VRAM:
 205                 if (rbo->rdev->cp.ready == false)
 206                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 207                 else
 208                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 209                 break;
 210         case TTM_PL_TT:
 211         default:
 212                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 213         }
 214         *placement = rbo->placement;
 215 }
 216
 217 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 218 {
 219         return 0;
 220 }
 221
 222 static void radeon_move_null(struct ttm_buffer_object *bo,
 223                              struct ttm_mem_reg *new_mem)
 224 {
 225         struct ttm_mem_reg *old_mem = &bo->mem;
 226
 227         BUG_ON(old_mem->mm_node != NULL);
 228         *old_mem = *new_mem;
 229         new_mem->mm_node = NULL;
 230 }
 231
 232 static int radeon_move_blit(struct ttm_buffer_object *bo,
 233                         bool evict, int no_wait_reserve, bool no_wait_gpu,
 234                         struct ttm_mem_reg *new_mem,
 235                         struct ttm_mem_reg *old_mem)
 236 {
 237         struct radeon_device *rdev;
 238         uint64_t old_start, new_start;
 239         struct radeon_fence *fence;
 240         int r;
 241
 242         rdev = radeon_get_rdev(bo->bdev);
 243         r = radeon_fence_create(rdev, &fence);
 244         if (unlikely(r)) {
 245                 return r;
 246         }
 247         old_start = old_mem->mm_node->start << PAGE_SHIFT;
 248         new_start = new_mem->mm_node->start << PAGE_SHIFT;
 249
 250         switch (old_mem->mem_type) {
 251         case TTM_PL_VRAM:
 252                 old_start += rdev->mc.vram_start;
 253                 break;
 254         case TTM_PL_TT:
 255                 old_start += rdev->mc.gtt_start;
 256                 break;
 257         default:
 258                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 259                 return -EINVAL;
 260         }
 261         switch (new_mem->mem_type) {
 262         case TTM_PL_VRAM:
 263                 new_start += rdev->mc.vram_start;
 264                 break;
 265         case TTM_PL_TT:
 266                 new_start += rdev->mc.gtt_start;
 267                 break;
 268         default:
 269                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 270                 return -EINVAL;
 271         }
 272         if (!rdev->cp.ready) {
 273                 DRM_ERROR("Trying to move memory with CP turned off.\n");
 274                 return -EINVAL;
 275         }
 276         r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
 277         /* FIXME: handle copy error */
 278         r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
 279                                       evict, no_wait_reserve, no_wait_gpu, new_mem);
 280         radeon_fence_unref(&fence);
 281         return r;
 282 }
 283
 284 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 285                                 bool evict, bool interruptible,
 286                                 bool no_wait_reserve, bool no_wait_gpu,
 287                                 struct ttm_mem_reg *new_mem)
 288 {
 289         struct radeon_device *rdev;
 290         struct ttm_mem_reg *old_mem = &bo->mem;
 291         struct ttm_mem_reg tmp_mem;
 292         u32 placements;
 293         struct ttm_placement placement;
 294         int r;
 295
 296         rdev = radeon_get_rdev(bo->bdev);
 297         tmp_mem = *new_mem;
 298         tmp_mem.mm_node = NULL;
 299         placement.fpfn = 0;
 300         placement.lpfn = 0;
 301         placement.num_placement = 1;
 302         placement.placement = &placements;
 303         placement.num_busy_placement = 1;
 304         placement.busy_placement = &placements;
 305         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 306         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 307                              interruptible, no_wait_reserve, no_wait_gpu);
 308         if (unlikely(r)) {
 309                 return r;
 310         }
 311
 312         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 313         if (unlikely(r)) {
 314                 goto out_cleanup;
 315         }
 316
 317         r = ttm_tt_bind(bo->ttm, &tmp_mem);
 318         if (unlikely(r)) {
 319                 goto out_cleanup;
 320         }
 321         r = radeon_move_blit(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem, old_mem);
 322         if (unlikely(r)) {
 323                 goto out_cleanup;
 324         }
 325         r = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem);
 326 out_cleanup:
 327         if (tmp_mem.mm_node) {
 328                 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 329
 330                 spin_lock(&glob->lru_lock);
 331                 drm_mm_put_block(tmp_mem.mm_node);
 332                 spin_unlock(&glob->lru_lock);
 333                 return r;
 334         }
 335         return r;
 336 }
 337
 338 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 339                                 bool evict, bool interruptible,
 340                                 bool no_wait_reserve, bool no_wait_gpu,
 341                                 struct ttm_mem_reg *new_mem)
 342 {
 343         struct radeon_device *rdev;
 344         struct ttm_mem_reg *old_mem = &bo->mem;
 345         struct ttm_mem_reg tmp_mem;
 346         struct ttm_placement placement;
 347         u32 placements;
 348         int r;
 349
 350         rdev = radeon_get_rdev(bo->bdev);
 351         tmp_mem = *new_mem;
 352         tmp_mem.mm_node = NULL;
 353         placement.fpfn = 0;
 354         placement.lpfn = 0;
 355         placement.num_placement = 1;
 356         placement.placement = &placements;
 357         placement.num_busy_placement = 1;
 358         placement.busy_placement = &placements;
 359         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 360         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait_reserve, no_wait_gpu);
 361         if (unlikely(r)) {
 362                 return r;
 363         }
 364         r = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem);
 365         if (unlikely(r)) {
 366                 goto out_cleanup;
 367         }
 368         r = radeon_move_blit(bo, true, no_wait_reserve, no_wait_gpu, new_mem, old_mem);
 369         if (unlikely(r)) {
 370                 goto out_cleanup;
 371         }
 372 out_cleanup:
 373         if (tmp_mem.mm_node) {
 374                 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 375
 376                 spin_lock(&glob->lru_lock);
 377                 drm_mm_put_block(tmp_mem.mm_node);
 378                 spin_unlock(&glob->lru_lock);
 379                 return r;
 380         }
 381         return r;
 382 }
 383
 384 static int radeon_bo_move(struct ttm_buffer_object *bo,
 385                         bool evict, bool interruptible,
 386                         bool no_wait_reserve, bool no_wait_gpu,
 387                         struct ttm_mem_reg *new_mem)
 388 {
 389         struct radeon_device *rdev;
 390         struct ttm_mem_reg *old_mem = &bo->mem;
 391         int r;
 392
 393         rdev = radeon_get_rdev(bo->bdev);
 394         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 395                 radeon_move_null(bo, new_mem);
 396                 return 0;
 397         }
 398         if ((old_mem->mem_type == TTM_PL_TT &&
 399              new_mem->mem_type == TTM_PL_SYSTEM) ||
 400             (old_mem->mem_type == TTM_PL_SYSTEM &&
 401              new_mem->mem_type == TTM_PL_TT)) {
 402                 /* bind is enough */
 403                 radeon_move_null(bo, new_mem);
 404                 return 0;
 405         }
 406         if (!rdev->cp.ready || rdev->asic->copy == NULL) {
 407                 /* use memcpy */
 408                 goto memcpy;
 409         }
 410
 411         if (old_mem->mem_type == TTM_PL_VRAM &&
 412             new_mem->mem_type == TTM_PL_SYSTEM) {
 413                 r = radeon_move_vram_ram(bo, evict, interruptible,
 414                                         no_wait_reserve, no_wait_gpu, new_mem);
 415         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 416                    new_mem->mem_type == TTM_PL_VRAM) {
 417                 r = radeon_move_ram_vram(bo, evict, interruptible,
 418                                             no_wait_reserve, no_wait_gpu, new_mem);
 419         } else {
 420                 r = radeon_move_blit(bo, evict, no_wait_reserve, no_wait_gpu, new_mem, old_mem);
 421         }
 422
 423         if (r) {
 424 memcpy:
 425                 r = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 426         }
 427         return r;
 428 }
 429
 430 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 431 {
 432         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 433         struct radeon_device *rdev = radeon_get_rdev(bdev);
 434
 435         mem->bus.addr = NULL;
 436         mem->bus.offset = 0;
 437         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 438         mem->bus.base = 0;
 439         mem->bus.is_iomem = false;
 440         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 441                 return -EINVAL;
 442         switch (mem->mem_type) {
 443         case TTM_PL_SYSTEM:
 444                 /* system memory */
 445                 return 0;
 446         case TTM_PL_TT:
 447 #if __OS_HAS_AGP
 448                 if (rdev->flags & RADEON_IS_AGP) {
 449                         /* RADEON_IS_AGP is set only if AGP is active */
 450                         mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
 451                         mem->bus.base = rdev->mc.agp_base;
 452                         mem->bus.is_iomem = true;
 453                 }
 454 #endif
 455                 break;
 456         case TTM_PL_VRAM:
 457                 mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
 458                 /* check if it's visible */
 459                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 460                         return -EINVAL;
 461                 mem->bus.base = rdev->mc.aper_base;
 462                 mem->bus.is_iomem = true;
 463                 break;
 464         default:
 465                 return -EINVAL;
 466         }
 467         return 0;
 468 }
 469
 470 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 471 {
 472 }
 473
 474 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
 475                                 bool lazy, bool interruptible)
 476 {
 477         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
 478 }
 479
 480 static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
 481 {
 482         return 0;
 483 }
 484
 485 static void radeon_sync_obj_unref(void **sync_obj)
 486 {
 487         radeon_fence_unref((struct radeon_fence **)sync_obj);
 488 }
 489
 490 static void *radeon_sync_obj_ref(void *sync_obj)
 491 {
 492         return radeon_fence_ref((struct radeon_fence *)sync_obj);
 493 }
 494
 495 static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
 496 {
 497         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
 498 }
 499
 500 static struct ttm_bo_driver radeon_bo_driver = {
 501         .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
 502         .invalidate_caches = &radeon_invalidate_caches,
 503         .init_mem_type = &radeon_init_mem_type,
 504         .evict_flags = &radeon_evict_flags,
 505         .move = &radeon_bo_move,
 506         .verify_access = &radeon_verify_access,
 507         .sync_obj_signaled = &radeon_sync_obj_signaled,
 508         .sync_obj_wait = &radeon_sync_obj_wait,
 509         .sync_obj_flush = &radeon_sync_obj_flush,
 510         .sync_obj_unref = &radeon_sync_obj_unref,
 511         .sync_obj_ref = &radeon_sync_obj_ref,
 512         .move_notify = &radeon_bo_move_notify,
 513         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 514         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 515         .io_mem_free = &radeon_ttm_io_mem_free,
 516 };
 517
 518 int radeon_ttm_init(struct radeon_device *rdev)
 519 {
 520         int r;
 521
 522         r = radeon_ttm_global_init(rdev);
 523         if (r) {
 524                 return r;
 525         }
 526         /* No others user of address space so set it to 0 */
 527         r = ttm_bo_device_init(&rdev->mman.bdev,
 528                                rdev->mman.bo_global_ref.ref.object,
 529                                &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
 530                                rdev->need_dma32);
 531         if (r) {
 532                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 533                 return r;
 534         }
 535         rdev->mman.initialized = true;
 536         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 537                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 538         if (r) {
 539                 DRM_ERROR("Failed initializing VRAM heap.\n");
 540                 return r;
 541         }
 542         r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
 543                                 RADEON_GEM_DOMAIN_VRAM,
 544                                 &rdev->stollen_vga_memory);
 545         if (r) {
 546                 return r;
 547         }
 548         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 549         if (r)
 550                 return r;
 551         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 552         radeon_bo_unreserve(rdev->stollen_vga_memory);
 553         if (r) {
 554                 radeon_bo_unref(&rdev->stollen_vga_memory);
 555                 return r;
 556         }
 557         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 558                  (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
 559         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 560                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 561         if (r) {
 562                 DRM_ERROR("Failed initializing GTT heap.\n");
 563                 return r;
 564         }
 565         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 566                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 567         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
 568                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
 569         }
 570
 571         r = radeon_ttm_debugfs_init(rdev);
 572         if (r) {
 573                 DRM_ERROR("Failed to init debugfs\n");
 574                 return r;
 575         }
 576         return 0;
 577 }
 578
 579 void radeon_ttm_fini(struct radeon_device *rdev)
 580 {
 581         int r;
 582
 583         if (!rdev->mman.initialized)
 584                 return;
 585         if (rdev->stollen_vga_memory) {
 586                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 587                 if (r == 0) {
 588                         radeon_bo_unpin(rdev->stollen_vga_memory);
 589                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 590                 }
 591                 radeon_bo_unref(&rdev->stollen_vga_memory);
 592         }
 593         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 594         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 595         ttm_bo_device_release(&rdev->mman.bdev);
 596         radeon_gart_fini(rdev);
 597         radeon_ttm_global_fini(rdev);
 598         rdev->mman.initialized = false;
 599         DRM_INFO("radeon: ttm finalized\n");
 600 }
 601
 602 static struct vm_operations_struct radeon_ttm_vm_ops;
 603 static const struct vm_operations_struct *ttm_vm_ops = NULL;
 604
 605 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 606 {
 607         struct ttm_buffer_object *bo;
 608         int r;
 609
 610         bo = (struct ttm_buffer_object *)vma->vm_private_data;
 611         if (bo == NULL) {
 612                 return VM_FAULT_NOPAGE;
 613         }
 614         r = ttm_vm_ops->fault(vma, vmf);
 615         return r;
 616 }
 617
 618 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 619 {
 620         struct drm_file *file_priv;
 621         struct radeon_device *rdev;
 622         int r;
 623
 624         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
 625                 return drm_mmap(filp, vma);
 626         }
 627
 628         file_priv = (struct drm_file *)filp->private_data;
 629         rdev = file_priv->minor->dev->dev_private;
 630         if (rdev == NULL) {
 631                 return -EINVAL;
 632         }
 633         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 634         if (unlikely(r != 0)) {
 635                 return r;
 636         }
 637         if (unlikely(ttm_vm_ops == NULL)) {
 638                 ttm_vm_ops = vma->vm_ops;
 639                 radeon_ttm_vm_ops = *ttm_vm_ops;
 640                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
 641         }
 642         vma->vm_ops = &radeon_ttm_vm_ops;
 643         return 0;
 644 }
 645
 646
 647 /*
 648  * TTM backend functions.
 649  */
 650 struct radeon_ttm_backend {
 651         struct ttm_backend              backend;
 652         struct radeon_device            *rdev;
 653         unsigned long                   num_pages;
 654         struct page                     **pages;
 655         struct page                     *dummy_read_page;
 656         bool                            populated;
 657         bool                            bound;
 658         unsigned                        offset;
 659 };
 660
 661 static int radeon_ttm_backend_populate(struct ttm_backend *backend,
 662                                        unsigned long num_pages,
 663                                        struct page **pages,
 664                                        struct page *dummy_read_page)
 665 {
 666         struct radeon_ttm_backend *gtt;
 667
 668         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 669         gtt->pages = pages;
 670         gtt->num_pages = num_pages;
 671         gtt->dummy_read_page = dummy_read_page;
 672         gtt->populated = true;
 673         return 0;
 674 }
 675
 676 static void radeon_ttm_backend_clear(struct ttm_backend *backend)
 677 {
 678         struct radeon_ttm_backend *gtt;
 679
 680         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 681         gtt->pages = NULL;
 682         gtt->num_pages = 0;
 683         gtt->dummy_read_page = NULL;
 684         gtt->populated = false;
 685         gtt->bound = false;
 686 }
 687
 688
 689 static int radeon_ttm_backend_bind(struct ttm_backend *backend,
 690                                    struct ttm_mem_reg *bo_mem)
 691 {
 692         struct radeon_ttm_backend *gtt;
 693         int r;
 694
 695         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 696         gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
 697         if (!gtt->num_pages) {
 698                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
 699         }
 700         r = radeon_gart_bind(gtt->rdev, gtt->offset,
 701                              gtt->num_pages, gtt->pages);
 702         if (r) {
 703                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 704                           gtt->num_pages, gtt->offset);
 705                 return r;
 706         }
 707         gtt->bound = true;
 708         return 0;
 709 }
 710
 711 static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
 712 {
 713         struct radeon_ttm_backend *gtt;
 714
 715         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 716         radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
 717         gtt->bound = false;
 718         return 0;
 719 }
 720
 721 static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
 722 {
 723         struct radeon_ttm_backend *gtt;
 724
 725         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 726         if (gtt->bound) {
 727                 radeon_ttm_backend_unbind(backend);
 728         }
 729         kfree(gtt);
 730 }
 731
 732 static struct ttm_backend_func radeon_backend_func = {
 733         .populate = &radeon_ttm_backend_populate,
 734         .clear = &radeon_ttm_backend_clear,
 735         .bind = &radeon_ttm_backend_bind,
 736         .unbind = &radeon_ttm_backend_unbind,
 737         .destroy = &radeon_ttm_backend_destroy,
 738 };
 739
 740 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
 741 {
 742         struct radeon_ttm_backend *gtt;
 743
 744         gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
 745         if (gtt == NULL) {
 746                 return NULL;
 747         }
 748         gtt->backend.bdev = &rdev->mman.bdev;
 749         gtt->backend.flags = 0;
 750         gtt->backend.func = &radeon_backend_func;
 751         gtt->rdev = rdev;
 752         gtt->pages = NULL;
 753         gtt->num_pages = 0;
 754         gtt->dummy_read_page = NULL;
 755         gtt->populated = false;
 756         gtt->bound = false;
 757         return &gtt->backend;
 758 }
 759
 760 #define RADEON_DEBUGFS_MEM_TYPES 2
 761
 762 #if defined(CONFIG_DEBUG_FS)
 763 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 764 {
 765         struct drm_info_node *node = (struct drm_info_node *)m->private;
 766         struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
 767         struct drm_device *dev = node->minor->dev;
 768         struct radeon_device *rdev = dev->dev_private;
 769         int ret;
 770         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 771
 772         spin_lock(&glob->lru_lock);
 773         ret = drm_mm_dump_table(m, mm);
 774         spin_unlock(&glob->lru_lock);
 775         return ret;
 776 }
 777 #endif
 778
 779 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
 780 {
 781 #if defined(CONFIG_DEBUG_FS)
 782         static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES];
 783         static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32];
 784         unsigned i;
 785
 786         for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
 787                 if (i == 0)
 788                         sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
 789                 else
 790                         sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
 791                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 792                 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
 793                 radeon_mem_types_list[i].driver_features = 0;
 794                 if (i == 0)
 795                         radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
 796                 else
 797                         radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
 798
 799         }
 800         return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES);
 801
 802 #endif
 803         return 0;
 804 }