2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
28 #include <linux/seq_file.h>
30 #include "radeon_drm.h"
31 #include "radeon_reg.h"
35 int radeon_debugfs_ib_init(struct radeon_device *rdev);
40 int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
42 struct radeon_fence *fence;
43 struct radeon_ib *nib;
48 r = radeon_fence_create(rdev, &fence);
50 DRM_ERROR("failed to create fence for new IB\n");
53 mutex_lock(&rdev->ib_pool.mutex);
54 i = find_first_zero_bit(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
55 if (i < RADEON_IB_POOL_SIZE) {
56 set_bit(i, rdev->ib_pool.alloc_bm);
57 rdev->ib_pool.ibs[i].length_dw = 0;
58 *ib = &rdev->ib_pool.ibs[i];
61 if (list_empty(&rdev->ib_pool.scheduled_ibs)) {
62 /* we go do nothings here */
63 DRM_ERROR("all IB allocated none scheduled.\n");
67 /* get the first ib on the scheduled list */
68 nib = list_entry(rdev->ib_pool.scheduled_ibs.next,
69 struct radeon_ib, list);
70 if (nib->fence == NULL) {
71 /* we go do nothings here */
72 DRM_ERROR("IB %lu scheduled without a fence.\n", nib->idx);
76 r = radeon_fence_wait(nib->fence, false);
78 DRM_ERROR("radeon: IB(%lu:0x%016lX:%u)\n", nib->idx,
79 (unsigned long)nib->gpu_addr, nib->length_dw);
80 DRM_ERROR("radeon: GPU lockup detected, fail to get a IB\n");
83 radeon_fence_unref(&nib->fence);
86 INIT_LIST_HEAD(&nib->list);
89 mutex_unlock(&rdev->ib_pool.mutex);
91 radeon_fence_unref(&fence);
98 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
100 struct radeon_ib *tmp = *ib;
106 mutex_lock(&rdev->ib_pool.mutex);
107 if (!list_empty(&tmp->list) && !radeon_fence_signaled(tmp->fence)) {
108 /* IB is scheduled & not signaled don't do anythings */
109 mutex_unlock(&rdev->ib_pool.mutex);
112 list_del(&tmp->list);
114 radeon_fence_unref(&tmp->fence);
117 clear_bit(tmp->idx, rdev->ib_pool.alloc_bm);
118 mutex_unlock(&rdev->ib_pool.mutex);
121 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
125 mutex_lock(&rdev->ib_pool.mutex);
126 if (!ib->length_dw || !rdev->cp.ready) {
127 /* TODO: Nothings in the ib we should report. */
128 mutex_unlock(&rdev->ib_pool.mutex);
129 DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx);
132 /* 64 dwords should be enough for fence too */
133 r = radeon_ring_lock(rdev, 64);
135 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r);
136 mutex_unlock(&rdev->ib_pool.mutex);
139 radeon_ring_ib_execute(rdev, ib);
140 radeon_fence_emit(rdev, ib->fence);
141 radeon_ring_unlock_commit(rdev);
142 list_add_tail(&ib->list, &rdev->ib_pool.scheduled_ibs);
143 mutex_unlock(&rdev->ib_pool.mutex);
147 int radeon_ib_pool_init(struct radeon_device *rdev)
154 if (rdev->ib_pool.robj)
156 /* Allocate 1M object buffer */
157 INIT_LIST_HEAD(&rdev->ib_pool.scheduled_ibs);
158 r = radeon_object_create(rdev, NULL, RADEON_IB_POOL_SIZE*64*1024,
159 true, RADEON_GEM_DOMAIN_GTT,
160 false, &rdev->ib_pool.robj);
162 DRM_ERROR("radeon: failed to ib pool (%d).\n", r);
165 r = radeon_object_pin(rdev->ib_pool.robj, RADEON_GEM_DOMAIN_GTT, &gpu_addr);
167 DRM_ERROR("radeon: failed to pin ib pool (%d).\n", r);
170 r = radeon_object_kmap(rdev->ib_pool.robj, &ptr);
172 DRM_ERROR("radeon: failed to map ib poll (%d).\n", r);
175 for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
178 offset = i * 64 * 1024;
179 rdev->ib_pool.ibs[i].gpu_addr = gpu_addr + offset;
180 rdev->ib_pool.ibs[i].ptr = ptr + offset;
181 rdev->ib_pool.ibs[i].idx = i;
182 rdev->ib_pool.ibs[i].length_dw = 0;
183 INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].list);
185 bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
186 rdev->ib_pool.ready = true;
187 DRM_INFO("radeon: ib pool ready.\n");
188 if (radeon_debugfs_ib_init(rdev)) {
189 DRM_ERROR("Failed to register debugfs file for IB !\n");
194 void radeon_ib_pool_fini(struct radeon_device *rdev)
196 if (!rdev->ib_pool.ready) {
199 mutex_lock(&rdev->ib_pool.mutex);
200 bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
201 if (rdev->ib_pool.robj) {
202 radeon_object_kunmap(rdev->ib_pool.robj);
203 radeon_object_unref(&rdev->ib_pool.robj);
204 rdev->ib_pool.robj = NULL;
206 mutex_unlock(&rdev->ib_pool.mutex);
213 void radeon_ring_free_size(struct radeon_device *rdev)
215 if (rdev->family >= CHIP_R600)
216 rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);
218 rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
219 /* This works because ring_size is a power of 2 */
220 rdev->cp.ring_free_dw = (rdev->cp.rptr + (rdev->cp.ring_size / 4));
221 rdev->cp.ring_free_dw -= rdev->cp.wptr;
222 rdev->cp.ring_free_dw &= rdev->cp.ptr_mask;
223 if (!rdev->cp.ring_free_dw) {
224 rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
228 int radeon_ring_lock(struct radeon_device *rdev, unsigned ndw)
232 /* Align requested size with padding so unlock_commit can
234 ndw = (ndw + rdev->cp.align_mask) & ~rdev->cp.align_mask;
235 mutex_lock(&rdev->cp.mutex);
236 while (ndw > (rdev->cp.ring_free_dw - 1)) {
237 radeon_ring_free_size(rdev);
238 if (ndw < rdev->cp.ring_free_dw) {
241 r = radeon_fence_wait_next(rdev);
243 mutex_unlock(&rdev->cp.mutex);
247 rdev->cp.count_dw = ndw;
248 rdev->cp.wptr_old = rdev->cp.wptr;
252 void radeon_ring_unlock_commit(struct radeon_device *rdev)
254 unsigned count_dw_pad;
257 /* We pad to match fetch size */
258 count_dw_pad = (rdev->cp.align_mask + 1) -
259 (rdev->cp.wptr & rdev->cp.align_mask);
260 for (i = 0; i < count_dw_pad; i++) {
261 radeon_ring_write(rdev, 2 << 30);
264 radeon_cp_commit(rdev);
265 mutex_unlock(&rdev->cp.mutex);
268 void radeon_ring_unlock_undo(struct radeon_device *rdev)
270 rdev->cp.wptr = rdev->cp.wptr_old;
271 mutex_unlock(&rdev->cp.mutex);
274 int radeon_ring_init(struct radeon_device *rdev, unsigned ring_size)
278 rdev->cp.ring_size = ring_size;
279 /* Allocate ring buffer */
280 if (rdev->cp.ring_obj == NULL) {
281 r = radeon_object_create(rdev, NULL, rdev->cp.ring_size,
283 RADEON_GEM_DOMAIN_GTT,
287 DRM_ERROR("radeon: failed to create ring buffer (%d).\n", r);
288 mutex_unlock(&rdev->cp.mutex);
291 r = radeon_object_pin(rdev->cp.ring_obj,
292 RADEON_GEM_DOMAIN_GTT,
295 DRM_ERROR("radeon: failed to pin ring buffer (%d).\n", r);
296 mutex_unlock(&rdev->cp.mutex);
299 r = radeon_object_kmap(rdev->cp.ring_obj,
300 (void **)&rdev->cp.ring);
302 DRM_ERROR("radeon: failed to map ring buffer (%d).\n", r);
303 mutex_unlock(&rdev->cp.mutex);
307 rdev->cp.ptr_mask = (rdev->cp.ring_size / 4) - 1;
308 rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
312 void radeon_ring_fini(struct radeon_device *rdev)
314 mutex_lock(&rdev->cp.mutex);
315 if (rdev->cp.ring_obj) {
316 radeon_object_kunmap(rdev->cp.ring_obj);
317 radeon_object_unpin(rdev->cp.ring_obj);
318 radeon_object_unref(&rdev->cp.ring_obj);
319 rdev->cp.ring = NULL;
320 rdev->cp.ring_obj = NULL;
322 mutex_unlock(&rdev->cp.mutex);
329 #if defined(CONFIG_DEBUG_FS)
330 static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
332 struct drm_info_node *node = (struct drm_info_node *) m->private;
333 struct radeon_ib *ib = node->info_ent->data;
339 seq_printf(m, "IB %04lu\n", ib->idx);
340 seq_printf(m, "IB fence %p\n", ib->fence);
341 seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
342 for (i = 0; i < ib->length_dw; i++) {
343 seq_printf(m, "[%05u]=0x%08X\n", i, ib->ptr[i]);
348 static struct drm_info_list radeon_debugfs_ib_list[RADEON_IB_POOL_SIZE];
349 static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
352 int radeon_debugfs_ib_init(struct radeon_device *rdev)
354 #if defined(CONFIG_DEBUG_FS)
357 for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
358 sprintf(radeon_debugfs_ib_names[i], "radeon_ib_%04u", i);
359 radeon_debugfs_ib_list[i].name = radeon_debugfs_ib_names[i];
360 radeon_debugfs_ib_list[i].show = &radeon_debugfs_ib_info;
361 radeon_debugfs_ib_list[i].driver_features = 0;
362 radeon_debugfs_ib_list[i].data = &rdev->ib_pool.ibs[i];
364 return radeon_debugfs_add_files(rdev, radeon_debugfs_ib_list,
365 RADEON_IB_POOL_SIZE);