drivers/gpu/drm/radeon/radeon_fb.c

   1 /*
   2  * Copyright © 2007 David Airlie
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *     David Airlie
  25  */
  26     /*
  27      *  Modularization
  28      */
  29
  30 #include <linux/module.h>
  31 #include <linux/fb.h>
  32
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "drm_crtc.h"
  36 #include "drm_crtc_helper.h"
  37 #include "radeon_drm.h"
  38 #include "radeon.h"
  39
  40 #include "drm_fb_helper.h"
  41
  42 #include <linux/vga_switcheroo.h>
  43
  44 struct radeon_fb_device {
  45         struct drm_fb_helper helper;
  46         struct radeon_framebuffer       *rfb;
  47         struct radeon_device            *rdev;
  48 };
  49
  50 static struct fb_ops radeonfb_ops = {
  51         .owner = THIS_MODULE,
  52         .fb_check_var = drm_fb_helper_check_var,
  53         .fb_set_par = drm_fb_helper_set_par,
  54         .fb_setcolreg = drm_fb_helper_setcolreg,
  55         .fb_fillrect = cfb_fillrect,
  56         .fb_copyarea = cfb_copyarea,
  57         .fb_imageblit = cfb_imageblit,
  58         .fb_pan_display = drm_fb_helper_pan_display,
  59         .fb_blank = drm_fb_helper_blank,
  60         .fb_setcmap = drm_fb_helper_setcmap,
  61 };
  62
  63 /**
  64  * Currently it is assumed that the old framebuffer is reused.
  65  *
  66  * LOCKING
  67  * caller should hold the mode config lock.
  68  *
  69  */
  70 int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
  71 {
  72         struct fb_info *info;
  73         struct drm_framebuffer *fb;
  74         struct drm_display_mode *mode = crtc->desired_mode;
  75
  76         fb = crtc->fb;
  77         if (fb == NULL) {
  78                 return 1;
  79         }
  80         info = fb->fbdev;
  81         if (info == NULL) {
  82                 return 1;
  83         }
  84         if (mode == NULL) {
  85                 return 1;
  86         }
  87         info->var.xres = mode->hdisplay;
  88         info->var.right_margin = mode->hsync_start - mode->hdisplay;
  89         info->var.hsync_len = mode->hsync_end - mode->hsync_start;
  90         info->var.left_margin = mode->htotal - mode->hsync_end;
  91         info->var.yres = mode->vdisplay;
  92         info->var.lower_margin = mode->vsync_start - mode->vdisplay;
  93         info->var.vsync_len = mode->vsync_end - mode->vsync_start;
  94         info->var.upper_margin = mode->vtotal - mode->vsync_end;
  95         info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
  96         /* avoid overflow */
  97         info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
  98
  99         return 0;
 100 }
 101 EXPORT_SYMBOL(radeonfb_resize);
 102
 103 static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
 104 {
 105         int aligned = width;
 106         int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
 107         int pitch_mask = 0;
 108
 109         switch (bpp / 8) {
 110         case 1:
 111                 pitch_mask = align_large ? 255 : 127;
 112                 break;
 113         case 2:
 114                 pitch_mask = align_large ? 127 : 31;
 115                 break;
 116         case 3:
 117         case 4:
 118                 pitch_mask = align_large ? 63 : 15;
 119                 break;
 120         }
 121
 122         aligned += pitch_mask;
 123         aligned &= ~pitch_mask;
 124         return aligned;
 125 }
 126
 127 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
 128         .gamma_set = radeon_crtc_fb_gamma_set,
 129         .gamma_get = radeon_crtc_fb_gamma_get,
 130 };
 131
 132 int radeonfb_create(struct drm_device *dev,
 133                     uint32_t fb_width, uint32_t fb_height,
 134                     uint32_t surface_width, uint32_t surface_height,
 135                     uint32_t surface_depth, uint32_t surface_bpp,
 136                     struct drm_framebuffer **fb_p)
 137 {
 138         struct radeon_device *rdev = dev->dev_private;
 139         struct fb_info *info;
 140         struct radeon_fb_device *rfbdev;
 141         struct drm_framebuffer *fb = NULL;
 142         struct radeon_framebuffer *rfb;
 143         struct drm_mode_fb_cmd mode_cmd;
 144         struct drm_gem_object *gobj = NULL;
 145         struct radeon_bo *rbo = NULL;
 146         struct device *device = &rdev->pdev->dev;
 147         int size, aligned_size, ret;
 148         u64 fb_gpuaddr;
 149         void *fbptr = NULL;
 150         unsigned long tmp;
 151         bool fb_tiled = false; /* useful for testing */
 152         u32 tiling_flags = 0;
 153
 154         mode_cmd.width = surface_width;
 155         mode_cmd.height = surface_height;
 156
 157         /* avivo can't scanout real 24bpp */
 158         if ((surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
 159                 surface_bpp = 32;
 160
 161         mode_cmd.bpp = surface_bpp;
 162         /* need to align pitch with crtc limits */
 163         mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
 164         mode_cmd.depth = surface_depth;
 165
 166         size = mode_cmd.pitch * mode_cmd.height;
 167         aligned_size = ALIGN(size, PAGE_SIZE);
 168
 169         ret = radeon_gem_object_create(rdev, aligned_size, 0,
 170                         RADEON_GEM_DOMAIN_VRAM,
 171                         false, ttm_bo_type_kernel,
 172                         &gobj);
 173         if (ret) {
 174                 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
 175                        surface_width, surface_height);
 176                 ret = -ENOMEM;
 177                 goto out;
 178         }
 179         rbo = gobj->driver_private;
 180
 181         if (fb_tiled)
 182                 tiling_flags = RADEON_TILING_MACRO;
 183
 184 #ifdef __BIG_ENDIAN
 185         switch (mode_cmd.bpp) {
 186         case 32:
 187                 tiling_flags |= RADEON_TILING_SWAP_32BIT;
 188                 break;
 189         case 16:
 190                 tiling_flags |= RADEON_TILING_SWAP_16BIT;
 191         default:
 192                 break;
 193         }
 194 #endif
 195
 196         if (tiling_flags) {
 197                 ret = radeon_bo_set_tiling_flags(rbo,
 198                                         tiling_flags | RADEON_TILING_SURFACE,
 199                                         mode_cmd.pitch);
 200                 if (ret)
 201                         dev_err(rdev->dev, "FB failed to set tiling flags\n");
 202         }
 203         mutex_lock(&rdev->ddev->struct_mutex);
 204         fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
 205         if (fb == NULL) {
 206                 DRM_ERROR("failed to allocate fb.\n");
 207                 ret = -ENOMEM;
 208                 goto out_unref;
 209         }
 210         ret = radeon_bo_reserve(rbo, false);
 211         if (unlikely(ret != 0))
 212                 goto out_unref;
 213         ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
 214         if (ret) {
 215                 radeon_bo_unreserve(rbo);
 216                 goto out_unref;
 217         }
 218         if (fb_tiled)
 219                 radeon_bo_check_tiling(rbo, 0, 0);
 220         ret = radeon_bo_kmap(rbo, &fbptr);
 221         radeon_bo_unreserve(rbo);
 222         if (ret) {
 223                 goto out_unref;
 224         }
 225
 226         list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
 227
 228         *fb_p = fb;
 229         rfb = to_radeon_framebuffer(fb);
 230         rdev->fbdev_rfb = rfb;
 231         rdev->fbdev_rbo = rbo;
 232
 233         info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
 234         if (info == NULL) {
 235                 ret = -ENOMEM;
 236                 goto out_unref;
 237         }
 238
 239         rdev->fbdev_info = info;
 240         rfbdev = info->par;
 241         rfbdev->helper.funcs = &radeon_fb_helper_funcs;
 242         rfbdev->helper.dev = dev;
 243         ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, rdev->num_crtc,
 244                                             RADEONFB_CONN_LIMIT);
 245         if (ret)
 246                 goto out_unref;
 247
 248         memset_io(fbptr, 0x0, aligned_size);
 249
 250         strcpy(info->fix.id, "radeondrmfb");
 251
 252         drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
 253
 254         info->flags = FBINFO_DEFAULT;
 255         info->fbops = &radeonfb_ops;
 256
 257         tmp = fb_gpuaddr - rdev->mc.vram_start;
 258         info->fix.smem_start = rdev->mc.aper_base + tmp;
 259         info->fix.smem_len = size;
 260         info->screen_base = fbptr;
 261         info->screen_size = size;
 262
 263         drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
 264
 265         /* setup aperture base/size for vesafb takeover */
 266         info->aperture_base = rdev->ddev->mode_config.fb_base;
 267         info->aperture_size = rdev->mc.real_vram_size;
 268
 269         info->fix.mmio_start = 0;
 270         info->fix.mmio_len = 0;
 271         info->pixmap.size = 64*1024;
 272         info->pixmap.buf_align = 8;
 273         info->pixmap.access_align = 32;
 274         info->pixmap.flags = FB_PIXMAP_SYSTEM;
 275         info->pixmap.scan_align = 1;
 276         if (info->screen_base == NULL) {
 277                 ret = -ENOSPC;
 278                 goto out_unref;
 279         }
 280         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
 281         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
 282         DRM_INFO("size %lu\n", (unsigned long)size);
 283         DRM_INFO("fb depth is %d\n", fb->depth);
 284         DRM_INFO("   pitch is %d\n", fb->pitch);
 285
 286         fb->fbdev = info;
 287         rfbdev->rfb = rfb;
 288         rfbdev->rdev = rdev;
 289
 290         mutex_unlock(&rdev->ddev->struct_mutex);
 291         vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
 292         return 0;
 293
 294 out_unref:
 295         if (rbo) {
 296                 ret = radeon_bo_reserve(rbo, false);
 297                 if (likely(ret == 0)) {
 298                         radeon_bo_kunmap(rbo);
 299                         radeon_bo_unreserve(rbo);
 300                 }
 301         }
 302         if (fb && ret) {
 303                 list_del(&fb->filp_head);
 304                 drm_gem_object_unreference(gobj);
 305                 drm_framebuffer_cleanup(fb);
 306                 kfree(fb);
 307         }
 308         drm_gem_object_unreference(gobj);
 309         mutex_unlock(&rdev->ddev->struct_mutex);
 310 out:
 311         return ret;
 312 }
 313
 314 static char *mode_option;
 315 int radeon_parse_options(char *options)
 316 {
 317         char *this_opt;
 318
 319         if (!options || !*options)
 320                 return 0;
 321
 322         while ((this_opt = strsep(&options, ",")) != NULL) {
 323                 if (!*this_opt)
 324                         continue;
 325                 mode_option = this_opt;
 326         }
 327         return 0;
 328 }
 329
 330 int radeonfb_probe(struct drm_device *dev)
 331 {
 332         struct radeon_device *rdev = dev->dev_private;
 333         int bpp_sel = 32;
 334
 335         /* select 8 bpp console on RN50 or 16MB cards */
 336         if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
 337                 bpp_sel = 8;
 338
 339         return drm_fb_helper_single_fb_probe(dev, bpp_sel, &radeonfb_create);
 340 }
 341
 342 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
 343 {
 344         struct fb_info *info;
 345         struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
 346         struct radeon_bo *rbo;
 347         int r;
 348
 349         if (!fb) {
 350                 return -EINVAL;
 351         }
 352         info = fb->fbdev;
 353         if (info) {
 354                 struct radeon_fb_device *rfbdev = info->par;
 355                 rbo = rfb->obj->driver_private;
 356                 unregister_framebuffer(info);
 357                 r = radeon_bo_reserve(rbo, false);
 358                 if (likely(r == 0)) {
 359                         radeon_bo_kunmap(rbo);
 360                         radeon_bo_unpin(rbo);
 361                         radeon_bo_unreserve(rbo);
 362                 }
 363                 drm_fb_helper_free(&rfbdev->helper);
 364                 framebuffer_release(info);
 365         }
 366
 367         printk(KERN_INFO "unregistered panic notifier\n");
 368
 369         return 0;
 370 }
 371 EXPORT_SYMBOL(radeonfb_remove);
 372 MODULE_LICENSE("GPL");