drivers/gpu/drm/radeon/radeon_drv.c

   1 /**
   2  * \file radeon_drv.c
   3  * ATI Radeon driver
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  10  * All Rights Reserved.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a
  13  * copy of this software and associated documentation files (the "Software"),
  14  * to deal in the Software without restriction, including without limitation
  15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  16  * and/or sell copies of the Software, and to permit persons to whom the
  17  * Software is furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice (including the next
  20  * paragraph) shall be included in all copies or substantial portions of the
  21  * Software.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  29  * OTHER DEALINGS IN THE SOFTWARE.
  30  */
  31
  32 #include <drm/drmP.h>
  33 #include <drm/radeon_drm.h>
  34 #include "radeon_drv.h"
  35
  36 #include <drm/drm_pciids.h>
  37 #include <linux/console.h>
  38 #include <linux/module.h>
  39
  40
  41 /*
  42  * KMS wrapper.
  43  * - 2.0.0 - initial interface
  44  * - 2.1.0 - add square tiling interface
  45  * - 2.2.0 - add r6xx/r7xx const buffer support
  46  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  47  * - 2.4.0 - add crtc id query
  48  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  49  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  50  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  51  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  52  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  53  *   2.10.0 - fusion 2D tiling
  54  *   2.11.0 - backend map, initial compute support for the CS checker
  55  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  56  *   2.13.0 - virtual memory support, streamout
  57  *   2.14.0 - add evergreen tiling informations
  58  *   2.15.0 - add max_pipes query
  59  *   2.16.0 - fix evergreen 2D tiled surface calculation
  60  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  61  *   2.18.0 - r600-eg: allow "invalid" DB formats
  62  *   2.19.0 - r600-eg: MSAA textures
  63  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  64  *   2.21.0 - r600-r700: FMASK and CMASK
  65  *   2.22.0 - r600 only: RESOLVE_BOX allowed
  66  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  67  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  68  *   2.25.0 - eg+: new info request for num SE and num SH
  69  *   2.26.0 - r600-eg: fix htile size computation
  70  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  71  */
  72 #define KMS_DRIVER_MAJOR        2
  73 #define KMS_DRIVER_MINOR        27
  74 #define KMS_DRIVER_PATCHLEVEL   0
  75 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
  76 int radeon_driver_unload_kms(struct drm_device *dev);
  77 int radeon_driver_firstopen_kms(struct drm_device *dev);
  78 void radeon_driver_lastclose_kms(struct drm_device *dev);
  79 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
  80 void radeon_driver_postclose_kms(struct drm_device *dev,
  81                                  struct drm_file *file_priv);
  82 void radeon_driver_preclose_kms(struct drm_device *dev,
  83                                 struct drm_file *file_priv);
  84 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
  85 int radeon_resume_kms(struct drm_device *dev);
  86 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
  87 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
  88 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
  89 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
  90                                     int *max_error,
  91                                     struct timeval *vblank_time,
  92                                     unsigned flags);
  93 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
  94 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
  95 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
  96 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
  97 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
  98                          struct drm_file *file_priv);
  99 int radeon_gem_object_init(struct drm_gem_object *obj);
 100 void radeon_gem_object_free(struct drm_gem_object *obj);
 101 int radeon_gem_object_open(struct drm_gem_object *obj,
 102                                 struct drm_file *file_priv);
 103 void radeon_gem_object_close(struct drm_gem_object *obj,
 104                                 struct drm_file *file_priv);
 105 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
 106                                       int *vpos, int *hpos);
 107 extern struct drm_ioctl_desc radeon_ioctls_kms[];
 108 extern int radeon_max_kms_ioctl;
 109 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 110 int radeon_mode_dumb_mmap(struct drm_file *filp,
 111                           struct drm_device *dev,
 112                           uint32_t handle, uint64_t *offset_p);
 113 int radeon_mode_dumb_create(struct drm_file *file_priv,
 114                             struct drm_device *dev,
 115                             struct drm_mode_create_dumb *args);
 116 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
 117                              struct drm_device *dev,
 118                              uint32_t handle);
 119 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
 120                                         struct drm_gem_object *obj,
 121                                         int flags);
 122 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
 123                                                struct dma_buf *dma_buf);
 124
 125 #if defined(CONFIG_DEBUG_FS)
 126 int radeon_debugfs_init(struct drm_minor *minor);
 127 void radeon_debugfs_cleanup(struct drm_minor *minor);
 128 #endif
 129
 130
 131 int radeon_no_wb;
 132 int radeon_modeset = -1;
 133 int radeon_dynclks = -1;
 134 int radeon_r4xx_atom = 0;
 135 int radeon_agpmode = 0;
 136 int radeon_vram_limit = 0;
 137 int radeon_gart_size = 512; /* default gart size */
 138 int radeon_benchmarking = 0;
 139 int radeon_testing = 0;
 140 int radeon_connector_table = 0;
 141 int radeon_tv = 1;
 142 int radeon_audio = 0;
 143 int radeon_disp_priority = 0;
 144 int radeon_hw_i2c = 0;
 145 int radeon_pcie_gen2 = -1;
 146 int radeon_msi = -1;
 147 int radeon_lockup_timeout = 10000;
 148
 149 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 150 module_param_named(no_wb, radeon_no_wb, int, 0444);
 151
 152 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 153 module_param_named(modeset, radeon_modeset, int, 0400);
 154
 155 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
 156 module_param_named(dynclks, radeon_dynclks, int, 0444);
 157
 158 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 159 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 160
 161 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
 162 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 163
 164 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
 165 module_param_named(agpmode, radeon_agpmode, int, 0444);
 166
 167 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
 168 module_param_named(gartsize, radeon_gart_size, int, 0600);
 169
 170 MODULE_PARM_DESC(benchmark, "Run benchmark");
 171 module_param_named(benchmark, radeon_benchmarking, int, 0444);
 172
 173 MODULE_PARM_DESC(test, "Run tests");
 174 module_param_named(test, radeon_testing, int, 0444);
 175
 176 MODULE_PARM_DESC(connector_table, "Force connector table");
 177 module_param_named(connector_table, radeon_connector_table, int, 0444);
 178
 179 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 180 module_param_named(tv, radeon_tv, int, 0444);
 181
 182 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
 183 module_param_named(audio, radeon_audio, int, 0444);
 184
 185 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
 186 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
 187
 188 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
 189 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
 190
 191 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
 192 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
 193
 194 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
 195 module_param_named(msi, radeon_msi, int, 0444);
 196
 197 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
 198 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
 199
 200 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
 201 {
 202         drm_radeon_private_t *dev_priv = dev->dev_private;
 203
 204         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
 205                 return 0;
 206
 207         /* Disable *all* interrupts */
 208         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 209                 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
 210         RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 211         return 0;
 212 }
 213
 214 static int radeon_resume(struct drm_device *dev)
 215 {
 216         drm_radeon_private_t *dev_priv = dev->dev_private;
 217
 218         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
 219                 return 0;
 220
 221         /* Restore interrupt registers */
 222         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 223                 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
 224         RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
 225         return 0;
 226 }
 227
 228 static struct pci_device_id pciidlist[] = {
 229         radeon_PCI_IDS
 230 };
 231
 232 #if defined(CONFIG_DRM_RADEON_KMS)
 233 MODULE_DEVICE_TABLE(pci, pciidlist);
 234 #endif
 235
 236 static const struct file_operations radeon_driver_old_fops = {
 237         .owner = THIS_MODULE,
 238         .open = drm_open,
 239         .release = drm_release,
 240         .unlocked_ioctl = drm_ioctl,
 241         .mmap = drm_mmap,
 242         .poll = drm_poll,
 243         .fasync = drm_fasync,
 244         .read = drm_read,
 245 #ifdef CONFIG_COMPAT
 246         .compat_ioctl = radeon_compat_ioctl,
 247 #endif
 248         .llseek = noop_llseek,
 249 };
 250
 251 static struct drm_driver driver_old = {
 252         .driver_features =
 253             DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
 254             DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
 255         .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
 256         .load = radeon_driver_load,
 257         .firstopen = radeon_driver_firstopen,
 258         .open = radeon_driver_open,
 259         .preclose = radeon_driver_preclose,
 260         .postclose = radeon_driver_postclose,
 261         .lastclose = radeon_driver_lastclose,
 262         .unload = radeon_driver_unload,
 263         .suspend = radeon_suspend,
 264         .resume = radeon_resume,
 265         .get_vblank_counter = radeon_get_vblank_counter,
 266         .enable_vblank = radeon_enable_vblank,
 267         .disable_vblank = radeon_disable_vblank,
 268         .master_create = radeon_master_create,
 269         .master_destroy = radeon_master_destroy,
 270         .irq_preinstall = radeon_driver_irq_preinstall,
 271         .irq_postinstall = radeon_driver_irq_postinstall,
 272         .irq_uninstall = radeon_driver_irq_uninstall,
 273         .irq_handler = radeon_driver_irq_handler,
 274         .ioctls = radeon_ioctls,
 275         .dma_ioctl = radeon_cp_buffers,
 276         .fops = &radeon_driver_old_fops,
 277         .name = DRIVER_NAME,
 278         .desc = DRIVER_DESC,
 279         .date = DRIVER_DATE,
 280         .major = DRIVER_MAJOR,
 281         .minor = DRIVER_MINOR,
 282         .patchlevel = DRIVER_PATCHLEVEL,
 283 };
 284
 285 static struct drm_driver kms_driver;
 286
 287 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
 288 {
 289         struct apertures_struct *ap;
 290         bool primary = false;
 291
 292         ap = alloc_apertures(1);
 293         if (!ap)
 294                 return -ENOMEM;
 295
 296         ap->ranges[0].base = pci_resource_start(pdev, 0);
 297         ap->ranges[0].size = pci_resource_len(pdev, 0);
 298
 299 #ifdef CONFIG_X86
 300         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 301 #endif
 302         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
 303         kfree(ap);
 304
 305         return 0;
 306 }
 307
 308 static int __devinit
 309 radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 310 {
 311         int ret;
 312
 313         /* Get rid of things like offb */
 314         ret = radeon_kick_out_firmware_fb(pdev);
 315         if (ret)
 316                 return ret;
 317
 318         return drm_get_pci_dev(pdev, ent, &kms_driver);
 319 }
 320
 321 static void
 322 radeon_pci_remove(struct pci_dev *pdev)
 323 {
 324         struct drm_device *dev = pci_get_drvdata(pdev);
 325
 326         drm_put_dev(dev);
 327 }
 328
 329 static int
 330 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 331 {
 332         struct drm_device *dev = pci_get_drvdata(pdev);
 333         return radeon_suspend_kms(dev, state);
 334 }
 335
 336 static int
 337 radeon_pci_resume(struct pci_dev *pdev)
 338 {
 339         struct drm_device *dev = pci_get_drvdata(pdev);
 340         return radeon_resume_kms(dev);
 341 }
 342
 343 static const struct file_operations radeon_driver_kms_fops = {
 344         .owner = THIS_MODULE,
 345         .open = drm_open,
 346         .release = drm_release,
 347         .unlocked_ioctl = drm_ioctl,
 348         .mmap = radeon_mmap,
 349         .poll = drm_poll,
 350         .fasync = drm_fasync,
 351         .read = drm_read,
 352 #ifdef CONFIG_COMPAT
 353         .compat_ioctl = radeon_kms_compat_ioctl,
 354 #endif
 355 };
 356
 357 static struct drm_driver kms_driver = {
 358         .driver_features =
 359             DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
 360             DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
 361             DRIVER_PRIME,
 362         .dev_priv_size = 0,
 363         .load = radeon_driver_load_kms,
 364         .firstopen = radeon_driver_firstopen_kms,
 365         .open = radeon_driver_open_kms,
 366         .preclose = radeon_driver_preclose_kms,
 367         .postclose = radeon_driver_postclose_kms,
 368         .lastclose = radeon_driver_lastclose_kms,
 369         .unload = radeon_driver_unload_kms,
 370         .suspend = radeon_suspend_kms,
 371         .resume = radeon_resume_kms,
 372         .get_vblank_counter = radeon_get_vblank_counter_kms,
 373         .enable_vblank = radeon_enable_vblank_kms,
 374         .disable_vblank = radeon_disable_vblank_kms,
 375         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
 376         .get_scanout_position = radeon_get_crtc_scanoutpos,
 377 #if defined(CONFIG_DEBUG_FS)
 378         .debugfs_init = radeon_debugfs_init,
 379         .debugfs_cleanup = radeon_debugfs_cleanup,
 380 #endif
 381         .irq_preinstall = radeon_driver_irq_preinstall_kms,
 382         .irq_postinstall = radeon_driver_irq_postinstall_kms,
 383         .irq_uninstall = radeon_driver_irq_uninstall_kms,
 384         .irq_handler = radeon_driver_irq_handler_kms,
 385         .ioctls = radeon_ioctls_kms,
 386         .gem_init_object = radeon_gem_object_init,
 387         .gem_free_object = radeon_gem_object_free,
 388         .gem_open_object = radeon_gem_object_open,
 389         .gem_close_object = radeon_gem_object_close,
 390         .dma_ioctl = radeon_dma_ioctl_kms,
 391         .dumb_create = radeon_mode_dumb_create,
 392         .dumb_map_offset = radeon_mode_dumb_mmap,
 393         .dumb_destroy = radeon_mode_dumb_destroy,
 394         .fops = &radeon_driver_kms_fops,
 395
 396         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 397         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 398         .gem_prime_export = radeon_gem_prime_export,
 399         .gem_prime_import = radeon_gem_prime_import,
 400
 401         .name = DRIVER_NAME,
 402         .desc = DRIVER_DESC,
 403         .date = DRIVER_DATE,
 404         .major = KMS_DRIVER_MAJOR,
 405         .minor = KMS_DRIVER_MINOR,
 406         .patchlevel = KMS_DRIVER_PATCHLEVEL,
 407 };
 408
 409 static struct drm_driver *driver;
 410 static struct pci_driver *pdriver;
 411
 412 static struct pci_driver radeon_pci_driver = {
 413         .name = DRIVER_NAME,
 414         .id_table = pciidlist,
 415 };
 416
 417 static struct pci_driver radeon_kms_pci_driver = {
 418         .name = DRIVER_NAME,
 419         .id_table = pciidlist,
 420         .probe = radeon_pci_probe,
 421         .remove = radeon_pci_remove,
 422         .suspend = radeon_pci_suspend,
 423         .resume = radeon_pci_resume,
 424 };
 425
 426 static int __init radeon_init(void)
 427 {
 428         driver = &driver_old;
 429         pdriver = &radeon_pci_driver;
 430         driver->num_ioctls = radeon_max_ioctl;
 431 #ifdef CONFIG_VGA_CONSOLE
 432         if (vgacon_text_force() && radeon_modeset == -1) {
 433                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
 434                 driver = &driver_old;
 435                 pdriver = &radeon_pci_driver;
 436                 driver->driver_features &= ~DRIVER_MODESET;
 437                 radeon_modeset = 0;
 438         }
 439 #endif
 440         /* if enabled by default */
 441         if (radeon_modeset == -1) {
 442 #ifdef CONFIG_DRM_RADEON_KMS
 443                 DRM_INFO("radeon defaulting to kernel modesetting.\n");
 444                 radeon_modeset = 1;
 445 #else
 446                 DRM_INFO("radeon defaulting to userspace modesetting.\n");
 447                 radeon_modeset = 0;
 448 #endif
 449         }
 450         if (radeon_modeset == 1) {
 451                 DRM_INFO("radeon kernel modesetting enabled.\n");
 452                 driver = &kms_driver;
 453                 pdriver = &radeon_kms_pci_driver;
 454                 driver->driver_features |= DRIVER_MODESET;
 455                 driver->num_ioctls = radeon_max_kms_ioctl;
 456                 radeon_register_atpx_handler();
 457         }
 458         /* if the vga console setting is enabled still
 459          * let modprobe override it */
 460         return drm_pci_init(driver, pdriver);
 461 }
 462
 463 static void __exit radeon_exit(void)
 464 {
 465         drm_pci_exit(driver, pdriver);
 466         radeon_unregister_atpx_handler();
 467 }
 468
 469 module_init(radeon_init);
 470 module_exit(radeon_exit);
 471
 472 MODULE_AUTHOR(DRIVER_AUTHOR);
 473 MODULE_DESCRIPTION(DRIVER_DESC);
 474 MODULE_LICENSE("GPL and additional rights");