drivers/gpu/drm/omapdrm/omap_crtc.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_crtc.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "omap_drv.h"
  21
  22 #include <drm/drm_mode.h>
  23 #include "drm_crtc.h"
  24 #include "drm_crtc_helper.h"
  25
  26 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
  27
  28 struct omap_crtc {
  29         struct drm_crtc base;
  30         struct drm_plane *plane;
  31
  32         const char *name;
  33         int pipe;
  34         enum omap_channel channel;
  35         struct omap_overlay_manager_info info;
  36         struct drm_encoder *current_encoder;
  37
  38         /*
  39          * Temporary: eventually this will go away, but it is needed
  40          * for now to keep the output's happy.  (They only need
  41          * mgr->id.)  Eventually this will be replaced w/ something
  42          * more common-panel-framework-y
  43          */
  44         struct omap_overlay_manager *mgr;
  45
  46         struct omap_video_timings timings;
  47         bool enabled;
  48         bool full_update;
  49
  50         struct omap_drm_apply apply;
  51
  52         struct omap_drm_irq apply_irq;
  53         struct omap_drm_irq error_irq;
  54
  55         /* list of in-progress apply's: */
  56         struct list_head pending_applies;
  57
  58         /* list of queued apply's: */
  59         struct list_head queued_applies;
  60
  61         /* for handling queued and in-progress applies: */
  62         struct work_struct apply_work;
  63
  64         /* if there is a pending flip, these will be non-null: */
  65         struct drm_pending_vblank_event *event;
  66         struct drm_framebuffer *old_fb;
  67
  68         /* for handling page flips without caring about what
  69          * the callback is called from.  Possibly we should just
  70          * make omap_gem always call the cb from the worker so
  71          * we don't have to care about this..
  72          *
  73          * XXX maybe fold into apply_work??
  74          */
  75         struct work_struct page_flip_work;
  76 };
  77
  78 uint32_t pipe2vbl(struct drm_crtc *crtc)
  79 {
  80         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  81
  82         return dispc_mgr_get_vsync_irq(omap_crtc->channel);
  83 }
  84
  85 /*
  86  * Manager-ops, callbacks from output when they need to configure
  87  * the upstream part of the video pipe.
  88  *
  89  * Most of these we can ignore until we add support for command-mode
  90  * panels.. for video-mode the crtc-helpers already do an adequate
  91  * job of sequencing the setup of the video pipe in the proper order
  92  */
  93
  94 /* ovl-mgr-id -> crtc */
  95 static struct omap_crtc *omap_crtcs[8];
  96
  97 /* we can probably ignore these until we support command-mode panels: */
  98 static int omap_crtc_connect(struct omap_overlay_manager *mgr,
  99                 struct omap_dss_device *dst)
 100 {
 101         if (mgr->output)
 102                 return -EINVAL;
 103
 104         if ((mgr->supported_outputs & dst->id) == 0)
 105                 return -EINVAL;
 106
 107         dst->manager = mgr;
 108         mgr->output = dst;
 109
 110         return 0;
 111 }
 112
 113 static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
 114                 struct omap_dss_device *dst)
 115 {
 116         mgr->output->manager = NULL;
 117         mgr->output = NULL;
 118 }
 119
 120 static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
 121 {
 122 }
 123
 124 static void set_enabled(struct drm_crtc *crtc, bool enable);
 125
 126 static int omap_crtc_enable(struct omap_overlay_manager *mgr)
 127 {
 128         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 129
 130         dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
 131         dispc_mgr_set_timings(omap_crtc->channel,
 132                         &omap_crtc->timings);
 133         set_enabled(&omap_crtc->base, true);
 134
 135         return 0;
 136 }
 137
 138 static void omap_crtc_disable(struct omap_overlay_manager *mgr)
 139 {
 140         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 141
 142         set_enabled(&omap_crtc->base, false);
 143 }
 144
 145 static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
 146                 const struct omap_video_timings *timings)
 147 {
 148         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 149         DBG("%s", omap_crtc->name);
 150         omap_crtc->timings = *timings;
 151         omap_crtc->full_update = true;
 152 }
 153
 154 static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
 155                 const struct dss_lcd_mgr_config *config)
 156 {
 157         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 158         DBG("%s", omap_crtc->name);
 159         dispc_mgr_set_lcd_config(omap_crtc->channel, config);
 160 }
 161
 162 static int omap_crtc_register_framedone_handler(
 163                 struct omap_overlay_manager *mgr,
 164                 void (*handler)(void *), void *data)
 165 {
 166         return 0;
 167 }
 168
 169 static void omap_crtc_unregister_framedone_handler(
 170                 struct omap_overlay_manager *mgr,
 171                 void (*handler)(void *), void *data)
 172 {
 173 }
 174
 175 static const struct dss_mgr_ops mgr_ops = {
 176                 .connect = omap_crtc_connect,
 177                 .disconnect = omap_crtc_disconnect,
 178                 .start_update = omap_crtc_start_update,
 179                 .enable = omap_crtc_enable,
 180                 .disable = omap_crtc_disable,
 181                 .set_timings = omap_crtc_set_timings,
 182                 .set_lcd_config = omap_crtc_set_lcd_config,
 183                 .register_framedone_handler = omap_crtc_register_framedone_handler,
 184                 .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
 185 };
 186
 187 /*
 188  * CRTC funcs:
 189  */
 190
 191 static void omap_crtc_destroy(struct drm_crtc *crtc)
 192 {
 193         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 194
 195         DBG("%s", omap_crtc->name);
 196
 197         WARN_ON(omap_crtc->apply_irq.registered);
 198         omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 199
 200         drm_crtc_cleanup(crtc);
 201
 202         kfree(omap_crtc);
 203 }
 204
 205 static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
 206 {
 207         struct omap_drm_private *priv = crtc->dev->dev_private;
 208         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 209         bool enabled = (mode == DRM_MODE_DPMS_ON);
 210         int i;
 211
 212         DBG("%s: %d", omap_crtc->name, mode);
 213
 214         if (enabled != omap_crtc->enabled) {
 215                 omap_crtc->enabled = enabled;
 216                 omap_crtc->full_update = true;
 217                 omap_crtc_apply(crtc, &omap_crtc->apply);
 218
 219                 /* also enable our private plane: */
 220                 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
 221
 222                 /* and any attached overlay planes: */
 223                 for (i = 0; i < priv->num_planes; i++) {
 224                         struct drm_plane *plane = priv->planes[i];
 225                         if (plane->crtc == crtc)
 226                                 WARN_ON(omap_plane_dpms(plane, mode));
 227                 }
 228         }
 229 }
 230
 231 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
 232                 const struct drm_display_mode *mode,
 233                 struct drm_display_mode *adjusted_mode)
 234 {
 235         return true;
 236 }
 237
 238 static int omap_crtc_mode_set(struct drm_crtc *crtc,
 239                 struct drm_display_mode *mode,
 240                 struct drm_display_mode *adjusted_mode,
 241                 int x, int y,
 242                 struct drm_framebuffer *old_fb)
 243 {
 244         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 245
 246         mode = adjusted_mode;
 247
 248         DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
 249                         omap_crtc->name, mode->base.id, mode->name,
 250                         mode->vrefresh, mode->clock,
 251                         mode->hdisplay, mode->hsync_start,
 252                         mode->hsync_end, mode->htotal,
 253                         mode->vdisplay, mode->vsync_start,
 254                         mode->vsync_end, mode->vtotal,
 255                         mode->type, mode->flags);
 256
 257         copy_timings_drm_to_omap(&omap_crtc->timings, mode);
 258         omap_crtc->full_update = true;
 259
 260         return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->primary->fb,
 261                         0, 0, mode->hdisplay, mode->vdisplay,
 262                         x << 16, y << 16,
 263                         mode->hdisplay << 16, mode->vdisplay << 16,
 264                         NULL, NULL);
 265 }
 266
 267 static void omap_crtc_prepare(struct drm_crtc *crtc)
 268 {
 269         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 270         DBG("%s", omap_crtc->name);
 271         omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
 272 }
 273
 274 static void omap_crtc_commit(struct drm_crtc *crtc)
 275 {
 276         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 277         DBG("%s", omap_crtc->name);
 278         omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
 279 }
 280
 281 static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
 282                 struct drm_framebuffer *old_fb)
 283 {
 284         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 285         struct drm_plane *plane = omap_crtc->plane;
 286         struct drm_display_mode *mode = &crtc->mode;
 287
 288         return omap_plane_mode_set(plane, crtc, crtc->primary->fb,
 289                         0, 0, mode->hdisplay, mode->vdisplay,
 290                         x << 16, y << 16,
 291                         mode->hdisplay << 16, mode->vdisplay << 16,
 292                         NULL, NULL);
 293 }
 294
 295 static void vblank_cb(void *arg)
 296 {
 297         struct drm_crtc *crtc = arg;
 298         struct drm_device *dev = crtc->dev;
 299         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 300         unsigned long flags;
 301
 302         spin_lock_irqsave(&dev->event_lock, flags);
 303
 304         /* wakeup userspace */
 305         if (omap_crtc->event)
 306                 drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
 307
 308         omap_crtc->event = NULL;
 309         omap_crtc->old_fb = NULL;
 310
 311         spin_unlock_irqrestore(&dev->event_lock, flags);
 312 }
 313
 314 static void page_flip_worker(struct work_struct *work)
 315 {
 316         struct omap_crtc *omap_crtc =
 317                         container_of(work, struct omap_crtc, page_flip_work);
 318         struct drm_crtc *crtc = &omap_crtc->base;
 319         struct drm_display_mode *mode = &crtc->mode;
 320         struct drm_gem_object *bo;
 321
 322         mutex_lock(&crtc->mutex);
 323         omap_plane_mode_set(omap_crtc->plane, crtc, crtc->primary->fb,
 324                         0, 0, mode->hdisplay, mode->vdisplay,
 325                         crtc->x << 16, crtc->y << 16,
 326                         mode->hdisplay << 16, mode->vdisplay << 16,
 327                         vblank_cb, crtc);
 328         mutex_unlock(&crtc->mutex);
 329
 330         bo = omap_framebuffer_bo(crtc->primary->fb, 0);
 331         drm_gem_object_unreference_unlocked(bo);
 332 }
 333
 334 static void page_flip_cb(void *arg)
 335 {
 336         struct drm_crtc *crtc = arg;
 337         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 338         struct omap_drm_private *priv = crtc->dev->dev_private;
 339
 340         /* avoid assumptions about what ctxt we are called from: */
 341         queue_work(priv->wq, &omap_crtc->page_flip_work);
 342 }
 343
 344 static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
 345                  struct drm_framebuffer *fb,
 346                  struct drm_pending_vblank_event *event,
 347                  uint32_t page_flip_flags)
 348 {
 349         struct drm_device *dev = crtc->dev;
 350         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 351         struct drm_plane *primary = crtc->primary;
 352         struct drm_gem_object *bo;
 353         unsigned long flags;
 354
 355         DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
 356                         fb->base.id, event);
 357
 358         spin_lock_irqsave(&dev->event_lock, flags);
 359
 360         if (omap_crtc->old_fb) {
 361                 spin_unlock_irqrestore(&dev->event_lock, flags);
 362                 dev_err(dev->dev, "already a pending flip\n");
 363                 return -EINVAL;
 364         }
 365
 366         omap_crtc->event = event;
 367         omap_crtc->old_fb = primary->fb = fb;
 368
 369         spin_unlock_irqrestore(&dev->event_lock, flags);
 370
 371         /*
 372          * Hold a reference temporarily until the crtc is updated
 373          * and takes the reference to the bo.  This avoids it
 374          * getting freed from under us:
 375          */
 376         bo = omap_framebuffer_bo(fb, 0);
 377         drm_gem_object_reference(bo);
 378
 379         omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
 380
 381         return 0;
 382 }
 383
 384 static int omap_crtc_set_property(struct drm_crtc *crtc,
 385                 struct drm_property *property, uint64_t val)
 386 {
 387         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 388         struct omap_drm_private *priv = crtc->dev->dev_private;
 389
 390         if (property == priv->rotation_prop) {
 391                 crtc->invert_dimensions =
 392                                 !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
 393         }
 394
 395         return omap_plane_set_property(omap_crtc->plane, property, val);
 396 }
 397
 398 static const struct drm_crtc_funcs omap_crtc_funcs = {
 399         .set_config = drm_crtc_helper_set_config,
 400         .destroy = omap_crtc_destroy,
 401         .page_flip = omap_crtc_page_flip_locked,
 402         .set_property = omap_crtc_set_property,
 403 };
 404
 405 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
 406         .dpms = omap_crtc_dpms,
 407         .mode_fixup = omap_crtc_mode_fixup,
 408         .mode_set = omap_crtc_mode_set,
 409         .prepare = omap_crtc_prepare,
 410         .commit = omap_crtc_commit,
 411         .mode_set_base = omap_crtc_mode_set_base,
 412 };
 413
 414 const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
 415 {
 416         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 417         return &omap_crtc->timings;
 418 }
 419
 420 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
 421 {
 422         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 423         return omap_crtc->channel;
 424 }
 425
 426 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
 427 {
 428         struct omap_crtc *omap_crtc =
 429                         container_of(irq, struct omap_crtc, error_irq);
 430         struct drm_crtc *crtc = &omap_crtc->base;
 431         DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
 432         /* avoid getting in a flood, unregister the irq until next vblank */
 433         __omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 434 }
 435
 436 static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
 437 {
 438         struct omap_crtc *omap_crtc =
 439                         container_of(irq, struct omap_crtc, apply_irq);
 440         struct drm_crtc *crtc = &omap_crtc->base;
 441
 442         if (!omap_crtc->error_irq.registered)
 443                 __omap_irq_register(crtc->dev, &omap_crtc->error_irq);
 444
 445         if (!dispc_mgr_go_busy(omap_crtc->channel)) {
 446                 struct omap_drm_private *priv =
 447                                 crtc->dev->dev_private;
 448                 DBG("%s: apply done", omap_crtc->name);
 449                 __omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
 450                 queue_work(priv->wq, &omap_crtc->apply_work);
 451         }
 452 }
 453
 454 static void apply_worker(struct work_struct *work)
 455 {
 456         struct omap_crtc *omap_crtc =
 457                         container_of(work, struct omap_crtc, apply_work);
 458         struct drm_crtc *crtc = &omap_crtc->base;
 459         struct drm_device *dev = crtc->dev;
 460         struct omap_drm_apply *apply, *n;
 461         bool need_apply;
 462
 463         /*
 464          * Synchronize everything on mode_config.mutex, to keep
 465          * the callbacks and list modification all serialized
 466          * with respect to modesetting ioctls from userspace.
 467          */
 468         mutex_lock(&crtc->mutex);
 469         dispc_runtime_get();
 470
 471         /*
 472          * If we are still pending a previous update, wait.. when the
 473          * pending update completes, we get kicked again.
 474          */
 475         if (omap_crtc->apply_irq.registered)
 476                 goto out;
 477
 478         /* finish up previous apply's: */
 479         list_for_each_entry_safe(apply, n,
 480                         &omap_crtc->pending_applies, pending_node) {
 481                 apply->post_apply(apply);
 482                 list_del(&apply->pending_node);
 483         }
 484
 485         need_apply = !list_empty(&omap_crtc->queued_applies);
 486
 487         /* then handle the next round of of queued apply's: */
 488         list_for_each_entry_safe(apply, n,
 489                         &omap_crtc->queued_applies, queued_node) {
 490                 apply->pre_apply(apply);
 491                 list_del(&apply->queued_node);
 492                 apply->queued = false;
 493                 list_add_tail(&apply->pending_node,
 494                                 &omap_crtc->pending_applies);
 495         }
 496
 497         if (need_apply) {
 498                 enum omap_channel channel = omap_crtc->channel;
 499
 500                 DBG("%s: GO", omap_crtc->name);
 501
 502                 if (dispc_mgr_is_enabled(channel)) {
 503                         omap_irq_register(dev, &omap_crtc->apply_irq);
 504                         dispc_mgr_go(channel);
 505                 } else {
 506                         struct omap_drm_private *priv = dev->dev_private;
 507                         queue_work(priv->wq, &omap_crtc->apply_work);
 508                 }
 509         }
 510
 511 out:
 512         dispc_runtime_put();
 513         mutex_unlock(&crtc->mutex);
 514 }
 515
 516 int omap_crtc_apply(struct drm_crtc *crtc,
 517                 struct omap_drm_apply *apply)
 518 {
 519         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 520
 521         WARN_ON(!mutex_is_locked(&crtc->mutex));
 522
 523         /* no need to queue it again if it is already queued: */
 524         if (apply->queued)
 525                 return 0;
 526
 527         apply->queued = true;
 528         list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
 529
 530         /*
 531          * If there are no currently pending updates, then go ahead and
 532          * kick the worker immediately, otherwise it will run again when
 533          * the current update finishes.
 534          */
 535         if (list_empty(&omap_crtc->pending_applies)) {
 536                 struct omap_drm_private *priv = crtc->dev->dev_private;
 537                 queue_work(priv->wq, &omap_crtc->apply_work);
 538         }
 539
 540         return 0;
 541 }
 542
 543 /* called only from apply */
 544 static void set_enabled(struct drm_crtc *crtc, bool enable)
 545 {
 546         struct drm_device *dev = crtc->dev;
 547         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 548         enum omap_channel channel = omap_crtc->channel;
 549         struct omap_irq_wait *wait;
 550         u32 framedone_irq, vsync_irq;
 551         int ret;
 552
 553         if (dispc_mgr_is_enabled(channel) == enable)
 554                 return;
 555
 556         /*
 557          * Digit output produces some sync lost interrupts during the first
 558          * frame when enabling, so we need to ignore those.
 559          */
 560         omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 561
 562         framedone_irq = dispc_mgr_get_framedone_irq(channel);
 563         vsync_irq = dispc_mgr_get_vsync_irq(channel);
 564
 565         if (enable) {
 566                 wait = omap_irq_wait_init(dev, vsync_irq, 1);
 567         } else {
 568                 /*
 569                  * When we disable the digit output, we need to wait for
 570                  * FRAMEDONE to know that DISPC has finished with the output.
 571                  *
 572                  * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
 573                  * that case we need to use vsync interrupt, and wait for both
 574                  * even and odd frames.
 575                  */
 576
 577                 if (framedone_irq)
 578                         wait = omap_irq_wait_init(dev, framedone_irq, 1);
 579                 else
 580                         wait = omap_irq_wait_init(dev, vsync_irq, 2);
 581         }
 582
 583         dispc_mgr_enable(channel, enable);
 584
 585         ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
 586         if (ret) {
 587                 dev_err(dev->dev, "%s: timeout waiting for %s\n",
 588                                 omap_crtc->name, enable ? "enable" : "disable");
 589         }
 590
 591         omap_irq_register(crtc->dev, &omap_crtc->error_irq);
 592 }
 593
 594 static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
 595 {
 596         struct omap_crtc *omap_crtc =
 597                         container_of(apply, struct omap_crtc, apply);
 598         struct drm_crtc *crtc = &omap_crtc->base;
 599         struct drm_encoder *encoder = NULL;
 600
 601         DBG("%s: enabled=%d, full=%d", omap_crtc->name,
 602                         omap_crtc->enabled, omap_crtc->full_update);
 603
 604         if (omap_crtc->full_update) {
 605                 struct omap_drm_private *priv = crtc->dev->dev_private;
 606                 int i;
 607                 for (i = 0; i < priv->num_encoders; i++) {
 608                         if (priv->encoders[i]->crtc == crtc) {
 609                                 encoder = priv->encoders[i];
 610                                 break;
 611                         }
 612                 }
 613         }
 614
 615         if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
 616                 omap_encoder_set_enabled(omap_crtc->current_encoder, false);
 617
 618         omap_crtc->current_encoder = encoder;
 619
 620         if (!omap_crtc->enabled) {
 621                 if (encoder)
 622                         omap_encoder_set_enabled(encoder, false);
 623         } else {
 624                 if (encoder) {
 625                         omap_encoder_set_enabled(encoder, false);
 626                         omap_encoder_update(encoder, omap_crtc->mgr,
 627                                         &omap_crtc->timings);
 628                         omap_encoder_set_enabled(encoder, true);
 629                 }
 630         }
 631
 632         omap_crtc->full_update = false;
 633 }
 634
 635 static void omap_crtc_post_apply(struct omap_drm_apply *apply)
 636 {
 637         /* nothing needed for post-apply */
 638 }
 639
 640 void omap_crtc_flush(struct drm_crtc *crtc)
 641 {
 642         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 643         int loops = 0;
 644
 645         while (!list_empty(&omap_crtc->pending_applies) ||
 646                 !list_empty(&omap_crtc->queued_applies) ||
 647                 omap_crtc->event || omap_crtc->old_fb) {
 648
 649                 if (++loops > 10) {
 650                         dev_err(crtc->dev->dev,
 651                                 "omap_crtc_flush() timeout\n");
 652                         break;
 653                 }
 654
 655                 schedule_timeout_uninterruptible(msecs_to_jiffies(20));
 656         }
 657 }
 658
 659 static const char *channel_names[] = {
 660                 [OMAP_DSS_CHANNEL_LCD] = "lcd",
 661                 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
 662                 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
 663                 [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
 664 };
 665
 666 void omap_crtc_pre_init(void)
 667 {
 668         dss_install_mgr_ops(&mgr_ops);
 669 }
 670
 671 void omap_crtc_pre_uninit(void)
 672 {
 673         dss_uninstall_mgr_ops();
 674 }
 675
 676 /* initialize crtc */
 677 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
 678                 struct drm_plane *plane, enum omap_channel channel, int id)
 679 {
 680         struct drm_crtc *crtc = NULL;
 681         struct omap_crtc *omap_crtc;
 682         struct omap_overlay_manager_info *info;
 683
 684         DBG("%s", channel_names[channel]);
 685
 686         omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
 687         if (!omap_crtc)
 688                 goto fail;
 689
 690         crtc = &omap_crtc->base;
 691
 692         INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
 693         INIT_WORK(&omap_crtc->apply_work, apply_worker);
 694
 695         INIT_LIST_HEAD(&omap_crtc->pending_applies);
 696         INIT_LIST_HEAD(&omap_crtc->queued_applies);
 697
 698         omap_crtc->apply.pre_apply  = omap_crtc_pre_apply;
 699         omap_crtc->apply.post_apply = omap_crtc_post_apply;
 700
 701         omap_crtc->channel = channel;
 702         omap_crtc->plane = plane;
 703         omap_crtc->plane->crtc = crtc;
 704         omap_crtc->name = channel_names[channel];
 705         omap_crtc->pipe = id;
 706
 707         omap_crtc->apply_irq.irqmask = pipe2vbl(crtc);
 708         omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
 709
 710         omap_crtc->error_irq.irqmask =
 711                         dispc_mgr_get_sync_lost_irq(channel);
 712         omap_crtc->error_irq.irq = omap_crtc_error_irq;
 713         omap_irq_register(dev, &omap_crtc->error_irq);
 714
 715         /* temporary: */
 716         omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
 717
 718         /* TODO: fix hard-coded setup.. add properties! */
 719         info = &omap_crtc->info;
 720         info->default_color = 0x00000000;
 721         info->trans_key = 0x00000000;
 722         info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
 723         info->trans_enabled = false;
 724
 725         drm_crtc_init(dev, crtc, &omap_crtc_funcs);
 726         drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
 727
 728         omap_plane_install_properties(omap_crtc->plane, &crtc->base);
 729
 730         omap_crtcs[channel] = omap_crtc;
 731
 732         return crtc;
 733
 734 fail:
 735         if (crtc)
 736                 omap_crtc_destroy(crtc);
 737
 738         return NULL;
 739 }