2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <subdev/fb.h>
26 #include <subdev/bios.h>
29 struct nouveau_fb base;
30 struct page *r100c10_page;
38 static const u8 types[256] = {
39 1, 1, 3, 3, 3, 3, 0, 3, 3, 3, 3, 0, 0, 0, 0, 0,
40 0, 1, 0, 0, 0, 0, 0, 3, 3, 3, 3, 0, 0, 0, 0, 0,
41 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
42 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3,
43 3, 3, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
44 0, 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
45 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
46 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
47 0, 0, 0, 0, 0, 0, 3, 3, 3, 3, 0, 1, 1, 1, 1, 0,
48 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
49 0, 0, 0, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, 0,
50 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3,
51 3, 3, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3,
52 3, 3, 0, 0, 0, 0, 0, 0, 3, 0, 0, 3, 0, 3, 0, 3,
53 3, 0, 3, 3, 3, 3, 3, 0, 0, 3, 0, 3, 0, 3, 3, 0,
54 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 1, 1, 0
58 nvc0_fb_memtype_valid(struct nouveau_fb *pfb, u32 tile_flags)
60 u8 memtype = (tile_flags & 0x0000ff00) >> 8;
61 return likely((types[memtype] == 1));
65 nvc0_fb_vram_init(struct nouveau_fb *pfb)
67 struct nouveau_bios *bios = nouveau_bios(pfb);
68 const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
69 const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
70 u32 parts = nv_rd32(pfb, 0x022438);
71 u32 pmask = nv_rd32(pfb, 0x022554);
72 u32 bsize = nv_rd32(pfb, 0x10f20c);
77 nv_debug(pfb, "0x100800: 0x%08x\n", nv_rd32(pfb, 0x100800));
78 nv_debug(pfb, "parts 0x%08x mask 0x%08x\n", parts, pmask);
80 pfb->ram.type = nouveau_fb_bios_memtype(bios);
81 pfb->ram.ranks = (nv_rd32(pfb, 0x10f200) & 0x00000004) ? 2 : 1;
83 /* read amount of vram attached to each memory controller */
84 for (part = 0; part < parts; part++) {
85 if (!(pmask & (1 << part))) {
86 u32 psize = nv_rd32(pfb, 0x11020c + (part * 0x1000));
93 nv_debug(pfb, "%d: mem_amount 0x%08x\n", part, psize);
94 pfb->ram.size += (u64)psize << 20;
98 /* if all controllers have the same amount attached, there's no holes */
101 length = (pfb->ram.size >> 12) - rsvd_head - rsvd_tail;
102 return nouveau_mm_init(&pfb->vram, offset, length, 1);
105 /* otherwise, address lowest common amount from 0GiB */
106 ret = nouveau_mm_init(&pfb->vram, rsvd_head, (bsize << 8) * parts, 1);
110 /* and the rest starting from (8GiB + common_size) */
111 offset = (0x0200000000ULL >> 12) + (bsize << 8);
112 length = (pfb->ram.size >> 12) - (bsize << 8) - rsvd_tail;
114 ret = nouveau_mm_init(&pfb->vram, offset, length, 0);
116 nouveau_mm_fini(&pfb->vram);
124 nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
125 u32 memtype, struct nouveau_mem **pmem)
127 struct nouveau_mm *mm = &pfb->vram;
128 struct nouveau_mm_node *r;
129 struct nouveau_mem *mem;
130 int type = (memtype & 0x0ff);
131 int back = (memtype & 0x800);
140 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
144 INIT_LIST_HEAD(&mem->regions);
148 mutex_lock(&mm->mutex);
151 ret = nouveau_mm_tail(mm, 1, size, ncmin, align, &r);
153 ret = nouveau_mm_head(mm, 1, size, ncmin, align, &r);
155 mutex_unlock(&mm->mutex);
156 pfb->ram.put(pfb, &mem);
160 list_add_tail(&r->rl_entry, &mem->regions);
163 mutex_unlock(&mm->mutex);
165 r = list_first_entry(&mem->regions, struct nouveau_mm_node, rl_entry);
166 mem->offset = (u64)r->offset << 12;
172 nvc0_fb_init(struct nouveau_object *object)
174 struct nvc0_fb_priv *priv = (void *)object;
177 ret = nouveau_fb_init(&priv->base);
181 nv_wr32(priv, 0x100c10, priv->r100c10 >> 8);
186 nvc0_fb_dtor(struct nouveau_object *object)
188 struct nouveau_device *device = nv_device(object);
189 struct nvc0_fb_priv *priv = (void *)object;
191 if (priv->r100c10_page) {
192 pci_unmap_page(device->pdev, priv->r100c10, PAGE_SIZE,
193 PCI_DMA_BIDIRECTIONAL);
194 __free_page(priv->r100c10_page);
197 nouveau_fb_destroy(&priv->base);
201 nvc0_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
202 struct nouveau_oclass *oclass, void *data, u32 size,
203 struct nouveau_object **pobject)
205 struct nouveau_device *device = nv_device(parent);
206 struct nvc0_fb_priv *priv;
209 ret = nouveau_fb_create(parent, engine, oclass, &priv);
210 *pobject = nv_object(priv);
214 priv->base.memtype_valid = nvc0_fb_memtype_valid;
215 priv->base.ram.init = nvc0_fb_vram_init;
216 priv->base.ram.get = nvc0_fb_vram_new;
217 priv->base.ram.put = nv50_fb_vram_del;
219 priv->r100c10_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
220 if (!priv->r100c10_page)
223 priv->r100c10 = pci_map_page(device->pdev, priv->r100c10_page, 0,
224 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
225 if (pci_dma_mapping_error(device->pdev, priv->r100c10))
228 return nouveau_fb_preinit(&priv->base);
232 struct nouveau_oclass
234 .handle = NV_SUBDEV(FB, 0xc0),
235 .ofuncs = &(struct nouveau_ofuncs) {
236 .ctor = nvc0_fb_ctor,
237 .dtor = nvc0_fb_dtor,
238 .init = nvc0_fb_init,
239 .fini = _nouveau_fb_fini,