2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
35 #include "intel_drv.h"
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
54 static const char *tv_format_names[] = {
55 "NTSC_M" , "NTSC_J" , "NTSC_443",
56 "PAL_B" , "PAL_D" , "PAL_G" ,
57 "PAL_H" , "PAL_I" , "PAL_M" ,
58 "PAL_N" , "PAL_NC" , "PAL_60" ,
59 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
60 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
64 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67 struct intel_encoder base;
69 struct i2c_adapter *i2c;
72 struct i2c_adapter ddc;
74 /* Register for the SDVO device: SDVOB or SDVOC */
77 /* Active outputs controlled by this SDVO output */
78 uint16_t controlled_output;
81 * Capabilities of the SDVO device returned by
82 * i830_sdvo_get_capabilities()
84 struct intel_sdvo_caps caps;
86 /* Pixel clock limitations reported by the SDVO device, in kHz */
87 int pixel_clock_min, pixel_clock_max;
90 * For multiple function SDVO device,
91 * this is for current attached outputs.
93 uint16_t attached_output;
96 * This is set if we're going to treat the device as TV-out.
98 * While we have these nice friendly flags for output types that ought
99 * to decide this for us, the S-Video output on our HDMI+S-Video card
100 * shows up as RGB1 (VGA).
104 /* This is for current tv format name */
108 * This is set if we treat the device as HDMI, instead of DVI.
111 bool has_hdmi_monitor;
115 * This is set if we detect output of sdvo device as LVDS and
116 * have a valid fixed mode to use with the panel.
121 * This is sdvo fixed pannel mode pointer
123 struct drm_display_mode *sdvo_lvds_fixed_mode;
125 /* DDC bus used by this SDVO encoder */
128 /* Input timings for adjusted_mode */
129 struct intel_sdvo_dtd input_dtd;
132 struct intel_sdvo_connector {
133 struct intel_connector base;
135 /* Mark the type of connector */
136 uint16_t output_flag;
140 /* This contains all current supported TV format */
141 u8 tv_format_supported[TV_FORMAT_NUM];
142 int format_supported_num;
143 struct drm_property *tv_format;
145 struct drm_property *force_audio_property;
147 /* add the property for the SDVO-TV */
148 struct drm_property *left;
149 struct drm_property *right;
150 struct drm_property *top;
151 struct drm_property *bottom;
152 struct drm_property *hpos;
153 struct drm_property *vpos;
154 struct drm_property *contrast;
155 struct drm_property *saturation;
156 struct drm_property *hue;
157 struct drm_property *sharpness;
158 struct drm_property *flicker_filter;
159 struct drm_property *flicker_filter_adaptive;
160 struct drm_property *flicker_filter_2d;
161 struct drm_property *tv_chroma_filter;
162 struct drm_property *tv_luma_filter;
163 struct drm_property *dot_crawl;
165 /* add the property for the SDVO-TV/LVDS */
166 struct drm_property *brightness;
168 /* Add variable to record current setting for the above property */
169 u32 left_margin, right_margin, top_margin, bottom_margin;
171 /* this is to get the range of margin.*/
172 u32 max_hscan, max_vscan;
173 u32 max_hpos, cur_hpos;
174 u32 max_vpos, cur_vpos;
175 u32 cur_brightness, max_brightness;
176 u32 cur_contrast, max_contrast;
177 u32 cur_saturation, max_saturation;
178 u32 cur_hue, max_hue;
179 u32 cur_sharpness, max_sharpness;
180 u32 cur_flicker_filter, max_flicker_filter;
181 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
182 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
183 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
184 u32 cur_tv_luma_filter, max_tv_luma_filter;
185 u32 cur_dot_crawl, max_dot_crawl;
188 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
190 return container_of(encoder, struct intel_sdvo, base.base);
193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
195 return container_of(intel_attached_encoder(connector),
196 struct intel_sdvo, base);
199 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
201 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
205 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
207 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
208 struct intel_sdvo_connector *intel_sdvo_connector,
211 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
212 struct intel_sdvo_connector *intel_sdvo_connector);
215 * Writes the SDVOB or SDVOC with the given value, but always writes both
216 * SDVOB and SDVOC to work around apparent hardware issues (according to
217 * comments in the BIOS).
219 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
221 struct drm_device *dev = intel_sdvo->base.base.dev;
222 struct drm_i915_private *dev_priv = dev->dev_private;
223 u32 bval = val, cval = val;
226 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
227 I915_WRITE(intel_sdvo->sdvo_reg, val);
228 I915_READ(intel_sdvo->sdvo_reg);
232 if (intel_sdvo->sdvo_reg == SDVOB) {
233 cval = I915_READ(SDVOC);
235 bval = I915_READ(SDVOB);
238 * Write the registers twice for luck. Sometimes,
239 * writing them only once doesn't appear to 'stick'.
240 * The BIOS does this too. Yay, magic
242 for (i = 0; i < 2; i++)
244 I915_WRITE(SDVOB, bval);
246 I915_WRITE(SDVOC, cval);
251 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
253 struct i2c_msg msgs[] = {
255 .addr = intel_sdvo->slave_addr,
261 .addr = intel_sdvo->slave_addr,
269 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
272 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
276 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
277 /** Mapping of command numbers to names, for debug output */
278 static const struct _sdvo_cmd_name {
281 } sdvo_cmd_names[] = {
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
326 /* Add the op code for SDVO enhancements */
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
395 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
396 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
398 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
399 const void *args, int args_len)
403 DRM_DEBUG_KMS("%s: W: %02X ",
404 SDVO_NAME(intel_sdvo), cmd);
405 for (i = 0; i < args_len; i++)
406 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
409 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
410 if (cmd == sdvo_cmd_names[i].cmd) {
411 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
415 if (i == ARRAY_SIZE(sdvo_cmd_names))
416 DRM_LOG_KMS("(%02X)", cmd);
420 static const char *cmd_status_names[] = {
426 "Target not specified",
427 "Scaling not supported"
430 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
431 const void *args, int args_len)
433 u8 buf[args_len*2 + 2], status;
434 struct i2c_msg msgs[args_len + 3];
437 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
439 for (i = 0; i < args_len; i++) {
440 msgs[i].addr = intel_sdvo->slave_addr;
443 msgs[i].buf = buf + 2 *i;
444 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
445 buf[2*i + 1] = ((u8*)args)[i];
447 msgs[i].addr = intel_sdvo->slave_addr;
450 msgs[i].buf = buf + 2*i;
451 buf[2*i + 0] = SDVO_I2C_OPCODE;
454 /* the following two are to read the response */
455 status = SDVO_I2C_CMD_STATUS;
456 msgs[i+1].addr = intel_sdvo->slave_addr;
459 msgs[i+1].buf = &status;
461 msgs[i+2].addr = intel_sdvo->slave_addr;
462 msgs[i+2].flags = I2C_M_RD;
464 msgs[i+2].buf = &status;
466 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
468 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
472 /* failure in I2C transfer */
473 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
480 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
481 void *response, int response_len)
487 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
490 * The documentation states that all commands will be
491 * processed within 15µs, and that we need only poll
492 * the status byte a maximum of 3 times in order for the
493 * command to be complete.
495 * Check 5 times in case the hardware failed to read the docs.
497 if (!intel_sdvo_read_byte(intel_sdvo,
502 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
504 if (!intel_sdvo_read_byte(intel_sdvo,
510 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
511 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
513 DRM_LOG_KMS("(??? %d)", status);
515 if (status != SDVO_CMD_STATUS_SUCCESS)
518 /* Read the command response */
519 for (i = 0; i < response_len; i++) {
520 if (!intel_sdvo_read_byte(intel_sdvo,
521 SDVO_I2C_RETURN_0 + i,
522 &((u8 *)response)[i]))
524 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
530 DRM_LOG_KMS("... failed\n");
534 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
536 if (mode->clock >= 100000)
538 else if (mode->clock >= 50000)
544 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
547 /* This must be the immediately preceding write before the i2c xfer */
548 return intel_sdvo_write_cmd(intel_sdvo,
549 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
553 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
555 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
558 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
562 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
564 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
567 return intel_sdvo_read_response(intel_sdvo, value, len);
570 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
572 struct intel_sdvo_set_target_input_args targets = {0};
573 return intel_sdvo_set_value(intel_sdvo,
574 SDVO_CMD_SET_TARGET_INPUT,
575 &targets, sizeof(targets));
579 * Return whether each input is trained.
581 * This function is making an assumption about the layout of the response,
582 * which should be checked against the docs.
584 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
586 struct intel_sdvo_get_trained_inputs_response response;
588 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
589 &response, sizeof(response)))
592 *input_1 = response.input0_trained;
593 *input_2 = response.input1_trained;
597 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
600 return intel_sdvo_set_value(intel_sdvo,
601 SDVO_CMD_SET_ACTIVE_OUTPUTS,
602 &outputs, sizeof(outputs));
605 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
608 u8 state = SDVO_ENCODER_STATE_ON;
611 case DRM_MODE_DPMS_ON:
612 state = SDVO_ENCODER_STATE_ON;
614 case DRM_MODE_DPMS_STANDBY:
615 state = SDVO_ENCODER_STATE_STANDBY;
617 case DRM_MODE_DPMS_SUSPEND:
618 state = SDVO_ENCODER_STATE_SUSPEND;
620 case DRM_MODE_DPMS_OFF:
621 state = SDVO_ENCODER_STATE_OFF;
625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
629 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
633 struct intel_sdvo_pixel_clock_range clocks;
635 if (!intel_sdvo_get_value(intel_sdvo,
636 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
637 &clocks, sizeof(clocks)))
640 /* Convert the values from units of 10 kHz to kHz. */
641 *clock_min = clocks.min * 10;
642 *clock_max = clocks.max * 10;
646 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
649 return intel_sdvo_set_value(intel_sdvo,
650 SDVO_CMD_SET_TARGET_OUTPUT,
651 &outputs, sizeof(outputs));
654 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
655 struct intel_sdvo_dtd *dtd)
657 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
658 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
661 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
662 struct intel_sdvo_dtd *dtd)
664 return intel_sdvo_set_timing(intel_sdvo,
665 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
668 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
669 struct intel_sdvo_dtd *dtd)
671 return intel_sdvo_set_timing(intel_sdvo,
672 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
676 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
681 struct intel_sdvo_preferred_input_timing_args args;
683 memset(&args, 0, sizeof(args));
686 args.height = height;
689 if (intel_sdvo->is_lvds &&
690 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
691 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
694 return intel_sdvo_set_value(intel_sdvo,
695 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
696 &args, sizeof(args));
699 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
700 struct intel_sdvo_dtd *dtd)
702 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
703 &dtd->part1, sizeof(dtd->part1)) &&
704 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
705 &dtd->part2, sizeof(dtd->part2));
708 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
710 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
713 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
714 const struct drm_display_mode *mode)
716 uint16_t width, height;
717 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
718 uint16_t h_sync_offset, v_sync_offset;
720 width = mode->crtc_hdisplay;
721 height = mode->crtc_vdisplay;
723 /* do some mode translations */
724 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
725 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
727 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
728 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
730 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
731 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
733 dtd->part1.clock = mode->clock / 10;
734 dtd->part1.h_active = width & 0xff;
735 dtd->part1.h_blank = h_blank_len & 0xff;
736 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
737 ((h_blank_len >> 8) & 0xf);
738 dtd->part1.v_active = height & 0xff;
739 dtd->part1.v_blank = v_blank_len & 0xff;
740 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
741 ((v_blank_len >> 8) & 0xf);
743 dtd->part2.h_sync_off = h_sync_offset & 0xff;
744 dtd->part2.h_sync_width = h_sync_len & 0xff;
745 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
747 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
748 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
749 ((v_sync_len & 0x30) >> 4);
751 dtd->part2.dtd_flags = 0x18;
752 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
753 dtd->part2.dtd_flags |= 0x2;
754 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
755 dtd->part2.dtd_flags |= 0x4;
757 dtd->part2.sdvo_flags = 0;
758 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
759 dtd->part2.reserved = 0;
762 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
763 const struct intel_sdvo_dtd *dtd)
765 mode->hdisplay = dtd->part1.h_active;
766 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
767 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
768 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
769 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
770 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
771 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
772 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
774 mode->vdisplay = dtd->part1.v_active;
775 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
776 mode->vsync_start = mode->vdisplay;
777 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
778 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
779 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
780 mode->vsync_end = mode->vsync_start +
781 (dtd->part2.v_sync_off_width & 0xf);
782 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
783 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
784 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
786 mode->clock = dtd->part1.clock * 10;
788 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
789 if (dtd->part2.dtd_flags & 0x2)
790 mode->flags |= DRM_MODE_FLAG_PHSYNC;
791 if (dtd->part2.dtd_flags & 0x4)
792 mode->flags |= DRM_MODE_FLAG_PVSYNC;
795 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
797 struct intel_sdvo_encode encode;
799 return intel_sdvo_get_value(intel_sdvo,
800 SDVO_CMD_GET_SUPP_ENCODE,
801 &encode, sizeof(encode));
804 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
807 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
810 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
813 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
817 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
820 uint8_t set_buf_index[2];
826 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
828 for (i = 0; i <= av_split; i++) {
829 set_buf_index[0] = i; set_buf_index[1] = 0;
830 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
832 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
833 intel_sdvo_read_response(encoder, &buf_size, 1);
836 for (j = 0; j <= buf_size; j += 8) {
837 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
839 intel_sdvo_read_response(encoder, pos, 8);
846 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
848 struct dip_infoframe avi_if = {
849 .type = DIP_TYPE_AVI,
850 .ver = DIP_VERSION_AVI,
853 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
854 uint8_t set_buf_index[2] = { 1, 0 };
855 uint64_t *data = (uint64_t *)&avi_if;
858 intel_dip_infoframe_csum(&avi_if);
860 if (!intel_sdvo_set_value(intel_sdvo,
861 SDVO_CMD_SET_HBUF_INDEX,
865 for (i = 0; i < sizeof(avi_if); i += 8) {
866 if (!intel_sdvo_set_value(intel_sdvo,
867 SDVO_CMD_SET_HBUF_DATA,
873 return intel_sdvo_set_value(intel_sdvo,
874 SDVO_CMD_SET_HBUF_TXRATE,
878 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
880 struct intel_sdvo_tv_format format;
883 format_map = 1 << intel_sdvo->tv_format_index;
884 memset(&format, 0, sizeof(format));
885 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
887 BUILD_BUG_ON(sizeof(format) != 6);
888 return intel_sdvo_set_value(intel_sdvo,
889 SDVO_CMD_SET_TV_FORMAT,
890 &format, sizeof(format));
894 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
895 struct drm_display_mode *mode)
897 struct intel_sdvo_dtd output_dtd;
899 if (!intel_sdvo_set_target_output(intel_sdvo,
900 intel_sdvo->attached_output))
903 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
904 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
911 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
912 struct drm_display_mode *mode,
913 struct drm_display_mode *adjusted_mode)
915 /* Reset the input timing to the screen. Assume always input 0. */
916 if (!intel_sdvo_set_target_input(intel_sdvo))
919 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
925 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
926 &intel_sdvo->input_dtd))
929 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
931 drm_mode_set_crtcinfo(adjusted_mode, 0);
935 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
936 struct drm_display_mode *mode,
937 struct drm_display_mode *adjusted_mode)
939 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
942 /* We need to construct preferred input timings based on our
943 * output timings. To do that, we have to set the output
944 * timings, even though this isn't really the right place in
945 * the sequence to do it. Oh well.
947 if (intel_sdvo->is_tv) {
948 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
951 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
954 } else if (intel_sdvo->is_lvds) {
955 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
956 intel_sdvo->sdvo_lvds_fixed_mode))
959 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
964 /* Make the CRTC code factor in the SDVO pixel multiplier. The
965 * SDVO device will factor out the multiplier during mode_set.
967 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
968 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
973 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
974 struct drm_display_mode *mode,
975 struct drm_display_mode *adjusted_mode)
977 struct drm_device *dev = encoder->dev;
978 struct drm_i915_private *dev_priv = dev->dev_private;
979 struct drm_crtc *crtc = encoder->crtc;
980 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
981 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
983 struct intel_sdvo_in_out_map in_out;
984 struct intel_sdvo_dtd input_dtd;
985 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
991 /* First, set the input mapping for the first input to our controlled
992 * output. This is only correct if we're a single-input device, in
993 * which case the first input is the output from the appropriate SDVO
994 * channel on the motherboard. In a two-input device, the first input
995 * will be SDVOB and the second SDVOC.
997 in_out.in0 = intel_sdvo->attached_output;
1000 intel_sdvo_set_value(intel_sdvo,
1001 SDVO_CMD_SET_IN_OUT_MAP,
1002 &in_out, sizeof(in_out));
1004 /* Set the output timings to the screen */
1005 if (!intel_sdvo_set_target_output(intel_sdvo,
1006 intel_sdvo->attached_output))
1009 /* We have tried to get input timing in mode_fixup, and filled into
1012 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1013 input_dtd = intel_sdvo->input_dtd;
1015 /* Set the output timing to the screen */
1016 if (!intel_sdvo_set_target_output(intel_sdvo,
1017 intel_sdvo->attached_output))
1020 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1021 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1024 /* Set the input timing to the screen. Assume always input 0. */
1025 if (!intel_sdvo_set_target_input(intel_sdvo))
1028 if (intel_sdvo->has_hdmi_monitor) {
1029 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1030 intel_sdvo_set_colorimetry(intel_sdvo,
1031 SDVO_COLORIMETRY_RGB256);
1032 intel_sdvo_set_avi_infoframe(intel_sdvo);
1034 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1036 if (intel_sdvo->is_tv &&
1037 !intel_sdvo_set_tv_format(intel_sdvo))
1040 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1042 switch (pixel_multiplier) {
1044 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1045 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1046 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1048 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1051 /* Set the SDVO control regs. */
1052 if (INTEL_INFO(dev)->gen >= 4) {
1054 if (INTEL_INFO(dev)->gen < 5)
1055 sdvox |= SDVO_BORDER_ENABLE;
1056 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1057 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1058 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1059 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1061 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1062 switch (intel_sdvo->sdvo_reg) {
1064 sdvox &= SDVOB_PRESERVE_MASK;
1067 sdvox &= SDVOC_PRESERVE_MASK;
1070 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1072 if (intel_crtc->pipe == 1)
1073 sdvox |= SDVO_PIPE_B_SELECT;
1074 if (intel_sdvo->has_hdmi_audio)
1075 sdvox |= SDVO_AUDIO_ENABLE;
1077 if (INTEL_INFO(dev)->gen >= 4) {
1078 /* done in crtc_mode_set as the dpll_md reg must be written early */
1079 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1080 /* done in crtc_mode_set as it lives inside the dpll register */
1082 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1085 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1086 INTEL_INFO(dev)->gen < 5)
1087 sdvox |= SDVO_STALL_SELECT;
1088 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1091 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1093 struct drm_device *dev = encoder->dev;
1094 struct drm_i915_private *dev_priv = dev->dev_private;
1095 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1096 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1099 if (mode != DRM_MODE_DPMS_ON) {
1100 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1102 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1104 if (mode == DRM_MODE_DPMS_OFF) {
1105 temp = I915_READ(intel_sdvo->sdvo_reg);
1106 if ((temp & SDVO_ENABLE) != 0) {
1107 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1111 bool input1, input2;
1115 temp = I915_READ(intel_sdvo->sdvo_reg);
1116 if ((temp & SDVO_ENABLE) == 0)
1117 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1118 for (i = 0; i < 2; i++)
1119 intel_wait_for_vblank(dev, intel_crtc->pipe);
1121 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1122 /* Warn if the device reported failure to sync.
1123 * A lot of SDVO devices fail to notify of sync, but it's
1124 * a given it the status is a success, we succeeded.
1126 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1127 DRM_DEBUG_KMS("First %s output reported failure to "
1128 "sync\n", SDVO_NAME(intel_sdvo));
1132 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1133 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1138 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1139 struct drm_display_mode *mode)
1141 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1143 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1144 return MODE_NO_DBLESCAN;
1146 if (intel_sdvo->pixel_clock_min > mode->clock)
1147 return MODE_CLOCK_LOW;
1149 if (intel_sdvo->pixel_clock_max < mode->clock)
1150 return MODE_CLOCK_HIGH;
1152 if (intel_sdvo->is_lvds) {
1153 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1156 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1163 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1165 if (!intel_sdvo_get_value(intel_sdvo,
1166 SDVO_CMD_GET_DEVICE_CAPS,
1167 caps, sizeof(*caps)))
1170 DRM_DEBUG_KMS("SDVO capabilities:\n"
1173 " device_rev_id: %d\n"
1174 " sdvo_version_major: %d\n"
1175 " sdvo_version_minor: %d\n"
1176 " sdvo_inputs_mask: %d\n"
1177 " smooth_scaling: %d\n"
1178 " sharp_scaling: %d\n"
1180 " down_scaling: %d\n"
1181 " stall_support: %d\n"
1182 " output_flags: %d\n",
1185 caps->device_rev_id,
1186 caps->sdvo_version_major,
1187 caps->sdvo_version_minor,
1188 caps->sdvo_inputs_mask,
1189 caps->smooth_scaling,
1190 caps->sharp_scaling,
1193 caps->stall_support,
1194 caps->output_flags);
1201 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1203 struct drm_connector *connector = NULL;
1204 struct intel_sdvo *iout = NULL;
1205 struct intel_sdvo *sdvo;
1207 /* find the sdvo connector */
1208 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1209 iout = to_intel_sdvo(connector);
1211 if (iout->type != INTEL_OUTPUT_SDVO)
1214 sdvo = iout->dev_priv;
1216 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1219 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1227 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1231 struct intel_sdvo *intel_sdvo;
1232 DRM_DEBUG_KMS("\n");
1237 intel_sdvo = to_intel_sdvo(connector);
1239 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1240 &response, 2) && response[0];
1243 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1247 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1249 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1250 intel_sdvo_read_response(intel_sdvo, &response, 2);
1253 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1254 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1256 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1260 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1263 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1264 intel_sdvo_read_response(intel_sdvo, &response, 2);
1269 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1273 if (intel_sdvo->caps.output_flags &
1274 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1276 if (intel_sdvo->caps.output_flags &
1277 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1279 if (intel_sdvo->caps.output_flags &
1280 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1282 if (intel_sdvo->caps.output_flags &
1283 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1285 if (intel_sdvo->caps.output_flags &
1286 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1289 if (intel_sdvo->caps.output_flags &
1290 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1293 if (intel_sdvo->caps.output_flags &
1294 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1300 static struct edid *
1301 intel_sdvo_get_edid(struct drm_connector *connector)
1303 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1304 return drm_get_edid(connector, &sdvo->ddc);
1307 /* Mac mini hack -- use the same DDC as the analog connector */
1308 static struct edid *
1309 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1311 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1313 return drm_get_edid(connector,
1314 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1317 enum drm_connector_status
1318 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1320 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1321 enum drm_connector_status status;
1324 edid = intel_sdvo_get_edid(connector);
1326 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1327 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1330 * Don't use the 1 as the argument of DDC bus switch to get
1331 * the EDID. It is used for SDVO SPD ROM.
1333 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1334 intel_sdvo->ddc_bus = ddc;
1335 edid = intel_sdvo_get_edid(connector);
1340 * If we found the EDID on the other bus,
1341 * assume that is the correct DDC bus.
1344 intel_sdvo->ddc_bus = saved_ddc;
1348 * When there is no edid and no monitor is connected with VGA
1349 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1352 edid = intel_sdvo_get_analog_edid(connector);
1354 status = connector_status_unknown;
1356 /* DDC bus is shared, match EDID to connector type */
1357 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1358 status = connector_status_connected;
1359 if (intel_sdvo->is_hdmi) {
1360 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1361 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1364 status = connector_status_disconnected;
1365 connector->display_info.raw_edid = NULL;
1369 if (status == connector_status_connected) {
1370 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1371 if (intel_sdvo_connector->force_audio)
1372 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1378 static enum drm_connector_status
1379 intel_sdvo_detect(struct drm_connector *connector, bool force)
1382 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1383 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1384 enum drm_connector_status ret;
1386 if (!intel_sdvo_write_cmd(intel_sdvo,
1387 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1388 return connector_status_unknown;
1390 /* add 30ms delay when the output type might be TV */
1391 if (intel_sdvo->caps.output_flags &
1392 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1395 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1396 return connector_status_unknown;
1398 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1399 response & 0xff, response >> 8,
1400 intel_sdvo_connector->output_flag);
1403 return connector_status_disconnected;
1405 intel_sdvo->attached_output = response;
1407 intel_sdvo->has_hdmi_monitor = false;
1408 intel_sdvo->has_hdmi_audio = false;
1410 if ((intel_sdvo_connector->output_flag & response) == 0)
1411 ret = connector_status_disconnected;
1412 else if (IS_TMDS(intel_sdvo_connector))
1413 ret = intel_sdvo_hdmi_sink_detect(connector);
1417 /* if we have an edid check it matches the connection */
1418 edid = intel_sdvo_get_edid(connector);
1420 edid = intel_sdvo_get_analog_edid(connector);
1422 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1423 ret = connector_status_disconnected;
1425 ret = connector_status_connected;
1426 connector->display_info.raw_edid = NULL;
1429 ret = connector_status_connected;
1432 /* May update encoder flag for like clock for SDVO TV, etc.*/
1433 if (ret == connector_status_connected) {
1434 intel_sdvo->is_tv = false;
1435 intel_sdvo->is_lvds = false;
1436 intel_sdvo->base.needs_tv_clock = false;
1438 if (response & SDVO_TV_MASK) {
1439 intel_sdvo->is_tv = true;
1440 intel_sdvo->base.needs_tv_clock = true;
1442 if (response & SDVO_LVDS_MASK)
1443 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1449 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1453 /* set the bus switch and get the modes */
1454 edid = intel_sdvo_get_edid(connector);
1457 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1458 * link between analog and digital outputs. So, if the regular SDVO
1459 * DDC fails, check to see if the analog output is disconnected, in
1460 * which case we'll look there for the digital DDC data.
1463 edid = intel_sdvo_get_analog_edid(connector);
1466 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1467 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1468 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1470 if (connector_is_digital == monitor_is_digital) {
1471 drm_mode_connector_update_edid_property(connector, edid);
1472 drm_add_edid_modes(connector, edid);
1475 connector->display_info.raw_edid = NULL;
1481 * Set of SDVO TV modes.
1482 * Note! This is in reply order (see loop in get_tv_modes).
1483 * XXX: all 60Hz refresh?
1485 struct drm_display_mode sdvo_tv_modes[] = {
1486 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1487 416, 0, 200, 201, 232, 233, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1490 416, 0, 240, 241, 272, 273, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1493 496, 0, 300, 301, 332, 333, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1496 736, 0, 350, 351, 382, 383, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1499 736, 0, 400, 401, 432, 433, 0,
1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1502 736, 0, 480, 481, 512, 513, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1505 800, 0, 480, 481, 512, 513, 0,
1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1508 800, 0, 576, 577, 608, 609, 0,
1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1511 816, 0, 350, 351, 382, 383, 0,
1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1514 816, 0, 400, 401, 432, 433, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1517 816, 0, 480, 481, 512, 513, 0,
1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1520 816, 0, 540, 541, 572, 573, 0,
1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1523 816, 0, 576, 577, 608, 609, 0,
1524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1526 864, 0, 576, 577, 608, 609, 0,
1527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1529 896, 0, 600, 601, 632, 633, 0,
1530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1531 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1532 928, 0, 624, 625, 656, 657, 0,
1533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1534 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1535 1016, 0, 766, 767, 798, 799, 0,
1536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1537 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1538 1120, 0, 768, 769, 800, 801, 0,
1539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1540 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1541 1376, 0, 1024, 1025, 1056, 1057, 0,
1542 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1545 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1547 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1548 struct intel_sdvo_sdtv_resolution_request tv_res;
1549 uint32_t reply = 0, format_map = 0;
1552 /* Read the list of supported input resolutions for the selected TV
1555 format_map = 1 << intel_sdvo->tv_format_index;
1556 memcpy(&tv_res, &format_map,
1557 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1559 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1562 BUILD_BUG_ON(sizeof(tv_res) != 3);
1563 if (!intel_sdvo_write_cmd(intel_sdvo,
1564 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1565 &tv_res, sizeof(tv_res)))
1567 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1570 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1571 if (reply & (1 << i)) {
1572 struct drm_display_mode *nmode;
1573 nmode = drm_mode_duplicate(connector->dev,
1576 drm_mode_probed_add(connector, nmode);
1580 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1582 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1583 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1584 struct drm_display_mode *newmode;
1587 * Attempt to get the mode list from DDC.
1588 * Assume that the preferred modes are
1589 * arranged in priority order.
1591 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1592 if (list_empty(&connector->probed_modes) == false)
1595 /* Fetch modes from VBT */
1596 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1597 newmode = drm_mode_duplicate(connector->dev,
1598 dev_priv->sdvo_lvds_vbt_mode);
1599 if (newmode != NULL) {
1600 /* Guarantee the mode is preferred */
1601 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1602 DRM_MODE_TYPE_DRIVER);
1603 drm_mode_probed_add(connector, newmode);
1608 list_for_each_entry(newmode, &connector->probed_modes, head) {
1609 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1610 intel_sdvo->sdvo_lvds_fixed_mode =
1611 drm_mode_duplicate(connector->dev, newmode);
1613 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1616 intel_sdvo->is_lvds = true;
1623 static int intel_sdvo_get_modes(struct drm_connector *connector)
1625 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1627 if (IS_TV(intel_sdvo_connector))
1628 intel_sdvo_get_tv_modes(connector);
1629 else if (IS_LVDS(intel_sdvo_connector))
1630 intel_sdvo_get_lvds_modes(connector);
1632 intel_sdvo_get_ddc_modes(connector);
1634 return !list_empty(&connector->probed_modes);
1638 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1640 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1641 struct drm_device *dev = connector->dev;
1643 if (intel_sdvo_connector->left)
1644 drm_property_destroy(dev, intel_sdvo_connector->left);
1645 if (intel_sdvo_connector->right)
1646 drm_property_destroy(dev, intel_sdvo_connector->right);
1647 if (intel_sdvo_connector->top)
1648 drm_property_destroy(dev, intel_sdvo_connector->top);
1649 if (intel_sdvo_connector->bottom)
1650 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1651 if (intel_sdvo_connector->hpos)
1652 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1653 if (intel_sdvo_connector->vpos)
1654 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1655 if (intel_sdvo_connector->saturation)
1656 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1657 if (intel_sdvo_connector->contrast)
1658 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1659 if (intel_sdvo_connector->hue)
1660 drm_property_destroy(dev, intel_sdvo_connector->hue);
1661 if (intel_sdvo_connector->sharpness)
1662 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1663 if (intel_sdvo_connector->flicker_filter)
1664 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1665 if (intel_sdvo_connector->flicker_filter_2d)
1666 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1667 if (intel_sdvo_connector->flicker_filter_adaptive)
1668 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1669 if (intel_sdvo_connector->tv_luma_filter)
1670 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1671 if (intel_sdvo_connector->tv_chroma_filter)
1672 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1673 if (intel_sdvo_connector->dot_crawl)
1674 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1675 if (intel_sdvo_connector->brightness)
1676 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1679 static void intel_sdvo_destroy(struct drm_connector *connector)
1681 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1683 if (intel_sdvo_connector->tv_format)
1684 drm_property_destroy(connector->dev,
1685 intel_sdvo_connector->tv_format);
1687 intel_sdvo_destroy_enhance_property(connector);
1688 drm_sysfs_connector_remove(connector);
1689 drm_connector_cleanup(connector);
1693 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1695 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1697 bool has_audio = false;
1699 if (!intel_sdvo->is_hdmi)
1702 edid = intel_sdvo_get_edid(connector);
1703 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1704 has_audio = drm_detect_monitor_audio(edid);
1710 intel_sdvo_set_property(struct drm_connector *connector,
1711 struct drm_property *property,
1714 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1715 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1716 uint16_t temp_value;
1720 ret = drm_connector_property_set_value(connector, property, val);
1724 if (property == intel_sdvo_connector->force_audio_property) {
1728 if (i == intel_sdvo_connector->force_audio)
1731 intel_sdvo_connector->force_audio = i;
1734 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1738 if (has_audio == intel_sdvo->has_hdmi_audio)
1741 intel_sdvo->has_hdmi_audio = has_audio;
1745 #define CHECK_PROPERTY(name, NAME) \
1746 if (intel_sdvo_connector->name == property) { \
1747 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1748 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1749 cmd = SDVO_CMD_SET_##NAME; \
1750 intel_sdvo_connector->cur_##name = temp_value; \
1754 if (property == intel_sdvo_connector->tv_format) {
1755 if (val >= TV_FORMAT_NUM)
1758 if (intel_sdvo->tv_format_index ==
1759 intel_sdvo_connector->tv_format_supported[val])
1762 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1764 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1766 if (intel_sdvo_connector->left == property) {
1767 drm_connector_property_set_value(connector,
1768 intel_sdvo_connector->right, val);
1769 if (intel_sdvo_connector->left_margin == temp_value)
1772 intel_sdvo_connector->left_margin = temp_value;
1773 intel_sdvo_connector->right_margin = temp_value;
1774 temp_value = intel_sdvo_connector->max_hscan -
1775 intel_sdvo_connector->left_margin;
1776 cmd = SDVO_CMD_SET_OVERSCAN_H;
1778 } else if (intel_sdvo_connector->right == property) {
1779 drm_connector_property_set_value(connector,
1780 intel_sdvo_connector->left, val);
1781 if (intel_sdvo_connector->right_margin == temp_value)
1784 intel_sdvo_connector->left_margin = temp_value;
1785 intel_sdvo_connector->right_margin = temp_value;
1786 temp_value = intel_sdvo_connector->max_hscan -
1787 intel_sdvo_connector->left_margin;
1788 cmd = SDVO_CMD_SET_OVERSCAN_H;
1790 } else if (intel_sdvo_connector->top == property) {
1791 drm_connector_property_set_value(connector,
1792 intel_sdvo_connector->bottom, val);
1793 if (intel_sdvo_connector->top_margin == temp_value)
1796 intel_sdvo_connector->top_margin = temp_value;
1797 intel_sdvo_connector->bottom_margin = temp_value;
1798 temp_value = intel_sdvo_connector->max_vscan -
1799 intel_sdvo_connector->top_margin;
1800 cmd = SDVO_CMD_SET_OVERSCAN_V;
1802 } else if (intel_sdvo_connector->bottom == property) {
1803 drm_connector_property_set_value(connector,
1804 intel_sdvo_connector->top, val);
1805 if (intel_sdvo_connector->bottom_margin == temp_value)
1808 intel_sdvo_connector->top_margin = temp_value;
1809 intel_sdvo_connector->bottom_margin = temp_value;
1810 temp_value = intel_sdvo_connector->max_vscan -
1811 intel_sdvo_connector->top_margin;
1812 cmd = SDVO_CMD_SET_OVERSCAN_V;
1815 CHECK_PROPERTY(hpos, HPOS)
1816 CHECK_PROPERTY(vpos, VPOS)
1817 CHECK_PROPERTY(saturation, SATURATION)
1818 CHECK_PROPERTY(contrast, CONTRAST)
1819 CHECK_PROPERTY(hue, HUE)
1820 CHECK_PROPERTY(brightness, BRIGHTNESS)
1821 CHECK_PROPERTY(sharpness, SHARPNESS)
1822 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1823 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1824 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1825 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1826 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1827 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1830 return -EINVAL; /* unknown property */
1833 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1838 if (intel_sdvo->base.base.crtc) {
1839 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1840 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1845 #undef CHECK_PROPERTY
1848 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1849 .dpms = intel_sdvo_dpms,
1850 .mode_fixup = intel_sdvo_mode_fixup,
1851 .prepare = intel_encoder_prepare,
1852 .mode_set = intel_sdvo_mode_set,
1853 .commit = intel_encoder_commit,
1856 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1857 .dpms = drm_helper_connector_dpms,
1858 .detect = intel_sdvo_detect,
1859 .fill_modes = drm_helper_probe_single_connector_modes,
1860 .set_property = intel_sdvo_set_property,
1861 .destroy = intel_sdvo_destroy,
1864 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1865 .get_modes = intel_sdvo_get_modes,
1866 .mode_valid = intel_sdvo_mode_valid,
1867 .best_encoder = intel_best_encoder,
1870 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1872 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1874 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1875 drm_mode_destroy(encoder->dev,
1876 intel_sdvo->sdvo_lvds_fixed_mode);
1878 i2c_del_adapter(&intel_sdvo->ddc);
1879 intel_encoder_destroy(encoder);
1882 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1883 .destroy = intel_sdvo_enc_destroy,
1887 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1890 unsigned int num_bits;
1892 /* Make a mask of outputs less than or equal to our own priority in the
1895 switch (sdvo->controlled_output) {
1896 case SDVO_OUTPUT_LVDS1:
1897 mask |= SDVO_OUTPUT_LVDS1;
1898 case SDVO_OUTPUT_LVDS0:
1899 mask |= SDVO_OUTPUT_LVDS0;
1900 case SDVO_OUTPUT_TMDS1:
1901 mask |= SDVO_OUTPUT_TMDS1;
1902 case SDVO_OUTPUT_TMDS0:
1903 mask |= SDVO_OUTPUT_TMDS0;
1904 case SDVO_OUTPUT_RGB1:
1905 mask |= SDVO_OUTPUT_RGB1;
1906 case SDVO_OUTPUT_RGB0:
1907 mask |= SDVO_OUTPUT_RGB0;
1911 /* Count bits to find what number we are in the priority list. */
1912 mask &= sdvo->caps.output_flags;
1913 num_bits = hweight16(mask);
1914 /* If more than 3 outputs, default to DDC bus 3 for now. */
1918 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1919 sdvo->ddc_bus = 1 << num_bits;
1923 * Choose the appropriate DDC bus for control bus switch command for this
1924 * SDVO output based on the controlled output.
1926 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1927 * outputs, then LVDS outputs.
1930 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1931 struct intel_sdvo *sdvo, u32 reg)
1933 struct sdvo_device_mapping *mapping;
1936 mapping = &(dev_priv->sdvo_mappings[0]);
1938 mapping = &(dev_priv->sdvo_mappings[1]);
1940 if (mapping->initialized)
1941 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1943 intel_sdvo_guess_ddc_bus(sdvo);
1947 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1948 struct intel_sdvo *sdvo, u32 reg)
1950 struct sdvo_device_mapping *mapping;
1954 mapping = &dev_priv->sdvo_mappings[0];
1956 mapping = &dev_priv->sdvo_mappings[1];
1958 pin = GMBUS_PORT_DPB;
1959 speed = GMBUS_RATE_1MHZ >> 8;
1960 if (mapping->initialized) {
1961 pin = mapping->i2c_pin;
1962 speed = mapping->i2c_speed;
1965 if (pin < GMBUS_NUM_PORTS) {
1966 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1967 intel_gmbus_set_speed(sdvo->i2c, speed);
1968 intel_gmbus_force_bit(sdvo->i2c, true);
1970 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1974 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1976 return intel_sdvo_check_supp_encode(intel_sdvo);
1980 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1982 struct drm_i915_private *dev_priv = dev->dev_private;
1983 struct sdvo_device_mapping *my_mapping, *other_mapping;
1985 if (IS_SDVOB(sdvo_reg)) {
1986 my_mapping = &dev_priv->sdvo_mappings[0];
1987 other_mapping = &dev_priv->sdvo_mappings[1];
1989 my_mapping = &dev_priv->sdvo_mappings[1];
1990 other_mapping = &dev_priv->sdvo_mappings[0];
1993 /* If the BIOS described our SDVO device, take advantage of it. */
1994 if (my_mapping->slave_addr)
1995 return my_mapping->slave_addr;
1997 /* If the BIOS only described a different SDVO device, use the
1998 * address that it isn't using.
2000 if (other_mapping->slave_addr) {
2001 if (other_mapping->slave_addr == 0x70)
2007 /* No SDVO device info is found for another DVO port,
2008 * so use mapping assumption we had before BIOS parsing.
2010 if (IS_SDVOB(sdvo_reg))
2017 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2018 struct intel_sdvo *encoder)
2020 drm_connector_init(encoder->base.base.dev,
2021 &connector->base.base,
2022 &intel_sdvo_connector_funcs,
2023 connector->base.base.connector_type);
2025 drm_connector_helper_add(&connector->base.base,
2026 &intel_sdvo_connector_helper_funcs);
2028 connector->base.base.interlace_allowed = 0;
2029 connector->base.base.doublescan_allowed = 0;
2030 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2032 intel_connector_attach_encoder(&connector->base, &encoder->base);
2033 drm_sysfs_connector_add(&connector->base.base);
2037 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2039 struct drm_device *dev = connector->base.base.dev;
2041 connector->force_audio_property =
2042 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2043 if (connector->force_audio_property) {
2044 connector->force_audio_property->values[0] = -1;
2045 connector->force_audio_property->values[1] = 1;
2046 drm_connector_attach_property(&connector->base.base,
2047 connector->force_audio_property, 0);
2052 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2054 struct drm_encoder *encoder = &intel_sdvo->base.base;
2055 struct drm_connector *connector;
2056 struct intel_connector *intel_connector;
2057 struct intel_sdvo_connector *intel_sdvo_connector;
2059 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2060 if (!intel_sdvo_connector)
2064 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2065 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2066 } else if (device == 1) {
2067 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2068 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2071 intel_connector = &intel_sdvo_connector->base;
2072 connector = &intel_connector->base;
2073 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2074 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2075 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2077 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2078 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2079 intel_sdvo->is_hdmi = true;
2081 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2082 (1 << INTEL_ANALOG_CLONE_BIT));
2084 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2085 if (intel_sdvo->is_hdmi)
2086 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2092 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2094 struct drm_encoder *encoder = &intel_sdvo->base.base;
2095 struct drm_connector *connector;
2096 struct intel_connector *intel_connector;
2097 struct intel_sdvo_connector *intel_sdvo_connector;
2099 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2100 if (!intel_sdvo_connector)
2103 intel_connector = &intel_sdvo_connector->base;
2104 connector = &intel_connector->base;
2105 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2106 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2108 intel_sdvo->controlled_output |= type;
2109 intel_sdvo_connector->output_flag = type;
2111 intel_sdvo->is_tv = true;
2112 intel_sdvo->base.needs_tv_clock = true;
2113 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2115 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2117 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2120 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2126 intel_sdvo_destroy(connector);
2131 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2133 struct drm_encoder *encoder = &intel_sdvo->base.base;
2134 struct drm_connector *connector;
2135 struct intel_connector *intel_connector;
2136 struct intel_sdvo_connector *intel_sdvo_connector;
2138 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2139 if (!intel_sdvo_connector)
2142 intel_connector = &intel_sdvo_connector->base;
2143 connector = &intel_connector->base;
2144 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2145 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2146 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2149 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2150 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2151 } else if (device == 1) {
2152 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2153 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2156 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2157 (1 << INTEL_ANALOG_CLONE_BIT));
2159 intel_sdvo_connector_init(intel_sdvo_connector,
2165 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2167 struct drm_encoder *encoder = &intel_sdvo->base.base;
2168 struct drm_connector *connector;
2169 struct intel_connector *intel_connector;
2170 struct intel_sdvo_connector *intel_sdvo_connector;
2172 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2173 if (!intel_sdvo_connector)
2176 intel_connector = &intel_sdvo_connector->base;
2177 connector = &intel_connector->base;
2178 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2179 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2182 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2183 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2184 } else if (device == 1) {
2185 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2186 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2189 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2190 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2192 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2193 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2199 intel_sdvo_destroy(connector);
2204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2206 intel_sdvo->is_tv = false;
2207 intel_sdvo->base.needs_tv_clock = false;
2208 intel_sdvo->is_lvds = false;
2210 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2212 if (flags & SDVO_OUTPUT_TMDS0)
2213 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2216 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2217 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2220 /* TV has no XXX1 function block */
2221 if (flags & SDVO_OUTPUT_SVID0)
2222 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2225 if (flags & SDVO_OUTPUT_CVBS0)
2226 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2229 if (flags & SDVO_OUTPUT_RGB0)
2230 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2233 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2234 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2237 if (flags & SDVO_OUTPUT_LVDS0)
2238 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2241 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2242 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2245 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2246 unsigned char bytes[2];
2248 intel_sdvo->controlled_output = 0;
2249 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2250 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2251 SDVO_NAME(intel_sdvo),
2252 bytes[0], bytes[1]);
2255 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2260 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2261 struct intel_sdvo_connector *intel_sdvo_connector,
2264 struct drm_device *dev = intel_sdvo->base.base.dev;
2265 struct intel_sdvo_tv_format format;
2266 uint32_t format_map, i;
2268 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2271 if (!intel_sdvo_get_value(intel_sdvo,
2272 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2273 &format, sizeof(format)))
2276 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2278 if (format_map == 0)
2281 intel_sdvo_connector->format_supported_num = 0;
2282 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2283 if (format_map & (1 << i))
2284 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2287 intel_sdvo_connector->tv_format =
2288 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2289 "mode", intel_sdvo_connector->format_supported_num);
2290 if (!intel_sdvo_connector->tv_format)
2293 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2294 drm_property_add_enum(
2295 intel_sdvo_connector->tv_format, i,
2296 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2298 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2299 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2300 intel_sdvo_connector->tv_format, 0);
2305 #define ENHANCEMENT(name, NAME) do { \
2306 if (enhancements.name) { \
2307 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2308 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2310 intel_sdvo_connector->max_##name = data_value[0]; \
2311 intel_sdvo_connector->cur_##name = response; \
2312 intel_sdvo_connector->name = \
2313 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2314 if (!intel_sdvo_connector->name) return false; \
2315 intel_sdvo_connector->name->values[0] = 0; \
2316 intel_sdvo_connector->name->values[1] = data_value[0]; \
2317 drm_connector_attach_property(connector, \
2318 intel_sdvo_connector->name, \
2319 intel_sdvo_connector->cur_##name); \
2320 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2321 data_value[0], data_value[1], response); \
2326 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2327 struct intel_sdvo_connector *intel_sdvo_connector,
2328 struct intel_sdvo_enhancements_reply enhancements)
2330 struct drm_device *dev = intel_sdvo->base.base.dev;
2331 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2332 uint16_t response, data_value[2];
2334 /* when horizontal overscan is supported, Add the left/right property */
2335 if (enhancements.overscan_h) {
2336 if (!intel_sdvo_get_value(intel_sdvo,
2337 SDVO_CMD_GET_MAX_OVERSCAN_H,
2341 if (!intel_sdvo_get_value(intel_sdvo,
2342 SDVO_CMD_GET_OVERSCAN_H,
2346 intel_sdvo_connector->max_hscan = data_value[0];
2347 intel_sdvo_connector->left_margin = data_value[0] - response;
2348 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2349 intel_sdvo_connector->left =
2350 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2352 if (!intel_sdvo_connector->left)
2355 intel_sdvo_connector->left->values[0] = 0;
2356 intel_sdvo_connector->left->values[1] = data_value[0];
2357 drm_connector_attach_property(connector,
2358 intel_sdvo_connector->left,
2359 intel_sdvo_connector->left_margin);
2361 intel_sdvo_connector->right =
2362 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2364 if (!intel_sdvo_connector->right)
2367 intel_sdvo_connector->right->values[0] = 0;
2368 intel_sdvo_connector->right->values[1] = data_value[0];
2369 drm_connector_attach_property(connector,
2370 intel_sdvo_connector->right,
2371 intel_sdvo_connector->right_margin);
2372 DRM_DEBUG_KMS("h_overscan: max %d, "
2373 "default %d, current %d\n",
2374 data_value[0], data_value[1], response);
2377 if (enhancements.overscan_v) {
2378 if (!intel_sdvo_get_value(intel_sdvo,
2379 SDVO_CMD_GET_MAX_OVERSCAN_V,
2383 if (!intel_sdvo_get_value(intel_sdvo,
2384 SDVO_CMD_GET_OVERSCAN_V,
2388 intel_sdvo_connector->max_vscan = data_value[0];
2389 intel_sdvo_connector->top_margin = data_value[0] - response;
2390 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2391 intel_sdvo_connector->top =
2392 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2394 if (!intel_sdvo_connector->top)
2397 intel_sdvo_connector->top->values[0] = 0;
2398 intel_sdvo_connector->top->values[1] = data_value[0];
2399 drm_connector_attach_property(connector,
2400 intel_sdvo_connector->top,
2401 intel_sdvo_connector->top_margin);
2403 intel_sdvo_connector->bottom =
2404 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2405 "bottom_margin", 2);
2406 if (!intel_sdvo_connector->bottom)
2409 intel_sdvo_connector->bottom->values[0] = 0;
2410 intel_sdvo_connector->bottom->values[1] = data_value[0];
2411 drm_connector_attach_property(connector,
2412 intel_sdvo_connector->bottom,
2413 intel_sdvo_connector->bottom_margin);
2414 DRM_DEBUG_KMS("v_overscan: max %d, "
2415 "default %d, current %d\n",
2416 data_value[0], data_value[1], response);
2419 ENHANCEMENT(hpos, HPOS);
2420 ENHANCEMENT(vpos, VPOS);
2421 ENHANCEMENT(saturation, SATURATION);
2422 ENHANCEMENT(contrast, CONTRAST);
2423 ENHANCEMENT(hue, HUE);
2424 ENHANCEMENT(sharpness, SHARPNESS);
2425 ENHANCEMENT(brightness, BRIGHTNESS);
2426 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2427 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2428 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2429 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2430 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2432 if (enhancements.dot_crawl) {
2433 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2436 intel_sdvo_connector->max_dot_crawl = 1;
2437 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2438 intel_sdvo_connector->dot_crawl =
2439 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2440 if (!intel_sdvo_connector->dot_crawl)
2443 intel_sdvo_connector->dot_crawl->values[0] = 0;
2444 intel_sdvo_connector->dot_crawl->values[1] = 1;
2445 drm_connector_attach_property(connector,
2446 intel_sdvo_connector->dot_crawl,
2447 intel_sdvo_connector->cur_dot_crawl);
2448 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2455 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2456 struct intel_sdvo_connector *intel_sdvo_connector,
2457 struct intel_sdvo_enhancements_reply enhancements)
2459 struct drm_device *dev = intel_sdvo->base.base.dev;
2460 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2461 uint16_t response, data_value[2];
2463 ENHANCEMENT(brightness, BRIGHTNESS);
2469 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2470 struct intel_sdvo_connector *intel_sdvo_connector)
2473 struct intel_sdvo_enhancements_reply reply;
2477 enhancements.response = 0;
2478 intel_sdvo_get_value(intel_sdvo,
2479 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2480 &enhancements, sizeof(enhancements));
2481 if (enhancements.response == 0) {
2482 DRM_DEBUG_KMS("No enhancement is supported\n");
2486 if (IS_TV(intel_sdvo_connector))
2487 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2488 else if(IS_LVDS(intel_sdvo_connector))
2489 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2494 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2495 struct i2c_msg *msgs,
2498 struct intel_sdvo *sdvo = adapter->algo_data;
2500 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2503 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2506 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2508 struct intel_sdvo *sdvo = adapter->algo_data;
2509 return sdvo->i2c->algo->functionality(sdvo->i2c);
2512 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2513 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2514 .functionality = intel_sdvo_ddc_proxy_func
2518 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2519 struct drm_device *dev)
2521 sdvo->ddc.owner = THIS_MODULE;
2522 sdvo->ddc.class = I2C_CLASS_DDC;
2523 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2524 sdvo->ddc.dev.parent = &dev->pdev->dev;
2525 sdvo->ddc.algo_data = sdvo;
2526 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2528 return i2c_add_adapter(&sdvo->ddc) == 0;
2531 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2533 struct drm_i915_private *dev_priv = dev->dev_private;
2534 struct intel_encoder *intel_encoder;
2535 struct intel_sdvo *intel_sdvo;
2538 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2542 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2547 intel_sdvo->sdvo_reg = sdvo_reg;
2549 intel_encoder = &intel_sdvo->base;
2550 intel_encoder->type = INTEL_OUTPUT_SDVO;
2551 /* encoder type will be decided later */
2552 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2554 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2555 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2557 /* Read the regs to test if we can talk to the device */
2558 for (i = 0; i < 0x40; i++) {
2561 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2562 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2563 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2568 if (IS_SDVOB(sdvo_reg))
2569 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2571 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2573 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2575 /* In default case sdvo lvds is false */
2576 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2579 if (intel_sdvo_output_setup(intel_sdvo,
2580 intel_sdvo->caps.output_flags) != true) {
2581 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2582 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2586 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2588 /* Set the input timing to the screen. Assume always input 0. */
2589 if (!intel_sdvo_set_target_input(intel_sdvo))
2592 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2593 &intel_sdvo->pixel_clock_min,
2594 &intel_sdvo->pixel_clock_max))
2597 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2598 "clock range %dMHz - %dMHz, "
2599 "input 1: %c, input 2: %c, "
2600 "output 1: %c, output 2: %c\n",
2601 SDVO_NAME(intel_sdvo),
2602 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2603 intel_sdvo->caps.device_rev_id,
2604 intel_sdvo->pixel_clock_min / 1000,
2605 intel_sdvo->pixel_clock_max / 1000,
2606 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2607 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2608 /* check currently supported outputs */
2609 intel_sdvo->caps.output_flags &
2610 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2611 intel_sdvo->caps.output_flags &
2612 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2616 drm_encoder_cleanup(&intel_encoder->base);
2617 i2c_del_adapter(&intel_sdvo->ddc);