drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <drm/drmP.h>
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/of_device.h>
  21 #include <linux/pm_runtime.h>
  22
  23 #include <video/of_display_timing.h>
  24 #include <video/samsung_fimd.h>
  25 #include <drm/exynos_drm.h>
  26
  27 #include "exynos_drm_drv.h"
  28 #include "exynos_drm_fbdev.h"
  29 #include "exynos_drm_crtc.h"
  30 #include "exynos_drm_iommu.h"
  31
  32 /*
  33  * FIMD is stand for Fully Interactive Mobile Display and
  34  * as a display controller, it transfers contents drawn on memory
  35  * to a LCD Panel through Display Interfaces such as RGB or
  36  * CPU Interface.
  37  */
  38
  39 /* position control register for hardware window 0, 2 ~ 4.*/
  40 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  41 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  42 /*
  43  * size control register for hardware windows 0 and alpha control register
  44  * for hardware windows 1 ~ 4
  45  */
  46 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x08 + (win) * 16)
  47 /* size control register for hardware windows 1 ~ 2. */
  48 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  49
  50 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  51 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  52 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  53
  54 /* color key control register for hardware window 1 ~ 4. */
  55 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + ((x - 1) * 8))
  56 /* color key value register for hardware window 1 ~ 4. */
  57 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + ((x - 1) * 8))
  58
  59 /* FIMD has totally five hardware windows. */
  60 #define WINDOWS_NR      5
  61
  62 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  63
  64 struct fimd_driver_data {
  65         unsigned int timing_base;
  66 };
  67
  68 static struct fimd_driver_data exynos4_fimd_driver_data = {
  69         .timing_base = 0x0,
  70 };
  71
  72 static struct fimd_driver_data exynos5_fimd_driver_data = {
  73         .timing_base = 0x20000,
  74 };
  75
  76 struct fimd_win_data {
  77         unsigned int            offset_x;
  78         unsigned int            offset_y;
  79         unsigned int            ovl_width;
  80         unsigned int            ovl_height;
  81         unsigned int            fb_width;
  82         unsigned int            fb_height;
  83         unsigned int            bpp;
  84         dma_addr_t              dma_addr;
  85         unsigned int            buf_offsize;
  86         unsigned int            line_size;      /* bytes */
  87         bool                    enabled;
  88         bool                    resume;
  89 };
  90
  91 struct fimd_context {
  92         struct exynos_drm_subdrv        subdrv;
  93         int                             irq;
  94         struct drm_crtc                 *crtc;
  95         struct clk                      *bus_clk;
  96         struct clk                      *lcd_clk;
  97         void __iomem                    *regs;
  98         struct fimd_win_data            win_data[WINDOWS_NR];
  99         unsigned int                    clkdiv;
 100         unsigned int                    default_win;
 101         unsigned long                   irq_flags;
 102         u32                             vidcon0;
 103         u32                             vidcon1;
 104         bool                            suspended;
 105         struct mutex                    lock;
 106         wait_queue_head_t               wait_vsync_queue;
 107         atomic_t                        wait_vsync_event;
 108
 109         struct exynos_drm_panel_info *panel;
 110 };
 111
 112 #ifdef CONFIG_OF
 113 static const struct of_device_id fimd_driver_dt_match[] = {
 114         { .compatible = "samsung,exynos4210-fimd",
 115           .data = &exynos4_fimd_driver_data },
 116         { .compatible = "samsung,exynos5250-fimd",
 117           .data = &exynos5_fimd_driver_data },
 118         {},
 119 };
 120 MODULE_DEVICE_TABLE(of, fimd_driver_dt_match);
 121 #endif
 122
 123 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 124         struct platform_device *pdev)
 125 {
 126 #ifdef CONFIG_OF
 127         const struct of_device_id *of_id =
 128                         of_match_device(fimd_driver_dt_match, &pdev->dev);
 129
 130         if (of_id)
 131                 return (struct fimd_driver_data *)of_id->data;
 132 #endif
 133
 134         return (struct fimd_driver_data *)
 135                 platform_get_device_id(pdev)->driver_data;
 136 }
 137
 138 static bool fimd_display_is_connected(struct device *dev)
 139 {
 140         DRM_DEBUG_KMS("%s\n", __FILE__);
 141
 142         /* TODO. */
 143
 144         return true;
 145 }
 146
 147 static void *fimd_get_panel(struct device *dev)
 148 {
 149         struct fimd_context *ctx = get_fimd_context(dev);
 150
 151         DRM_DEBUG_KMS("%s\n", __FILE__);
 152
 153         return ctx->panel;
 154 }
 155
 156 static int fimd_check_timing(struct device *dev, void *timing)
 157 {
 158         DRM_DEBUG_KMS("%s\n", __FILE__);
 159
 160         /* TODO. */
 161
 162         return 0;
 163 }
 164
 165 static int fimd_display_power_on(struct device *dev, int mode)
 166 {
 167         DRM_DEBUG_KMS("%s\n", __FILE__);
 168
 169         /* TODO */
 170
 171         return 0;
 172 }
 173
 174 static struct exynos_drm_display_ops fimd_display_ops = {
 175         .type = EXYNOS_DISPLAY_TYPE_LCD,
 176         .is_connected = fimd_display_is_connected,
 177         .get_panel = fimd_get_panel,
 178         .check_timing = fimd_check_timing,
 179         .power_on = fimd_display_power_on,
 180 };
 181
 182 static void fimd_dpms(struct device *subdrv_dev, int mode)
 183 {
 184         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 185
 186         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
 187
 188         mutex_lock(&ctx->lock);
 189
 190         switch (mode) {
 191         case DRM_MODE_DPMS_ON:
 192                 /*
 193                  * enable fimd hardware only if suspended status.
 194                  *
 195                  * P.S. fimd_dpms function would be called at booting time so
 196                  * clk_enable could be called double time.
 197                  */
 198                 if (ctx->suspended)
 199                         pm_runtime_get_sync(subdrv_dev);
 200                 break;
 201         case DRM_MODE_DPMS_STANDBY:
 202         case DRM_MODE_DPMS_SUSPEND:
 203         case DRM_MODE_DPMS_OFF:
 204                 if (!ctx->suspended)
 205                         pm_runtime_put_sync(subdrv_dev);
 206                 break;
 207         default:
 208                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 209                 break;
 210         }
 211
 212         mutex_unlock(&ctx->lock);
 213 }
 214
 215 static void fimd_apply(struct device *subdrv_dev)
 216 {
 217         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 218         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 219         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 220         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
 221         struct fimd_win_data *win_data;
 222         int i;
 223
 224         DRM_DEBUG_KMS("%s\n", __FILE__);
 225
 226         for (i = 0; i < WINDOWS_NR; i++) {
 227                 win_data = &ctx->win_data[i];
 228                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
 229                         ovl_ops->commit(subdrv_dev, i);
 230         }
 231
 232         if (mgr_ops && mgr_ops->commit)
 233                 mgr_ops->commit(subdrv_dev);
 234 }
 235
 236 static void fimd_commit(struct device *dev)
 237 {
 238         struct fimd_context *ctx = get_fimd_context(dev);
 239         struct exynos_drm_panel_info *panel = ctx->panel;
 240         struct fb_videomode *timing = &panel->timing;
 241         struct fimd_driver_data *driver_data;
 242         struct platform_device *pdev = to_platform_device(dev);
 243         u32 val;
 244
 245         driver_data = drm_fimd_get_driver_data(pdev);
 246         if (ctx->suspended)
 247                 return;
 248
 249         DRM_DEBUG_KMS("%s\n", __FILE__);
 250
 251         /* setup polarity values from machine code. */
 252         writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
 253
 254         /* setup vertical timing values. */
 255         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
 256                VIDTCON0_VFPD(timing->lower_margin - 1) |
 257                VIDTCON0_VSPW(timing->vsync_len - 1);
 258         writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
 259
 260         /* setup horizontal timing values.  */
 261         val = VIDTCON1_HBPD(timing->left_margin - 1) |
 262                VIDTCON1_HFPD(timing->right_margin - 1) |
 263                VIDTCON1_HSPW(timing->hsync_len - 1);
 264         writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
 265
 266         /* setup horizontal and vertical display size. */
 267         val = VIDTCON2_LINEVAL(timing->yres - 1) |
 268                VIDTCON2_HOZVAL(timing->xres - 1) |
 269                VIDTCON2_LINEVAL_E(timing->yres - 1) |
 270                VIDTCON2_HOZVAL_E(timing->xres - 1);
 271         writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 272
 273         /* setup clock source, clock divider, enable dma. */
 274         val = ctx->vidcon0;
 275         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 276
 277         if (ctx->clkdiv > 1)
 278                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 279         else
 280                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 281
 282         /*
 283          * fields of register with prefix '_F' would be updated
 284          * at vsync(same as dma start)
 285          */
 286         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 287         writel(val, ctx->regs + VIDCON0);
 288 }
 289
 290 static int fimd_enable_vblank(struct device *dev)
 291 {
 292         struct fimd_context *ctx = get_fimd_context(dev);
 293         u32 val;
 294
 295         DRM_DEBUG_KMS("%s\n", __FILE__);
 296
 297         if (ctx->suspended)
 298                 return -EPERM;
 299
 300         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 301                 val = readl(ctx->regs + VIDINTCON0);
 302
 303                 val |= VIDINTCON0_INT_ENABLE;
 304                 val |= VIDINTCON0_INT_FRAME;
 305
 306                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 307                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 308                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 309                 val |= VIDINTCON0_FRAMESEL1_NONE;
 310
 311                 writel(val, ctx->regs + VIDINTCON0);
 312         }
 313
 314         return 0;
 315 }
 316
 317 static void fimd_disable_vblank(struct device *dev)
 318 {
 319         struct fimd_context *ctx = get_fimd_context(dev);
 320         u32 val;
 321
 322         DRM_DEBUG_KMS("%s\n", __FILE__);
 323
 324         if (ctx->suspended)
 325                 return;
 326
 327         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 328                 val = readl(ctx->regs + VIDINTCON0);
 329
 330                 val &= ~VIDINTCON0_INT_FRAME;
 331                 val &= ~VIDINTCON0_INT_ENABLE;
 332
 333                 writel(val, ctx->regs + VIDINTCON0);
 334         }
 335 }
 336
 337 static void fimd_wait_for_vblank(struct device *dev)
 338 {
 339         struct fimd_context *ctx = get_fimd_context(dev);
 340
 341         if (ctx->suspended)
 342                 return;
 343
 344         atomic_set(&ctx->wait_vsync_event, 1);
 345
 346         /*
 347          * wait for FIMD to signal VSYNC interrupt or return after
 348          * timeout which is set to 50ms (refresh rate of 20).
 349          */
 350         if (!wait_event_timeout(ctx->wait_vsync_queue,
 351                                 !atomic_read(&ctx->wait_vsync_event),
 352                                 DRM_HZ/20))
 353                 DRM_DEBUG_KMS("vblank wait timed out.\n");
 354 }
 355
 356 static struct exynos_drm_manager_ops fimd_manager_ops = {
 357         .dpms = fimd_dpms,
 358         .apply = fimd_apply,
 359         .commit = fimd_commit,
 360         .enable_vblank = fimd_enable_vblank,
 361         .disable_vblank = fimd_disable_vblank,
 362         .wait_for_vblank = fimd_wait_for_vblank,
 363 };
 364
 365 static void fimd_win_mode_set(struct device *dev,
 366                               struct exynos_drm_overlay *overlay)
 367 {
 368         struct fimd_context *ctx = get_fimd_context(dev);
 369         struct fimd_win_data *win_data;
 370         int win;
 371         unsigned long offset;
 372
 373         DRM_DEBUG_KMS("%s\n", __FILE__);
 374
 375         if (!overlay) {
 376                 dev_err(dev, "overlay is NULL\n");
 377                 return;
 378         }
 379
 380         win = overlay->zpos;
 381         if (win == DEFAULT_ZPOS)
 382                 win = ctx->default_win;
 383
 384         if (win < 0 || win > WINDOWS_NR)
 385                 return;
 386
 387         offset = overlay->fb_x * (overlay->bpp >> 3);
 388         offset += overlay->fb_y * overlay->pitch;
 389
 390         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 391
 392         win_data = &ctx->win_data[win];
 393
 394         win_data->offset_x = overlay->crtc_x;
 395         win_data->offset_y = overlay->crtc_y;
 396         win_data->ovl_width = overlay->crtc_width;
 397         win_data->ovl_height = overlay->crtc_height;
 398         win_data->fb_width = overlay->fb_width;
 399         win_data->fb_height = overlay->fb_height;
 400         win_data->dma_addr = overlay->dma_addr[0] + offset;
 401         win_data->bpp = overlay->bpp;
 402         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 403                                 (overlay->bpp >> 3);
 404         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 405
 406         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 407                         win_data->offset_x, win_data->offset_y);
 408         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 409                         win_data->ovl_width, win_data->ovl_height);
 410         DRM_DEBUG_KMS("paddr = 0x%lx\n", (unsigned long)win_data->dma_addr);
 411         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 412                         overlay->fb_width, overlay->crtc_width);
 413 }
 414
 415 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 416 {
 417         struct fimd_context *ctx = get_fimd_context(dev);
 418         struct fimd_win_data *win_data = &ctx->win_data[win];
 419         unsigned long val;
 420
 421         DRM_DEBUG_KMS("%s\n", __FILE__);
 422
 423         val = WINCONx_ENWIN;
 424
 425         switch (win_data->bpp) {
 426         case 1:
 427                 val |= WINCON0_BPPMODE_1BPP;
 428                 val |= WINCONx_BITSWP;
 429                 val |= WINCONx_BURSTLEN_4WORD;
 430                 break;
 431         case 2:
 432                 val |= WINCON0_BPPMODE_2BPP;
 433                 val |= WINCONx_BITSWP;
 434                 val |= WINCONx_BURSTLEN_8WORD;
 435                 break;
 436         case 4:
 437                 val |= WINCON0_BPPMODE_4BPP;
 438                 val |= WINCONx_BITSWP;
 439                 val |= WINCONx_BURSTLEN_8WORD;
 440                 break;
 441         case 8:
 442                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 443                 val |= WINCONx_BURSTLEN_8WORD;
 444                 val |= WINCONx_BYTSWP;
 445                 break;
 446         case 16:
 447                 val |= WINCON0_BPPMODE_16BPP_565;
 448                 val |= WINCONx_HAWSWP;
 449                 val |= WINCONx_BURSTLEN_16WORD;
 450                 break;
 451         case 24:
 452                 val |= WINCON0_BPPMODE_24BPP_888;
 453                 val |= WINCONx_WSWP;
 454                 val |= WINCONx_BURSTLEN_16WORD;
 455                 break;
 456         case 32:
 457                 val |= WINCON1_BPPMODE_28BPP_A4888
 458                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 459                 val |= WINCONx_WSWP;
 460                 val |= WINCONx_BURSTLEN_16WORD;
 461                 break;
 462         default:
 463                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 464
 465                 val |= WINCON0_BPPMODE_24BPP_888;
 466                 val |= WINCONx_WSWP;
 467                 val |= WINCONx_BURSTLEN_16WORD;
 468                 break;
 469         }
 470
 471         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 472
 473         writel(val, ctx->regs + WINCON(win));
 474 }
 475
 476 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 477 {
 478         struct fimd_context *ctx = get_fimd_context(dev);
 479         unsigned int keycon0 = 0, keycon1 = 0;
 480
 481         DRM_DEBUG_KMS("%s\n", __FILE__);
 482
 483         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 484                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 485
 486         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 487
 488         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 489         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 490 }
 491
 492 static void fimd_win_commit(struct device *dev, int zpos)
 493 {
 494         struct fimd_context *ctx = get_fimd_context(dev);
 495         struct fimd_win_data *win_data;
 496         int win = zpos;
 497         unsigned long val, alpha, size;
 498         unsigned int last_x;
 499         unsigned int last_y;
 500
 501         DRM_DEBUG_KMS("%s\n", __FILE__);
 502
 503         if (ctx->suspended)
 504                 return;
 505
 506         if (win == DEFAULT_ZPOS)
 507                 win = ctx->default_win;
 508
 509         if (win < 0 || win > WINDOWS_NR)
 510                 return;
 511
 512         win_data = &ctx->win_data[win];
 513
 514         /*
 515          * SHADOWCON register is used for enabling timing.
 516          *
 517          * for example, once only width value of a register is set,
 518          * if the dma is started then fimd hardware could malfunction so
 519          * with protect window setting, the register fields with prefix '_F'
 520          * wouldn't be updated at vsync also but updated once unprotect window
 521          * is set.
 522          */
 523
 524         /* protect windows */
 525         val = readl(ctx->regs + SHADOWCON);
 526         val |= SHADOWCON_WINx_PROTECT(win);
 527         writel(val, ctx->regs + SHADOWCON);
 528
 529         /* buffer start address */
 530         val = (unsigned long)win_data->dma_addr;
 531         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 532
 533         /* buffer end address */
 534         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 535         val = (unsigned long)(win_data->dma_addr + size);
 536         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 537
 538         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 539                         (unsigned long)win_data->dma_addr, val, size);
 540         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 541                         win_data->ovl_width, win_data->ovl_height);
 542
 543         /* buffer size */
 544         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 545                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size) |
 546                 VIDW_BUF_SIZE_OFFSET_E(win_data->buf_offsize) |
 547                 VIDW_BUF_SIZE_PAGEWIDTH_E(win_data->line_size);
 548         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 549
 550         /* OSD position */
 551         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 552                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y) |
 553                 VIDOSDxA_TOPLEFT_X_E(win_data->offset_x) |
 554                 VIDOSDxA_TOPLEFT_Y_E(win_data->offset_y);
 555         writel(val, ctx->regs + VIDOSD_A(win));
 556
 557         last_x = win_data->offset_x + win_data->ovl_width;
 558         if (last_x)
 559                 last_x--;
 560         last_y = win_data->offset_y + win_data->ovl_height;
 561         if (last_y)
 562                 last_y--;
 563
 564         val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y) |
 565                 VIDOSDxB_BOTRIGHT_X_E(last_x) | VIDOSDxB_BOTRIGHT_Y_E(last_y);
 566
 567         writel(val, ctx->regs + VIDOSD_B(win));
 568
 569         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 570                         win_data->offset_x, win_data->offset_y, last_x, last_y);
 571
 572         /* hardware window 0 doesn't support alpha channel. */
 573         if (win != 0) {
 574                 /* OSD alpha */
 575                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 576                         VIDISD14C_ALPHA1_G(0xf) |
 577                         VIDISD14C_ALPHA1_B(0xf);
 578
 579                 writel(alpha, ctx->regs + VIDOSD_C(win));
 580         }
 581
 582         /* OSD size */
 583         if (win != 3 && win != 4) {
 584                 u32 offset = VIDOSD_D(win);
 585                 if (win == 0)
 586                         offset = VIDOSD_C(win);
 587                 val = win_data->ovl_width * win_data->ovl_height;
 588                 writel(val, ctx->regs + offset);
 589
 590                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 591         }
 592
 593         fimd_win_set_pixfmt(dev, win);
 594
 595         /* hardware window 0 doesn't support color key. */
 596         if (win != 0)
 597                 fimd_win_set_colkey(dev, win);
 598
 599         /* wincon */
 600         val = readl(ctx->regs + WINCON(win));
 601         val |= WINCONx_ENWIN;
 602         writel(val, ctx->regs + WINCON(win));
 603
 604         /* Enable DMA channel and unprotect windows */
 605         val = readl(ctx->regs + SHADOWCON);
 606         val |= SHADOWCON_CHx_ENABLE(win);
 607         val &= ~SHADOWCON_WINx_PROTECT(win);
 608         writel(val, ctx->regs + SHADOWCON);
 609
 610         win_data->enabled = true;
 611 }
 612
 613 static void fimd_win_disable(struct device *dev, int zpos)
 614 {
 615         struct fimd_context *ctx = get_fimd_context(dev);
 616         struct fimd_win_data *win_data;
 617         int win = zpos;
 618         u32 val;
 619
 620         DRM_DEBUG_KMS("%s\n", __FILE__);
 621
 622         if (win == DEFAULT_ZPOS)
 623                 win = ctx->default_win;
 624
 625         if (win < 0 || win > WINDOWS_NR)
 626                 return;
 627
 628         win_data = &ctx->win_data[win];
 629
 630         if (ctx->suspended) {
 631                 /* do not resume this window*/
 632                 win_data->resume = false;
 633                 return;
 634         }
 635
 636         /* protect windows */
 637         val = readl(ctx->regs + SHADOWCON);
 638         val |= SHADOWCON_WINx_PROTECT(win);
 639         writel(val, ctx->regs + SHADOWCON);
 640
 641         /* wincon */
 642         val = readl(ctx->regs + WINCON(win));
 643         val &= ~WINCONx_ENWIN;
 644         writel(val, ctx->regs + WINCON(win));
 645
 646         /* unprotect windows */
 647         val = readl(ctx->regs + SHADOWCON);
 648         val &= ~SHADOWCON_CHx_ENABLE(win);
 649         val &= ~SHADOWCON_WINx_PROTECT(win);
 650         writel(val, ctx->regs + SHADOWCON);
 651
 652         win_data->enabled = false;
 653 }
 654
 655 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
 656         .mode_set = fimd_win_mode_set,
 657         .commit = fimd_win_commit,
 658         .disable = fimd_win_disable,
 659 };
 660
 661 static struct exynos_drm_manager fimd_manager = {
 662         .pipe           = -1,
 663         .ops            = &fimd_manager_ops,
 664         .overlay_ops    = &fimd_overlay_ops,
 665         .display_ops    = &fimd_display_ops,
 666 };
 667
 668 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 669 {
 670         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 671         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 672         struct drm_device *drm_dev = subdrv->drm_dev;
 673         struct exynos_drm_manager *manager = subdrv->manager;
 674         u32 val;
 675
 676         val = readl(ctx->regs + VIDINTCON1);
 677
 678         if (val & VIDINTCON1_INT_FRAME)
 679                 /* VSYNC interrupt */
 680                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 681
 682         /* check the crtc is detached already from encoder */
 683         if (manager->pipe < 0)
 684                 goto out;
 685
 686         drm_handle_vblank(drm_dev, manager->pipe);
 687         exynos_drm_crtc_finish_pageflip(drm_dev, manager->pipe);
 688
 689         /* set wait vsync event to zero and wake up queue. */
 690         if (atomic_read(&ctx->wait_vsync_event)) {
 691                 atomic_set(&ctx->wait_vsync_event, 0);
 692                 DRM_WAKEUP(&ctx->wait_vsync_queue);
 693         }
 694 out:
 695         return IRQ_HANDLED;
 696 }
 697
 698 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 699 {
 700         DRM_DEBUG_KMS("%s\n", __FILE__);
 701
 702         /*
 703          * enable drm irq mode.
 704          * - with irq_enabled = 1, we can use the vblank feature.
 705          *
 706          * P.S. note that we wouldn't use drm irq handler but
 707          *      just specific driver own one instead because
 708          *      drm framework supports only one irq handler.
 709          */
 710         drm_dev->irq_enabled = 1;
 711
 712         /*
 713          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
 714          * by drm timer once a current process gives up ownership of
 715          * vblank event.(after drm_vblank_put function is called)
 716          */
 717         drm_dev->vblank_disable_allowed = 1;
 718
 719         /* attach this sub driver to iommu mapping if supported. */
 720         if (is_drm_iommu_supported(drm_dev))
 721                 drm_iommu_attach_device(drm_dev, dev);
 722
 723         return 0;
 724 }
 725
 726 static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
 727 {
 728         DRM_DEBUG_KMS("%s\n", __FILE__);
 729
 730         /* detach this sub driver from iommu mapping if supported. */
 731         if (is_drm_iommu_supported(drm_dev))
 732                 drm_iommu_detach_device(drm_dev, dev);
 733 }
 734
 735 static int fimd_calc_clkdiv(struct fimd_context *ctx,
 736                             struct fb_videomode *timing)
 737 {
 738         unsigned long clk = clk_get_rate(ctx->lcd_clk);
 739         u32 retrace;
 740         u32 clkdiv;
 741         u32 best_framerate = 0;
 742         u32 framerate;
 743
 744         DRM_DEBUG_KMS("%s\n", __FILE__);
 745
 746         retrace = timing->left_margin + timing->hsync_len +
 747                                 timing->right_margin + timing->xres;
 748         retrace *= timing->upper_margin + timing->vsync_len +
 749                                 timing->lower_margin + timing->yres;
 750
 751         /* default framerate is 60Hz */
 752         if (!timing->refresh)
 753                 timing->refresh = 60;
 754
 755         clk /= retrace;
 756
 757         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
 758                 int tmp;
 759
 760                 /* get best framerate */
 761                 framerate = clk / clkdiv;
 762                 tmp = timing->refresh - framerate;
 763                 if (tmp < 0) {
 764                         best_framerate = framerate;
 765                         continue;
 766                 } else {
 767                         if (!best_framerate)
 768                                 best_framerate = framerate;
 769                         else if (tmp < (best_framerate - framerate))
 770                                 best_framerate = framerate;
 771                         break;
 772                 }
 773         }
 774
 775         return clkdiv;
 776 }
 777
 778 static void fimd_clear_win(struct fimd_context *ctx, int win)
 779 {
 780         u32 val;
 781
 782         DRM_DEBUG_KMS("%s\n", __FILE__);
 783
 784         writel(0, ctx->regs + WINCON(win));
 785         writel(0, ctx->regs + VIDOSD_A(win));
 786         writel(0, ctx->regs + VIDOSD_B(win));
 787         writel(0, ctx->regs + VIDOSD_C(win));
 788
 789         if (win == 1 || win == 2)
 790                 writel(0, ctx->regs + VIDOSD_D(win));
 791
 792         val = readl(ctx->regs + SHADOWCON);
 793         val &= ~SHADOWCON_WINx_PROTECT(win);
 794         writel(val, ctx->regs + SHADOWCON);
 795 }
 796
 797 static int fimd_clock(struct fimd_context *ctx, bool enable)
 798 {
 799         DRM_DEBUG_KMS("%s\n", __FILE__);
 800
 801         if (enable) {
 802                 int ret;
 803
 804                 ret = clk_prepare_enable(ctx->bus_clk);
 805                 if (ret < 0)
 806                         return ret;
 807
 808                 ret = clk_prepare_enable(ctx->lcd_clk);
 809                 if  (ret < 0) {
 810                         clk_disable_unprepare(ctx->bus_clk);
 811                         return ret;
 812                 }
 813         } else {
 814                 clk_disable_unprepare(ctx->lcd_clk);
 815                 clk_disable_unprepare(ctx->bus_clk);
 816         }
 817
 818         return 0;
 819 }
 820
 821 static void fimd_window_suspend(struct device *dev)
 822 {
 823         struct fimd_context *ctx = get_fimd_context(dev);
 824         struct fimd_win_data *win_data;
 825         int i;
 826
 827         for (i = 0; i < WINDOWS_NR; i++) {
 828                 win_data = &ctx->win_data[i];
 829                 win_data->resume = win_data->enabled;
 830                 fimd_win_disable(dev, i);
 831         }
 832         fimd_wait_for_vblank(dev);
 833 }
 834
 835 static void fimd_window_resume(struct device *dev)
 836 {
 837         struct fimd_context *ctx = get_fimd_context(dev);
 838         struct fimd_win_data *win_data;
 839         int i;
 840
 841         for (i = 0; i < WINDOWS_NR; i++) {
 842                 win_data = &ctx->win_data[i];
 843                 win_data->enabled = win_data->resume;
 844                 win_data->resume = false;
 845         }
 846 }
 847
 848 static int fimd_activate(struct fimd_context *ctx, bool enable)
 849 {
 850         struct device *dev = ctx->subdrv.dev;
 851         if (enable) {
 852                 int ret;
 853
 854                 ret = fimd_clock(ctx, true);
 855                 if (ret < 0)
 856                         return ret;
 857
 858                 ctx->suspended = false;
 859
 860                 /* if vblank was enabled status, enable it again. */
 861                 if (test_and_clear_bit(0, &ctx->irq_flags))
 862                         fimd_enable_vblank(dev);
 863
 864                 fimd_window_resume(dev);
 865         } else {
 866                 fimd_window_suspend(dev);
 867
 868                 fimd_clock(ctx, false);
 869                 ctx->suspended = true;
 870         }
 871
 872         return 0;
 873 }
 874
 875 static int fimd_probe(struct platform_device *pdev)
 876 {
 877         struct device *dev = &pdev->dev;
 878         struct fimd_context *ctx;
 879         struct exynos_drm_subdrv *subdrv;
 880         struct exynos_drm_fimd_pdata *pdata;
 881         struct exynos_drm_panel_info *panel;
 882         struct resource *res;
 883         int win;
 884         int ret = -EINVAL;
 885
 886         DRM_DEBUG_KMS("%s\n", __FILE__);
 887
 888         if (pdev->dev.of_node) {
 889                 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 890                 if (!pdata) {
 891                         DRM_ERROR("memory allocation for pdata failed\n");
 892                         return -ENOMEM;
 893                 }
 894
 895                 ret = of_get_fb_videomode(dev->of_node, &pdata->panel.timing,
 896                                         OF_USE_NATIVE_MODE);
 897                 if (ret) {
 898                         DRM_ERROR("failed: of_get_fb_videomode() : %d\n", ret);
 899                         return ret;
 900                 }
 901         } else {
 902                 pdata = pdev->dev.platform_data;
 903                 if (!pdata) {
 904                         DRM_ERROR("no platform data specified\n");
 905                         return -EINVAL;
 906                 }
 907         }
 908
 909         panel = &pdata->panel;
 910         if (!panel) {
 911                 dev_err(dev, "panel is null.\n");
 912                 return -EINVAL;
 913         }
 914
 915         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 916         if (!ctx)
 917                 return -ENOMEM;
 918
 919         ctx->bus_clk = devm_clk_get(dev, "fimd");
 920         if (IS_ERR(ctx->bus_clk)) {
 921                 dev_err(dev, "failed to get bus clock\n");
 922                 return PTR_ERR(ctx->bus_clk);
 923         }
 924
 925         ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
 926         if (IS_ERR(ctx->lcd_clk)) {
 927                 dev_err(dev, "failed to get lcd clock\n");
 928                 return PTR_ERR(ctx->lcd_clk);
 929         }
 930
 931         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 932
 933         ctx->regs = devm_ioremap_resource(&pdev->dev, res);
 934         if (IS_ERR(ctx->regs))
 935                 return PTR_ERR(ctx->regs);
 936
 937         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vsync");
 938         if (!res) {
 939                 dev_err(dev, "irq request failed.\n");
 940                 return -ENXIO;
 941         }
 942
 943         ctx->irq = res->start;
 944
 945         ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
 946                                                         0, "drm_fimd", ctx);
 947         if (ret) {
 948                 dev_err(dev, "irq request failed.\n");
 949                 return ret;
 950         }
 951
 952         ctx->vidcon0 = pdata->vidcon0;
 953         ctx->vidcon1 = pdata->vidcon1;
 954         ctx->default_win = pdata->default_win;
 955         ctx->panel = panel;
 956         DRM_INIT_WAITQUEUE(&ctx->wait_vsync_queue);
 957         atomic_set(&ctx->wait_vsync_event, 0);
 958
 959         subdrv = &ctx->subdrv;
 960
 961         subdrv->dev = dev;
 962         subdrv->manager = &fimd_manager;
 963         subdrv->probe = fimd_subdrv_probe;
 964         subdrv->remove = fimd_subdrv_remove;
 965
 966         mutex_init(&ctx->lock);
 967
 968         platform_set_drvdata(pdev, ctx);
 969
 970         pm_runtime_enable(dev);
 971         pm_runtime_get_sync(dev);
 972
 973         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
 974         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 975
 976         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
 977                         panel->timing.pixclock, ctx->clkdiv);
 978
 979         for (win = 0; win < WINDOWS_NR; win++)
 980                 fimd_clear_win(ctx, win);
 981
 982         exynos_drm_subdrv_register(subdrv);
 983
 984         return 0;
 985 }
 986
 987 static int fimd_remove(struct platform_device *pdev)
 988 {
 989         struct device *dev = &pdev->dev;
 990         struct fimd_context *ctx = platform_get_drvdata(pdev);
 991
 992         DRM_DEBUG_KMS("%s\n", __FILE__);
 993
 994         exynos_drm_subdrv_unregister(&ctx->subdrv);
 995
 996         if (ctx->suspended)
 997                 goto out;
 998
 999         pm_runtime_set_suspended(dev);
1000         pm_runtime_put_sync(dev);
1001
1002 out:
1003         pm_runtime_disable(dev);
1004
1005         return 0;
1006 }
1007
1008 #ifdef CONFIG_PM_SLEEP
1009 static int fimd_suspend(struct device *dev)
1010 {
1011         struct fimd_context *ctx = get_fimd_context(dev);
1012
1013         /*
1014          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
1015          * called here, an error would be returned by that interface
1016          * because the usage_count of pm runtime is more than 1.
1017          */
1018         if (!pm_runtime_suspended(dev))
1019                 return fimd_activate(ctx, false);
1020
1021         return 0;
1022 }
1023
1024 static int fimd_resume(struct device *dev)
1025 {
1026         struct fimd_context *ctx = get_fimd_context(dev);
1027
1028         /*
1029          * if entered to sleep when lcd panel was on, the usage_count
1030          * of pm runtime would still be 1 so in this case, fimd driver
1031          * should be on directly not drawing on pm runtime interface.
1032          */
1033         if (!pm_runtime_suspended(dev)) {
1034                 int ret;
1035
1036                 ret = fimd_activate(ctx, true);
1037                 if (ret < 0)
1038                         return ret;
1039
1040                 /*
1041                  * in case of dpms on(standby), fimd_apply function will
1042                  * be called by encoder's dpms callback to update fimd's
1043                  * registers but in case of sleep wakeup, it's not.
1044                  * so fimd_apply function should be called at here.
1045                  */
1046                 fimd_apply(dev);
1047         }
1048
1049         return 0;
1050 }
1051 #endif
1052
1053 #ifdef CONFIG_PM_RUNTIME
1054 static int fimd_runtime_suspend(struct device *dev)
1055 {
1056         struct fimd_context *ctx = get_fimd_context(dev);
1057
1058         DRM_DEBUG_KMS("%s\n", __FILE__);
1059
1060         return fimd_activate(ctx, false);
1061 }
1062
1063 static int fimd_runtime_resume(struct device *dev)
1064 {
1065         struct fimd_context *ctx = get_fimd_context(dev);
1066
1067         DRM_DEBUG_KMS("%s\n", __FILE__);
1068
1069         return fimd_activate(ctx, true);
1070 }
1071 #endif
1072
1073 static struct platform_device_id fimd_driver_ids[] = {
1074         {
1075                 .name           = "exynos4-fb",
1076                 .driver_data    = (unsigned long)&exynos4_fimd_driver_data,
1077         }, {
1078                 .name           = "exynos5-fb",
1079                 .driver_data    = (unsigned long)&exynos5_fimd_driver_data,
1080         },
1081         {},
1082 };
1083 MODULE_DEVICE_TABLE(platform, fimd_driver_ids);
1084
1085 static const struct dev_pm_ops fimd_pm_ops = {
1086         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1087         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1088 };
1089
1090 struct platform_driver fimd_driver = {
1091         .probe          = fimd_probe,
1092         .remove         = fimd_remove,
1093         .id_table       = fimd_driver_ids,
1094         .driver         = {
1095                 .name   = "exynos4-fb",
1096                 .owner  = THIS_MODULE,
1097                 .pm     = &fimd_pm_ops,
1098                 .of_match_table = of_match_ptr(fimd_driver_dt_match),
1099         },
1100 };