drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <drm/drmP.h>
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/pm_runtime.h>
  21
  22 #include <video/samsung_fimd.h>
  23 #include <drm/exynos_drm.h>
  24
  25 #include "exynos_drm_drv.h"
  26 #include "exynos_drm_fbdev.h"
  27 #include "exynos_drm_crtc.h"
  28 #include "exynos_drm_iommu.h"
  29
  30 /*
  31  * FIMD is stand for Fully Interactive Mobile Display and
  32  * as a display controller, it transfers contents drawn on memory
  33  * to a LCD Panel through Display Interfaces such as RGB or
  34  * CPU Interface.
  35  */
  36
  37 /* position control register for hardware window 0, 2 ~ 4.*/
  38 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  39 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  40 /* size control register for hardware window 0. */
  41 #define VIDOSD_C_SIZE_W0        (VIDOSD_BASE + 0x08)
  42 /* alpha control register for hardware window 1 ~ 4. */
  43 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x18 + (win) * 16)
  44 /* size control register for hardware window 1 ~ 4. */
  45 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  46
  47 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  48 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  49 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  50
  51 /* color key control register for hardware window 1 ~ 4. */
  52 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + (x * 8))
  53 /* color key value register for hardware window 1 ~ 4. */
  54 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + (x * 8))
  55
  56 /* FIMD has totally five hardware windows. */
  57 #define WINDOWS_NR      5
  58
  59 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  60
  61 struct fimd_driver_data {
  62         unsigned int timing_base;
  63 };
  64
  65 static struct fimd_driver_data exynos4_fimd_driver_data = {
  66         .timing_base = 0x0,
  67 };
  68
  69 static struct fimd_driver_data exynos5_fimd_driver_data = {
  70         .timing_base = 0x20000,
  71 };
  72
  73 struct fimd_win_data {
  74         unsigned int            offset_x;
  75         unsigned int            offset_y;
  76         unsigned int            ovl_width;
  77         unsigned int            ovl_height;
  78         unsigned int            fb_width;
  79         unsigned int            fb_height;
  80         unsigned int            bpp;
  81         dma_addr_t              dma_addr;
  82         unsigned int            buf_offsize;
  83         unsigned int            line_size;      /* bytes */
  84         bool                    enabled;
  85         bool                    resume;
  86 };
  87
  88 struct fimd_context {
  89         struct exynos_drm_subdrv        subdrv;
  90         int                             irq;
  91         struct drm_crtc                 *crtc;
  92         struct clk                      *bus_clk;
  93         struct clk                      *lcd_clk;
  94         void __iomem                    *regs;
  95         struct fimd_win_data            win_data[WINDOWS_NR];
  96         unsigned int                    clkdiv;
  97         unsigned int                    default_win;
  98         unsigned long                   irq_flags;
  99         u32                             vidcon0;
 100         u32                             vidcon1;
 101         bool                            suspended;
 102         struct mutex                    lock;
 103         wait_queue_head_t               wait_vsync_queue;
 104         atomic_t                        wait_vsync_event;
 105
 106         struct exynos_drm_panel_info *panel;
 107 };
 108
 109 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 110         struct platform_device *pdev)
 111 {
 112         return (struct fimd_driver_data *)
 113                 platform_get_device_id(pdev)->driver_data;
 114 }
 115
 116 static bool fimd_display_is_connected(struct device *dev)
 117 {
 118         DRM_DEBUG_KMS("%s\n", __FILE__);
 119
 120         /* TODO. */
 121
 122         return true;
 123 }
 124
 125 static void *fimd_get_panel(struct device *dev)
 126 {
 127         struct fimd_context *ctx = get_fimd_context(dev);
 128
 129         DRM_DEBUG_KMS("%s\n", __FILE__);
 130
 131         return ctx->panel;
 132 }
 133
 134 static int fimd_check_timing(struct device *dev, void *timing)
 135 {
 136         DRM_DEBUG_KMS("%s\n", __FILE__);
 137
 138         /* TODO. */
 139
 140         return 0;
 141 }
 142
 143 static int fimd_display_power_on(struct device *dev, int mode)
 144 {
 145         DRM_DEBUG_KMS("%s\n", __FILE__);
 146
 147         /* TODO */
 148
 149         return 0;
 150 }
 151
 152 static struct exynos_drm_display_ops fimd_display_ops = {
 153         .type = EXYNOS_DISPLAY_TYPE_LCD,
 154         .is_connected = fimd_display_is_connected,
 155         .get_panel = fimd_get_panel,
 156         .check_timing = fimd_check_timing,
 157         .power_on = fimd_display_power_on,
 158 };
 159
 160 static void fimd_dpms(struct device *subdrv_dev, int mode)
 161 {
 162         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 163
 164         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
 165
 166         mutex_lock(&ctx->lock);
 167
 168         switch (mode) {
 169         case DRM_MODE_DPMS_ON:
 170                 /*
 171                  * enable fimd hardware only if suspended status.
 172                  *
 173                  * P.S. fimd_dpms function would be called at booting time so
 174                  * clk_enable could be called double time.
 175                  */
 176                 if (ctx->suspended)
 177                         pm_runtime_get_sync(subdrv_dev);
 178                 break;
 179         case DRM_MODE_DPMS_STANDBY:
 180         case DRM_MODE_DPMS_SUSPEND:
 181         case DRM_MODE_DPMS_OFF:
 182                 if (!ctx->suspended)
 183                         pm_runtime_put_sync(subdrv_dev);
 184                 break;
 185         default:
 186                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 187                 break;
 188         }
 189
 190         mutex_unlock(&ctx->lock);
 191 }
 192
 193 static void fimd_apply(struct device *subdrv_dev)
 194 {
 195         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 196         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 197         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 198         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
 199         struct fimd_win_data *win_data;
 200         int i;
 201
 202         DRM_DEBUG_KMS("%s\n", __FILE__);
 203
 204         for (i = 0; i < WINDOWS_NR; i++) {
 205                 win_data = &ctx->win_data[i];
 206                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
 207                         ovl_ops->commit(subdrv_dev, i);
 208         }
 209
 210         if (mgr_ops && mgr_ops->commit)
 211                 mgr_ops->commit(subdrv_dev);
 212 }
 213
 214 static void fimd_commit(struct device *dev)
 215 {
 216         struct fimd_context *ctx = get_fimd_context(dev);
 217         struct exynos_drm_panel_info *panel = ctx->panel;
 218         struct fb_videomode *timing = &panel->timing;
 219         struct fimd_driver_data *driver_data;
 220         struct platform_device *pdev = to_platform_device(dev);
 221         u32 val;
 222
 223         driver_data = drm_fimd_get_driver_data(pdev);
 224         if (ctx->suspended)
 225                 return;
 226
 227         DRM_DEBUG_KMS("%s\n", __FILE__);
 228
 229         /* setup polarity values from machine code. */
 230         writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
 231
 232         /* setup vertical timing values. */
 233         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
 234                VIDTCON0_VFPD(timing->lower_margin - 1) |
 235                VIDTCON0_VSPW(timing->vsync_len - 1);
 236         writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
 237
 238         /* setup horizontal timing values.  */
 239         val = VIDTCON1_HBPD(timing->left_margin - 1) |
 240                VIDTCON1_HFPD(timing->right_margin - 1) |
 241                VIDTCON1_HSPW(timing->hsync_len - 1);
 242         writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
 243
 244         /* setup horizontal and vertical display size. */
 245         val = VIDTCON2_LINEVAL(timing->yres - 1) |
 246                VIDTCON2_HOZVAL(timing->xres - 1) |
 247                VIDTCON2_LINEVAL_E(timing->yres - 1) |
 248                VIDTCON2_HOZVAL_E(timing->xres - 1);
 249         writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 250
 251         /* setup clock source, clock divider, enable dma. */
 252         val = ctx->vidcon0;
 253         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 254
 255         if (ctx->clkdiv > 1)
 256                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 257         else
 258                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 259
 260         /*
 261          * fields of register with prefix '_F' would be updated
 262          * at vsync(same as dma start)
 263          */
 264         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 265         writel(val, ctx->regs + VIDCON0);
 266 }
 267
 268 static int fimd_enable_vblank(struct device *dev)
 269 {
 270         struct fimd_context *ctx = get_fimd_context(dev);
 271         u32 val;
 272
 273         DRM_DEBUG_KMS("%s\n", __FILE__);
 274
 275         if (ctx->suspended)
 276                 return -EPERM;
 277
 278         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 279                 val = readl(ctx->regs + VIDINTCON0);
 280
 281                 val |= VIDINTCON0_INT_ENABLE;
 282                 val |= VIDINTCON0_INT_FRAME;
 283
 284                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 285                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 286                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 287                 val |= VIDINTCON0_FRAMESEL1_NONE;
 288
 289                 writel(val, ctx->regs + VIDINTCON0);
 290         }
 291
 292         return 0;
 293 }
 294
 295 static void fimd_disable_vblank(struct device *dev)
 296 {
 297         struct fimd_context *ctx = get_fimd_context(dev);
 298         u32 val;
 299
 300         DRM_DEBUG_KMS("%s\n", __FILE__);
 301
 302         if (ctx->suspended)
 303                 return;
 304
 305         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 306                 val = readl(ctx->regs + VIDINTCON0);
 307
 308                 val &= ~VIDINTCON0_INT_FRAME;
 309                 val &= ~VIDINTCON0_INT_ENABLE;
 310
 311                 writel(val, ctx->regs + VIDINTCON0);
 312         }
 313 }
 314
 315 static void fimd_wait_for_vblank(struct device *dev)
 316 {
 317         struct fimd_context *ctx = get_fimd_context(dev);
 318
 319         if (ctx->suspended)
 320                 return;
 321
 322         atomic_set(&ctx->wait_vsync_event, 1);
 323
 324         /*
 325          * wait for FIMD to signal VSYNC interrupt or return after
 326          * timeout which is set to 50ms (refresh rate of 20).
 327          */
 328         if (!wait_event_timeout(ctx->wait_vsync_queue,
 329                                 !atomic_read(&ctx->wait_vsync_event),
 330                                 DRM_HZ/20))
 331                 DRM_DEBUG_KMS("vblank wait timed out.\n");
 332 }
 333
 334 static struct exynos_drm_manager_ops fimd_manager_ops = {
 335         .dpms = fimd_dpms,
 336         .apply = fimd_apply,
 337         .commit = fimd_commit,
 338         .enable_vblank = fimd_enable_vblank,
 339         .disable_vblank = fimd_disable_vblank,
 340         .wait_for_vblank = fimd_wait_for_vblank,
 341 };
 342
 343 static void fimd_win_mode_set(struct device *dev,
 344                               struct exynos_drm_overlay *overlay)
 345 {
 346         struct fimd_context *ctx = get_fimd_context(dev);
 347         struct fimd_win_data *win_data;
 348         int win;
 349         unsigned long offset;
 350
 351         DRM_DEBUG_KMS("%s\n", __FILE__);
 352
 353         if (!overlay) {
 354                 dev_err(dev, "overlay is NULL\n");
 355                 return;
 356         }
 357
 358         win = overlay->zpos;
 359         if (win == DEFAULT_ZPOS)
 360                 win = ctx->default_win;
 361
 362         if (win < 0 || win > WINDOWS_NR)
 363                 return;
 364
 365         offset = overlay->fb_x * (overlay->bpp >> 3);
 366         offset += overlay->fb_y * overlay->pitch;
 367
 368         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 369
 370         win_data = &ctx->win_data[win];
 371
 372         win_data->offset_x = overlay->crtc_x;
 373         win_data->offset_y = overlay->crtc_y;
 374         win_data->ovl_width = overlay->crtc_width;
 375         win_data->ovl_height = overlay->crtc_height;
 376         win_data->fb_width = overlay->fb_width;
 377         win_data->fb_height = overlay->fb_height;
 378         win_data->dma_addr = overlay->dma_addr[0] + offset;
 379         win_data->bpp = overlay->bpp;
 380         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 381                                 (overlay->bpp >> 3);
 382         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 383
 384         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 385                         win_data->offset_x, win_data->offset_y);
 386         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 387                         win_data->ovl_width, win_data->ovl_height);
 388         DRM_DEBUG_KMS("paddr = 0x%lx\n", (unsigned long)win_data->dma_addr);
 389         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 390                         overlay->fb_width, overlay->crtc_width);
 391 }
 392
 393 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 394 {
 395         struct fimd_context *ctx = get_fimd_context(dev);
 396         struct fimd_win_data *win_data = &ctx->win_data[win];
 397         unsigned long val;
 398
 399         DRM_DEBUG_KMS("%s\n", __FILE__);
 400
 401         val = WINCONx_ENWIN;
 402
 403         switch (win_data->bpp) {
 404         case 1:
 405                 val |= WINCON0_BPPMODE_1BPP;
 406                 val |= WINCONx_BITSWP;
 407                 val |= WINCONx_BURSTLEN_4WORD;
 408                 break;
 409         case 2:
 410                 val |= WINCON0_BPPMODE_2BPP;
 411                 val |= WINCONx_BITSWP;
 412                 val |= WINCONx_BURSTLEN_8WORD;
 413                 break;
 414         case 4:
 415                 val |= WINCON0_BPPMODE_4BPP;
 416                 val |= WINCONx_BITSWP;
 417                 val |= WINCONx_BURSTLEN_8WORD;
 418                 break;
 419         case 8:
 420                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 421                 val |= WINCONx_BURSTLEN_8WORD;
 422                 val |= WINCONx_BYTSWP;
 423                 break;
 424         case 16:
 425                 val |= WINCON0_BPPMODE_16BPP_565;
 426                 val |= WINCONx_HAWSWP;
 427                 val |= WINCONx_BURSTLEN_16WORD;
 428                 break;
 429         case 24:
 430                 val |= WINCON0_BPPMODE_24BPP_888;
 431                 val |= WINCONx_WSWP;
 432                 val |= WINCONx_BURSTLEN_16WORD;
 433                 break;
 434         case 32:
 435                 val |= WINCON1_BPPMODE_28BPP_A4888
 436                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 437                 val |= WINCONx_WSWP;
 438                 val |= WINCONx_BURSTLEN_16WORD;
 439                 break;
 440         default:
 441                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 442
 443                 val |= WINCON0_BPPMODE_24BPP_888;
 444                 val |= WINCONx_WSWP;
 445                 val |= WINCONx_BURSTLEN_16WORD;
 446                 break;
 447         }
 448
 449         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 450
 451         writel(val, ctx->regs + WINCON(win));
 452 }
 453
 454 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 455 {
 456         struct fimd_context *ctx = get_fimd_context(dev);
 457         unsigned int keycon0 = 0, keycon1 = 0;
 458
 459         DRM_DEBUG_KMS("%s\n", __FILE__);
 460
 461         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 462                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 463
 464         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 465
 466         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 467         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 468 }
 469
 470 static void fimd_win_commit(struct device *dev, int zpos)
 471 {
 472         struct fimd_context *ctx = get_fimd_context(dev);
 473         struct fimd_win_data *win_data;
 474         int win = zpos;
 475         unsigned long val, alpha, size;
 476         unsigned int last_x;
 477         unsigned int last_y;
 478
 479         DRM_DEBUG_KMS("%s\n", __FILE__);
 480
 481         if (ctx->suspended)
 482                 return;
 483
 484         if (win == DEFAULT_ZPOS)
 485                 win = ctx->default_win;
 486
 487         if (win < 0 || win > WINDOWS_NR)
 488                 return;
 489
 490         win_data = &ctx->win_data[win];
 491
 492         /*
 493          * SHADOWCON register is used for enabling timing.
 494          *
 495          * for example, once only width value of a register is set,
 496          * if the dma is started then fimd hardware could malfunction so
 497          * with protect window setting, the register fields with prefix '_F'
 498          * wouldn't be updated at vsync also but updated once unprotect window
 499          * is set.
 500          */
 501
 502         /* protect windows */
 503         val = readl(ctx->regs + SHADOWCON);
 504         val |= SHADOWCON_WINx_PROTECT(win);
 505         writel(val, ctx->regs + SHADOWCON);
 506
 507         /* buffer start address */
 508         val = (unsigned long)win_data->dma_addr;
 509         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 510
 511         /* buffer end address */
 512         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 513         val = (unsigned long)(win_data->dma_addr + size);
 514         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 515
 516         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 517                         (unsigned long)win_data->dma_addr, val, size);
 518         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 519                         win_data->ovl_width, win_data->ovl_height);
 520
 521         /* buffer size */
 522         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 523                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size) |
 524                 VIDW_BUF_SIZE_OFFSET_E(win_data->buf_offsize) |
 525                 VIDW_BUF_SIZE_PAGEWIDTH_E(win_data->line_size);
 526         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 527
 528         /* OSD position */
 529         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 530                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y) |
 531                 VIDOSDxA_TOPLEFT_X_E(win_data->offset_x) |
 532                 VIDOSDxA_TOPLEFT_Y_E(win_data->offset_y);
 533         writel(val, ctx->regs + VIDOSD_A(win));
 534
 535         last_x = win_data->offset_x + win_data->ovl_width;
 536         if (last_x)
 537                 last_x--;
 538         last_y = win_data->offset_y + win_data->ovl_height;
 539         if (last_y)
 540                 last_y--;
 541
 542         val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y) |
 543                 VIDOSDxB_BOTRIGHT_X_E(last_x) | VIDOSDxB_BOTRIGHT_Y_E(last_y);
 544
 545         writel(val, ctx->regs + VIDOSD_B(win));
 546
 547         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 548                         win_data->offset_x, win_data->offset_y, last_x, last_y);
 549
 550         /* hardware window 0 doesn't support alpha channel. */
 551         if (win != 0) {
 552                 /* OSD alpha */
 553                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 554                         VIDISD14C_ALPHA1_G(0xf) |
 555                         VIDISD14C_ALPHA1_B(0xf);
 556
 557                 writel(alpha, ctx->regs + VIDOSD_C(win));
 558         }
 559
 560         /* OSD size */
 561         if (win != 3 && win != 4) {
 562                 u32 offset = VIDOSD_D(win);
 563                 if (win == 0)
 564                         offset = VIDOSD_C_SIZE_W0;
 565                 val = win_data->ovl_width * win_data->ovl_height;
 566                 writel(val, ctx->regs + offset);
 567
 568                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 569         }
 570
 571         fimd_win_set_pixfmt(dev, win);
 572
 573         /* hardware window 0 doesn't support color key. */
 574         if (win != 0)
 575                 fimd_win_set_colkey(dev, win);
 576
 577         /* wincon */
 578         val = readl(ctx->regs + WINCON(win));
 579         val |= WINCONx_ENWIN;
 580         writel(val, ctx->regs + WINCON(win));
 581
 582         /* Enable DMA channel and unprotect windows */
 583         val = readl(ctx->regs + SHADOWCON);
 584         val |= SHADOWCON_CHx_ENABLE(win);
 585         val &= ~SHADOWCON_WINx_PROTECT(win);
 586         writel(val, ctx->regs + SHADOWCON);
 587
 588         win_data->enabled = true;
 589 }
 590
 591 static void fimd_win_disable(struct device *dev, int zpos)
 592 {
 593         struct fimd_context *ctx = get_fimd_context(dev);
 594         struct fimd_win_data *win_data;
 595         int win = zpos;
 596         u32 val;
 597
 598         DRM_DEBUG_KMS("%s\n", __FILE__);
 599
 600         if (win == DEFAULT_ZPOS)
 601                 win = ctx->default_win;
 602
 603         if (win < 0 || win > WINDOWS_NR)
 604                 return;
 605
 606         win_data = &ctx->win_data[win];
 607
 608         if (ctx->suspended) {
 609                 /* do not resume this window*/
 610                 win_data->resume = false;
 611                 return;
 612         }
 613
 614         /* protect windows */
 615         val = readl(ctx->regs + SHADOWCON);
 616         val |= SHADOWCON_WINx_PROTECT(win);
 617         writel(val, ctx->regs + SHADOWCON);
 618
 619         /* wincon */
 620         val = readl(ctx->regs + WINCON(win));
 621         val &= ~WINCONx_ENWIN;
 622         writel(val, ctx->regs + WINCON(win));
 623
 624         /* unprotect windows */
 625         val = readl(ctx->regs + SHADOWCON);
 626         val &= ~SHADOWCON_CHx_ENABLE(win);
 627         val &= ~SHADOWCON_WINx_PROTECT(win);
 628         writel(val, ctx->regs + SHADOWCON);
 629
 630         win_data->enabled = false;
 631 }
 632
 633 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
 634         .mode_set = fimd_win_mode_set,
 635         .commit = fimd_win_commit,
 636         .disable = fimd_win_disable,
 637 };
 638
 639 static struct exynos_drm_manager fimd_manager = {
 640         .pipe           = -1,
 641         .ops            = &fimd_manager_ops,
 642         .overlay_ops    = &fimd_overlay_ops,
 643         .display_ops    = &fimd_display_ops,
 644 };
 645
 646 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
 647 {
 648         struct exynos_drm_private *dev_priv = drm_dev->dev_private;
 649         struct drm_pending_vblank_event *e, *t;
 650         struct timeval now;
 651         unsigned long flags;
 652
 653         spin_lock_irqsave(&drm_dev->event_lock, flags);
 654
 655         list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
 656                         base.link) {
 657                 /* if event's pipe isn't same as crtc then ignore it. */
 658                 if (crtc != e->pipe)
 659                         continue;
 660
 661                 do_gettimeofday(&now);
 662                 e->event.sequence = 0;
 663                 e->event.tv_sec = now.tv_sec;
 664                 e->event.tv_usec = now.tv_usec;
 665
 666                 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
 667                 wake_up_interruptible(&e->base.file_priv->event_wait);
 668                 drm_vblank_put(drm_dev, crtc);
 669         }
 670
 671         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
 672 }
 673
 674 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 675 {
 676         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 677         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 678         struct drm_device *drm_dev = subdrv->drm_dev;
 679         struct exynos_drm_manager *manager = subdrv->manager;
 680         u32 val;
 681
 682         val = readl(ctx->regs + VIDINTCON1);
 683
 684         if (val & VIDINTCON1_INT_FRAME)
 685                 /* VSYNC interrupt */
 686                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 687
 688         /* check the crtc is detached already from encoder */
 689         if (manager->pipe < 0)
 690                 goto out;
 691
 692         drm_handle_vblank(drm_dev, manager->pipe);
 693         fimd_finish_pageflip(drm_dev, manager->pipe);
 694
 695         /* set wait vsync event to zero and wake up queue. */
 696         if (atomic_read(&ctx->wait_vsync_event)) {
 697                 atomic_set(&ctx->wait_vsync_event, 0);
 698                 DRM_WAKEUP(&ctx->wait_vsync_queue);
 699         }
 700 out:
 701         return IRQ_HANDLED;
 702 }
 703
 704 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 705 {
 706         DRM_DEBUG_KMS("%s\n", __FILE__);
 707
 708         /*
 709          * enable drm irq mode.
 710          * - with irq_enabled = 1, we can use the vblank feature.
 711          *
 712          * P.S. note that we wouldn't use drm irq handler but
 713          *      just specific driver own one instead because
 714          *      drm framework supports only one irq handler.
 715          */
 716         drm_dev->irq_enabled = 1;
 717
 718         /*
 719          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
 720          * by drm timer once a current process gives up ownership of
 721          * vblank event.(after drm_vblank_put function is called)
 722          */
 723         drm_dev->vblank_disable_allowed = 1;
 724
 725         /* attach this sub driver to iommu mapping if supported. */
 726         if (is_drm_iommu_supported(drm_dev))
 727                 drm_iommu_attach_device(drm_dev, dev);
 728
 729         return 0;
 730 }
 731
 732 static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
 733 {
 734         DRM_DEBUG_KMS("%s\n", __FILE__);
 735
 736         /* detach this sub driver from iommu mapping if supported. */
 737         if (is_drm_iommu_supported(drm_dev))
 738                 drm_iommu_detach_device(drm_dev, dev);
 739 }
 740
 741 static int fimd_calc_clkdiv(struct fimd_context *ctx,
 742                             struct fb_videomode *timing)
 743 {
 744         unsigned long clk = clk_get_rate(ctx->lcd_clk);
 745         u32 retrace;
 746         u32 clkdiv;
 747         u32 best_framerate = 0;
 748         u32 framerate;
 749
 750         DRM_DEBUG_KMS("%s\n", __FILE__);
 751
 752         retrace = timing->left_margin + timing->hsync_len +
 753                                 timing->right_margin + timing->xres;
 754         retrace *= timing->upper_margin + timing->vsync_len +
 755                                 timing->lower_margin + timing->yres;
 756
 757         /* default framerate is 60Hz */
 758         if (!timing->refresh)
 759                 timing->refresh = 60;
 760
 761         clk /= retrace;
 762
 763         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
 764                 int tmp;
 765
 766                 /* get best framerate */
 767                 framerate = clk / clkdiv;
 768                 tmp = timing->refresh - framerate;
 769                 if (tmp < 0) {
 770                         best_framerate = framerate;
 771                         continue;
 772                 } else {
 773                         if (!best_framerate)
 774                                 best_framerate = framerate;
 775                         else if (tmp < (best_framerate - framerate))
 776                                 best_framerate = framerate;
 777                         break;
 778                 }
 779         }
 780
 781         return clkdiv;
 782 }
 783
 784 static void fimd_clear_win(struct fimd_context *ctx, int win)
 785 {
 786         u32 val;
 787
 788         DRM_DEBUG_KMS("%s\n", __FILE__);
 789
 790         writel(0, ctx->regs + WINCON(win));
 791         writel(0, ctx->regs + VIDOSD_A(win));
 792         writel(0, ctx->regs + VIDOSD_B(win));
 793         writel(0, ctx->regs + VIDOSD_C(win));
 794
 795         if (win == 1 || win == 2)
 796                 writel(0, ctx->regs + VIDOSD_D(win));
 797
 798         val = readl(ctx->regs + SHADOWCON);
 799         val &= ~SHADOWCON_WINx_PROTECT(win);
 800         writel(val, ctx->regs + SHADOWCON);
 801 }
 802
 803 static int fimd_clock(struct fimd_context *ctx, bool enable)
 804 {
 805         DRM_DEBUG_KMS("%s\n", __FILE__);
 806
 807         if (enable) {
 808                 int ret;
 809
 810                 ret = clk_enable(ctx->bus_clk);
 811                 if (ret < 0)
 812                         return ret;
 813
 814                 ret = clk_enable(ctx->lcd_clk);
 815                 if  (ret < 0) {
 816                         clk_disable(ctx->bus_clk);
 817                         return ret;
 818                 }
 819         } else {
 820                 clk_disable(ctx->lcd_clk);
 821                 clk_disable(ctx->bus_clk);
 822         }
 823
 824         return 0;
 825 }
 826
 827 static void fimd_window_suspend(struct device *dev)
 828 {
 829         struct fimd_context *ctx = get_fimd_context(dev);
 830         struct fimd_win_data *win_data;
 831         int i;
 832
 833         for (i = 0; i < WINDOWS_NR; i++) {
 834                 win_data = &ctx->win_data[i];
 835                 win_data->resume = win_data->enabled;
 836                 fimd_win_disable(dev, i);
 837         }
 838         fimd_wait_for_vblank(dev);
 839 }
 840
 841 static void fimd_window_resume(struct device *dev)
 842 {
 843         struct fimd_context *ctx = get_fimd_context(dev);
 844         struct fimd_win_data *win_data;
 845         int i;
 846
 847         for (i = 0; i < WINDOWS_NR; i++) {
 848                 win_data = &ctx->win_data[i];
 849                 win_data->enabled = win_data->resume;
 850                 win_data->resume = false;
 851         }
 852 }
 853
 854 static int fimd_activate(struct fimd_context *ctx, bool enable)
 855 {
 856         struct device *dev = ctx->subdrv.dev;
 857         if (enable) {
 858                 int ret;
 859
 860                 ret = fimd_clock(ctx, true);
 861                 if (ret < 0)
 862                         return ret;
 863
 864                 ctx->suspended = false;
 865
 866                 /* if vblank was enabled status, enable it again. */
 867                 if (test_and_clear_bit(0, &ctx->irq_flags))
 868                         fimd_enable_vblank(dev);
 869
 870                 fimd_window_resume(dev);
 871         } else {
 872                 fimd_window_suspend(dev);
 873
 874                 fimd_clock(ctx, false);
 875                 ctx->suspended = true;
 876         }
 877
 878         return 0;
 879 }
 880
 881 static int __devinit fimd_probe(struct platform_device *pdev)
 882 {
 883         struct device *dev = &pdev->dev;
 884         struct fimd_context *ctx;
 885         struct exynos_drm_subdrv *subdrv;
 886         struct exynos_drm_fimd_pdata *pdata;
 887         struct exynos_drm_panel_info *panel;
 888         struct resource *res;
 889         int win;
 890         int ret = -EINVAL;
 891
 892         DRM_DEBUG_KMS("%s\n", __FILE__);
 893
 894         pdata = pdev->dev.platform_data;
 895         if (!pdata) {
 896                 dev_err(dev, "no platform data specified\n");
 897                 return -EINVAL;
 898         }
 899
 900         panel = &pdata->panel;
 901         if (!panel) {
 902                 dev_err(dev, "panel is null.\n");
 903                 return -EINVAL;
 904         }
 905
 906         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 907         if (!ctx)
 908                 return -ENOMEM;
 909
 910         ctx->bus_clk = devm_clk_get(dev, "fimd");
 911         if (IS_ERR(ctx->bus_clk)) {
 912                 dev_err(dev, "failed to get bus clock\n");
 913                 return PTR_ERR(ctx->bus_clk);
 914         }
 915
 916         ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
 917         if (IS_ERR(ctx->lcd_clk)) {
 918                 dev_err(dev, "failed to get lcd clock\n");
 919                 return PTR_ERR(ctx->lcd_clk);
 920         }
 921
 922         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 923
 924         ctx->regs = devm_request_and_ioremap(&pdev->dev, res);
 925         if (!ctx->regs) {
 926                 dev_err(dev, "failed to map registers\n");
 927                 return -ENXIO;
 928         }
 929
 930         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 931         if (!res) {
 932                 dev_err(dev, "irq request failed.\n");
 933                 return -ENXIO;
 934         }
 935
 936         ctx->irq = res->start;
 937
 938         ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
 939                                                         0, "drm_fimd", ctx);
 940         if (ret) {
 941                 dev_err(dev, "irq request failed.\n");
 942                 return ret;
 943         }
 944
 945         ctx->vidcon0 = pdata->vidcon0;
 946         ctx->vidcon1 = pdata->vidcon1;
 947         ctx->default_win = pdata->default_win;
 948         ctx->panel = panel;
 949         DRM_INIT_WAITQUEUE(&ctx->wait_vsync_queue);
 950         atomic_set(&ctx->wait_vsync_event, 0);
 951
 952         subdrv = &ctx->subdrv;
 953
 954         subdrv->dev = dev;
 955         subdrv->manager = &fimd_manager;
 956         subdrv->probe = fimd_subdrv_probe;
 957         subdrv->remove = fimd_subdrv_remove;
 958
 959         mutex_init(&ctx->lock);
 960
 961         platform_set_drvdata(pdev, ctx);
 962
 963         pm_runtime_enable(dev);
 964         pm_runtime_get_sync(dev);
 965
 966         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
 967         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 968
 969         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
 970                         panel->timing.pixclock, ctx->clkdiv);
 971
 972         for (win = 0; win < WINDOWS_NR; win++)
 973                 fimd_clear_win(ctx, win);
 974
 975         exynos_drm_subdrv_register(subdrv);
 976
 977         return 0;
 978 }
 979
 980 static int __devexit fimd_remove(struct platform_device *pdev)
 981 {
 982         struct device *dev = &pdev->dev;
 983         struct fimd_context *ctx = platform_get_drvdata(pdev);
 984
 985         DRM_DEBUG_KMS("%s\n", __FILE__);
 986
 987         exynos_drm_subdrv_unregister(&ctx->subdrv);
 988
 989         if (ctx->suspended)
 990                 goto out;
 991
 992         clk_disable(ctx->lcd_clk);
 993         clk_disable(ctx->bus_clk);
 994
 995         pm_runtime_set_suspended(dev);
 996         pm_runtime_put_sync(dev);
 997
 998 out:
 999         pm_runtime_disable(dev);
1000
1001         return 0;
1002 }
1003
1004 #ifdef CONFIG_PM_SLEEP
1005 static int fimd_suspend(struct device *dev)
1006 {
1007         struct fimd_context *ctx = get_fimd_context(dev);
1008
1009         /*
1010          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
1011          * called here, an error would be returned by that interface
1012          * because the usage_count of pm runtime is more than 1.
1013          */
1014         if (!pm_runtime_suspended(dev))
1015                 return fimd_activate(ctx, false);
1016
1017         return 0;
1018 }
1019
1020 static int fimd_resume(struct device *dev)
1021 {
1022         struct fimd_context *ctx = get_fimd_context(dev);
1023
1024         /*
1025          * if entered to sleep when lcd panel was on, the usage_count
1026          * of pm runtime would still be 1 so in this case, fimd driver
1027          * should be on directly not drawing on pm runtime interface.
1028          */
1029         if (pm_runtime_suspended(dev)) {
1030                 int ret;
1031
1032                 ret = fimd_activate(ctx, true);
1033                 if (ret < 0)
1034                         return ret;
1035
1036                 /*
1037                  * in case of dpms on(standby), fimd_apply function will
1038                  * be called by encoder's dpms callback to update fimd's
1039                  * registers but in case of sleep wakeup, it's not.
1040                  * so fimd_apply function should be called at here.
1041                  */
1042                 fimd_apply(dev);
1043         }
1044
1045         return 0;
1046 }
1047 #endif
1048
1049 #ifdef CONFIG_PM_RUNTIME
1050 static int fimd_runtime_suspend(struct device *dev)
1051 {
1052         struct fimd_context *ctx = get_fimd_context(dev);
1053
1054         DRM_DEBUG_KMS("%s\n", __FILE__);
1055
1056         return fimd_activate(ctx, false);
1057 }
1058
1059 static int fimd_runtime_resume(struct device *dev)
1060 {
1061         struct fimd_context *ctx = get_fimd_context(dev);
1062
1063         DRM_DEBUG_KMS("%s\n", __FILE__);
1064
1065         return fimd_activate(ctx, true);
1066 }
1067 #endif
1068
1069 static struct platform_device_id fimd_driver_ids[] = {
1070         {
1071                 .name           = "exynos4-fb",
1072                 .driver_data    = (unsigned long)&exynos4_fimd_driver_data,
1073         }, {
1074                 .name           = "exynos5-fb",
1075                 .driver_data    = (unsigned long)&exynos5_fimd_driver_data,
1076         },
1077         {},
1078 };
1079 MODULE_DEVICE_TABLE(platform, fimd_driver_ids);
1080
1081 static const struct dev_pm_ops fimd_pm_ops = {
1082         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1083         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1084 };
1085
1086 struct platform_driver fimd_driver = {
1087         .probe          = fimd_probe,
1088         .remove         = __devexit_p(fimd_remove),
1089         .id_table       = fimd_driver_ids,
1090         .driver         = {
1091                 .name   = "exynos4-fb",
1092                 .owner  = THIS_MODULE,
1093                 .pm     = &fimd_pm_ops,
1094         },
1095 };