2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sub license,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial portions
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
29 #include <linux/kernel.h>
30 #include <linux/i2c.h>
31 #include <linux/i2c-algo-bit.h>
37 * - support EDID 1.4 (incl. CE blocks)
41 * EDID blocks out in the wild have a variety of bugs, try to collect
42 * them here (note that userspace may work around broken monitors first,
43 * but fixes should make their way here so that the kernel "just works"
44 * on as many displays as possible).
47 /* First detailed mode wrong, use largest 60Hz mode */
48 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
49 /* Reported 135MHz pixel clock is too high, needs adjustment */
50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
51 /* Prefer the largest mode at 75 Hz */
52 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
53 /* Detail timing is in cm not mm */
54 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
55 /* Detailed timing descriptors have bogus size values, so just take the
56 * maximum size and use that.
58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
59 /* Monitor forgot to set the first detailed is preferred bit. */
60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
61 /* use +hsync +vsync for detailed mode */
62 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 static struct edid_quirk {
73 } edid_quirk_list[] = {
75 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
77 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
79 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
81 /* Belinea 10 15 55 */
82 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
83 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
85 /* Envision Peripherals, Inc. EN-7100e */
86 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
88 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
90 /* Funai Electronics PM36B */
91 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
92 EDID_QUIRK_DETAILED_IN_CM },
94 /* LG Philips LCD LP154W01-A5 */
95 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
96 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
98 /* Philips 107p5 CRT */
99 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104 /* Samsung SyncMaster 205BW. Note: irony */
105 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
106 /* Samsung SyncMaster 22[5-6]BW */
107 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
108 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
112 /* Valid EDID header has these bytes */
113 static const u8 edid_header[] = {
114 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
118 * drm_edid_is_valid - sanity check EDID data
121 * Sanity check the EDID block by looking at the header, the version number
122 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's
125 bool drm_edid_is_valid(struct edid *edid)
129 u8 *raw_edid = (u8 *)edid;
131 for (i = 0; i < sizeof(edid_header); i++)
132 if (raw_edid[i] == edid_header[i])
136 else if (score >= 6) {
137 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
138 memcpy(raw_edid, edid_header, sizeof(edid_header));
142 for (i = 0; i < EDID_LENGTH; i++)
145 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
149 if (edid->version != 1) {
150 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
154 if (edid->revision > 4)
155 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
161 DRM_ERROR("Raw EDID:\n");
162 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
167 EXPORT_SYMBOL(drm_edid_is_valid);
170 * edid_vendor - match a string against EDID's obfuscated vendor field
171 * @edid: EDID to match
172 * @vendor: vendor string
174 * Returns true if @vendor is in @edid, false otherwise
176 static bool edid_vendor(struct edid *edid, char *vendor)
180 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
181 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
182 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
183 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
185 return !strncmp(edid_vendor, vendor, 3);
189 * edid_get_quirks - return quirk flags for a given EDID
190 * @edid: EDID to process
192 * This tells subsequent routines what fixes they need to apply.
194 static u32 edid_get_quirks(struct edid *edid)
196 struct edid_quirk *quirk;
199 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
200 quirk = &edid_quirk_list[i];
202 if (edid_vendor(edid, quirk->vendor) &&
203 (EDID_PRODUCT_ID(edid) == quirk->product_id))
204 return quirk->quirks;
210 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
211 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
215 * edid_fixup_preferred - set preferred modes based on quirk list
216 * @connector: has mode list to fix up
217 * @quirks: quirks list
219 * Walk the mode list for @connector, clearing the preferred status
220 * on existing modes and setting it anew for the right mode ala @quirks.
222 static void edid_fixup_preferred(struct drm_connector *connector,
225 struct drm_display_mode *t, *cur_mode, *preferred_mode;
226 int target_refresh = 0;
228 if (list_empty(&connector->probed_modes))
231 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
233 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
236 preferred_mode = list_first_entry(&connector->probed_modes,
237 struct drm_display_mode, head);
239 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
240 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
242 if (cur_mode == preferred_mode)
245 /* Largest mode is preferred */
246 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
247 preferred_mode = cur_mode;
249 /* At a given size, try to get closest to target refresh */
250 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
251 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
252 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
253 preferred_mode = cur_mode;
257 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
261 * Add the Autogenerated from the DMT spec.
262 * This table is copied from xfree86/modes/xf86EdidModes.c.
263 * But the mode with Reduced blank feature is deleted.
265 static struct drm_display_mode drm_dmt_modes[] = {
267 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
268 736, 832, 0, 350, 382, 385, 445, 0,
269 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
271 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
272 736, 832, 0, 400, 401, 404, 445, 0,
273 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
275 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
276 828, 936, 0, 400, 401, 404, 446, 0,
277 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
280 752, 800, 0, 480, 489, 492, 525, 0,
281 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
283 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
284 704, 832, 0, 480, 489, 492, 520, 0,
285 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
287 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
288 720, 840, 0, 480, 481, 484, 500, 0,
289 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
291 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
292 752, 832, 0, 480, 481, 484, 509, 0,
293 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
295 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
296 896, 1024, 0, 600, 601, 603, 625, 0,
297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
299 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
300 968, 1056, 0, 600, 601, 605, 628, 0,
301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
303 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
304 976, 1040, 0, 600, 637, 643, 666, 0,
305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
307 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
308 896, 1056, 0, 600, 601, 604, 625, 0,
309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
311 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
312 896, 1048, 0, 600, 601, 604, 631, 0,
313 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
315 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
316 976, 1088, 0, 480, 486, 494, 517, 0,
317 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
318 /* 1024x768@43Hz, interlace */
319 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
320 1208, 1264, 0, 768, 768, 772, 817, 0,
321 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
322 DRM_MODE_FLAG_INTERLACE) },
324 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
325 1184, 1344, 0, 768, 771, 777, 806, 0,
326 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
328 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
329 1184, 1328, 0, 768, 771, 777, 806, 0,
330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
332 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
333 1136, 1312, 0, 768, 769, 772, 800, 0,
334 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
336 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
337 1072, 1376, 0, 768, 769, 772, 808, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
340 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
341 1344, 1600, 0, 864, 865, 868, 900, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
344 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
345 1472, 1664, 0, 768, 771, 778, 798, 0,
346 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
348 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
349 1488, 1696, 0, 768, 771, 778, 805, 0,
350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
352 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
353 1496, 1712, 0, 768, 771, 778, 809, 0,
354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
356 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
357 1480, 1680, 0, 800, 803, 809, 831, 0,
358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
360 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
361 1488, 1696, 0, 800, 803, 809, 838, 0,
362 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
364 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
365 1496, 1712, 0, 800, 803, 809, 843, 0,
366 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
368 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
369 1488, 1800, 0, 960, 961, 964, 1000, 0,
370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
372 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
373 1504, 1728, 0, 960, 961, 964, 1011, 0,
374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
376 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
377 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
380 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
381 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
384 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
385 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
386 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
388 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
389 1536, 1792, 0, 768, 771, 777, 795, 0,
390 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
392 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
393 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
394 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
396 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
397 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
401 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
404 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
405 1672, 1904, 0, 900, 903, 909, 934, 0,
406 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
408 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
409 1688, 1936, 0, 900, 903, 909, 942, 0,
410 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
412 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
413 1696, 1952, 0, 900, 903, 909, 948, 0,
414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
416 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
417 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
418 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
420 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
421 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
424 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
425 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
428 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
429 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
430 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
432 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
433 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
436 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
437 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
440 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
441 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
444 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
445 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
448 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
449 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
453 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
456 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
457 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
460 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
461 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
462 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
464 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
465 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
468 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
469 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
472 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
473 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
474 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
476 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
477 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
480 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
481 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
484 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
485 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
486 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
488 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
489 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
492 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
493 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
496 static const int drm_num_dmt_modes =
497 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
499 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
500 int hsize, int vsize, int fresh)
503 struct drm_display_mode *ptr, *mode;
506 for (i = 0; i < drm_num_dmt_modes; i++) {
507 ptr = &drm_dmt_modes[i];
508 if (hsize == ptr->hdisplay &&
509 vsize == ptr->vdisplay &&
510 fresh == drm_mode_vrefresh(ptr)) {
511 /* get the expected default mode */
512 mode = drm_mode_duplicate(dev, ptr);
520 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
521 * monitors fill with ascii space (0x20) instead.
524 bad_std_timing(u8 a, u8 b)
526 return (a == 0x00 && b == 0x00) ||
527 (a == 0x01 && b == 0x01) ||
528 (a == 0x20 && b == 0x20);
532 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
533 * @t: standard timing params
534 * @timing_level: standard timing level
536 * Take the standard timing params (in this case width, aspect, and refresh)
537 * and convert them into a real mode using CVT/GTF/DMT.
539 * Punts for now, but should eventually use the FB layer's CVT based mode
542 struct drm_display_mode *drm_mode_std(struct drm_device *dev,
543 struct std_timing *t,
547 struct drm_display_mode *mode;
550 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
551 >> EDID_TIMING_ASPECT_SHIFT;
552 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
553 >> EDID_TIMING_VFREQ_SHIFT;
555 if (bad_std_timing(t->hsize, t->vfreq_aspect))
558 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
559 hsize = t->hsize * 8 + 248;
560 /* vrefresh_rate = vfreq + 60 */
561 vrefresh_rate = vfreq + 60;
562 /* the vdisplay is calculated based on the aspect ratio */
563 if (aspect_ratio == 0) {
567 vsize = (hsize * 10) / 16;
568 } else if (aspect_ratio == 1)
569 vsize = (hsize * 3) / 4;
570 else if (aspect_ratio == 2)
571 vsize = (hsize * 4) / 5;
573 vsize = (hsize * 9) / 16;
575 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
576 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
578 mode->hdisplay = 1366;
579 mode->vsync_start = mode->vsync_start - 1;
580 mode->vsync_end = mode->vsync_end - 1;
584 /* check whether it can be found in default mode table */
585 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
589 switch (timing_level) {
593 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
596 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
604 * EDID is delightfully ambiguous about how interlaced modes are to be
605 * encoded. Our internal representation is of frame height, but some
606 * HDTV detailed timings are encoded as field height.
608 * The format list here is from CEA, in frame size. Technically we
609 * should be checking refresh rate too. Whatever.
612 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
613 struct detailed_pixel_timing *pt)
616 static const struct {
618 } cea_interlaced[] = {
627 static const int n_sizes =
628 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
630 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
633 for (i = 0; i < n_sizes; i++) {
634 if ((mode->hdisplay == cea_interlaced[i].w) &&
635 (mode->vdisplay == cea_interlaced[i].h / 2)) {
637 mode->vsync_start *= 2;
638 mode->vsync_end *= 2;
644 mode->flags |= DRM_MODE_FLAG_INTERLACE;
648 * drm_mode_detailed - create a new mode from an EDID detailed timing section
649 * @dev: DRM device (needed to create new mode)
651 * @timing: EDID detailed timing info
652 * @quirks: quirks to apply
654 * An EDID detailed timing block contains enough info for us to create and
655 * return a new struct drm_display_mode.
657 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
659 struct detailed_timing *timing,
662 struct drm_display_mode *mode;
663 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
664 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
665 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
666 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
667 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
668 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
669 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
670 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
671 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
673 /* ignore tiny modes */
674 if (hactive < 64 || vactive < 64)
677 if (pt->misc & DRM_EDID_PT_STEREO) {
678 printk(KERN_WARNING "stereo mode not supported\n");
681 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
682 printk(KERN_WARNING "composite sync not supported\n");
685 /* it is incorrect if hsync/vsync width is zero */
686 if (!hsync_pulse_width || !vsync_pulse_width) {
687 DRM_DEBUG_KMS("Incorrect Detailed timing. "
688 "Wrong Hsync/Vsync pulse width\n");
691 mode = drm_mode_create(dev);
695 mode->type = DRM_MODE_TYPE_DRIVER;
697 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
698 timing->pixel_clock = cpu_to_le16(1088);
700 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
702 mode->hdisplay = hactive;
703 mode->hsync_start = mode->hdisplay + hsync_offset;
704 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
705 mode->htotal = mode->hdisplay + hblank;
707 mode->vdisplay = vactive;
708 mode->vsync_start = mode->vdisplay + vsync_offset;
709 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
710 mode->vtotal = mode->vdisplay + vblank;
712 /* Some EDIDs have bogus h/vtotal values */
713 if (mode->hsync_end > mode->htotal)
714 mode->htotal = mode->hsync_end + 1;
715 if (mode->vsync_end > mode->vtotal)
716 mode->vtotal = mode->vsync_end + 1;
718 drm_mode_set_name(mode);
720 drm_mode_do_interlace_quirk(mode, pt);
722 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
723 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
726 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
727 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
728 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
729 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
731 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
732 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
734 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
735 mode->width_mm *= 10;
736 mode->height_mm *= 10;
739 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
740 mode->width_mm = edid->width_cm * 10;
741 mode->height_mm = edid->height_cm * 10;
748 * Detailed mode info for the EDID "established modes" data to use.
750 static struct drm_display_mode edid_est_modes[] = {
751 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
752 968, 1056, 0, 600, 601, 605, 628, 0,
753 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
754 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
755 896, 1024, 0, 600, 601, 603, 625, 0,
756 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
757 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
758 720, 840, 0, 480, 481, 484, 500, 0,
759 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
760 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
761 704, 832, 0, 480, 489, 491, 520, 0,
762 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
763 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
764 768, 864, 0, 480, 483, 486, 525, 0,
765 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
766 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
767 752, 800, 0, 480, 490, 492, 525, 0,
768 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
769 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
770 846, 900, 0, 400, 421, 423, 449, 0,
771 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
772 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
773 846, 900, 0, 400, 412, 414, 449, 0,
774 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
775 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
776 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
777 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
778 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
779 1136, 1312, 0, 768, 769, 772, 800, 0,
780 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
781 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
782 1184, 1328, 0, 768, 771, 777, 806, 0,
783 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
784 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
785 1184, 1344, 0, 768, 771, 777, 806, 0,
786 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
787 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
788 1208, 1264, 0, 768, 768, 776, 817, 0,
789 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
790 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
791 928, 1152, 0, 624, 625, 628, 667, 0,
792 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
793 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
794 896, 1056, 0, 600, 601, 604, 625, 0,
795 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
796 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
797 976, 1040, 0, 600, 637, 643, 666, 0,
798 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
799 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
800 1344, 1600, 0, 864, 865, 868, 900, 0,
801 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
804 #define EDID_EST_TIMINGS 16
805 #define EDID_STD_TIMINGS 8
806 #define EDID_DETAILED_TIMINGS 4
809 * add_established_modes - get est. modes from EDID and add them
810 * @edid: EDID block to scan
812 * Each EDID block contains a bitmap of the supported "established modes" list
813 * (defined above). Tease them out and add them to the global modes list.
815 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
817 struct drm_device *dev = connector->dev;
818 unsigned long est_bits = edid->established_timings.t1 |
819 (edid->established_timings.t2 << 8) |
820 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
823 for (i = 0; i <= EDID_EST_TIMINGS; i++)
824 if (est_bits & (1<<i)) {
825 struct drm_display_mode *newmode;
826 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
828 drm_mode_probed_add(connector, newmode);
836 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
837 * @edid: EDID block to scan
839 static int standard_timing_level(struct edid *edid)
841 if (edid->revision >= 2) {
842 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
850 * add_standard_modes - get std. modes from EDID and add them
851 * @edid: EDID block to scan
853 * Standard modes can be calculated using the CVT standard. Grab them from
854 * @edid, calculate them, and add them to the list.
856 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
858 struct drm_device *dev = connector->dev;
862 timing_level = standard_timing_level(edid);
864 for (i = 0; i < EDID_STD_TIMINGS; i++) {
865 struct std_timing *t = &edid->standard_timings[i];
866 struct drm_display_mode *newmode;
868 /* If std timings bytes are 1, 1 it's empty */
869 if (t->hsize == 1 && t->vfreq_aspect == 1)
872 newmode = drm_mode_std(dev, &edid->standard_timings[i],
873 edid->revision, timing_level);
875 drm_mode_probed_add(connector, newmode);
885 * - GTF secondary curve formula
886 * - EDID 1.4 range offsets
887 * - CVT extended bits
890 mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
892 struct detailed_data_monitor_range *range;
895 range = &timing->data.other_data.data.range;
897 hsync = drm_mode_hsync(mode);
898 vrefresh = drm_mode_vrefresh(mode);
900 if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
903 if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
906 if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
907 /* be forgiving since it's in units of 10MHz */
908 int max_clock = range->pixel_clock_mhz * 10 + 9;
910 if (mode->clock > max_clock)
918 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
919 * need to account for them.
921 static int drm_gtf_modes_for_range(struct drm_connector *connector,
922 struct detailed_timing *timing)
925 struct drm_display_mode *newmode;
926 struct drm_device *dev = connector->dev;
928 for (i = 0; i < drm_num_dmt_modes; i++) {
929 if (mode_in_range(drm_dmt_modes + i, timing)) {
930 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
932 drm_mode_probed_add(connector, newmode);
941 static int drm_cvt_modes(struct drm_connector *connector,
942 struct detailed_timing *timing)
945 struct drm_display_mode *newmode;
946 struct drm_device *dev = connector->dev;
947 struct cvt_timing *cvt;
948 const int rates[] = { 60, 85, 75, 60, 50 };
949 const u8 empty[3] = { 0, 0, 0 };
951 for (i = 0; i < 4; i++) {
952 int uninitialized_var(width), height;
953 cvt = &(timing->data.other_data.data.cvt[i]);
955 if (!memcmp(cvt->code, empty, 3))
958 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
959 switch (cvt->code[1] & 0x0c) {
961 width = height * 4 / 3;
964 width = height * 16 / 9;
967 width = height * 16 / 10;
970 width = height * 15 / 9;
974 for (j = 1; j < 5; j++) {
975 if (cvt->code[2] & (1 << j)) {
976 newmode = drm_cvt_mode(dev, width, height,
980 drm_mode_probed_add(connector, newmode);
990 static int add_detailed_modes(struct drm_connector *connector,
991 struct detailed_timing *timing,
992 struct edid *edid, u32 quirks, int preferred)
995 struct detailed_non_pixel *data = &timing->data.other_data;
996 int timing_level = standard_timing_level(edid);
997 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
998 struct drm_display_mode *newmode;
999 struct drm_device *dev = connector->dev;
1001 if (timing->pixel_clock) {
1002 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1007 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1009 drm_mode_probed_add(connector, newmode);
1013 /* other timing types */
1014 switch (data->type) {
1015 case EDID_DETAIL_MONITOR_RANGE:
1017 modes += drm_gtf_modes_for_range(connector, timing);
1019 case EDID_DETAIL_STD_MODES:
1020 /* Six modes per detailed section */
1021 for (i = 0; i < 6; i++) {
1022 struct std_timing *std;
1023 struct drm_display_mode *newmode;
1025 std = &data->data.timings[i];
1026 newmode = drm_mode_std(dev, std, edid->revision,
1029 drm_mode_probed_add(connector, newmode);
1034 case EDID_DETAIL_CVT_3BYTE:
1035 modes += drm_cvt_modes(connector, timing);
1045 * add_detailed_info - get detailed mode info from EDID data
1046 * @connector: attached connector
1047 * @edid: EDID block to scan
1048 * @quirks: quirks to apply
1050 * Some of the detailed timing sections may contain mode information. Grab
1051 * it and add it to the list.
1053 static int add_detailed_info(struct drm_connector *connector,
1054 struct edid *edid, u32 quirks)
1058 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1059 struct detailed_timing *timing = &edid->detailed_timings[i];
1060 int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1062 /* In 1.0, only timings are allowed */
1063 if (!timing->pixel_clock && edid->version == 1 &&
1064 edid->revision == 0)
1067 modes += add_detailed_modes(connector, timing, edid, quirks,
1075 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1077 * @connector: attached connector
1078 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1079 * @quirks: quirks to apply
1081 * Some of the detailed timing sections may contain mode information. Grab
1082 * it and add it to the list.
1084 static int add_detailed_info_eedid(struct drm_connector *connector,
1085 struct edid *edid, u32 quirks)
1088 char *edid_ext = NULL;
1089 struct detailed_timing *timing;
1091 int start_offset, end_offset;
1094 if (edid->version == 1 && edid->revision < 3) {
1095 /* If the EDID version is less than 1.3, there is no
1100 if (!edid->extensions) {
1101 /* if there is no extension EDID, it is unnecessary to
1102 * parse the E-EDID to get detailed info
1107 /* Chose real EDID extension number */
1108 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1109 DRM_MAX_EDID_EXT_NUM : edid->extensions;
1111 /* Find CEA extension */
1112 for (i = 0; i < edid_ext_num; i++) {
1113 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1114 /* This block is CEA extension */
1115 if (edid_ext[0] == 0x02)
1119 if (i == edid_ext_num) {
1120 /* if there is no additional timing EDID block, return */
1124 /* Get the start offset of detailed timing block */
1125 start_offset = edid_ext[2];
1126 if (start_offset == 0) {
1127 /* If the start_offset is zero, it means that neither detailed
1128 * info nor data block exist. In such case it is also
1129 * unnecessary to parse the detailed timing info.
1134 timing_level = standard_timing_level(edid);
1135 end_offset = EDID_LENGTH;
1136 end_offset -= sizeof(struct detailed_timing);
1137 for (i = start_offset; i < end_offset;
1138 i += sizeof(struct detailed_timing)) {
1139 timing = (struct detailed_timing *)(edid_ext + i);
1140 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1146 #define DDC_ADDR 0x50
1148 * Get EDID information via I2C.
1150 * \param adapter : i2c device adaptor
1151 * \param buf : EDID data buffer to be filled
1152 * \param len : EDID data buffer length
1153 * \return 0 on success or -1 on failure.
1155 * Try to fetch EDID information by calling i2c driver function.
1157 int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
1158 unsigned char *buf, int len)
1160 unsigned char start = 0x0;
1161 struct i2c_msg msgs[] = {
1175 if (i2c_transfer(adapter, msgs, 2) == 2)
1180 EXPORT_SYMBOL(drm_do_probe_ddc_edid);
1182 static int drm_ddc_read_edid(struct drm_connector *connector,
1183 struct i2c_adapter *adapter,
1188 for (i = 0; i < 4; i++) {
1189 if (drm_do_probe_ddc_edid(adapter, buf, len))
1191 if (drm_edid_is_valid((struct edid *)buf))
1195 /* repeated checksum failures; warn, but carry on */
1196 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1197 drm_get_connector_name(connector));
1202 * drm_get_edid - get EDID data, if available
1203 * @connector: connector we're probing
1204 * @adapter: i2c adapter to use for DDC
1206 * Poke the given connector's i2c channel to grab EDID data if possible.
1208 * Return edid data or NULL if we couldn't find any.
1210 struct edid *drm_get_edid(struct drm_connector *connector,
1211 struct i2c_adapter *adapter)
1216 edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1),
1219 dev_warn(&connector->dev->pdev->dev,
1220 "Failed to allocate EDID\n");
1224 /* Read first EDID block */
1225 ret = drm_ddc_read_edid(connector, adapter,
1226 (unsigned char *)edid, EDID_LENGTH);
1230 /* There are EDID extensions to be read */
1231 if (edid->extensions != 0) {
1232 int edid_ext_num = edid->extensions;
1234 if (edid_ext_num > DRM_MAX_EDID_EXT_NUM) {
1235 dev_warn(&connector->dev->pdev->dev,
1236 "The number of extension(%d) is "
1237 "over max (%d), actually read number (%d)\n",
1238 edid_ext_num, DRM_MAX_EDID_EXT_NUM,
1239 DRM_MAX_EDID_EXT_NUM);
1240 /* Reset EDID extension number to be read */
1241 edid_ext_num = DRM_MAX_EDID_EXT_NUM;
1243 /* Read EDID including extensions too */
1244 ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
1245 EDID_LENGTH * (edid_ext_num + 1));
1251 connector->display_info.raw_edid = (char *)edid;
1261 EXPORT_SYMBOL(drm_get_edid);
1263 #define HDMI_IDENTIFIER 0x000C03
1264 #define VENDOR_BLOCK 0x03
1266 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1267 * @edid: monitor EDID information
1269 * Parse the CEA extension according to CEA-861-B.
1270 * Return true if HDMI, false if not or unknown.
1272 bool drm_detect_hdmi_monitor(struct edid *edid)
1274 char *edid_ext = NULL;
1275 int i, hdmi_id, edid_ext_num;
1276 int start_offset, end_offset;
1277 bool is_hdmi = false;
1279 /* No EDID or EDID extensions */
1280 if (edid == NULL || edid->extensions == 0)
1283 /* Chose real EDID extension number */
1284 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1285 DRM_MAX_EDID_EXT_NUM : edid->extensions;
1287 /* Find CEA extension */
1288 for (i = 0; i < edid_ext_num; i++) {
1289 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1290 /* This block is CEA extension */
1291 if (edid_ext[0] == 0x02)
1295 if (i == edid_ext_num)
1298 /* Data block offset in CEA extension block */
1300 end_offset = edid_ext[2];
1303 * Because HDMI identifier is in Vendor Specific Block,
1304 * search it from all data blocks of CEA extension.
1306 for (i = start_offset; i < end_offset;
1307 /* Increased by data block len */
1308 i += ((edid_ext[i] & 0x1f) + 1)) {
1309 /* Find vendor specific block */
1310 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1311 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1312 edid_ext[i + 3] << 16;
1313 /* Find HDMI identifier */
1314 if (hdmi_id == HDMI_IDENTIFIER)
1323 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1326 * drm_add_edid_modes - add modes from EDID data, if available
1327 * @connector: connector we're probing
1330 * Add the specified modes to the connector's mode list.
1332 * Return number of modes added or 0 if we couldn't find any.
1334 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1342 if (!drm_edid_is_valid(edid)) {
1343 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1344 drm_get_connector_name(connector));
1348 quirks = edid_get_quirks(edid);
1350 num_modes += add_established_modes(connector, edid);
1351 num_modes += add_standard_modes(connector, edid);
1352 num_modes += add_detailed_info(connector, edid, quirks);
1353 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1355 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1356 edid_fixup_preferred(connector, quirks);
1358 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1359 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1360 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1361 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1362 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1363 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1364 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1365 connector->display_info.width_mm = edid->width_cm * 10;
1366 connector->display_info.height_mm = edid->height_cm * 10;
1367 connector->display_info.gamma = edid->gamma;
1368 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1369 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1370 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1371 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1372 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1373 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1374 connector->display_info.gamma = edid->gamma;
1378 EXPORT_SYMBOL(drm_add_edid_modes);
1381 * drm_add_modes_noedid - add modes for the connectors without EDID
1382 * @connector: connector we're probing
1383 * @hdisplay: the horizontal display limit
1384 * @vdisplay: the vertical display limit
1386 * Add the specified modes to the connector's mode list. Only when the
1387 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1389 * Return number of modes added or 0 if we couldn't find any.
1391 int drm_add_modes_noedid(struct drm_connector *connector,
1392 int hdisplay, int vdisplay)
1394 int i, count, num_modes = 0;
1395 struct drm_display_mode *mode, *ptr;
1396 struct drm_device *dev = connector->dev;
1398 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1404 for (i = 0; i < count; i++) {
1405 ptr = &drm_dmt_modes[i];
1406 if (hdisplay && vdisplay) {
1408 * Only when two are valid, they will be used to check
1409 * whether the mode should be added to the mode list of
1412 if (ptr->hdisplay > hdisplay ||
1413 ptr->vdisplay > vdisplay)
1416 if (drm_mode_vrefresh(ptr) > 61)
1418 mode = drm_mode_duplicate(dev, ptr);
1420 drm_mode_probed_add(connector, mode);
1426 EXPORT_SYMBOL(drm_add_modes_noedid);