2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-algo-bit.h>
37 #define EDID_EST_TIMINGS 16
38 #define EDID_STD_TIMINGS 8
39 #define EDID_DETAILED_TIMINGS 4
42 * EDID blocks out in the wild have a variety of bugs, try to collect
43 * them here (note that userspace may work around broken monitors first,
44 * but fixes should make their way here so that the kernel "just works"
45 * on as many displays as possible).
48 /* First detailed mode wrong, use largest 60Hz mode */
49 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
50 /* Reported 135MHz pixel clock is too high, needs adjustment */
51 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
52 /* Prefer the largest mode at 75 Hz */
53 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
54 /* Detail timing is in cm not mm */
55 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
56 /* Detailed timing descriptors have bogus size values, so just take the
57 * maximum size and use that.
59 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
60 /* Monitor forgot to set the first detailed is preferred bit. */
61 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
62 /* use +hsync +vsync for detailed mode */
63 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
71 static struct edid_quirk {
75 } edid_quirk_list[] = {
77 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
79 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
81 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
83 /* Belinea 10 15 55 */
84 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
85 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
87 /* Envision Peripherals, Inc. EN-7100e */
88 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
90 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Funai Electronics PM36B */
93 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
94 EDID_QUIRK_DETAILED_IN_CM },
96 /* LG Philips LCD LP154W01-A5 */
97 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
98 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
100 /* Philips 107p5 CRT */
101 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
106 /* Samsung SyncMaster 205BW. Note: irony */
107 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
108 /* Samsung SyncMaster 22[5-6]BW */
109 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
110 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
113 /*** DDC fetch and block validation ***/
115 static const u8 edid_header[] = {
116 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
120 * Sanity check the EDID block (base or extension). Return 0 if the block
121 * doesn't check out, or 1 if it's valid.
124 drm_edid_block_valid(u8 *raw_edid)
128 struct edid *edid = (struct edid *)raw_edid;
130 if (raw_edid[0] == 0x00) {
133 for (i = 0; i < sizeof(edid_header); i++)
134 if (raw_edid[i] == edid_header[i])
138 else if (score >= 6) {
139 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
140 memcpy(raw_edid, edid_header, sizeof(edid_header));
146 for (i = 0; i < EDID_LENGTH; i++)
149 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
153 /* per-block-type checks */
154 switch (raw_edid[0]) {
156 if (edid->version != 1) {
157 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
161 if (edid->revision > 4)
162 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
173 DRM_ERROR("Raw EDID:\n");
174 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
181 * drm_edid_is_valid - sanity check EDID data
184 * Sanity-check an entire EDID record (including extensions)
186 bool drm_edid_is_valid(struct edid *edid)
189 u8 *raw = (u8 *)edid;
194 for (i = 0; i <= edid->extensions; i++)
195 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
200 EXPORT_SYMBOL(drm_edid_is_valid);
202 #define DDC_ADDR 0x50
203 #define DDC_SEGMENT_ADDR 0x30
205 * Get EDID information via I2C.
207 * \param adapter : i2c device adaptor
208 * \param buf : EDID data buffer to be filled
209 * \param len : EDID data buffer length
210 * \return 0 on success or -1 on failure.
212 * Try to fetch EDID information by calling i2c driver function.
215 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
218 unsigned char start = block * EDID_LENGTH;
219 struct i2c_msg msgs[] = {
233 if (i2c_transfer(adapter, msgs, 2) == 2)
240 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
245 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
248 /* base block fetch */
249 for (i = 0; i < 4; i++) {
250 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
252 if (drm_edid_block_valid(block))
258 /* if there's no extensions, we're done */
259 if (block[0x7e] == 0)
262 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
267 for (j = 1; j <= block[0x7e]; j++) {
268 for (i = 0; i < 4; i++) {
269 if (drm_do_probe_ddc_edid(adapter, block, j,
272 if (drm_edid_block_valid(block + j * EDID_LENGTH))
282 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
283 drm_get_connector_name(connector), j);
291 * Probe DDC presence.
293 * \param adapter : i2c device adaptor
294 * \return 1 on success
297 drm_probe_ddc(struct i2c_adapter *adapter)
301 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
305 * drm_get_edid - get EDID data, if available
306 * @connector: connector we're probing
307 * @adapter: i2c adapter to use for DDC
309 * Poke the given i2c channel to grab EDID data if possible. If found,
310 * attach it to the connector.
312 * Return edid data or NULL if we couldn't find any.
314 struct edid *drm_get_edid(struct drm_connector *connector,
315 struct i2c_adapter *adapter)
317 struct edid *edid = NULL;
319 if (drm_probe_ddc(adapter))
320 edid = (struct edid *)drm_do_get_edid(connector, adapter);
322 connector->display_info.raw_edid = (char *)edid;
327 EXPORT_SYMBOL(drm_get_edid);
329 /*** EDID parsing ***/
332 * edid_vendor - match a string against EDID's obfuscated vendor field
333 * @edid: EDID to match
334 * @vendor: vendor string
336 * Returns true if @vendor is in @edid, false otherwise
338 static bool edid_vendor(struct edid *edid, char *vendor)
342 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
343 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
344 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
345 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
347 return !strncmp(edid_vendor, vendor, 3);
351 * edid_get_quirks - return quirk flags for a given EDID
352 * @edid: EDID to process
354 * This tells subsequent routines what fixes they need to apply.
356 static u32 edid_get_quirks(struct edid *edid)
358 struct edid_quirk *quirk;
361 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
362 quirk = &edid_quirk_list[i];
364 if (edid_vendor(edid, quirk->vendor) &&
365 (EDID_PRODUCT_ID(edid) == quirk->product_id))
366 return quirk->quirks;
372 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
373 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
377 * edid_fixup_preferred - set preferred modes based on quirk list
378 * @connector: has mode list to fix up
379 * @quirks: quirks list
381 * Walk the mode list for @connector, clearing the preferred status
382 * on existing modes and setting it anew for the right mode ala @quirks.
384 static void edid_fixup_preferred(struct drm_connector *connector,
387 struct drm_display_mode *t, *cur_mode, *preferred_mode;
388 int target_refresh = 0;
390 if (list_empty(&connector->probed_modes))
393 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
395 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
398 preferred_mode = list_first_entry(&connector->probed_modes,
399 struct drm_display_mode, head);
401 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
402 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
404 if (cur_mode == preferred_mode)
407 /* Largest mode is preferred */
408 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
409 preferred_mode = cur_mode;
411 /* At a given size, try to get closest to target refresh */
412 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
413 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
414 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
415 preferred_mode = cur_mode;
419 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
423 * Add the Autogenerated from the DMT spec.
424 * This table is copied from xfree86/modes/xf86EdidModes.c.
425 * But the mode with Reduced blank feature is deleted.
427 static struct drm_display_mode drm_dmt_modes[] = {
429 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
430 736, 832, 0, 350, 382, 385, 445, 0,
431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
433 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
434 736, 832, 0, 400, 401, 404, 445, 0,
435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
438 828, 936, 0, 400, 401, 404, 446, 0,
439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
441 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
442 752, 800, 0, 480, 489, 492, 525, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
445 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
446 704, 832, 0, 480, 489, 492, 520, 0,
447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
449 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
450 720, 840, 0, 480, 481, 484, 500, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
453 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
454 752, 832, 0, 480, 481, 484, 509, 0,
455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
457 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
458 896, 1024, 0, 600, 601, 603, 625, 0,
459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
462 968, 1056, 0, 600, 601, 605, 628, 0,
463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
466 976, 1040, 0, 600, 637, 643, 666, 0,
467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
469 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
470 896, 1056, 0, 600, 601, 604, 625, 0,
471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
473 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
474 896, 1048, 0, 600, 601, 604, 631, 0,
475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
477 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
478 976, 1088, 0, 480, 486, 494, 517, 0,
479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
480 /* 1024x768@43Hz, interlace */
481 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
482 1208, 1264, 0, 768, 768, 772, 817, 0,
483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
484 DRM_MODE_FLAG_INTERLACE) },
486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
487 1184, 1344, 0, 768, 771, 777, 806, 0,
488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
490 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
491 1184, 1328, 0, 768, 771, 777, 806, 0,
492 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
494 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
495 1136, 1312, 0, 768, 769, 772, 800, 0,
496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
498 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
499 1168, 1376, 0, 768, 769, 772, 808, 0,
500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
502 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
503 1344, 1600, 0, 864, 865, 868, 900, 0,
504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
506 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
507 1472, 1664, 0, 768, 771, 778, 798, 0,
508 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
510 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
511 1488, 1696, 0, 768, 771, 778, 805, 0,
512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
514 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
515 1496, 1712, 0, 768, 771, 778, 809, 0,
516 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
518 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
519 1480, 1680, 0, 800, 803, 809, 831, 0,
520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
522 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
523 1488, 1696, 0, 800, 803, 809, 838, 0,
524 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
526 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
527 1496, 1712, 0, 800, 803, 809, 843, 0,
528 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
530 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
531 1488, 1800, 0, 960, 961, 964, 1000, 0,
532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
534 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
535 1504, 1728, 0, 960, 961, 964, 1011, 0,
536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
538 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
539 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
540 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
542 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
543 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
546 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
547 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
550 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
551 1536, 1792, 0, 768, 771, 777, 795, 0,
552 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
554 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
555 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
558 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
559 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
560 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
562 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
563 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
564 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
566 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
567 1672, 1904, 0, 900, 903, 909, 934, 0,
568 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
570 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
571 1688, 1936, 0, 900, 903, 909, 942, 0,
572 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
574 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
575 1696, 1952, 0, 900, 903, 909, 948, 0,
576 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
578 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
579 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
580 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
582 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
583 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
586 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
587 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
590 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
591 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
592 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
594 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
595 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
596 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
598 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
599 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
602 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
603 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
604 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
606 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
607 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
608 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
610 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
611 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
612 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
614 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
615 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
618 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
619 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
620 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
622 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
623 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
624 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
626 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
627 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
630 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
631 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
632 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
634 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
635 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
638 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
639 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
642 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
643 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
646 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
647 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
650 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
651 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
654 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
655 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
656 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
658 static const int drm_num_dmt_modes =
659 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
661 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
662 int hsize, int vsize, int fresh)
665 struct drm_display_mode *ptr, *mode;
668 for (i = 0; i < drm_num_dmt_modes; i++) {
669 ptr = &drm_dmt_modes[i];
670 if (hsize == ptr->hdisplay &&
671 vsize == ptr->vdisplay &&
672 fresh == drm_mode_vrefresh(ptr)) {
673 /* get the expected default mode */
674 mode = drm_mode_duplicate(dev, ptr);
681 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
684 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
687 struct edid *edid = (struct edid *)raw_edid;
692 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
693 cb(&(edid->detailed_timings[i]), closure);
695 /* XXX extension block walk */
699 is_rb(struct detailed_timing *t, void *data)
702 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
704 *(bool *)data = true;
707 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
709 drm_monitor_supports_rb(struct edid *edid)
711 if (edid->revision >= 4) {
713 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
717 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
721 find_gtf2(struct detailed_timing *t, void *data)
724 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
728 /* Secondary GTF curve kicks in above some break frequency */
730 drm_gtf2_hbreak(struct edid *edid)
733 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
734 return r ? (r[12] * 2) : 0;
738 drm_gtf2_2c(struct edid *edid)
741 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
742 return r ? r[13] : 0;
746 drm_gtf2_m(struct edid *edid)
749 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
750 return r ? (r[15] << 8) + r[14] : 0;
754 drm_gtf2_k(struct edid *edid)
757 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
758 return r ? r[16] : 0;
762 drm_gtf2_2j(struct edid *edid)
765 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
766 return r ? r[17] : 0;
770 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
771 * @edid: EDID block to scan
773 static int standard_timing_level(struct edid *edid)
775 if (edid->revision >= 2) {
776 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
778 if (drm_gtf2_hbreak(edid))
786 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
787 * monitors fill with ascii space (0x20) instead.
790 bad_std_timing(u8 a, u8 b)
792 return (a == 0x00 && b == 0x00) ||
793 (a == 0x01 && b == 0x01) ||
794 (a == 0x20 && b == 0x20);
798 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
799 * @t: standard timing params
800 * @timing_level: standard timing level
802 * Take the standard timing params (in this case width, aspect, and refresh)
803 * and convert them into a real mode using CVT/GTF/DMT.
805 static struct drm_display_mode *
806 drm_mode_std(struct drm_connector *connector, struct edid *edid,
807 struct std_timing *t, int revision)
809 struct drm_device *dev = connector->dev;
810 struct drm_display_mode *m, *mode = NULL;
813 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
814 >> EDID_TIMING_ASPECT_SHIFT;
815 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
816 >> EDID_TIMING_VFREQ_SHIFT;
817 int timing_level = standard_timing_level(edid);
819 if (bad_std_timing(t->hsize, t->vfreq_aspect))
822 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
823 hsize = t->hsize * 8 + 248;
824 /* vrefresh_rate = vfreq + 60 */
825 vrefresh_rate = vfreq + 60;
826 /* the vdisplay is calculated based on the aspect ratio */
827 if (aspect_ratio == 0) {
831 vsize = (hsize * 10) / 16;
832 } else if (aspect_ratio == 1)
833 vsize = (hsize * 3) / 4;
834 else if (aspect_ratio == 2)
835 vsize = (hsize * 4) / 5;
837 vsize = (hsize * 9) / 16;
839 /* HDTV hack, part 1 */
840 if (vrefresh_rate == 60 &&
841 ((hsize == 1360 && vsize == 765) ||
842 (hsize == 1368 && vsize == 769))) {
848 * If this connector already has a mode for this size and refresh
849 * rate (because it came from detailed or CVT info), use that
850 * instead. This way we don't have to guess at interlace or
853 list_for_each_entry(m, &connector->probed_modes, head)
854 if (m->hdisplay == hsize && m->vdisplay == vsize &&
855 drm_mode_vrefresh(m) == vrefresh_rate)
858 /* HDTV hack, part 2 */
859 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
860 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
862 mode->hdisplay = 1366;
863 mode->vsync_start = mode->vsync_start - 1;
864 mode->vsync_end = mode->vsync_end - 1;
868 /* check whether it can be found in default mode table */
869 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
873 switch (timing_level) {
877 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
881 * This is potentially wrong if there's ever a monitor with
882 * more than one ranges section, each claiming a different
883 * secondary GTF curve. Please don't do that.
885 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
886 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
888 mode = drm_gtf_mode_complex(dev, hsize, vsize,
897 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
905 * EDID is delightfully ambiguous about how interlaced modes are to be
906 * encoded. Our internal representation is of frame height, but some
907 * HDTV detailed timings are encoded as field height.
909 * The format list here is from CEA, in frame size. Technically we
910 * should be checking refresh rate too. Whatever.
913 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
914 struct detailed_pixel_timing *pt)
917 static const struct {
919 } cea_interlaced[] = {
928 static const int n_sizes =
929 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
931 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
934 for (i = 0; i < n_sizes; i++) {
935 if ((mode->hdisplay == cea_interlaced[i].w) &&
936 (mode->vdisplay == cea_interlaced[i].h / 2)) {
938 mode->vsync_start *= 2;
939 mode->vsync_end *= 2;
945 mode->flags |= DRM_MODE_FLAG_INTERLACE;
949 * drm_mode_detailed - create a new mode from an EDID detailed timing section
950 * @dev: DRM device (needed to create new mode)
952 * @timing: EDID detailed timing info
953 * @quirks: quirks to apply
955 * An EDID detailed timing block contains enough info for us to create and
956 * return a new struct drm_display_mode.
958 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
960 struct detailed_timing *timing,
963 struct drm_display_mode *mode;
964 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
965 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
966 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
967 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
968 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
969 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
970 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
971 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
972 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
974 /* ignore tiny modes */
975 if (hactive < 64 || vactive < 64)
978 if (pt->misc & DRM_EDID_PT_STEREO) {
979 printk(KERN_WARNING "stereo mode not supported\n");
982 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
983 printk(KERN_WARNING "composite sync not supported\n");
986 /* it is incorrect if hsync/vsync width is zero */
987 if (!hsync_pulse_width || !vsync_pulse_width) {
988 DRM_DEBUG_KMS("Incorrect Detailed timing. "
989 "Wrong Hsync/Vsync pulse width\n");
992 mode = drm_mode_create(dev);
996 mode->type = DRM_MODE_TYPE_DRIVER;
998 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
999 timing->pixel_clock = cpu_to_le16(1088);
1001 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1003 mode->hdisplay = hactive;
1004 mode->hsync_start = mode->hdisplay + hsync_offset;
1005 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1006 mode->htotal = mode->hdisplay + hblank;
1008 mode->vdisplay = vactive;
1009 mode->vsync_start = mode->vdisplay + vsync_offset;
1010 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1011 mode->vtotal = mode->vdisplay + vblank;
1013 /* Some EDIDs have bogus h/vtotal values */
1014 if (mode->hsync_end > mode->htotal)
1015 mode->htotal = mode->hsync_end + 1;
1016 if (mode->vsync_end > mode->vtotal)
1017 mode->vtotal = mode->vsync_end + 1;
1019 drm_mode_do_interlace_quirk(mode, pt);
1021 drm_mode_set_name(mode);
1023 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1024 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1027 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1028 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1029 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1030 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1032 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1033 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1035 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1036 mode->width_mm *= 10;
1037 mode->height_mm *= 10;
1040 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1041 mode->width_mm = edid->width_cm * 10;
1042 mode->height_mm = edid->height_cm * 10;
1049 * Detailed mode info for the EDID "established modes" data to use.
1051 static struct drm_display_mode edid_est_modes[] = {
1052 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1053 968, 1056, 0, 600, 601, 605, 628, 0,
1054 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
1055 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
1056 896, 1024, 0, 600, 601, 603, 625, 0,
1057 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
1058 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
1059 720, 840, 0, 480, 481, 484, 500, 0,
1060 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
1061 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
1062 704, 832, 0, 480, 489, 491, 520, 0,
1063 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
1064 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
1065 768, 864, 0, 480, 483, 486, 525, 0,
1066 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
1067 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
1068 752, 800, 0, 480, 490, 492, 525, 0,
1069 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
1070 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
1071 846, 900, 0, 400, 421, 423, 449, 0,
1072 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
1073 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
1074 846, 900, 0, 400, 412, 414, 449, 0,
1075 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
1076 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
1077 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1078 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
1079 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
1080 1136, 1312, 0, 768, 769, 772, 800, 0,
1081 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
1082 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
1083 1184, 1328, 0, 768, 771, 777, 806, 0,
1084 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
1085 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1086 1184, 1344, 0, 768, 771, 777, 806, 0,
1087 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
1088 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
1089 1208, 1264, 0, 768, 768, 776, 817, 0,
1090 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
1091 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
1092 928, 1152, 0, 624, 625, 628, 667, 0,
1093 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
1094 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
1095 896, 1056, 0, 600, 601, 604, 625, 0,
1096 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
1097 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
1098 976, 1040, 0, 600, 637, 643, 666, 0,
1099 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
1100 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1101 1344, 1600, 0, 864, 865, 868, 900, 0,
1102 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
1106 * add_established_modes - get est. modes from EDID and add them
1107 * @edid: EDID block to scan
1109 * Each EDID block contains a bitmap of the supported "established modes" list
1110 * (defined above). Tease them out and add them to the global modes list.
1112 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
1114 struct drm_device *dev = connector->dev;
1115 unsigned long est_bits = edid->established_timings.t1 |
1116 (edid->established_timings.t2 << 8) |
1117 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1120 for (i = 0; i <= EDID_EST_TIMINGS; i++)
1121 if (est_bits & (1<<i)) {
1122 struct drm_display_mode *newmode;
1123 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1125 drm_mode_probed_add(connector, newmode);
1134 * add_standard_modes - get std. modes from EDID and add them
1135 * @edid: EDID block to scan
1137 * Standard modes can be calculated using the CVT standard. Grab them from
1138 * @edid, calculate them, and add them to the list.
1140 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
1144 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1145 struct drm_display_mode *newmode;
1147 newmode = drm_mode_std(connector, edid,
1148 &edid->standard_timings[i],
1151 drm_mode_probed_add(connector, newmode);
1160 mode_is_rb(struct drm_display_mode *mode)
1162 return (mode->htotal - mode->hdisplay == 160) &&
1163 (mode->hsync_end - mode->hdisplay == 80) &&
1164 (mode->hsync_end - mode->hsync_start == 32) &&
1165 (mode->vsync_start - mode->vdisplay == 3);
1169 mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1171 int hsync, hmin, hmax;
1174 if (edid->revision >= 4)
1175 hmin += ((t[4] & 0x04) ? 255 : 0);
1177 if (edid->revision >= 4)
1178 hmax += ((t[4] & 0x08) ? 255 : 0);
1179 hsync = drm_mode_hsync(mode);
1181 return (hsync <= hmax && hsync >= hmin);
1185 mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1187 int vsync, vmin, vmax;
1190 if (edid->revision >= 4)
1191 vmin += ((t[4] & 0x01) ? 255 : 0);
1193 if (edid->revision >= 4)
1194 vmax += ((t[4] & 0x02) ? 255 : 0);
1195 vsync = drm_mode_vrefresh(mode);
1197 return (vsync <= vmax && vsync >= vmin);
1201 range_pixel_clock(struct edid *edid, u8 *t)
1204 if (t[9] == 0 || t[9] == 255)
1207 /* 1.4 with CVT support gives us real precision, yay */
1208 if (edid->revision >= 4 && t[10] == 0x04)
1209 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1211 /* 1.3 is pathetic, so fuzz up a bit */
1212 return t[9] * 10000 + 5001;
1216 mode_in_range(struct drm_display_mode *mode, struct edid *edid,
1217 struct detailed_timing *timing)
1220 u8 *t = (u8 *)timing;
1222 if (!mode_in_hsync_range(mode, edid, t))
1225 if (!mode_in_vsync_range(mode, edid, t))
1228 if ((max_clock = range_pixel_clock(edid, t)))
1229 if (mode->clock > max_clock)
1232 /* 1.4 max horizontal check */
1233 if (edid->revision >= 4 && t[10] == 0x04)
1234 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1237 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1244 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1245 * need to account for them.
1248 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1249 struct detailed_timing *timing)
1252 struct drm_display_mode *newmode;
1253 struct drm_device *dev = connector->dev;
1255 for (i = 0; i < drm_num_dmt_modes; i++) {
1256 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
1257 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1259 drm_mode_probed_add(connector, newmode);
1268 static int drm_cvt_modes(struct drm_connector *connector,
1269 struct detailed_timing *timing)
1271 int i, j, modes = 0;
1272 struct drm_display_mode *newmode;
1273 struct drm_device *dev = connector->dev;
1274 struct cvt_timing *cvt;
1275 const int rates[] = { 60, 85, 75, 60, 50 };
1276 const u8 empty[3] = { 0, 0, 0 };
1278 for (i = 0; i < 4; i++) {
1279 int uninitialized_var(width), height;
1280 cvt = &(timing->data.other_data.data.cvt[i]);
1282 if (!memcmp(cvt->code, empty, 3))
1285 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1286 switch (cvt->code[1] & 0x0c) {
1288 width = height * 4 / 3;
1291 width = height * 16 / 9;
1294 width = height * 16 / 10;
1297 width = height * 15 / 9;
1301 for (j = 1; j < 5; j++) {
1302 if (cvt->code[2] & (1 << j)) {
1303 newmode = drm_cvt_mode(dev, width, height,
1307 drm_mode_probed_add(connector, newmode);
1317 static const struct {
1324 { 640, 350, 85, 0 },
1325 { 640, 400, 85, 0 },
1326 { 720, 400, 85, 0 },
1327 { 640, 480, 85, 0 },
1328 { 848, 480, 60, 0 },
1329 { 800, 600, 85, 0 },
1330 { 1024, 768, 85, 0 },
1331 { 1152, 864, 75, 0 },
1333 { 1280, 768, 60, 1 },
1334 { 1280, 768, 60, 0 },
1335 { 1280, 768, 75, 0 },
1336 { 1280, 768, 85, 0 },
1337 { 1280, 960, 60, 0 },
1338 { 1280, 960, 85, 0 },
1339 { 1280, 1024, 60, 0 },
1340 { 1280, 1024, 85, 0 },
1342 { 1360, 768, 60, 0 },
1343 { 1440, 900, 60, 1 },
1344 { 1440, 900, 60, 0 },
1345 { 1440, 900, 75, 0 },
1346 { 1440, 900, 85, 0 },
1347 { 1400, 1050, 60, 1 },
1348 { 1400, 1050, 60, 0 },
1349 { 1400, 1050, 75, 0 },
1351 { 1400, 1050, 85, 0 },
1352 { 1680, 1050, 60, 1 },
1353 { 1680, 1050, 60, 0 },
1354 { 1680, 1050, 75, 0 },
1355 { 1680, 1050, 85, 0 },
1356 { 1600, 1200, 60, 0 },
1357 { 1600, 1200, 65, 0 },
1358 { 1600, 1200, 70, 0 },
1360 { 1600, 1200, 75, 0 },
1361 { 1600, 1200, 85, 0 },
1362 { 1792, 1344, 60, 0 },
1363 { 1792, 1344, 85, 0 },
1364 { 1856, 1392, 60, 0 },
1365 { 1856, 1392, 75, 0 },
1366 { 1920, 1200, 60, 1 },
1367 { 1920, 1200, 60, 0 },
1369 { 1920, 1200, 75, 0 },
1370 { 1920, 1200, 85, 0 },
1371 { 1920, 1440, 60, 0 },
1372 { 1920, 1440, 75, 0 },
1374 static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);
1377 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1379 int i, j, m, modes = 0;
1380 struct drm_display_mode *mode;
1381 u8 *est = ((u8 *)timing) + 5;
1383 for (i = 0; i < 6; i++) {
1384 for (j = 7; j > 0; j--) {
1385 m = (i * 8) + (7 - j);
1386 if (m >= num_est3_modes)
1388 if (est[i] & (1 << j)) {
1389 mode = drm_find_dmt(connector->dev,
1393 /*, est3_modes[m].rb */);
1395 drm_mode_probed_add(connector, mode);
1405 static int add_detailed_modes(struct drm_connector *connector,
1406 struct detailed_timing *timing,
1407 struct edid *edid, u32 quirks, int preferred)
1410 struct detailed_non_pixel *data = &timing->data.other_data;
1411 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1412 struct drm_display_mode *newmode;
1413 struct drm_device *dev = connector->dev;
1415 if (timing->pixel_clock) {
1416 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1421 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1423 drm_mode_probed_add(connector, newmode);
1427 /* other timing types */
1428 switch (data->type) {
1429 case EDID_DETAIL_MONITOR_RANGE:
1431 modes += drm_gtf_modes_for_range(connector, edid,
1434 case EDID_DETAIL_STD_MODES:
1435 /* Six modes per detailed section */
1436 for (i = 0; i < 6; i++) {
1437 struct std_timing *std;
1438 struct drm_display_mode *newmode;
1440 std = &data->data.timings[i];
1441 newmode = drm_mode_std(connector, edid, std,
1444 drm_mode_probed_add(connector, newmode);
1449 case EDID_DETAIL_CVT_3BYTE:
1450 modes += drm_cvt_modes(connector, timing);
1452 case EDID_DETAIL_EST_TIMINGS:
1453 modes += drm_est3_modes(connector, timing);
1463 * add_detailed_info - get detailed mode info from EDID data
1464 * @connector: attached connector
1465 * @edid: EDID block to scan
1466 * @quirks: quirks to apply
1468 * Some of the detailed timing sections may contain mode information. Grab
1469 * it and add it to the list.
1471 static int add_detailed_info(struct drm_connector *connector,
1472 struct edid *edid, u32 quirks)
1476 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1477 struct detailed_timing *timing = &edid->detailed_timings[i];
1478 int preferred = (i == 0);
1480 if (preferred && edid->version == 1 && edid->revision < 4)
1481 preferred = (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1483 /* In 1.0, only timings are allowed */
1484 if (!timing->pixel_clock && edid->version == 1 &&
1485 edid->revision == 0)
1488 modes += add_detailed_modes(connector, timing, edid, quirks,
1496 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1498 * @connector: attached connector
1499 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1500 * @quirks: quirks to apply
1502 * Some of the detailed timing sections may contain mode information. Grab
1503 * it and add it to the list.
1505 static int add_detailed_info_eedid(struct drm_connector *connector,
1506 struct edid *edid, u32 quirks)
1509 char *edid_ext = NULL;
1510 struct detailed_timing *timing;
1511 int start_offset, end_offset;
1513 if (edid->version == 1 && edid->revision < 3)
1515 if (!edid->extensions)
1518 /* Find CEA extension */
1519 for (i = 0; i < edid->extensions; i++) {
1520 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1521 if (edid_ext[0] == 0x02)
1525 if (i == edid->extensions)
1528 /* Get the start offset of detailed timing block */
1529 start_offset = edid_ext[2];
1530 if (start_offset == 0) {
1531 /* If the start_offset is zero, it means that neither detailed
1532 * info nor data block exist. In such case it is also
1533 * unnecessary to parse the detailed timing info.
1538 end_offset = EDID_LENGTH;
1539 end_offset -= sizeof(struct detailed_timing);
1540 for (i = start_offset; i < end_offset;
1541 i += sizeof(struct detailed_timing)) {
1542 timing = (struct detailed_timing *)(edid_ext + i);
1543 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1549 #define HDMI_IDENTIFIER 0x000C03
1550 #define VENDOR_BLOCK 0x03
1552 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1553 * @edid: monitor EDID information
1555 * Parse the CEA extension according to CEA-861-B.
1556 * Return true if HDMI, false if not or unknown.
1558 bool drm_detect_hdmi_monitor(struct edid *edid)
1560 char *edid_ext = NULL;
1562 int start_offset, end_offset;
1563 bool is_hdmi = false;
1565 /* No EDID or EDID extensions */
1566 if (edid == NULL || edid->extensions == 0)
1569 /* Find CEA extension */
1570 for (i = 0; i < edid->extensions; i++) {
1571 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1572 /* This block is CEA extension */
1573 if (edid_ext[0] == 0x02)
1577 if (i == edid->extensions)
1580 /* Data block offset in CEA extension block */
1582 end_offset = edid_ext[2];
1585 * Because HDMI identifier is in Vendor Specific Block,
1586 * search it from all data blocks of CEA extension.
1588 for (i = start_offset; i < end_offset;
1589 /* Increased by data block len */
1590 i += ((edid_ext[i] & 0x1f) + 1)) {
1591 /* Find vendor specific block */
1592 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1593 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1594 edid_ext[i + 3] << 16;
1595 /* Find HDMI identifier */
1596 if (hdmi_id == HDMI_IDENTIFIER)
1605 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1608 * drm_add_edid_modes - add modes from EDID data, if available
1609 * @connector: connector we're probing
1612 * Add the specified modes to the connector's mode list.
1614 * Return number of modes added or 0 if we couldn't find any.
1616 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1624 if (!drm_edid_is_valid(edid)) {
1625 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1626 drm_get_connector_name(connector));
1630 quirks = edid_get_quirks(edid);
1633 * EDID spec says modes should be preferred in this order:
1634 * - preferred detailed mode
1635 * - other detailed modes from base block
1636 * - detailed modes from extension blocks
1637 * - CVT 3-byte code modes
1638 * - standard timing codes
1639 * - established timing codes
1640 * - modes inferred from GTF or CVT range information
1642 * We don't quite implement this yet, but we're close.
1644 * XXX order for additional mode types in extension blocks?
1646 num_modes += add_detailed_info(connector, edid, quirks);
1647 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1648 num_modes += add_standard_modes(connector, edid);
1649 num_modes += add_established_modes(connector, edid);
1651 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1652 edid_fixup_preferred(connector, quirks);
1654 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1655 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1656 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1657 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1658 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1659 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1660 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1661 connector->display_info.width_mm = edid->width_cm * 10;
1662 connector->display_info.height_mm = edid->height_cm * 10;
1663 connector->display_info.gamma = edid->gamma;
1664 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1665 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1666 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1667 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1668 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1669 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1670 connector->display_info.gamma = edid->gamma;
1674 EXPORT_SYMBOL(drm_add_edid_modes);
1677 * drm_add_modes_noedid - add modes for the connectors without EDID
1678 * @connector: connector we're probing
1679 * @hdisplay: the horizontal display limit
1680 * @vdisplay: the vertical display limit
1682 * Add the specified modes to the connector's mode list. Only when the
1683 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1685 * Return number of modes added or 0 if we couldn't find any.
1687 int drm_add_modes_noedid(struct drm_connector *connector,
1688 int hdisplay, int vdisplay)
1690 int i, count, num_modes = 0;
1691 struct drm_display_mode *mode, *ptr;
1692 struct drm_device *dev = connector->dev;
1694 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1700 for (i = 0; i < count; i++) {
1701 ptr = &drm_dmt_modes[i];
1702 if (hdisplay && vdisplay) {
1704 * Only when two are valid, they will be used to check
1705 * whether the mode should be added to the mode list of
1708 if (ptr->hdisplay > hdisplay ||
1709 ptr->vdisplay > vdisplay)
1712 if (drm_mode_vrefresh(ptr) > 61)
1714 mode = drm_mode_duplicate(dev, ptr);
1716 drm_mode_probed_add(connector, mode);
1722 EXPORT_SYMBOL(drm_add_modes_noedid);