2 * Generic GPIO driver for logic cells found in the Nomadik SoC
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
7 * Copyright (C) 2011 Linus Walleij <linus.walleij@linaro.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
21 #include <linux/gpio.h>
22 #include <linux/spinlock.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/slab.h>
27 #include <asm/mach/irq.h>
29 #include <plat/pincfg.h>
30 #include <mach/hardware.h>
31 #include <mach/gpio.h>
34 * The GPIO module in the Nomadik family of Systems-on-Chip is an
35 * AMBA device, managing 32 pins and alternate functions. The logic block
36 * is currently used in the Nomadik and ux500.
38 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
41 #define NMK_GPIO_PER_CHIP 32
43 struct nmk_gpio_chip {
44 struct gpio_chip chip;
48 unsigned int parent_irq;
49 int secondary_parent_irq;
50 u32 (*get_secondary_status)(unsigned int bank);
51 void (*set_ioforce)(bool enable);
54 /* Keep track of configured edges */
64 static struct nmk_gpio_chip *
65 nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
67 static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
69 #define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
71 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
72 unsigned offset, int gpio_mode)
74 u32 bit = 1 << offset;
77 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
78 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
79 if (gpio_mode & NMK_GPIO_ALT_A)
81 if (gpio_mode & NMK_GPIO_ALT_B)
83 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
84 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
87 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
88 unsigned offset, enum nmk_gpio_slpm mode)
90 u32 bit = 1 << offset;
93 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
94 if (mode == NMK_GPIO_SLPM_NOCHANGE)
98 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
101 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
102 unsigned offset, enum nmk_gpio_pull pull)
104 u32 bit = 1 << offset;
107 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
108 if (pull == NMK_GPIO_PULL_NONE) {
110 nmk_chip->pull_up &= ~bit;
115 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
117 if (pull == NMK_GPIO_PULL_UP) {
118 nmk_chip->pull_up |= bit;
119 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
120 } else if (pull == NMK_GPIO_PULL_DOWN) {
121 nmk_chip->pull_up &= ~bit;
122 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
126 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
129 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
132 static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
133 unsigned offset, int val)
136 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
138 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
141 static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
142 unsigned offset, int val)
144 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
145 __nmk_gpio_set_output(nmk_chip, offset, val);
148 static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
149 unsigned offset, int gpio_mode,
152 u32 rwimsc = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
153 u32 fwimsc = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
155 if (glitch && nmk_chip->set_ioforce) {
156 u32 bit = BIT(offset);
158 /* Prevent spurious wakeups */
159 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
160 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
162 nmk_chip->set_ioforce(true);
165 __nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);
167 if (glitch && nmk_chip->set_ioforce) {
168 nmk_chip->set_ioforce(false);
170 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
171 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
175 static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
176 pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
178 static const char *afnames[] = {
179 [NMK_GPIO_ALT_GPIO] = "GPIO",
180 [NMK_GPIO_ALT_A] = "A",
181 [NMK_GPIO_ALT_B] = "B",
182 [NMK_GPIO_ALT_C] = "C"
184 static const char *pullnames[] = {
185 [NMK_GPIO_PULL_NONE] = "none",
186 [NMK_GPIO_PULL_UP] = "up",
187 [NMK_GPIO_PULL_DOWN] = "down",
188 [3] /* illegal */ = "??"
190 static const char *slpmnames[] = {
191 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
192 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
195 int pin = PIN_NUM(cfg);
196 int pull = PIN_PULL(cfg);
197 int af = PIN_ALT(cfg);
198 int slpm = PIN_SLPM(cfg);
199 int output = PIN_DIR(cfg);
200 int val = PIN_VAL(cfg);
201 bool glitch = af == NMK_GPIO_ALT_C;
203 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
204 pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
205 output ? "output " : "input",
206 output ? (val ? "high" : "low") : "");
209 int slpm_pull = PIN_SLPM_PULL(cfg);
210 int slpm_output = PIN_SLPM_DIR(cfg);
211 int slpm_val = PIN_SLPM_VAL(cfg);
213 af = NMK_GPIO_ALT_GPIO;
216 * The SLPM_* values are normal values + 1 to allow zero to
217 * mean "same as normal".
220 pull = slpm_pull - 1;
222 output = slpm_output - 1;
226 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
228 slpm_pull ? pullnames[pull] : "same",
229 slpm_output ? (output ? "output" : "input") : "same",
230 slpm_val ? (val ? "high" : "low") : "same");
234 __nmk_gpio_make_output(nmk_chip, offset, val);
236 __nmk_gpio_make_input(nmk_chip, offset);
237 __nmk_gpio_set_pull(nmk_chip, offset, pull);
241 * If we've backed up the SLPM registers (glitch workaround), modify
242 * the backups since they will be restored.
245 if (slpm == NMK_GPIO_SLPM_NOCHANGE)
246 slpmregs[nmk_chip->bank] |= BIT(offset);
248 slpmregs[nmk_chip->bank] &= ~BIT(offset);
250 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
252 __nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
256 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
257 * - Save SLPM registers
258 * - Set SLPM=0 for the IOs you want to switch and others to 1
259 * - Configure the GPIO registers for the IOs that are being switched
261 * - Modify the AFLSA/B registers for the IOs that are being switched
263 * - Restore SLPM registers
264 * - Any spurious wake up event during switch sequence to be ignored and
267 static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
271 for (i = 0; i < NUM_BANKS; i++) {
272 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
273 unsigned int temp = slpm[i];
278 clk_enable(chip->clk);
280 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
281 writel(temp, chip->addr + NMK_GPIO_SLPC);
285 static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
289 for (i = 0; i < NUM_BANKS; i++) {
290 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
295 writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
297 clk_disable(chip->clk);
301 static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
303 static unsigned int slpm[NUM_BANKS];
309 for (i = 0; i < num; i++) {
310 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
316 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
319 memset(slpm, 0xff, sizeof(slpm));
321 for (i = 0; i < num; i++) {
322 int pin = PIN_NUM(cfgs[i]);
323 int offset = pin % NMK_GPIO_PER_CHIP;
325 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
326 slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
329 nmk_gpio_glitch_slpm_init(slpm);
332 for (i = 0; i < num; i++) {
333 struct nmk_gpio_chip *nmk_chip;
334 int pin = PIN_NUM(cfgs[i]);
336 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
342 clk_enable(nmk_chip->clk);
343 spin_lock(&nmk_chip->lock);
344 __nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base,
345 cfgs[i], sleep, glitch ? slpm : NULL);
346 spin_unlock(&nmk_chip->lock);
347 clk_disable(nmk_chip->clk);
351 nmk_gpio_glitch_slpm_restore(slpm);
353 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
359 * nmk_config_pin - configure a pin's mux attributes
360 * @cfg: pin confguration
362 * Configures a pin's mode (alternate function or GPIO), its pull up status,
363 * and its sleep mode based on the specified configuration. The @cfg is
364 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
365 * are constructed using, and can be further enhanced with, the macros in
368 * If a pin's mode is set to GPIO, it is configured as an input to avoid
369 * side-effects. The gpio can be manipulated later using standard GPIO API
372 int nmk_config_pin(pin_cfg_t cfg, bool sleep)
374 return __nmk_config_pins(&cfg, 1, sleep);
376 EXPORT_SYMBOL(nmk_config_pin);
379 * nmk_config_pins - configure several pins at once
380 * @cfgs: array of pin configurations
381 * @num: number of elments in the array
383 * Configures several pins using nmk_config_pin(). Refer to that function for
384 * further information.
386 int nmk_config_pins(pin_cfg_t *cfgs, int num)
388 return __nmk_config_pins(cfgs, num, false);
390 EXPORT_SYMBOL(nmk_config_pins);
392 int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
394 return __nmk_config_pins(cfgs, num, true);
396 EXPORT_SYMBOL(nmk_config_pins_sleep);
399 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
401 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
403 * This register is actually in the pinmux layer, not the GPIO block itself.
404 * The GPIO1B_SLPM register defines the GPIO mode when SLEEP/DEEP-SLEEP
405 * mode is entered (i.e. when signal IOFORCE is HIGH by the platform code).
406 * Each GPIO can be configured to be forced into GPIO mode when IOFORCE is
407 * HIGH, overriding the normal setting defined by GPIO_AFSELx registers.
408 * When IOFORCE returns LOW (by software, after SLEEP/DEEP-SLEEP exit),
409 * the GPIOs return to the normal setting defined by GPIO_AFSELx registers.
411 * If @mode is NMK_GPIO_SLPM_INPUT, the corresponding GPIO is switched to GPIO
412 * mode when signal IOFORCE is HIGH (i.e. when SLEEP/DEEP-SLEEP mode is
413 * entered) regardless of the altfunction selected. Also wake-up detection is
416 * If @mode is NMK_GPIO_SLPM_NOCHANGE, the corresponding GPIO remains
417 * controlled by NMK_GPIO_DATC, NMK_GPIO_DATS, NMK_GPIO_DIR, NMK_GPIO_PDIS
418 * (for altfunction GPIO) or respective on-chip peripherals (for other
419 * altfuncs) when IOFORCE is HIGH. Also wake-up detection DISABLED.
421 * Note that enable_irq_wake() will automatically enable wakeup detection.
423 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
425 struct nmk_gpio_chip *nmk_chip;
428 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
432 clk_enable(nmk_chip->clk);
433 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
434 spin_lock(&nmk_chip->lock);
436 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
438 spin_unlock(&nmk_chip->lock);
439 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
440 clk_disable(nmk_chip->clk);
446 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
448 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
450 * Enables/disables pull up/down on a specified pin. This only takes effect if
451 * the pin is configured as an input (either explicitly or by the alternate
454 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
455 * configured as an input. Otherwise, due to the way the controller registers
456 * work, this function will change the value output on the pin.
458 int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
460 struct nmk_gpio_chip *nmk_chip;
463 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
467 clk_enable(nmk_chip->clk);
468 spin_lock_irqsave(&nmk_chip->lock, flags);
469 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
470 spin_unlock_irqrestore(&nmk_chip->lock, flags);
471 clk_disable(nmk_chip->clk);
478 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
480 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
481 * NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
483 * Sets the mode of the specified pin to one of the alternate functions or
486 int nmk_gpio_set_mode(int gpio, int gpio_mode)
488 struct nmk_gpio_chip *nmk_chip;
491 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
495 clk_enable(nmk_chip->clk);
496 spin_lock_irqsave(&nmk_chip->lock, flags);
497 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
498 spin_unlock_irqrestore(&nmk_chip->lock, flags);
499 clk_disable(nmk_chip->clk);
503 EXPORT_SYMBOL(nmk_gpio_set_mode);
505 int nmk_gpio_get_mode(int gpio)
507 struct nmk_gpio_chip *nmk_chip;
508 u32 afunc, bfunc, bit;
510 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
514 bit = 1 << (gpio - nmk_chip->chip.base);
516 clk_enable(nmk_chip->clk);
518 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
519 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
521 clk_disable(nmk_chip->clk);
523 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
525 EXPORT_SYMBOL(nmk_gpio_get_mode);
529 static inline int nmk_gpio_get_bitmask(int gpio)
531 return 1 << (gpio % 32);
534 static void nmk_gpio_irq_ack(struct irq_data *d)
537 struct nmk_gpio_chip *nmk_chip;
539 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
540 nmk_chip = irq_data_get_irq_chip_data(d);
544 clk_enable(nmk_chip->clk);
545 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
546 clk_disable(nmk_chip->clk);
549 enum nmk_gpio_irq_type {
554 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
555 int gpio, enum nmk_gpio_irq_type which,
558 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
559 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
560 u32 bitmask = nmk_gpio_get_bitmask(gpio);
563 /* we must individually set/clear the two edges */
564 if (nmk_chip->edge_rising & bitmask) {
565 reg = readl(nmk_chip->addr + rimsc);
570 writel(reg, nmk_chip->addr + rimsc);
572 if (nmk_chip->edge_falling & bitmask) {
573 reg = readl(nmk_chip->addr + fimsc);
578 writel(reg, nmk_chip->addr + fimsc);
582 static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
585 if (nmk_chip->sleepmode) {
586 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base,
587 on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
588 : NMK_GPIO_SLPM_WAKEUP_DISABLE);
591 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
594 static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
597 struct nmk_gpio_chip *nmk_chip;
601 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
602 nmk_chip = irq_data_get_irq_chip_data(d);
603 bitmask = nmk_gpio_get_bitmask(gpio);
607 clk_enable(nmk_chip->clk);
608 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
609 spin_lock(&nmk_chip->lock);
611 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable);
613 if (!(nmk_chip->real_wake & bitmask))
614 __nmk_gpio_set_wake(nmk_chip, gpio, enable);
616 spin_unlock(&nmk_chip->lock);
617 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
618 clk_disable(nmk_chip->clk);
623 static void nmk_gpio_irq_mask(struct irq_data *d)
625 nmk_gpio_irq_maskunmask(d, false);
628 static void nmk_gpio_irq_unmask(struct irq_data *d)
630 nmk_gpio_irq_maskunmask(d, true);
633 static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
635 struct nmk_gpio_chip *nmk_chip;
640 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
641 nmk_chip = irq_data_get_irq_chip_data(d);
644 bitmask = nmk_gpio_get_bitmask(gpio);
646 clk_enable(nmk_chip->clk);
647 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
648 spin_lock(&nmk_chip->lock);
650 if (irqd_irq_disabled(d))
651 __nmk_gpio_set_wake(nmk_chip, gpio, on);
654 nmk_chip->real_wake |= bitmask;
656 nmk_chip->real_wake &= ~bitmask;
658 spin_unlock(&nmk_chip->lock);
659 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
660 clk_disable(nmk_chip->clk);
665 static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
667 bool enabled = !irqd_irq_disabled(d);
668 bool wake = irqd_is_wakeup_set(d);
670 struct nmk_gpio_chip *nmk_chip;
674 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
675 nmk_chip = irq_data_get_irq_chip_data(d);
676 bitmask = nmk_gpio_get_bitmask(gpio);
680 if (type & IRQ_TYPE_LEVEL_HIGH)
682 if (type & IRQ_TYPE_LEVEL_LOW)
685 clk_enable(nmk_chip->clk);
686 spin_lock_irqsave(&nmk_chip->lock, flags);
689 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
692 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
694 nmk_chip->edge_rising &= ~bitmask;
695 if (type & IRQ_TYPE_EDGE_RISING)
696 nmk_chip->edge_rising |= bitmask;
698 nmk_chip->edge_falling &= ~bitmask;
699 if (type & IRQ_TYPE_EDGE_FALLING)
700 nmk_chip->edge_falling |= bitmask;
703 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
706 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
708 spin_unlock_irqrestore(&nmk_chip->lock, flags);
709 clk_disable(nmk_chip->clk);
714 static unsigned int nmk_gpio_irq_startup(struct irq_data *d)
716 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
718 clk_enable(nmk_chip->clk);
719 nmk_gpio_irq_unmask(d);
723 static void nmk_gpio_irq_shutdown(struct irq_data *d)
725 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
727 nmk_gpio_irq_mask(d);
728 clk_disable(nmk_chip->clk);
731 static struct irq_chip nmk_gpio_irq_chip = {
732 .name = "Nomadik-GPIO",
733 .irq_ack = nmk_gpio_irq_ack,
734 .irq_mask = nmk_gpio_irq_mask,
735 .irq_unmask = nmk_gpio_irq_unmask,
736 .irq_set_type = nmk_gpio_irq_set_type,
737 .irq_set_wake = nmk_gpio_irq_set_wake,
738 .irq_startup = nmk_gpio_irq_startup,
739 .irq_shutdown = nmk_gpio_irq_shutdown,
742 static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
745 struct nmk_gpio_chip *nmk_chip;
746 struct irq_chip *host_chip = irq_get_chip(irq);
747 unsigned int first_irq;
749 chained_irq_enter(host_chip, desc);
751 nmk_chip = irq_get_handler_data(irq);
752 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
754 int bit = __ffs(status);
756 generic_handle_irq(first_irq + bit);
760 chained_irq_exit(host_chip, desc);
763 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
765 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
768 clk_enable(nmk_chip->clk);
769 status = readl(nmk_chip->addr + NMK_GPIO_IS);
770 clk_disable(nmk_chip->clk);
772 __nmk_gpio_irq_handler(irq, desc, status);
775 static void nmk_gpio_secondary_irq_handler(unsigned int irq,
776 struct irq_desc *desc)
778 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
779 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
781 __nmk_gpio_irq_handler(irq, desc, status);
784 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
786 unsigned int first_irq;
789 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
790 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
791 irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
793 set_irq_flags(i, IRQF_VALID);
794 irq_set_chip_data(i, nmk_chip);
795 irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
798 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
799 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
801 if (nmk_chip->secondary_parent_irq >= 0) {
802 irq_set_chained_handler(nmk_chip->secondary_parent_irq,
803 nmk_gpio_secondary_irq_handler);
804 irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
811 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
813 struct nmk_gpio_chip *nmk_chip =
814 container_of(chip, struct nmk_gpio_chip, chip);
816 clk_enable(nmk_chip->clk);
818 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
820 clk_disable(nmk_chip->clk);
825 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
827 struct nmk_gpio_chip *nmk_chip =
828 container_of(chip, struct nmk_gpio_chip, chip);
829 u32 bit = 1 << offset;
832 clk_enable(nmk_chip->clk);
834 value = (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
836 clk_disable(nmk_chip->clk);
841 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
844 struct nmk_gpio_chip *nmk_chip =
845 container_of(chip, struct nmk_gpio_chip, chip);
847 clk_enable(nmk_chip->clk);
849 __nmk_gpio_set_output(nmk_chip, offset, val);
851 clk_disable(nmk_chip->clk);
854 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
857 struct nmk_gpio_chip *nmk_chip =
858 container_of(chip, struct nmk_gpio_chip, chip);
860 clk_enable(nmk_chip->clk);
862 __nmk_gpio_make_output(nmk_chip, offset, val);
864 clk_disable(nmk_chip->clk);
869 static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
871 struct nmk_gpio_chip *nmk_chip =
872 container_of(chip, struct nmk_gpio_chip, chip);
874 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
877 #ifdef CONFIG_DEBUG_FS
879 #include <linux/seq_file.h>
881 static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
885 unsigned gpio = chip->base;
887 struct nmk_gpio_chip *nmk_chip =
888 container_of(chip, struct nmk_gpio_chip, chip);
889 const char *modes[] = {
890 [NMK_GPIO_ALT_GPIO] = "gpio",
891 [NMK_GPIO_ALT_A] = "altA",
892 [NMK_GPIO_ALT_B] = "altB",
893 [NMK_GPIO_ALT_C] = "altC",
896 clk_enable(nmk_chip->clk);
898 for (i = 0; i < chip->ngpio; i++, gpio++) {
899 const char *label = gpiochip_is_requested(chip, i);
903 is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit;
904 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
905 mode = nmk_gpio_get_mode(gpio);
906 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
907 gpio, label ?: "(none)",
908 is_out ? "out" : "in ",
910 ? (chip->get(chip, i) ? "hi" : "lo")
912 (mode < 0) ? "unknown" : modes[mode],
913 pull ? "pull" : "none");
915 if (label && !is_out) {
916 int irq = gpio_to_irq(gpio);
917 struct irq_desc *desc = irq_to_desc(irq);
919 /* This races with request_irq(), set_irq_type(),
920 * and set_irq_wake() ... but those are "rare".
922 if (irq >= 0 && desc->action) {
924 u32 bitmask = nmk_gpio_get_bitmask(gpio);
926 if (nmk_chip->edge_rising & bitmask)
927 trigger = "edge-rising";
928 else if (nmk_chip->edge_falling & bitmask)
929 trigger = "edge-falling";
931 trigger = "edge-undefined";
933 seq_printf(s, " irq-%d %s%s",
935 irqd_is_wakeup_set(&desc->irq_data)
943 clk_disable(nmk_chip->clk);
947 #define nmk_gpio_dbg_show NULL
950 /* This structure is replicated for each GPIO block allocated at probe time */
951 static struct gpio_chip nmk_gpio_template = {
952 .direction_input = nmk_gpio_make_input,
953 .get = nmk_gpio_get_input,
954 .direction_output = nmk_gpio_make_output,
955 .set = nmk_gpio_set_output,
956 .to_irq = nmk_gpio_to_irq,
957 .dbg_show = nmk_gpio_dbg_show,
961 void nmk_gpio_clocks_enable(void)
965 for (i = 0; i < NUM_BANKS; i++) {
966 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
971 clk_enable(chip->clk);
975 void nmk_gpio_clocks_disable(void)
979 for (i = 0; i < NUM_BANKS; i++) {
980 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
985 clk_disable(chip->clk);
990 * Called from the suspend/resume path to only keep the real wakeup interrupts
991 * (those that have had set_irq_wake() called on them) as wakeup interrupts,
992 * and not the rest of the interrupts which we needed to have as wakeups for
995 * PM ops are not used since this needs to be done at the end, after all the
996 * other drivers are done with their suspend callbacks.
998 void nmk_gpio_wakeups_suspend(void)
1002 for (i = 0; i < NUM_BANKS; i++) {
1003 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1008 clk_enable(chip->clk);
1010 chip->rwimsc = readl(chip->addr + NMK_GPIO_RWIMSC);
1011 chip->fwimsc = readl(chip->addr + NMK_GPIO_FWIMSC);
1013 writel(chip->rwimsc & chip->real_wake,
1014 chip->addr + NMK_GPIO_RWIMSC);
1015 writel(chip->fwimsc & chip->real_wake,
1016 chip->addr + NMK_GPIO_FWIMSC);
1018 if (chip->sleepmode) {
1019 chip->slpm = readl(chip->addr + NMK_GPIO_SLPC);
1021 /* 0 -> wakeup enable */
1022 writel(~chip->real_wake, chip->addr + NMK_GPIO_SLPC);
1025 clk_disable(chip->clk);
1029 void nmk_gpio_wakeups_resume(void)
1033 for (i = 0; i < NUM_BANKS; i++) {
1034 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1039 clk_enable(chip->clk);
1041 writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
1042 writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
1044 if (chip->sleepmode)
1045 writel(chip->slpm, chip->addr + NMK_GPIO_SLPC);
1047 clk_disable(chip->clk);
1052 * Read the pull up/pull down status.
1053 * A bit set in 'pull_up' means that pull up
1054 * is selected if pull is enabled in PDIS register.
1055 * Note: only pull up/down set via this driver can
1056 * be detected due to HW limitations.
1058 void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
1060 if (gpio_bank < NUM_BANKS) {
1061 struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank];
1066 *pull_up = chip->pull_up;
1070 static int __devinit nmk_gpio_probe(struct platform_device *dev)
1072 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
1073 struct nmk_gpio_chip *nmk_chip;
1074 struct gpio_chip *chip;
1075 struct resource *res;
1084 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1090 irq = platform_get_irq(dev, 0);
1096 secondary_irq = platform_get_irq(dev, 1);
1097 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
1102 if (request_mem_region(res->start, resource_size(res),
1103 dev_name(&dev->dev)) == NULL) {
1108 clk = clk_get(&dev->dev, NULL);
1114 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
1120 * The virt address in nmk_chip->addr is in the nomadik register space,
1121 * so we can simply convert the resource address, without remapping
1123 nmk_chip->bank = dev->id;
1124 nmk_chip->clk = clk;
1125 nmk_chip->addr = io_p2v(res->start);
1126 nmk_chip->chip = nmk_gpio_template;
1127 nmk_chip->parent_irq = irq;
1128 nmk_chip->secondary_parent_irq = secondary_irq;
1129 nmk_chip->get_secondary_status = pdata->get_secondary_status;
1130 nmk_chip->set_ioforce = pdata->set_ioforce;
1131 nmk_chip->sleepmode = pdata->supports_sleepmode;
1132 spin_lock_init(&nmk_chip->lock);
1134 chip = &nmk_chip->chip;
1135 chip->base = pdata->first_gpio;
1136 chip->ngpio = pdata->num_gpio;
1137 chip->label = pdata->name ?: dev_name(&dev->dev);
1138 chip->dev = &dev->dev;
1139 chip->owner = THIS_MODULE;
1141 ret = gpiochip_add(&nmk_chip->chip);
1145 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
1147 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
1148 platform_set_drvdata(dev, nmk_chip);
1150 nmk_gpio_init_irq(nmk_chip);
1152 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
1153 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
1162 release_mem_region(res->start, resource_size(res));
1164 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
1165 pdata->first_gpio, pdata->first_gpio+31);
1169 static struct platform_driver nmk_gpio_driver = {
1171 .owner = THIS_MODULE,
1174 .probe = nmk_gpio_probe,
1177 static int __init nmk_gpio_init(void)
1179 return platform_driver_register(&nmk_gpio_driver);
1182 core_initcall(nmk_gpio_init);
1184 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
1185 MODULE_DESCRIPTION("Nomadik GPIO Driver");
1186 MODULE_LICENSE("GPL");