2 * Defines, structures, APIs for edac_core module
4 * (C) 2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
8 * Written by Thayne Harbaugh
9 * Based on work by Dan Hollis <goemon at anime dot net> and others.
10 * http://www.anime.net/~goemon/linux-ecc/
12 * NMI handling support added by
13 * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
15 * Refactored for multi-source files:
16 * Doug Thompson <norsk5@xmission.com>
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/module.h>
26 #include <linux/spinlock.h>
27 #include <linux/smp.h>
28 #include <linux/pci.h>
29 #include <linux/time.h>
30 #include <linux/nmi.h>
31 #include <linux/rcupdate.h>
32 #include <linux/completion.h>
33 #include <linux/kobject.h>
34 #include <linux/platform_device.h>
35 #include <linux/workqueue.h>
36 #include <linux/edac.h>
38 #define EDAC_DEVICE_NAME_LEN 31
39 #define EDAC_ATTRIB_VALUE_LEN 15
42 #define PAGES_TO_MiB(pages) ((pages) >> (20 - PAGE_SHIFT))
43 #define MiB_TO_PAGES(mb) ((mb) << (20 - PAGE_SHIFT))
44 #else /* PAGE_SHIFT > 20 */
45 #define PAGES_TO_MiB(pages) ((pages) << (PAGE_SHIFT - 20))
46 #define MiB_TO_PAGES(mb) ((mb) >> (PAGE_SHIFT - 20))
49 #define edac_printk(level, prefix, fmt, arg...) \
50 printk(level "EDAC " prefix ": " fmt, ##arg)
52 #define edac_mc_printk(mci, level, fmt, arg...) \
53 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg)
55 #define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \
56 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
58 #define edac_device_printk(ctl, level, fmt, arg...) \
59 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
61 #define edac_pci_printk(ctl, level, fmt, arg...) \
62 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
64 /* prefixes for edac_printk() and edac_mc_printk() */
66 #define EDAC_PCI "PCI"
67 #define EDAC_DEBUG "DEBUG"
69 extern const char *edac_mem_types[];
71 #ifdef CONFIG_EDAC_DEBUG
72 extern int edac_debug_level;
74 #define edac_debug_printk(level, fmt, ...) \
76 if (level <= edac_debug_level) \
77 edac_printk(KERN_DEBUG, EDAC_DEBUG, \
78 "%s: " fmt, __func__, ##__VA_ARGS__); \
81 #else /* !CONFIG_EDAC_DEBUG */
83 #define edac_debug_printk(level, fmt, ...) \
86 edac_printk(KERN_DEBUG, EDAC_DEBUG, \
87 "%s: " fmt, __func__, ##__VA_ARGS__); \
90 #endif /* !CONFIG_EDAC_DEBUG */
92 #define debugf0(fmt, ...) edac_debug_printk(0, fmt, ##__VA_ARGS__)
93 #define debugf1(fmt, ...) edac_debug_printk(1, fmt, ##__VA_ARGS__)
94 #define debugf2(fmt, ...) edac_debug_printk(2, fmt, ##__VA_ARGS__)
95 #define debugf3(fmt, ...) edac_debug_printk(3, fmt, ##__VA_ARGS__)
96 #define debugf4(fmt, ...) edac_debug_printk(4, fmt, ##__VA_ARGS__)
98 #define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
99 PCI_DEVICE_ID_ ## vend ## _ ## dev
101 #define edac_dev_name(dev) (dev)->dev_name
104 * The following are the structures to provide for a generic
105 * or abstract 'edac_device'. This set of structures and the
106 * code that implements the APIs for the same, provide for
107 * registering EDAC type devices which are NOT standard memory.
109 * CPU caches (L1 and L2)
112 * Fabric switch units
113 * PCIe interface controllers
114 * other EDAC/ECC type devices that can be monitored for
117 * It allows for a 2 level set of hiearchry. For example:
119 * cache could be composed of L1, L2 and L3 levels of cache.
120 * Each CPU core would have its own L1 cache, while sharing
121 * L2 and maybe L3 caches.
123 * View them arranged, via the sysfs presentation:
124 * /sys/devices/system/edac/..
126 * mc/ <existing memory device directory>
127 * cpu/cpu0/.. <L1 and L2 block directory>
132 * cpu/cpu1/.. <L1 and L2 block directory>
139 * the L1 and L2 directories would be "edac_device_block's"
142 struct edac_device_counter {
147 /* forward reference */
148 struct edac_device_ctl_info;
149 struct edac_device_block;
151 /* edac_dev_sysfs_attribute structure
152 * used for driver sysfs attributes in mem_ctl_info
153 * for extra controls and attributes:
154 * like high level error Injection controls
156 struct edac_dev_sysfs_attribute {
157 struct attribute attr;
158 ssize_t (*show)(struct edac_device_ctl_info *, char *);
159 ssize_t (*store)(struct edac_device_ctl_info *, const char *, size_t);
162 /* edac_dev_sysfs_block_attribute structure
164 * used in leaf 'block' nodes for adding controls/attributes
166 * each block in each instance of the containing control structure
167 * can have an array of the following. The show and store functions
168 * will be filled in with the show/store function in the
171 * The 'value' field will be the actual value field used for
174 struct edac_dev_sysfs_block_attribute {
175 struct attribute attr;
176 ssize_t (*show)(struct kobject *, struct attribute *, char *);
177 ssize_t (*store)(struct kobject *, struct attribute *,
178 const char *, size_t);
179 struct edac_device_block *block;
184 /* device block control structure */
185 struct edac_device_block {
186 struct edac_device_instance *instance; /* Up Pointer */
187 char name[EDAC_DEVICE_NAME_LEN + 1];
189 struct edac_device_counter counters; /* basic UE and CE counters */
191 int nr_attribs; /* how many attributes */
193 /* this block's attributes, could be NULL */
194 struct edac_dev_sysfs_block_attribute *block_attributes;
196 /* edac sysfs device control */
200 /* device instance control structure */
201 struct edac_device_instance {
202 struct edac_device_ctl_info *ctl; /* Up pointer */
203 char name[EDAC_DEVICE_NAME_LEN + 4];
205 struct edac_device_counter counters; /* instance counters */
207 u32 nr_blocks; /* how many blocks */
208 struct edac_device_block *blocks; /* block array */
210 /* edac sysfs device control */
216 * Abstract edac_device control info structure
219 struct edac_device_ctl_info {
220 /* for global list of edac_device_ctl_info structs */
221 struct list_head link;
223 struct module *owner; /* Module owner of this control struct */
227 /* Per instance controls for this edac_device */
228 int log_ue; /* boolean for logging UEs */
229 int log_ce; /* boolean for logging CEs */
230 int panic_on_ue; /* boolean for panic'ing on an UE */
231 unsigned poll_msec; /* number of milliseconds to poll interval */
232 unsigned long delay; /* number of jiffies for poll_msec */
234 /* Additional top controller level attributes, but specified
235 * by the low level driver.
237 * Set by the low level driver to provide attributes at the
238 * controller level, same level as 'ue_count' and 'ce_count' above.
239 * An array of structures, NULL terminated
241 * If attributes are desired, then set to array of attributes
242 * If no attributes are desired, leave NULL
244 struct edac_dev_sysfs_attribute *sysfs_attributes;
246 /* pointer to main 'edac' subsys in sysfs */
247 struct bus_type *edac_subsys;
249 /* the internal state of this controller instance */
251 /* work struct for this instance */
252 struct delayed_work work;
254 /* pointer to edac polling checking routine:
255 * If NOT NULL: points to polling check routine
256 * If NULL: Then assumes INTERRUPT operation, where
257 * MC driver will receive events
259 void (*edac_check) (struct edac_device_ctl_info * edac_dev);
261 struct device *dev; /* pointer to device structure */
263 const char *mod_name; /* module name */
264 const char *ctl_name; /* edac controller name */
265 const char *dev_name; /* pci/platform/etc... name */
267 void *pvt_info; /* pointer to 'private driver' info */
269 unsigned long start_time; /* edac_device load start time (jiffies) */
271 struct completion removal_complete;
273 /* sysfs top name under 'edac' directory
280 char name[EDAC_DEVICE_NAME_LEN + 1];
282 /* Number of instances supported on this control structure
283 * and the array of those instances
286 struct edac_device_instance *instances;
288 /* Event counters for the this whole EDAC Device */
289 struct edac_device_counter counters;
291 /* edac sysfs device control for the 'name'
292 * device this structure controls
297 /* To get from the instance's wq to the beginning of the ctl structure */
298 #define to_edac_mem_ctl_work(w) \
299 container_of(w, struct mem_ctl_info, work)
301 #define to_edac_device_ctl_work(w) \
302 container_of(w,struct edac_device_ctl_info,work)
305 * The alloc() and free() functions for the 'edac_device' control info
306 * structure. A MC driver will allocate one of these for each edac_device
307 * it is going to control/register with the EDAC CORE.
309 extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
310 unsigned sizeof_private,
311 char *edac_device_name, unsigned nr_instances,
312 char *edac_block_name, unsigned nr_blocks,
313 unsigned offset_value,
314 struct edac_dev_sysfs_block_attribute *block_attributes,
318 /* The offset value can be:
319 * -1 indicating no offset value
320 * 0 for zero-based block numbers
321 * 1 for 1-based block number
322 * other for other-based block number
324 #define BLOCK_OFFSET_VALUE_OFF ((unsigned) -1)
326 extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
330 struct edac_pci_counter {
336 * Abstract edac_pci control info structure
339 struct edac_pci_ctl_info {
340 /* for global list of edac_pci_ctl_info structs */
341 struct list_head link;
345 struct bus_type *edac_subsys; /* pointer to subsystem */
347 /* the internal state of this controller instance */
349 /* work struct for this instance */
350 struct delayed_work work;
352 /* pointer to edac polling checking routine:
353 * If NOT NULL: points to polling check routine
354 * If NULL: Then assumes INTERRUPT operation, where
355 * MC driver will receive events
357 void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
359 struct device *dev; /* pointer to device structure */
361 const char *mod_name; /* module name */
362 const char *ctl_name; /* edac controller name */
363 const char *dev_name; /* pci/platform/etc... name */
365 void *pvt_info; /* pointer to 'private driver' info */
367 unsigned long start_time; /* edac_pci load start time (jiffies) */
369 struct completion complete;
371 /* sysfs top name under 'edac' directory
378 char name[EDAC_DEVICE_NAME_LEN + 1];
380 /* Event counters for the this whole EDAC Device */
381 struct edac_pci_counter counters;
383 /* edac sysfs device control for the 'name'
384 * device this structure controls
387 struct completion kobj_complete;
390 #define to_edac_pci_ctl_work(w) \
391 container_of(w, struct edac_pci_ctl_info,work)
393 /* write all or some bits in a byte-register*/
394 static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
400 pci_read_config_byte(pdev, offset, &buf);
406 pci_write_config_byte(pdev, offset, value);
409 /* write all or some bits in a word-register*/
410 static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
413 if (mask != 0xffff) {
416 pci_read_config_word(pdev, offset, &buf);
422 pci_write_config_word(pdev, offset, value);
428 * edac local routine to do pci_write_config_dword, but adds
429 * a mask parameter. If mask is all ones, ignore the mask.
430 * Otherwise utilize the mask to isolate specified bits
432 * write all or some bits in a dword-register
434 static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
437 if (mask != 0xffffffff) {
440 pci_read_config_dword(pdev, offset, &buf);
446 pci_write_config_dword(pdev, offset, value);
449 #endif /* CONFIG_PCI */
451 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
453 struct edac_mc_layer *layers,
455 extern int edac_mc_add_mc(struct mem_ctl_info *mci);
456 extern void edac_mc_free(struct mem_ctl_info *mci);
457 extern struct mem_ctl_info *edac_mc_find(int idx);
458 extern struct mem_ctl_info *find_mci_by_dev(struct device *dev);
459 extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);
460 extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
462 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
463 struct mem_ctl_info *mci,
464 const unsigned long page_frame_number,
465 const unsigned long offset_in_page,
466 const unsigned long syndrome,
471 const char *other_detail,
472 const void *arch_log);
477 extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
478 extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
479 extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
480 int inst_nr, int block_nr, const char *msg);
481 extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
482 int inst_nr, int block_nr, const char *msg);
483 extern int edac_device_alloc_index(void);
484 extern const char *edac_layer_name[];
489 extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
490 const char *edac_pci_name);
492 extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
494 extern void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
495 unsigned long value);
497 extern int edac_pci_alloc_index(void);
498 extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
499 extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
501 extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
503 const char *mod_name);
505 extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
506 extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
507 extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
512 extern char *edac_op_state_to_string(int op_state);
514 #endif /* _EDAC_CORE_H_ */