2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
56 select DMA_VIRTUAL_CHANNELS
58 Platform has a PL08x DMAC device
59 which can provide DMA engine support
62 tristate "Intel I/OAT DMA support"
66 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
72 Say Y here if you have such a chipset.
77 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
80 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
82 Enable support for the Intel(R) IOP Series RAID engines.
85 tristate "Synopsys DesignWare AHB DMA support"
87 default y if CPU_AT32AP7000
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
92 config DW_DMAC_BIG_ENDIAN_IO
93 bool "Use big endian I/O register access"
97 Say yes here to use big endian I/O access when reading and writing
98 to the DMA controller registers. This is needed on some platforms,
99 like the Atmel AVR32 architecture.
101 If unsure, use the default setting.
104 tristate "Atmel AHB DMA support"
108 Support the Atmel AHB DMA controller.
111 tristate "Freescale Elo and Elo Plus DMA support"
114 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
116 Enable support for the Freescale Elo and Elo Plus DMA controllers.
117 The Elo is the DMA controller on some 82xx and 83xx parts, and the
118 Elo Plus is the DMA controller on 85xx and 86xx parts.
121 tristate "Freescale MPC512x built-in DMA engine support"
122 depends on PPC_MPC512x || PPC_MPC831x
125 Enable support for the Freescale MPC512x built-in DMA engine.
128 bool "Marvell XOR engine support"
129 depends on PLAT_ORION
131 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
133 Enable support for the Marvell XOR engine.
136 bool "MX3x Image Processing Unit support"
141 If you plan to use the Image Processing unit in the i.MX3x, say
142 Y here. If unsure, select Y.
145 int "Number of dynamically mapped interrupts for IPU"
150 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
151 To avoid bloating the irq_desc[] array we allocate a sufficient
152 number of IRQ slots and map them dynamically to specific sources.
155 tristate "Toshiba TXx9 SoC DMA support"
156 depends on MACH_TX49XX || MACH_TX39XX
159 Support the TXx9 SoC internal DMA controller. This can be
160 integrated in chips such as the Toshiba TX4927/38/39.
162 config TEGRA20_APB_DMA
163 bool "NVIDIA Tegra20 APB DMA support"
164 depends on ARCH_TEGRA
167 Support for the NVIDIA Tegra20 APB DMA controller driver. The
168 DMA controller is having multiple DMA channel which can be
169 configured for different peripherals like audio, UART, SPI,
170 I2C etc which is in APB bus.
171 This DMA controller transfers data from memory to peripheral fifo
172 or vice versa. It does not support memory to memory data transfer.
177 tristate "Renesas SuperH DMAC support"
178 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
179 depends on !SH_DMA_API
182 Enable support for the Renesas SuperH DMA controllers.
185 bool "ST-Ericsson COH901318 DMA support"
189 Enable support for ST-Ericsson COH 901 318 DMA.
192 bool "ST-Ericsson DMA40 support"
193 depends on ARCH_U8500
196 Support for ST-Ericsson DMA40 controller
198 config AMCC_PPC440SPE_ADMA
199 tristate "AMCC PPC440SPe ADMA support"
200 depends on 440SPe || 440SP
202 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
203 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
205 Enable support for the AMCC PPC440SPe RAID engines.
208 tristate "Timberdale FPGA DMA support"
209 depends on MFD_TIMBERDALE || HAS_IOMEM
212 Enable support for the Timberdale FPGA DMA engine.
215 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
219 Enable support for the CSR SiRFprimaII DMA engine.
222 tristate "TI EDMA support"
223 depends on ARCH_DAVINCI
225 select DMA_VIRTUAL_CHANNELS
228 Enable support for the TI EDMA controller. This DMA
229 engine is found on TI DaVinci and AM33xx parts.
231 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
235 tristate "DMA API Driver for PL330"
239 Select if your platform has one or more PL330 DMACs.
240 You need to provide platform specific settings via
241 platform_data for a dma-pl330 device.
244 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
245 depends on PCI && X86
248 Enable support for Intel EG20T PCH DMA engine.
250 This driver also can be used for LAPIS Semiconductor IOH(Input/
251 Output Hub), ML7213, ML7223 and ML7831.
252 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
253 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
254 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
255 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
258 tristate "i.MX SDMA support"
262 Support the i.MX SDMA engine. This engine is integrated into
263 Freescale i.MX25/31/35/51/53 chips.
266 tristate "i.MX DMA support"
270 Support the i.MX DMA engine. This engine is integrated into
271 Freescale i.MX1/21/27 chips.
274 bool "MXS DMA support"
275 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
279 Support the MXS DMA engine. This engine including APBH-DMA
280 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
283 bool "Cirrus Logic EP93xx DMA support"
284 depends on ARCH_EP93XX
287 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
290 tristate "SA-11x0 DMA support"
291 depends on ARCH_SA1100
293 select DMA_VIRTUAL_CHANNELS
295 Support the DMA engine found on Intel StrongARM SA-1100 and
296 SA-1110 SoCs. This DMA engine can only be used with on-chip
300 bool "MMP Two-Channel DMA support"
304 Support the MMP Two-Channel DMA engine.
305 This engine used for MMP Audio DMA and pxa910 SQU.
307 Say Y here if you enabled MMP ADMA, otherwise say N.
310 tristate "OMAP DMA support"
313 select DMA_VIRTUAL_CHANNELS
316 bool "MMP PDMA support"
317 depends on (ARCH_MMP || ARCH_PXA)
320 Support the MMP PDMA engine for PXA and MMP platfrom.
325 config DMA_VIRTUAL_CHANNELS
328 comment "DMA Clients"
329 depends on DMA_ENGINE
332 bool "Network: TCP receive copy offload"
333 depends on DMA_ENGINE && NET
334 default (INTEL_IOATDMA || FSL_DMA)
336 This enables the use of DMA engines in the network stack to
337 offload receive copy-to-user operations, freeing CPU cycles.
339 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
343 bool "Async_tx: Offload support for the async_tx api"
344 depends on DMA_ENGINE
346 This allows the async_tx api to take advantage of offload engines for
347 memcpy, memset, xor, and raid6 p+q operations. If your platform has
348 a dma engine that can perform raid operations and you have enabled
354 tristate "DMA Test client"
355 depends on DMA_ENGINE
357 Simple DMA test client. Say N unless you're debugging a