2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define SAMPLE_COUNT 3
37 #define BYT_RATIOS 0x66a
38 #define BYT_VIDS 0x66b
39 #define BYT_TURBO_RATIOS 0x66c
40 #define BYT_TURBO_VIDS 0x66d
44 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
45 #define fp_toint(X) ((X) >> FRAC_BITS)
48 static inline int32_t mul_fp(int32_t x, int32_t y)
50 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
53 static inline int32_t div_fp(int32_t x, int32_t y)
55 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
59 int32_t core_pct_busy;
95 struct timer_list timer;
97 struct pstate_data pstate;
101 ktime_t last_sample_time;
104 struct sample sample;
107 static struct cpudata **all_cpu_data;
108 struct pstate_adjust_policy {
117 struct pstate_funcs {
118 int (*get_max)(void);
119 int (*get_min)(void);
120 int (*get_turbo)(void);
121 void (*set)(struct cpudata*, int pstate);
122 void (*get_vid)(struct cpudata *);
125 struct cpu_defaults {
126 struct pstate_adjust_policy pid_policy;
127 struct pstate_funcs funcs;
130 static struct pstate_adjust_policy pid_params;
131 static struct pstate_funcs pstate_funcs;
143 static struct perf_limits limits = {
146 .max_perf = int_tofp(1),
149 .max_policy_pct = 100,
150 .max_sysfs_pct = 100,
153 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
154 int deadband, int integral) {
155 pid->setpoint = setpoint;
156 pid->deadband = deadband;
157 pid->integral = int_tofp(integral);
158 pid->last_err = int_tofp(setpoint) - int_tofp(busy);
161 static inline void pid_p_gain_set(struct _pid *pid, int percent)
163 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
166 static inline void pid_i_gain_set(struct _pid *pid, int percent)
168 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
171 static inline void pid_d_gain_set(struct _pid *pid, int percent)
174 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
177 static signed int pid_calc(struct _pid *pid, int32_t busy)
180 int32_t pterm, dterm, fp_error;
181 int32_t integral_limit;
183 fp_error = int_tofp(pid->setpoint) - busy;
185 if (abs(fp_error) <= int_tofp(pid->deadband))
188 pterm = mul_fp(pid->p_gain, fp_error);
190 pid->integral += fp_error;
192 /* limit the integral term */
193 integral_limit = int_tofp(30);
194 if (pid->integral > integral_limit)
195 pid->integral = integral_limit;
196 if (pid->integral < -integral_limit)
197 pid->integral = -integral_limit;
199 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
200 pid->last_err = fp_error;
202 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
204 result = result + (1 << (FRAC_BITS-1));
206 result = result - (1 << (FRAC_BITS-1));
207 return (signed int)fp_toint(result);
210 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
212 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
213 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
214 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
223 static inline void intel_pstate_reset_all_pid(void)
226 for_each_online_cpu(cpu) {
227 if (all_cpu_data[cpu])
228 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
232 /************************** debugfs begin ************************/
233 static int pid_param_set(void *data, u64 val)
236 intel_pstate_reset_all_pid();
239 static int pid_param_get(void *data, u64 *val)
244 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
245 pid_param_set, "%llu\n");
252 static struct pid_param pid_files[] = {
253 {"sample_rate_ms", &pid_params.sample_rate_ms},
254 {"d_gain_pct", &pid_params.d_gain_pct},
255 {"i_gain_pct", &pid_params.i_gain_pct},
256 {"deadband", &pid_params.deadband},
257 {"setpoint", &pid_params.setpoint},
258 {"p_gain_pct", &pid_params.p_gain_pct},
262 static struct dentry *debugfs_parent;
263 static void intel_pstate_debug_expose_params(void)
267 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
268 if (IS_ERR_OR_NULL(debugfs_parent))
270 while (pid_files[i].name) {
271 debugfs_create_file(pid_files[i].name, 0660,
272 debugfs_parent, pid_files[i].value,
278 /************************** debugfs end ************************/
280 /************************** sysfs begin ************************/
281 #define show_one(file_name, object) \
282 static ssize_t show_##file_name \
283 (struct kobject *kobj, struct attribute *attr, char *buf) \
285 return sprintf(buf, "%u\n", limits.object); \
288 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
289 const char *buf, size_t count)
293 ret = sscanf(buf, "%u", &input);
296 limits.no_turbo = clamp_t(int, input, 0 , 1);
301 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
302 const char *buf, size_t count)
306 ret = sscanf(buf, "%u", &input);
310 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
311 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
312 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
316 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
317 const char *buf, size_t count)
321 ret = sscanf(buf, "%u", &input);
324 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
325 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
330 show_one(no_turbo, no_turbo);
331 show_one(max_perf_pct, max_perf_pct);
332 show_one(min_perf_pct, min_perf_pct);
334 define_one_global_rw(no_turbo);
335 define_one_global_rw(max_perf_pct);
336 define_one_global_rw(min_perf_pct);
338 static struct attribute *intel_pstate_attributes[] = {
345 static struct attribute_group intel_pstate_attr_group = {
346 .attrs = intel_pstate_attributes,
348 static struct kobject *intel_pstate_kobject;
350 static void intel_pstate_sysfs_expose_params(void)
354 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
355 &cpu_subsys.dev_root->kobj);
356 BUG_ON(!intel_pstate_kobject);
357 rc = sysfs_create_group(intel_pstate_kobject,
358 &intel_pstate_attr_group);
362 /************************** sysfs end ************************/
363 static int byt_get_min_pstate(void)
366 rdmsrl(BYT_RATIOS, value);
367 return (value >> 8) & 0x3F;
370 static int byt_get_max_pstate(void)
373 rdmsrl(BYT_RATIOS, value);
374 return (value >> 16) & 0x3F;
377 static int byt_get_turbo_pstate(void)
380 rdmsrl(BYT_TURBO_RATIOS, value);
384 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
394 vid_fp = cpudata->vid.min + mul_fp(
395 int_tofp(pstate - cpudata->pstate.min_pstate),
398 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
399 vid = fp_toint(vid_fp);
401 if (pstate > cpudata->pstate.max_pstate)
402 vid = cpudata->vid.turbo;
406 wrmsrl(MSR_IA32_PERF_CTL, val);
409 static void byt_get_vid(struct cpudata *cpudata)
414 rdmsrl(BYT_VIDS, value);
415 cpudata->vid.min = int_tofp((value >> 8) & 0x3f);
416 cpudata->vid.max = int_tofp((value >> 16) & 0x3f);
417 cpudata->vid.ratio = div_fp(
418 cpudata->vid.max - cpudata->vid.min,
419 int_tofp(cpudata->pstate.max_pstate -
420 cpudata->pstate.min_pstate));
422 rdmsrl(BYT_TURBO_VIDS, value);
423 cpudata->vid.turbo = value & 0x7f;
427 static int core_get_min_pstate(void)
430 rdmsrl(MSR_PLATFORM_INFO, value);
431 return (value >> 40) & 0xFF;
434 static int core_get_max_pstate(void)
437 rdmsrl(MSR_PLATFORM_INFO, value);
438 return (value >> 8) & 0xFF;
441 static int core_get_turbo_pstate(void)
445 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
446 nont = core_get_max_pstate();
447 ret = ((value) & 255);
453 static void core_set_pstate(struct cpudata *cpudata, int pstate)
461 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
464 static struct cpu_defaults core_params = {
466 .sample_rate_ms = 10,
474 .get_max = core_get_max_pstate,
475 .get_min = core_get_min_pstate,
476 .get_turbo = core_get_turbo_pstate,
477 .set = core_set_pstate,
481 static struct cpu_defaults byt_params = {
483 .sample_rate_ms = 10,
491 .get_max = byt_get_max_pstate,
492 .get_min = byt_get_min_pstate,
493 .get_turbo = byt_get_turbo_pstate,
494 .set = byt_set_pstate,
495 .get_vid = byt_get_vid,
500 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
502 int max_perf = cpu->pstate.turbo_pstate;
506 max_perf = cpu->pstate.max_pstate;
508 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
509 *max = clamp_t(int, max_perf_adj,
510 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
512 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
513 *min = clamp_t(int, min_perf,
514 cpu->pstate.min_pstate, max_perf);
517 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
519 int max_perf, min_perf;
521 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
523 pstate = clamp_t(int, pstate, min_perf, max_perf);
525 if (pstate == cpu->pstate.current_pstate)
528 trace_cpu_frequency(pstate * 100000, cpu->cpu);
530 cpu->pstate.current_pstate = pstate;
532 pstate_funcs.set(cpu, pstate);
535 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
538 target = cpu->pstate.current_pstate + steps;
540 intel_pstate_set_pstate(cpu, target);
543 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
546 target = cpu->pstate.current_pstate - steps;
547 intel_pstate_set_pstate(cpu, target);
550 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
552 sprintf(cpu->name, "Intel 2nd generation core");
554 cpu->pstate.min_pstate = pstate_funcs.get_min();
555 cpu->pstate.max_pstate = pstate_funcs.get_max();
556 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
558 if (pstate_funcs.get_vid)
559 pstate_funcs.get_vid(cpu);
560 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
563 static inline void intel_pstate_calc_busy(struct cpudata *cpu,
564 struct sample *sample)
569 core_pct = int_tofp(sample->aperf) * int_tofp(100);
570 core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem);
572 if ((rem << 1) >= int_tofp(sample->mperf))
575 sample->freq = fp_toint(
576 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
578 sample->core_pct_busy = (int32_t)core_pct;
581 static inline void intel_pstate_sample(struct cpudata *cpu)
585 rdmsrl(MSR_IA32_APERF, aperf);
586 rdmsrl(MSR_IA32_MPERF, mperf);
588 aperf = aperf >> FRAC_BITS;
589 mperf = mperf >> FRAC_BITS;
591 cpu->last_sample_time = cpu->sample.time;
592 cpu->sample.time = ktime_get();
593 cpu->sample.aperf = aperf;
594 cpu->sample.mperf = mperf;
595 cpu->sample.aperf -= cpu->prev_aperf;
596 cpu->sample.mperf -= cpu->prev_mperf;
598 intel_pstate_calc_busy(cpu, &cpu->sample);
600 cpu->prev_aperf = aperf;
601 cpu->prev_mperf = mperf;
604 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
606 int sample_time, delay;
608 sample_time = pid_params.sample_rate_ms;
609 delay = msecs_to_jiffies(sample_time);
610 mod_timer_pinned(&cpu->timer, jiffies + delay);
613 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
615 int32_t core_busy, max_pstate, current_pstate, sample_ratio;
619 core_busy = cpu->sample.core_pct_busy;
620 max_pstate = int_tofp(cpu->pstate.max_pstate);
621 current_pstate = int_tofp(cpu->pstate.current_pstate);
622 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
624 sample_time = (pid_params.sample_rate_ms * USEC_PER_MSEC);
625 duration_us = (u32) ktime_us_delta(cpu->sample.time,
626 cpu->last_sample_time);
627 if (duration_us > sample_time * 3) {
628 sample_ratio = div_fp(int_tofp(sample_time),
629 int_tofp(duration_us));
630 core_busy = mul_fp(core_busy, sample_ratio);
636 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
644 busy_scaled = intel_pstate_get_scaled_busy(cpu);
646 ctl = pid_calc(pid, busy_scaled);
651 intel_pstate_pstate_increase(cpu, steps);
653 intel_pstate_pstate_decrease(cpu, steps);
656 static void intel_pstate_timer_func(unsigned long __data)
658 struct cpudata *cpu = (struct cpudata *) __data;
659 struct sample *sample;
661 intel_pstate_sample(cpu);
663 sample = &cpu->sample;
665 intel_pstate_adjust_busy_pstate(cpu);
667 trace_pstate_sample(fp_toint(sample->core_pct_busy),
668 fp_toint(intel_pstate_get_scaled_busy(cpu)),
669 cpu->pstate.current_pstate,
674 intel_pstate_set_sample_time(cpu);
677 #define ICPU(model, policy) \
678 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
679 (unsigned long)&policy }
681 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
682 ICPU(0x2a, core_params),
683 ICPU(0x2d, core_params),
684 ICPU(0x37, byt_params),
685 ICPU(0x3a, core_params),
686 ICPU(0x3c, core_params),
687 ICPU(0x3e, core_params),
688 ICPU(0x3f, core_params),
689 ICPU(0x45, core_params),
690 ICPU(0x46, core_params),
693 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
695 static int intel_pstate_init_cpu(unsigned int cpunum)
698 const struct x86_cpu_id *id;
701 id = x86_match_cpu(intel_pstate_cpu_ids);
705 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
706 if (!all_cpu_data[cpunum])
709 cpu = all_cpu_data[cpunum];
711 intel_pstate_get_cpu_pstates(cpu);
715 init_timer_deferrable(&cpu->timer);
716 cpu->timer.function = intel_pstate_timer_func;
719 cpu->timer.expires = jiffies + HZ/100;
720 intel_pstate_busy_pid_reset(cpu);
721 intel_pstate_sample(cpu);
723 add_timer_on(&cpu->timer, cpunum);
725 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
730 static unsigned int intel_pstate_get(unsigned int cpu_num)
732 struct sample *sample;
735 cpu = all_cpu_data[cpu_num];
738 sample = &cpu->sample;
742 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
746 cpu = all_cpu_data[policy->cpu];
748 if (!policy->cpuinfo.max_freq)
751 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
752 limits.min_perf_pct = 100;
753 limits.min_perf = int_tofp(1);
754 limits.max_perf_pct = 100;
755 limits.max_perf = int_tofp(1);
759 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
760 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
761 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
763 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
764 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
765 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
766 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
771 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
773 cpufreq_verify_within_cpu_limits(policy);
775 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
776 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
782 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
784 int cpu_num = policy->cpu;
785 struct cpudata *cpu = all_cpu_data[cpu_num];
787 pr_info("intel_pstate CPU %d exiting\n", cpu_num);
789 del_timer_sync(&all_cpu_data[cpu_num]->timer);
790 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
791 kfree(all_cpu_data[cpu_num]);
792 all_cpu_data[cpu_num] = NULL;
795 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
800 rc = intel_pstate_init_cpu(policy->cpu);
804 cpu = all_cpu_data[policy->cpu];
806 if (!limits.no_turbo &&
807 limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
808 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
810 policy->policy = CPUFREQ_POLICY_POWERSAVE;
812 policy->min = cpu->pstate.min_pstate * 100000;
813 policy->max = cpu->pstate.turbo_pstate * 100000;
815 /* cpuinfo and default policy values */
816 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
817 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
818 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
819 cpumask_set_cpu(policy->cpu, policy->cpus);
824 static struct cpufreq_driver intel_pstate_driver = {
825 .flags = CPUFREQ_CONST_LOOPS,
826 .verify = intel_pstate_verify_policy,
827 .setpolicy = intel_pstate_set_policy,
828 .get = intel_pstate_get,
829 .init = intel_pstate_cpu_init,
830 .stop_cpu = intel_pstate_stop_cpu,
831 .name = "intel_pstate",
834 static int __initdata no_load;
836 static int intel_pstate_msrs_not_valid(void)
838 /* Check that all the msr's we are using are valid. */
839 u64 aperf, mperf, tmp;
841 rdmsrl(MSR_IA32_APERF, aperf);
842 rdmsrl(MSR_IA32_MPERF, mperf);
844 if (!pstate_funcs.get_max() ||
845 !pstate_funcs.get_min() ||
846 !pstate_funcs.get_turbo())
849 rdmsrl(MSR_IA32_APERF, tmp);
853 rdmsrl(MSR_IA32_MPERF, tmp);
860 static void copy_pid_params(struct pstate_adjust_policy *policy)
862 pid_params.sample_rate_ms = policy->sample_rate_ms;
863 pid_params.p_gain_pct = policy->p_gain_pct;
864 pid_params.i_gain_pct = policy->i_gain_pct;
865 pid_params.d_gain_pct = policy->d_gain_pct;
866 pid_params.deadband = policy->deadband;
867 pid_params.setpoint = policy->setpoint;
870 static void copy_cpu_funcs(struct pstate_funcs *funcs)
872 pstate_funcs.get_max = funcs->get_max;
873 pstate_funcs.get_min = funcs->get_min;
874 pstate_funcs.get_turbo = funcs->get_turbo;
875 pstate_funcs.set = funcs->set;
876 pstate_funcs.get_vid = funcs->get_vid;
879 #if IS_ENABLED(CONFIG_ACPI)
880 #include <acpi/processor.h>
882 static bool intel_pstate_no_acpi_pss(void)
886 for_each_possible_cpu(i) {
888 union acpi_object *pss;
889 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
890 struct acpi_processor *pr = per_cpu(processors, i);
895 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
896 if (ACPI_FAILURE(status))
899 pss = buffer.pointer;
900 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
911 struct hw_vendor_info {
913 char oem_id[ACPI_OEM_ID_SIZE];
914 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
917 /* Hardware vendor-specific info that has its own power management modes */
918 static struct hw_vendor_info vendor_info[] = {
919 {1, "HP ", "ProLiant"},
923 static bool intel_pstate_platform_pwr_mgmt_exists(void)
925 struct acpi_table_header hdr;
926 struct hw_vendor_info *v_info;
929 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
932 for (v_info = vendor_info; v_info->valid; v_info++) {
933 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
934 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
935 && intel_pstate_no_acpi_pss())
941 #else /* CONFIG_ACPI not enabled */
942 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
943 #endif /* CONFIG_ACPI */
945 static int __init intel_pstate_init(void)
948 const struct x86_cpu_id *id;
949 struct cpu_defaults *cpu_info;
954 id = x86_match_cpu(intel_pstate_cpu_ids);
959 * The Intel pstate driver will be ignored if the platform
960 * firmware has its own power management modes.
962 if (intel_pstate_platform_pwr_mgmt_exists())
965 cpu_info = (struct cpu_defaults *)id->driver_data;
967 copy_pid_params(&cpu_info->pid_policy);
968 copy_cpu_funcs(&cpu_info->funcs);
970 if (intel_pstate_msrs_not_valid())
973 pr_info("Intel P-state driver initializing.\n");
975 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
979 rc = cpufreq_register_driver(&intel_pstate_driver);
983 intel_pstate_debug_expose_params();
984 intel_pstate_sysfs_expose_params();
989 for_each_online_cpu(cpu) {
990 if (all_cpu_data[cpu]) {
991 del_timer_sync(&all_cpu_data[cpu]->timer);
992 kfree(all_cpu_data[cpu]);
1000 device_initcall(intel_pstate_init);
1002 static int __init intel_pstate_setup(char *str)
1007 if (!strcmp(str, "disable"))
1011 early_param("intel_pstate", intel_pstate_setup);
1013 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1014 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1015 MODULE_LICENSE("GPL");