2 * intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets)
4 * (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
15 * The TCO watchdog is implemented in the following I/O controller hubs:
16 * (See the intel documentation on http://developer.intel.com.)
17 * 82801AA (ICH) : document number 290655-003, 290677-014,
18 * 82801AB (ICHO) : document number 290655-003, 290677-014,
19 * 82801BA (ICH2) : document number 290687-002, 298242-027,
20 * 82801BAM (ICH2-M) : document number 290687-002, 298242-027,
21 * 82801CA (ICH3-S) : document number 290733-003, 290739-013,
22 * 82801CAM (ICH3-M) : document number 290716-001, 290718-007,
23 * 82801DB (ICH4) : document number 290744-001, 290745-020,
24 * 82801DBM (ICH4-M) : document number 252337-001, 252663-005,
25 * 82801E (C-ICH) : document number 273599-001, 273645-002,
26 * 82801EB (ICH5) : document number 252516-001, 252517-003,
27 * 82801ER (ICH5R) : document number 252516-001, 252517-003,
28 * 82801FB (ICH6) : document number 301473-002, 301474-007,
29 * 82801FR (ICH6R) : document number 301473-002, 301474-007,
30 * 82801FBM (ICH6-M) : document number 301473-002, 301474-007,
31 * 82801FW (ICH6W) : document number 301473-001, 301474-007,
32 * 82801FRW (ICH6RW) : document number 301473-001, 301474-007,
33 * 82801GB (ICH7) : document number 307013-002, 307014-009,
34 * 82801GR (ICH7R) : document number 307013-002, 307014-009,
35 * 82801GDH (ICH7DH) : document number 307013-002, 307014-009,
36 * 82801GBM (ICH7-M) : document number 307013-002, 307014-009,
37 * 82801GHM (ICH7-M DH) : document number 307013-002, 307014-009,
38 * 6300ESB (6300ESB) : document number 300641-003
42 * Includes, defines, variables, module parameters, ...
45 /* Module and version information */
46 #define DRV_NAME "iTCO_wdt"
47 #define DRV_VERSION "1.00"
48 #define DRV_RELDATE "19-Jul-2006"
49 #define PFX DRV_NAME ": "
52 #include <linux/config.h> /* For CONFIG_WATCHDOG_NOWAYOUT/... */
53 #include <linux/module.h> /* For module specific items */
54 #include <linux/moduleparam.h> /* For new moduleparam's */
55 #include <linux/types.h> /* For standard types (like size_t) */
56 #include <linux/errno.h> /* For the -ENODEV/... values */
57 #include <linux/kernel.h> /* For printk/panic/... */
58 #include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */
59 #include <linux/watchdog.h> /* For the watchdog specific items */
60 #include <linux/notifier.h> /* For notifier support */
61 #include <linux/reboot.h> /* For reboot_notifier stuff */
62 #include <linux/init.h> /* For __init/__exit/... */
63 #include <linux/fs.h> /* For file operations */
64 #include <linux/platform_device.h> /* For platform_driver framework */
65 #include <linux/pci.h> /* For pci functions */
66 #include <linux/ioport.h> /* For io-port access */
67 #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
69 #include <asm/uaccess.h> /* For copy_to_user/put_user/... */
70 #include <asm/io.h> /* For inb/outb/... */
72 /* TCO related info */
74 TCO_ICH = 0, /* ICH */
77 TCO_ICH2M, /* ICH2-M */
78 TCO_ICH3, /* ICH3-S */
79 TCO_ICH3M, /* ICH3-M */
81 TCO_ICH4M, /* ICH4-M */
83 TCO_ICH5, /* ICH5 & ICH5R */
84 TCO_6300ESB, /* 6300ESB */
85 TCO_ICH6, /* ICH6 & ICH6R */
86 TCO_ICH6M, /* ICH6-M */
87 TCO_ICH6W, /* ICH6W & ICH6RW */
88 TCO_ICH7, /* ICH7 & ICH7R */
89 TCO_ICH7M, /* ICH7-M */
90 TCO_ICH7MDH, /* ICH7-M DH */
95 unsigned int iTCO_version;
96 } iTCO_chipset_info[] __devinitdata = {
106 {"ICH5 or ICH5R", 1},
108 {"ICH6 or ICH6R", 2},
110 {"ICH6W or ICH6RW", 2},
111 {"ICH7 or ICH7R", 2},
118 * This data only exists for exporting the supported PCI ids
119 * via MODULE_DEVICE_TABLE. We do not actually register a
120 * pci_driver, because the I/O Controller Hub has also other
121 * functions that probably will be registered by other drivers.
123 static struct pci_device_id iTCO_wdt_pci_tbl[] = {
124 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH },
125 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH0 },
126 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH2 },
127 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH2M },
128 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH3 },
129 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH3M },
130 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH4 },
131 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH4M },
132 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_CICH },
133 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH5 },
134 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_6300ESB },
135 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH6 },
136 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH6M },
137 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH6W },
138 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH7 },
139 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH7M },
140 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH7MDH },
141 { 0, }, /* End of list */
143 MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
145 /* Address definitions for the TCO */
146 #define TCOBASE iTCO_wdt_private.ACPIBASE + 0x60 /* TCO base address */
147 #define SMI_EN iTCO_wdt_private.ACPIBASE + 0x30 /* SMI Control and Enable Register */
149 #define TCO_RLD TCOBASE + 0x00 /* TCO Timer Reload and Current Value */
150 #define TCOv1_TMR TCOBASE + 0x01 /* TCOv1 Timer Initial Value */
151 #define TCO_DAT_IN TCOBASE + 0x02 /* TCO Data In Register */
152 #define TCO_DAT_OUT TCOBASE + 0x03 /* TCO Data Out Register */
153 #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */
154 #define TCO2_STS TCOBASE + 0x06 /* TCO2 Status Register */
155 #define TCO1_CNT TCOBASE + 0x08 /* TCO1 Control Register */
156 #define TCO2_CNT TCOBASE + 0x0a /* TCO2 Control Register */
157 #define TCOv2_TMR TCOBASE + 0x12 /* TCOv2 Timer Initial Value */
159 /* internal variables */
160 static unsigned long is_active;
161 static char expect_release;
162 static struct { /* this is private data for the iTCO_wdt device */
163 unsigned int iTCO_version; /* TCO version/generation */
164 unsigned long ACPIBASE; /* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
165 unsigned long __iomem *gcs; /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2) */
166 spinlock_t io_lock; /* the lock for io operations */
167 struct pci_dev *pdev; /* the PCI-device */
170 static struct platform_device *iTCO_wdt_platform_device; /* the watchdog platform device */
172 /* module parameters */
173 #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
174 static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
175 module_param(heartbeat, int, 0);
176 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39 (TCO v1) or 613 (TCO v2), default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
178 static int nowayout = WATCHDOG_NOWAYOUT;
179 module_param(nowayout, int, 0);
180 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
183 * Some TCO specific functions
186 static inline unsigned int seconds_to_ticks(int seconds)
188 /* the internal timer is stored as ticks which decrement
189 * every 0.6 seconds */
190 return (seconds * 10) / 6;
193 static void iTCO_wdt_set_NO_REBOOT_bit(void)
197 /* Set the NO_REBOOT bit: this disables reboots */
198 if (iTCO_wdt_private.iTCO_version == 2) {
199 val32 = readl(iTCO_wdt_private.gcs);
201 writel(val32, iTCO_wdt_private.gcs);
202 } else if (iTCO_wdt_private.iTCO_version == 1) {
203 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
205 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
209 static int iTCO_wdt_unset_NO_REBOOT_bit(void)
214 /* Unset the NO_REBOOT bit: this enables reboots */
215 if (iTCO_wdt_private.iTCO_version == 2) {
216 val32 = readl(iTCO_wdt_private.gcs);
218 writel(val32, iTCO_wdt_private.gcs);
220 val32 = readl(iTCO_wdt_private.gcs);
221 if (val32 & 0x00000020)
223 } else if (iTCO_wdt_private.iTCO_version == 1) {
224 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
226 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
228 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
229 if (val32 & 0x00000002)
233 return ret; /* returns: 0 = OK, -EIO = Error */
236 static int iTCO_wdt_start(void)
240 spin_lock(&iTCO_wdt_private.io_lock);
242 /* disable chipset's NO_REBOOT bit */
243 if (iTCO_wdt_unset_NO_REBOOT_bit()) {
244 printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
248 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
253 spin_unlock(&iTCO_wdt_private.io_lock);
260 static int iTCO_wdt_stop(void)
264 spin_lock(&iTCO_wdt_private.io_lock);
266 /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
272 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
273 iTCO_wdt_set_NO_REBOOT_bit();
275 spin_unlock(&iTCO_wdt_private.io_lock);
277 if ((val & 0x0800) == 0)
282 static int iTCO_wdt_keepalive(void)
284 spin_lock(&iTCO_wdt_private.io_lock);
286 /* Reload the timer by writing to the TCO Timer Counter register */
287 if (iTCO_wdt_private.iTCO_version == 2) {
289 } else if (iTCO_wdt_private.iTCO_version == 1) {
293 spin_unlock(&iTCO_wdt_private.io_lock);
297 static int iTCO_wdt_set_heartbeat(int t)
303 tmrval = seconds_to_ticks(t);
304 /* from the specs: */
305 /* "Values of 0h-3h are ignored and should not be attempted" */
308 if (((iTCO_wdt_private.iTCO_version == 2) && (tmrval > 0x3ff)) ||
309 ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f)))
312 /* Write new heartbeat to watchdog */
313 if (iTCO_wdt_private.iTCO_version == 2) {
314 spin_lock(&iTCO_wdt_private.io_lock);
315 val16 = inw(TCOv2_TMR);
318 outw(val16, TCOv2_TMR);
319 val16 = inw(TCOv2_TMR);
320 spin_unlock(&iTCO_wdt_private.io_lock);
322 if ((val16 & 0x3ff) != tmrval)
324 } else if (iTCO_wdt_private.iTCO_version == 1) {
325 spin_lock(&iTCO_wdt_private.io_lock);
326 val8 = inb(TCOv1_TMR);
328 val8 |= (tmrval & 0xff);
329 outb(val8, TCOv1_TMR);
330 val8 = inb(TCOv1_TMR);
331 spin_unlock(&iTCO_wdt_private.io_lock);
333 if ((val8 & 0x3f) != tmrval)
341 static int iTCO_wdt_get_timeleft (int *time_left)
346 /* read the TCO Timer */
347 if (iTCO_wdt_private.iTCO_version == 2) {
348 spin_lock(&iTCO_wdt_private.io_lock);
349 val16 = inw(TCO_RLD);
351 spin_unlock(&iTCO_wdt_private.io_lock);
353 *time_left = (val16 * 6) / 10;
354 } else if (iTCO_wdt_private.iTCO_version == 1) {
355 spin_lock(&iTCO_wdt_private.io_lock);
358 spin_unlock(&iTCO_wdt_private.io_lock);
360 *time_left = (val8 * 6) / 10;
366 * /dev/watchdog handling
369 static int iTCO_wdt_open (struct inode *inode, struct file *file)
371 /* /dev/watchdog can only be opened once */
372 if (test_and_set_bit(0, &is_active))
376 * Reload and activate timer
378 iTCO_wdt_keepalive();
380 return nonseekable_open(inode, file);
383 static int iTCO_wdt_release (struct inode *inode, struct file *file)
386 * Shut off the timer.
388 if (expect_release == 42) {
391 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
392 iTCO_wdt_keepalive();
394 clear_bit(0, &is_active);
399 static ssize_t iTCO_wdt_write (struct file *file, const char __user *data,
400 size_t len, loff_t * ppos)
402 /* See if we got the magic character 'V' and reload the timer */
407 /* note: just in case someone wrote the magic character
408 * five months ago... */
411 /* scan to see whether or not we got the magic character */
412 for (i = 0; i != len; i++) {
414 if (get_user(c, data+i))
421 /* someone wrote to us, we should reload the timer */
422 iTCO_wdt_keepalive();
427 static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
428 unsigned int cmd, unsigned long arg)
430 int new_options, retval = -EINVAL;
433 void __user *argp = (void __user *)arg;
434 int __user *p = argp;
435 static struct watchdog_info ident = {
436 .options = WDIOF_SETTIMEOUT |
437 WDIOF_KEEPALIVEPING |
439 .firmware_version = 0,
440 .identity = DRV_NAME,
444 case WDIOC_GETSUPPORT:
445 return copy_to_user(argp, &ident,
446 sizeof (ident)) ? -EFAULT : 0;
448 case WDIOC_GETSTATUS:
449 case WDIOC_GETBOOTSTATUS:
450 return put_user(0, p);
452 case WDIOC_KEEPALIVE:
453 iTCO_wdt_keepalive();
456 case WDIOC_SETOPTIONS:
458 if (get_user(new_options, p))
461 if (new_options & WDIOS_DISABLECARD) {
466 if (new_options & WDIOS_ENABLECARD) {
467 iTCO_wdt_keepalive();
475 case WDIOC_SETTIMEOUT:
477 if (get_user(new_heartbeat, p))
480 if (iTCO_wdt_set_heartbeat(new_heartbeat))
483 iTCO_wdt_keepalive();
487 case WDIOC_GETTIMEOUT:
488 return put_user(heartbeat, p);
490 case WDIOC_GETTIMELEFT:
492 if (iTCO_wdt_get_timeleft(&time_left))
495 return put_user(time_left, p);
507 static int iTCO_wdt_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
509 if (code==SYS_DOWN || code==SYS_HALT) {
510 /* Turn the WDT off */
521 static struct file_operations iTCO_wdt_fops = {
522 .owner = THIS_MODULE,
524 .write = iTCO_wdt_write,
525 .ioctl = iTCO_wdt_ioctl,
526 .open = iTCO_wdt_open,
527 .release = iTCO_wdt_release,
530 static struct miscdevice iTCO_wdt_miscdev = {
531 .minor = WATCHDOG_MINOR,
533 .fops = &iTCO_wdt_fops,
536 static struct notifier_block iTCO_wdt_notifier = {
537 .notifier_call = iTCO_wdt_notify_sys,
541 * Init & exit routines
544 static int iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device_id *ent, struct platform_device *dev)
552 * Find the ACPI/PM base I/O address which is the base
553 * for the TCO registers (TCOBASE=ACPIBASE + 0x60)
554 * ACPIBASE is bits [15:7] from 0x40-0x43
556 pci_read_config_dword(pdev, 0x40, &base_address);
557 base_address &= 0x00007f80;
558 if (base_address == 0x00000000) {
559 /* Something's wrong here, ACPIBASE has to be set */
560 printk(KERN_ERR PFX "failed to get TCOBASE address\n");
564 iTCO_wdt_private.iTCO_version = iTCO_chipset_info[ent->driver_data].iTCO_version;
565 iTCO_wdt_private.ACPIBASE = base_address;
566 iTCO_wdt_private.pdev = pdev;
568 /* Get the Memory-Mapped GCS register, we need it for the NO_REBOOT flag (TCO v2) */
569 /* To get access to it you have to read RCBA from PCI Config space 0xf0
570 and use it as base. GCS = RCBA + ICH6_GCS(0x3410). */
571 if (iTCO_wdt_private.iTCO_version == 2) {
572 pci_read_config_dword(pdev, 0xf0, &base_address);
573 RCBA = base_address & 0xffffc000;
574 iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410),4);
577 /* Check chipset's NO_REBOOT bit */
578 if (iTCO_wdt_unset_NO_REBOOT_bit()) {
579 printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
580 ret = -ENODEV; /* Cannot reset NO_REBOOT bit */
584 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
585 iTCO_wdt_set_NO_REBOOT_bit();
587 /* Set the TCO_EN bit in SMI_EN register */
588 if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
589 printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
595 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
597 release_region(SMI_EN, 4);
599 /* The TCO I/O registers reside in a 32-byte range pointed to by the TCOBASE value */
600 if (!request_region (TCOBASE, 0x20, "iTCO_wdt")) {
601 printk (KERN_ERR PFX "I/O address 0x%04lx already in use\n",
607 printk(KERN_INFO PFX "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
608 iTCO_chipset_info[ent->driver_data].name,
609 iTCO_chipset_info[ent->driver_data].iTCO_version,
612 /* Clear out the (probably old) status */
616 /* Make sure the watchdog is not running */
619 /* Check that the heartbeat value is within it's range ; if not reset to the default */
620 if (iTCO_wdt_set_heartbeat(heartbeat)) {
621 iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT);
622 printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39 (TCO v1) or 613 (TCO v2), using %d\n",
626 ret = register_reboot_notifier(&iTCO_wdt_notifier);
628 printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
633 ret = misc_register(&iTCO_wdt_miscdev);
635 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
636 WATCHDOG_MINOR, ret);
640 printk (KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
641 heartbeat, nowayout);
646 unregister_reboot_notifier(&iTCO_wdt_notifier);
648 release_region (TCOBASE, 0x20);
650 if (iTCO_wdt_private.iTCO_version == 2)
651 iounmap(iTCO_wdt_private.gcs);
652 iTCO_wdt_private.ACPIBASE = 0;
653 pci_dev_put(iTCO_wdt_private.pdev);
657 static void iTCO_wdt_cleanup(void)
659 /* Stop the timer before we leave */
664 misc_deregister(&iTCO_wdt_miscdev);
665 unregister_reboot_notifier(&iTCO_wdt_notifier);
666 release_region(TCOBASE, 0x20);
667 if (iTCO_wdt_private.iTCO_version == 2)
668 iounmap(iTCO_wdt_private.gcs);
669 pci_dev_put(iTCO_wdt_private.pdev);
672 static int iTCO_wdt_probe(struct platform_device *dev)
675 struct pci_dev *pdev = NULL;
676 const struct pci_device_id *ent;
678 spin_lock_init(&iTCO_wdt_private.io_lock);
680 for_each_pci_dev(pdev) {
681 ent = pci_match_id(iTCO_wdt_pci_tbl, pdev);
683 if (!(iTCO_wdt_init(pdev, ent, dev))) {
691 printk(KERN_INFO PFX "No card detected\n");
698 static int iTCO_wdt_remove(struct platform_device *dev)
700 if (iTCO_wdt_private.ACPIBASE)
706 static void iTCO_wdt_shutdown(struct platform_device *dev)
711 #define iTCO_wdt_suspend NULL
712 #define iTCO_wdt_resume NULL
714 static struct platform_driver iTCO_wdt_driver = {
715 .probe = iTCO_wdt_probe,
716 .remove = iTCO_wdt_remove,
717 .shutdown = iTCO_wdt_shutdown,
718 .suspend = iTCO_wdt_suspend,
719 .resume = iTCO_wdt_resume,
721 .owner = THIS_MODULE,
726 static int __init iTCO_wdt_init_module(void)
730 printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s (%s)\n",
731 DRV_VERSION, DRV_RELDATE);
733 err = platform_driver_register(&iTCO_wdt_driver);
737 iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
738 if (IS_ERR(iTCO_wdt_platform_device)) {
739 err = PTR_ERR(iTCO_wdt_platform_device);
740 goto unreg_platform_driver;
745 unreg_platform_driver:
746 platform_driver_unregister(&iTCO_wdt_driver);
750 static void __exit iTCO_wdt_cleanup_module(void)
752 platform_device_unregister(iTCO_wdt_platform_device);
753 platform_driver_unregister(&iTCO_wdt_driver);
754 printk(KERN_INFO PFX "Watchdog Module Unloaded.\n");
757 module_init(iTCO_wdt_init_module);
758 module_exit(iTCO_wdt_cleanup_module);
760 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
761 MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
762 MODULE_VERSION(DRV_VERSION);
763 MODULE_LICENSE("GPL");
764 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);