drivers/char/tpm/tpm_tis.c

   1 /*
   2  * Copyright (C) 2005, 2006 IBM Corporation
   3  *
   4  * Authors:
   5  * Leendert van Doorn <leendert@watson.ibm.com>
   6  * Kylene Hall <kjhall@us.ibm.com>
   7  *
   8  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
   9  *
  10  * Device driver for TCG/TCPA TPM (trusted platform module).
  11  * Specifications at www.trustedcomputinggroup.org
  12  *
  13  * This device driver implements the TPM interface as defined in
  14  * the TCG TPM Interface Spec version 1.2, revision 1.0.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation, version 2 of the
  19  * License.
  20  */
  21 #include <linux/init.h>
  22 #include <linux/module.h>
  23 #include <linux/moduleparam.h>
  24 #include <linux/pnp.h>
  25 #include <linux/slab.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/wait.h>
  28 #include <linux/acpi.h>
  29 #include <linux/freezer.h>
  30 #include "tpm.h"
  31
  32 #define TPM_HEADER_SIZE 10
  33
  34 enum tis_access {
  35         TPM_ACCESS_VALID = 0x80,
  36         TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  37         TPM_ACCESS_REQUEST_PENDING = 0x04,
  38         TPM_ACCESS_REQUEST_USE = 0x02,
  39 };
  40
  41 enum tis_status {
  42         TPM_STS_VALID = 0x80,
  43         TPM_STS_COMMAND_READY = 0x40,
  44         TPM_STS_GO = 0x20,
  45         TPM_STS_DATA_AVAIL = 0x10,
  46         TPM_STS_DATA_EXPECT = 0x08,
  47 };
  48
  49 enum tis_int_flags {
  50         TPM_GLOBAL_INT_ENABLE = 0x80000000,
  51         TPM_INTF_BURST_COUNT_STATIC = 0x100,
  52         TPM_INTF_CMD_READY_INT = 0x080,
  53         TPM_INTF_INT_EDGE_FALLING = 0x040,
  54         TPM_INTF_INT_EDGE_RISING = 0x020,
  55         TPM_INTF_INT_LEVEL_LOW = 0x010,
  56         TPM_INTF_INT_LEVEL_HIGH = 0x008,
  57         TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  58         TPM_INTF_STS_VALID_INT = 0x002,
  59         TPM_INTF_DATA_AVAIL_INT = 0x001,
  60 };
  61
  62 enum tis_defaults {
  63         TIS_MEM_BASE = 0xFED40000,
  64         TIS_MEM_LEN = 0x5000,
  65         TIS_SHORT_TIMEOUT = 750,        /* ms */
  66         TIS_LONG_TIMEOUT = 2000,        /* 2 sec */
  67 };
  68
  69 #define TPM_ACCESS(l)                   (0x0000 | ((l) << 12))
  70 #define TPM_INT_ENABLE(l)               (0x0008 | ((l) << 12))
  71 #define TPM_INT_VECTOR(l)               (0x000C | ((l) << 12))
  72 #define TPM_INT_STATUS(l)               (0x0010 | ((l) << 12))
  73 #define TPM_INTF_CAPS(l)                (0x0014 | ((l) << 12))
  74 #define TPM_STS(l)                      (0x0018 | ((l) << 12))
  75 #define TPM_DATA_FIFO(l)                (0x0024 | ((l) << 12))
  76
  77 #define TPM_DID_VID(l)                  (0x0F00 | ((l) << 12))
  78 #define TPM_RID(l)                      (0x0F04 | ((l) << 12))
  79
  80 static LIST_HEAD(tis_chips);
  81 static DEFINE_SPINLOCK(tis_lock);
  82
  83 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
  84 static int is_itpm(struct pnp_dev *dev)
  85 {
  86         struct acpi_device *acpi = pnp_acpi_device(dev);
  87         struct acpi_hardware_id *id;
  88
  89         list_for_each_entry(id, &acpi->pnp.ids, list) {
  90                 if (!strcmp("INTC0102", id->id))
  91                         return 1;
  92         }
  93
  94         return 0;
  95 }
  96 #else
  97 static inline int is_itpm(struct pnp_dev *dev)
  98 {
  99         return 0;
 100 }
 101 #endif
 102
 103 static int check_locality(struct tpm_chip *chip, int l)
 104 {
 105         if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 106              (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
 107             (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
 108                 return chip->vendor.locality = l;
 109
 110         return -1;
 111 }
 112
 113 static void release_locality(struct tpm_chip *chip, int l, int force)
 114 {
 115         if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
 116                       (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
 117             (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
 118                 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
 119                          chip->vendor.iobase + TPM_ACCESS(l));
 120 }
 121
 122 static int request_locality(struct tpm_chip *chip, int l)
 123 {
 124         unsigned long stop, timeout;
 125         long rc;
 126
 127         if (check_locality(chip, l) >= 0)
 128                 return l;
 129
 130         iowrite8(TPM_ACCESS_REQUEST_USE,
 131                  chip->vendor.iobase + TPM_ACCESS(l));
 132
 133         stop = jiffies + chip->vendor.timeout_a;
 134
 135         if (chip->vendor.irq) {
 136 again:
 137                 timeout = stop - jiffies;
 138                 if ((long)timeout <= 0)
 139                         return -1;
 140                 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
 141                                                       (check_locality
 142                                                        (chip, l) >= 0),
 143                                                       timeout);
 144                 if (rc > 0)
 145                         return l;
 146                 if (rc == -ERESTARTSYS && freezing(current)) {
 147                         clear_thread_flag(TIF_SIGPENDING);
 148                         goto again;
 149                 }
 150         } else {
 151                 /* wait for burstcount */
 152                 do {
 153                         if (check_locality(chip, l) >= 0)
 154                                 return l;
 155                         msleep(TPM_TIMEOUT);
 156                 }
 157                 while (time_before(jiffies, stop));
 158         }
 159         return -1;
 160 }
 161
 162 static u8 tpm_tis_status(struct tpm_chip *chip)
 163 {
 164         return ioread8(chip->vendor.iobase +
 165                        TPM_STS(chip->vendor.locality));
 166 }
 167
 168 static void tpm_tis_ready(struct tpm_chip *chip)
 169 {
 170         /* this causes the current command to be aborted */
 171         iowrite8(TPM_STS_COMMAND_READY,
 172                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
 173 }
 174
 175 static int get_burstcount(struct tpm_chip *chip)
 176 {
 177         unsigned long stop;
 178         int burstcnt;
 179         u32 value;
 180
 181         /* wait for burstcount */
 182         /* which timeout value, spec has 2 answers (c & d) */
 183         stop = jiffies + chip->vendor.timeout_d;
 184         do {
 185                 value = ioread32(chip->vendor.iobase +
 186                                  TPM_STS(chip->vendor.locality));
 187                 burstcnt = (value >> 8) & 0xFFFF;
 188                 if (burstcnt)
 189                         return burstcnt;
 190                 msleep(TPM_TIMEOUT);
 191         } while (time_before(jiffies, stop));
 192         return -EBUSY;
 193 }
 194
 195 static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
 196                          wait_queue_head_t *queue)
 197 {
 198         unsigned long stop;
 199         long rc;
 200         u8 status;
 201
 202         /* check current status */
 203         status = tpm_tis_status(chip);
 204         if ((status & mask) == mask)
 205                 return 0;
 206
 207         stop = jiffies + timeout;
 208
 209         if (chip->vendor.irq) {
 210 again:
 211                 timeout = stop - jiffies;
 212                 if ((long)timeout <= 0)
 213                         return -ETIME;
 214                 rc = wait_event_interruptible_timeout(*queue,
 215                                                       ((tpm_tis_status
 216                                                         (chip) & mask) ==
 217                                                        mask), timeout);
 218                 if (rc > 0)
 219                         return 0;
 220                 if (rc == -ERESTARTSYS && freezing(current)) {
 221                         clear_thread_flag(TIF_SIGPENDING);
 222                         goto again;
 223                 }
 224         } else {
 225                 do {
 226                         msleep(TPM_TIMEOUT);
 227                         status = tpm_tis_status(chip);
 228                         if ((status & mask) == mask)
 229                                 return 0;
 230                 } while (time_before(jiffies, stop));
 231         }
 232         return -ETIME;
 233 }
 234
 235 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
 236 {
 237         int size = 0, burstcnt;
 238         while (size < count &&
 239                wait_for_stat(chip,
 240                              TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 241                              chip->vendor.timeout_c,
 242                              &chip->vendor.read_queue)
 243                == 0) {
 244                 burstcnt = get_burstcount(chip);
 245                 for (; burstcnt > 0 && size < count; burstcnt--)
 246                         buf[size++] = ioread8(chip->vendor.iobase +
 247                                               TPM_DATA_FIFO(chip->vendor.
 248                                                             locality));
 249         }
 250         return size;
 251 }
 252
 253 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
 254 {
 255         int size = 0;
 256         int expected, status;
 257
 258         if (count < TPM_HEADER_SIZE) {
 259                 size = -EIO;
 260                 goto out;
 261         }
 262
 263         /* read first 10 bytes, including tag, paramsize, and result */
 264         if ((size =
 265              recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
 266                 dev_err(chip->dev, "Unable to read header\n");
 267                 goto out;
 268         }
 269
 270         expected = be32_to_cpu(*(__be32 *) (buf + 2));
 271         if (expected > count) {
 272                 size = -EIO;
 273                 goto out;
 274         }
 275
 276         if ((size +=
 277              recv_data(chip, &buf[TPM_HEADER_SIZE],
 278                        expected - TPM_HEADER_SIZE)) < expected) {
 279                 dev_err(chip->dev, "Unable to read remainder of result\n");
 280                 size = -ETIME;
 281                 goto out;
 282         }
 283
 284         wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 285                       &chip->vendor.int_queue);
 286         status = tpm_tis_status(chip);
 287         if (status & TPM_STS_DATA_AVAIL) {      /* retry? */
 288                 dev_err(chip->dev, "Error left over data\n");
 289                 size = -EIO;
 290                 goto out;
 291         }
 292
 293 out:
 294         tpm_tis_ready(chip);
 295         release_locality(chip, chip->vendor.locality, 0);
 296         return size;
 297 }
 298
 299 static int itpm;
 300 module_param(itpm, bool, 0444);
 301 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
 302
 303 /*
 304  * If interrupts are used (signaled by an irq set in the vendor structure)
 305  * tpm.c can skip polling for the data to be available as the interrupt is
 306  * waited for here
 307  */
 308 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
 309 {
 310         int rc, status, burstcnt;
 311         size_t count = 0;
 312
 313         if (request_locality(chip, 0) < 0)
 314                 return -EBUSY;
 315
 316         status = tpm_tis_status(chip);
 317         if ((status & TPM_STS_COMMAND_READY) == 0) {
 318                 tpm_tis_ready(chip);
 319                 if (wait_for_stat
 320                     (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
 321                      &chip->vendor.int_queue) < 0) {
 322                         rc = -ETIME;
 323                         goto out_err;
 324                 }
 325         }
 326
 327         while (count < len - 1) {
 328                 burstcnt = get_burstcount(chip);
 329                 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
 330                         iowrite8(buf[count], chip->vendor.iobase +
 331                                  TPM_DATA_FIFO(chip->vendor.locality));
 332                         count++;
 333                 }
 334
 335                 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 336                               &chip->vendor.int_queue);
 337                 status = tpm_tis_status(chip);
 338                 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
 339                         rc = -EIO;
 340                         goto out_err;
 341                 }
 342         }
 343
 344         /* write last byte */
 345         iowrite8(buf[count],
 346                  chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
 347         wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 348                       &chip->vendor.int_queue);
 349         status = tpm_tis_status(chip);
 350         if ((status & TPM_STS_DATA_EXPECT) != 0) {
 351                 rc = -EIO;
 352                 goto out_err;
 353         }
 354
 355         return 0;
 356
 357 out_err:
 358         tpm_tis_ready(chip);
 359         release_locality(chip, chip->vendor.locality, 0);
 360         return rc;
 361 }
 362
 363 /*
 364  * If interrupts are used (signaled by an irq set in the vendor structure)
 365  * tpm.c can skip polling for the data to be available as the interrupt is
 366  * waited for here
 367  */
 368 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
 369 {
 370         int rc;
 371         u32 ordinal;
 372
 373         rc = tpm_tis_send_data(chip, buf, len);
 374         if (rc < 0)
 375                 return rc;
 376
 377         /* go and do it */
 378         iowrite8(TPM_STS_GO,
 379                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
 380
 381         if (chip->vendor.irq) {
 382                 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
 383                 if (wait_for_stat
 384                     (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 385                      tpm_calc_ordinal_duration(chip, ordinal),
 386                      &chip->vendor.read_queue) < 0) {
 387                         rc = -ETIME;
 388                         goto out_err;
 389                 }
 390         }
 391         return len;
 392 out_err:
 393         tpm_tis_ready(chip);
 394         release_locality(chip, chip->vendor.locality, 0);
 395         return rc;
 396 }
 397
 398 struct tis_vendor_timeout_override {
 399         u32 did_vid;
 400         unsigned long timeout_us[4];
 401 };
 402
 403 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
 404         /* Atmel 3204 */
 405         { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
 406                         (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
 407 };
 408
 409 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
 410                                     unsigned long *timeout_cap)
 411 {
 412         int i;
 413         u32 did_vid;
 414
 415         did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
 416
 417         for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
 418                 if (vendor_timeout_overrides[i].did_vid != did_vid)
 419                         continue;
 420                 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
 421                        sizeof(vendor_timeout_overrides[i].timeout_us));
 422                 return true;
 423         }
 424
 425         return false;
 426 }
 427
 428 /*
 429  * Early probing for iTPM with STS_DATA_EXPECT flaw.
 430  * Try sending command without itpm flag set and if that
 431  * fails, repeat with itpm flag set.
 432  */
 433 static int probe_itpm(struct tpm_chip *chip)
 434 {
 435         int rc = 0;
 436         u8 cmd_getticks[] = {
 437                 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
 438                 0x00, 0x00, 0x00, 0xf1
 439         };
 440         size_t len = sizeof(cmd_getticks);
 441         int rem_itpm = itpm;
 442
 443         itpm = 0;
 444
 445         rc = tpm_tis_send_data(chip, cmd_getticks, len);
 446         if (rc == 0)
 447                 goto out;
 448
 449         tpm_tis_ready(chip);
 450         release_locality(chip, chip->vendor.locality, 0);
 451
 452         itpm = 1;
 453
 454         rc = tpm_tis_send_data(chip, cmd_getticks, len);
 455         if (rc == 0) {
 456                 dev_info(chip->dev, "Detected an iTPM.\n");
 457                 rc = 1;
 458         } else
 459                 rc = -EFAULT;
 460
 461 out:
 462         itpm = rem_itpm;
 463         tpm_tis_ready(chip);
 464         /* some TPMs need a break here otherwise they will not work
 465          * correctly on the immediately subsequent command */
 466         msleep(chip->vendor.timeout_b);
 467         release_locality(chip, chip->vendor.locality, 0);
 468
 469         return rc;
 470 }
 471
 472 static const struct file_operations tis_ops = {
 473         .owner = THIS_MODULE,
 474         .llseek = no_llseek,
 475         .open = tpm_open,
 476         .read = tpm_read,
 477         .write = tpm_write,
 478         .release = tpm_release,
 479 };
 480
 481 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
 482 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
 483 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
 484 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
 485 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
 486 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
 487                    NULL);
 488 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
 489 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
 490 static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
 491 static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
 492
 493 static struct attribute *tis_attrs[] = {
 494         &dev_attr_pubek.attr,
 495         &dev_attr_pcrs.attr,
 496         &dev_attr_enabled.attr,
 497         &dev_attr_active.attr,
 498         &dev_attr_owned.attr,
 499         &dev_attr_temp_deactivated.attr,
 500         &dev_attr_caps.attr,
 501         &dev_attr_cancel.attr,
 502         &dev_attr_durations.attr,
 503         &dev_attr_timeouts.attr, NULL,
 504 };
 505
 506 static struct attribute_group tis_attr_grp = {
 507         .attrs = tis_attrs
 508 };
 509
 510 static struct tpm_vendor_specific tpm_tis = {
 511         .status = tpm_tis_status,
 512         .recv = tpm_tis_recv,
 513         .send = tpm_tis_send,
 514         .cancel = tpm_tis_ready,
 515         .update_timeouts = tpm_tis_update_timeouts,
 516         .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 517         .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
 518         .req_canceled = TPM_STS_COMMAND_READY,
 519         .attr_group = &tis_attr_grp,
 520         .miscdev = {
 521                     .fops = &tis_ops,},
 522 };
 523
 524 static irqreturn_t tis_int_probe(int irq, void *dev_id)
 525 {
 526         struct tpm_chip *chip = dev_id;
 527         u32 interrupt;
 528
 529         interrupt = ioread32(chip->vendor.iobase +
 530                              TPM_INT_STATUS(chip->vendor.locality));
 531
 532         if (interrupt == 0)
 533                 return IRQ_NONE;
 534
 535         chip->vendor.probed_irq = irq;
 536
 537         /* Clear interrupts handled with TPM_EOI */
 538         iowrite32(interrupt,
 539                   chip->vendor.iobase +
 540                   TPM_INT_STATUS(chip->vendor.locality));
 541         return IRQ_HANDLED;
 542 }
 543
 544 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
 545 {
 546         struct tpm_chip *chip = dev_id;
 547         u32 interrupt;
 548         int i;
 549
 550         interrupt = ioread32(chip->vendor.iobase +
 551                              TPM_INT_STATUS(chip->vendor.locality));
 552
 553         if (interrupt == 0)
 554                 return IRQ_NONE;
 555
 556         if (interrupt & TPM_INTF_DATA_AVAIL_INT)
 557                 wake_up_interruptible(&chip->vendor.read_queue);
 558         if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
 559                 for (i = 0; i < 5; i++)
 560                         if (check_locality(chip, i) >= 0)
 561                                 break;
 562         if (interrupt &
 563             (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
 564              TPM_INTF_CMD_READY_INT))
 565                 wake_up_interruptible(&chip->vendor.int_queue);
 566
 567         /* Clear interrupts handled with TPM_EOI */
 568         iowrite32(interrupt,
 569                   chip->vendor.iobase +
 570                   TPM_INT_STATUS(chip->vendor.locality));
 571         ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
 572         return IRQ_HANDLED;
 573 }
 574
 575 static int interrupts = 1;
 576 module_param(interrupts, bool, 0444);
 577 MODULE_PARM_DESC(interrupts, "Enable interrupts");
 578
 579 static int tpm_tis_init(struct device *dev, resource_size_t start,
 580                         resource_size_t len, unsigned int irq)
 581 {
 582         u32 vendor, intfcaps, intmask;
 583         int rc, i, irq_s, irq_e;
 584         struct tpm_chip *chip;
 585
 586         if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
 587                 return -ENODEV;
 588
 589         chip->vendor.iobase = ioremap(start, len);
 590         if (!chip->vendor.iobase) {
 591                 rc = -EIO;
 592                 goto out_err;
 593         }
 594
 595         /* Default timeouts */
 596         chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 597         chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
 598         chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 599         chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
 600
 601         if (request_locality(chip, 0) != 0) {
 602                 rc = -ENODEV;
 603                 goto out_err;
 604         }
 605
 606         vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
 607
 608         dev_info(dev,
 609                  "1.2 TPM (device-id 0x%X, rev-id %d)\n",
 610                  vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
 611
 612         if (!itpm) {
 613                 itpm = probe_itpm(chip);
 614                 if (itpm < 0) {
 615                         rc = -ENODEV;
 616                         goto out_err;
 617                 }
 618         }
 619
 620         if (itpm)
 621                 dev_info(dev, "Intel iTPM workaround enabled\n");
 622
 623
 624         /* Figure out the capabilities */
 625         intfcaps =
 626             ioread32(chip->vendor.iobase +
 627                      TPM_INTF_CAPS(chip->vendor.locality));
 628         dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
 629                 intfcaps);
 630         if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
 631                 dev_dbg(dev, "\tBurst Count Static\n");
 632         if (intfcaps & TPM_INTF_CMD_READY_INT)
 633                 dev_dbg(dev, "\tCommand Ready Int Support\n");
 634         if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
 635                 dev_dbg(dev, "\tInterrupt Edge Falling\n");
 636         if (intfcaps & TPM_INTF_INT_EDGE_RISING)
 637                 dev_dbg(dev, "\tInterrupt Edge Rising\n");
 638         if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
 639                 dev_dbg(dev, "\tInterrupt Level Low\n");
 640         if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
 641                 dev_dbg(dev, "\tInterrupt Level High\n");
 642         if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
 643                 dev_dbg(dev, "\tLocality Change Int Support\n");
 644         if (intfcaps & TPM_INTF_STS_VALID_INT)
 645                 dev_dbg(dev, "\tSts Valid Int Support\n");
 646         if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
 647                 dev_dbg(dev, "\tData Avail Int Support\n");
 648
 649         /* get the timeouts before testing for irqs */
 650         tpm_get_timeouts(chip);
 651
 652         /* INTERRUPT Setup */
 653         init_waitqueue_head(&chip->vendor.read_queue);
 654         init_waitqueue_head(&chip->vendor.int_queue);
 655
 656         intmask =
 657             ioread32(chip->vendor.iobase +
 658                      TPM_INT_ENABLE(chip->vendor.locality));
 659
 660         intmask |= TPM_INTF_CMD_READY_INT
 661             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
 662             | TPM_INTF_STS_VALID_INT;
 663
 664         iowrite32(intmask,
 665                   chip->vendor.iobase +
 666                   TPM_INT_ENABLE(chip->vendor.locality));
 667         if (interrupts)
 668                 chip->vendor.irq = irq;
 669         if (interrupts && !chip->vendor.irq) {
 670                 irq_s =
 671                     ioread8(chip->vendor.iobase +
 672                             TPM_INT_VECTOR(chip->vendor.locality));
 673                 if (irq_s) {
 674                         irq_e = irq_s;
 675                 } else {
 676                         irq_s = 3;
 677                         irq_e = 15;
 678                 }
 679
 680                 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
 681                         iowrite8(i, chip->vendor.iobase +
 682                                  TPM_INT_VECTOR(chip->vendor.locality));
 683                         if (request_irq
 684                             (i, tis_int_probe, IRQF_SHARED,
 685                              chip->vendor.miscdev.name, chip) != 0) {
 686                                 dev_info(chip->dev,
 687                                          "Unable to request irq: %d for probe\n",
 688                                          i);
 689                                 continue;
 690                         }
 691
 692                         /* Clear all existing */
 693                         iowrite32(ioread32
 694                                   (chip->vendor.iobase +
 695                                    TPM_INT_STATUS(chip->vendor.locality)),
 696                                   chip->vendor.iobase +
 697                                   TPM_INT_STATUS(chip->vendor.locality));
 698
 699                         /* Turn on */
 700                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
 701                                   chip->vendor.iobase +
 702                                   TPM_INT_ENABLE(chip->vendor.locality));
 703
 704                         chip->vendor.probed_irq = 0;
 705
 706                         /* Generate Interrupts */
 707                         tpm_gen_interrupt(chip);
 708
 709                         chip->vendor.irq = chip->vendor.probed_irq;
 710
 711                         /* free_irq will call into tis_int_probe;
 712                            clear all irqs we haven't seen while doing
 713                            tpm_gen_interrupt */
 714                         iowrite32(ioread32
 715                                   (chip->vendor.iobase +
 716                                    TPM_INT_STATUS(chip->vendor.locality)),
 717                                   chip->vendor.iobase +
 718                                   TPM_INT_STATUS(chip->vendor.locality));
 719
 720                         /* Turn off */
 721                         iowrite32(intmask,
 722                                   chip->vendor.iobase +
 723                                   TPM_INT_ENABLE(chip->vendor.locality));
 724                         free_irq(i, chip);
 725                 }
 726         }
 727         if (chip->vendor.irq) {
 728                 iowrite8(chip->vendor.irq,
 729                          chip->vendor.iobase +
 730                          TPM_INT_VECTOR(chip->vendor.locality));
 731                 if (request_irq
 732                     (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
 733                      chip->vendor.miscdev.name, chip) != 0) {
 734                         dev_info(chip->dev,
 735                                  "Unable to request irq: %d for use\n",
 736                                  chip->vendor.irq);
 737                         chip->vendor.irq = 0;
 738                 } else {
 739                         /* Clear all existing */
 740                         iowrite32(ioread32
 741                                   (chip->vendor.iobase +
 742                                    TPM_INT_STATUS(chip->vendor.locality)),
 743                                   chip->vendor.iobase +
 744                                   TPM_INT_STATUS(chip->vendor.locality));
 745
 746                         /* Turn on */
 747                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
 748                                   chip->vendor.iobase +
 749                                   TPM_INT_ENABLE(chip->vendor.locality));
 750                 }
 751         }
 752
 753         INIT_LIST_HEAD(&chip->vendor.list);
 754         spin_lock(&tis_lock);
 755         list_add(&chip->vendor.list, &tis_chips);
 756         spin_unlock(&tis_lock);
 757
 758         tpm_continue_selftest(chip);
 759
 760         return 0;
 761 out_err:
 762         if (chip->vendor.iobase)
 763                 iounmap(chip->vendor.iobase);
 764         tpm_remove_hardware(chip->dev);
 765         return rc;
 766 }
 767
 768 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
 769 {
 770         u32 intmask;
 771
 772         /* reenable interrupts that device may have lost or
 773            BIOS/firmware may have disabled */
 774         iowrite8(chip->vendor.irq, chip->vendor.iobase +
 775                  TPM_INT_VECTOR(chip->vendor.locality));
 776
 777         intmask =
 778             ioread32(chip->vendor.iobase +
 779                      TPM_INT_ENABLE(chip->vendor.locality));
 780
 781         intmask |= TPM_INTF_CMD_READY_INT
 782             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
 783             | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
 784
 785         iowrite32(intmask,
 786                   chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
 787 }
 788
 789
 790 #ifdef CONFIG_PNP
 791 static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
 792                                       const struct pnp_device_id *pnp_id)
 793 {
 794         resource_size_t start, len;
 795         unsigned int irq = 0;
 796
 797         start = pnp_mem_start(pnp_dev, 0);
 798         len = pnp_mem_len(pnp_dev, 0);
 799
 800         if (pnp_irq_valid(pnp_dev, 0))
 801                 irq = pnp_irq(pnp_dev, 0);
 802         else
 803                 interrupts = 0;
 804
 805         if (is_itpm(pnp_dev))
 806                 itpm = 1;
 807
 808         return tpm_tis_init(&pnp_dev->dev, start, len, irq);
 809 }
 810
 811 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
 812 {
 813         return tpm_pm_suspend(&dev->dev, msg);
 814 }
 815
 816 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
 817 {
 818         struct tpm_chip *chip = pnp_get_drvdata(dev);
 819         int ret;
 820
 821         if (chip->vendor.irq)
 822                 tpm_tis_reenable_interrupts(chip);
 823
 824         ret = tpm_pm_resume(&dev->dev);
 825         if (!ret)
 826                 tpm_continue_selftest(chip);
 827
 828         return ret;
 829 }
 830
 831 static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
 832         {"PNP0C31", 0},         /* TPM */
 833         {"ATM1200", 0},         /* Atmel */
 834         {"IFX0102", 0},         /* Infineon */
 835         {"BCM0101", 0},         /* Broadcom */
 836         {"BCM0102", 0},         /* Broadcom */
 837         {"NSC1200", 0},         /* National */
 838         {"ICO0102", 0},         /* Intel */
 839         /* Add new here */
 840         {"", 0},                /* User Specified */
 841         {"", 0}                 /* Terminator */
 842 };
 843 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
 844
 845 static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
 846 {
 847         struct tpm_chip *chip = pnp_get_drvdata(dev);
 848
 849         tpm_dev_vendor_release(chip);
 850
 851         kfree(chip);
 852 }
 853
 854
 855 static struct pnp_driver tis_pnp_driver = {
 856         .name = "tpm_tis",
 857         .id_table = tpm_pnp_tbl,
 858         .probe = tpm_tis_pnp_init,
 859         .suspend = tpm_tis_pnp_suspend,
 860         .resume = tpm_tis_pnp_resume,
 861         .remove = tpm_tis_pnp_remove,
 862 };
 863
 864 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
 865 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
 866                     sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
 867 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
 868 #endif
 869 static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
 870 {
 871         return tpm_pm_suspend(&dev->dev, msg);
 872 }
 873
 874 static int tpm_tis_resume(struct platform_device *dev)
 875 {
 876         struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
 877
 878         if (chip->vendor.irq)
 879                 tpm_tis_reenable_interrupts(chip);
 880
 881         return tpm_pm_resume(&dev->dev);
 882 }
 883 static struct platform_driver tis_drv = {
 884         .driver = {
 885                 .name = "tpm_tis",
 886                 .owner          = THIS_MODULE,
 887         },
 888         .suspend = tpm_tis_suspend,
 889         .resume = tpm_tis_resume,
 890 };
 891
 892 static struct platform_device *pdev;
 893
 894 static int force;
 895 module_param(force, bool, 0444);
 896 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
 897 static int __init init_tis(void)
 898 {
 899         int rc;
 900 #ifdef CONFIG_PNP
 901         if (!force)
 902                 return pnp_register_driver(&tis_pnp_driver);
 903 #endif
 904
 905         rc = platform_driver_register(&tis_drv);
 906         if (rc < 0)
 907                 return rc;
 908         if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
 909                 return PTR_ERR(pdev);
 910         if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
 911                 platform_device_unregister(pdev);
 912                 platform_driver_unregister(&tis_drv);
 913         }
 914         return rc;
 915 }
 916
 917 static void __exit cleanup_tis(void)
 918 {
 919         struct tpm_vendor_specific *i, *j;
 920         struct tpm_chip *chip;
 921         spin_lock(&tis_lock);
 922         list_for_each_entry_safe(i, j, &tis_chips, list) {
 923                 chip = to_tpm_chip(i);
 924                 tpm_remove_hardware(chip->dev);
 925                 iowrite32(~TPM_GLOBAL_INT_ENABLE &
 926                           ioread32(chip->vendor.iobase +
 927                                    TPM_INT_ENABLE(chip->vendor.
 928                                                   locality)),
 929                           chip->vendor.iobase +
 930                           TPM_INT_ENABLE(chip->vendor.locality));
 931                 release_locality(chip, chip->vendor.locality, 1);
 932                 if (chip->vendor.irq)
 933                         free_irq(chip->vendor.irq, chip);
 934                 iounmap(i->iobase);
 935                 list_del(&i->list);
 936         }
 937         spin_unlock(&tis_lock);
 938 #ifdef CONFIG_PNP
 939         if (!force) {
 940                 pnp_unregister_driver(&tis_pnp_driver);
 941                 return;
 942         }
 943 #endif
 944         platform_device_unregister(pdev);
 945         platform_driver_unregister(&tis_drv);
 946 }
 947
 948 module_init(init_tis);
 949 module_exit(cleanup_tis);
 950 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
 951 MODULE_DESCRIPTION("TPM Driver");
 952 MODULE_VERSION("2.0");
 953 MODULE_LICENSE("GPL");