drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/slab.h>
  55 #include <linux/netdevice.h>
  56 #include <linux/vmalloc.h>
  57 #include <linux/init.h>
  58 #include <linux/delay.h>
  59 #include <linux/ioctl.h>
  60 #include <linux/synclink.h>
  61
  62 #include <asm/system.h>
  63 #include <asm/io.h>
  64 #include <asm/irq.h>
  65 #include <asm/dma.h>
  66 #include <linux/bitops.h>
  67 #include <asm/types.h>
  68 #include <linux/termios.h>
  69 #include <linux/workqueue.h>
  70 #include <linux/hdlc.h>
  71
  72 #include <pcmcia/cs_types.h>
  73 #include <pcmcia/cs.h>
  74 #include <pcmcia/cistpl.h>
  75 #include <pcmcia/cisreg.h>
  76 #include <pcmcia/ds.h>
  77
  78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  79 #define SYNCLINK_GENERIC_HDLC 1
  80 #else
  81 #define SYNCLINK_GENERIC_HDLC 0
  82 #endif
  83
  84 #define GET_USER(error,value,addr) error = get_user(value,addr)
  85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  88
  89 #include <asm/uaccess.h>
  90
  91 static MGSL_PARAMS default_params = {
  92         MGSL_MODE_HDLC,                 /* unsigned long mode */
  93         0,                              /* unsigned char loopback; */
  94         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  95         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  96         0,                              /* unsigned long clock_speed; */
  97         0xff,                           /* unsigned char addr_filter; */
  98         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  99         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
 100         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 101         9600,                           /* unsigned long data_rate; */
 102         8,                              /* unsigned char data_bits; */
 103         1,                              /* unsigned char stop_bits; */
 104         ASYNC_PARITY_NONE               /* unsigned char parity; */
 105 };
 106
 107 typedef struct
 108 {
 109         int count;
 110         unsigned char status;
 111         char data[1];
 112 } RXBUF;
 113
 114 /* The queue of BH actions to be performed */
 115
 116 #define BH_RECEIVE  1
 117 #define BH_TRANSMIT 2
 118 #define BH_STATUS   4
 119
 120 #define IO_PIN_SHUTDOWN_LIMIT 100
 121
 122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 123
 124 struct _input_signal_events {
 125         int     ri_up;
 126         int     ri_down;
 127         int     dsr_up;
 128         int     dsr_down;
 129         int     dcd_up;
 130         int     dcd_down;
 131         int     cts_up;
 132         int     cts_down;
 133 };
 134
 135
 136 /*
 137  * Device instance data structure
 138  */
 139
 140 typedef struct _mgslpc_info {
 141         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 142         int                     magic;
 143         int                     flags;
 144         int                     count;          /* count of opens */
 145         int                     line;
 146         unsigned short          close_delay;
 147         unsigned short          closing_wait;   /* time to wait before closing */
 148
 149         struct mgsl_icount      icount;
 150
 151         struct tty_struct       *tty;
 152         int                     timeout;
 153         int                     x_char;         /* xon/xoff character */
 154         int                     blocked_open;   /* # of blocked opens */
 155         unsigned char           read_status_mask;
 156         unsigned char           ignore_status_mask;
 157
 158         unsigned char *tx_buf;
 159         int            tx_put;
 160         int            tx_get;
 161         int            tx_count;
 162
 163         /* circular list of fixed length rx buffers */
 164
 165         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 166         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 167         int            rx_put;         /* index of next empty rx buffer */
 168         int            rx_get;         /* index of next full rx buffer */
 169         int            rx_buf_size;    /* size in bytes of single rx buffer */
 170         int            rx_buf_count;   /* total number of rx buffers */
 171         int            rx_frame_count; /* number of full rx buffers */
 172
 173         wait_queue_head_t       open_wait;
 174         wait_queue_head_t       close_wait;
 175
 176         wait_queue_head_t       status_event_wait_q;
 177         wait_queue_head_t       event_wait_q;
 178         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 179         struct _mgslpc_info     *next_device;   /* device list link */
 180
 181         unsigned short imra_value;
 182         unsigned short imrb_value;
 183         unsigned char  pim_value;
 184
 185         spinlock_t lock;
 186         struct work_struct task;                /* task structure for scheduling bh */
 187
 188         u32 max_frame_size;
 189
 190         u32 pending_bh;
 191
 192         int bh_running;
 193         int bh_requested;
 194
 195         int dcd_chkcount; /* check counts to prevent */
 196         int cts_chkcount; /* too many IRQs if a signal */
 197         int dsr_chkcount; /* is floating */
 198         int ri_chkcount;
 199
 200         int rx_enabled;
 201         int rx_overflow;
 202
 203         int tx_enabled;
 204         int tx_active;
 205         int tx_aborting;
 206         u32 idle_mode;
 207
 208         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 209
 210         char device_name[25];           /* device instance name */
 211
 212         unsigned int io_base;   /* base I/O address of adapter */
 213         unsigned int irq_level;
 214
 215         MGSL_PARAMS params;             /* communications parameters */
 216
 217         unsigned char serial_signals;   /* current serial signal states */
 218
 219         char irq_occurred;              /* for diagnostics use */
 220         char testing_irq;
 221         unsigned int init_error;        /* startup error (DIAGS)        */
 222
 223         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 224         BOOLEAN drop_rts_on_tx_done;
 225
 226         struct  _input_signal_events    input_signal_events;
 227
 228         /* PCMCIA support */
 229         struct pcmcia_device    *p_dev;
 230         dev_node_t            node;
 231         int                   stop;
 232
 233         /* SPPP/Cisco HDLC device parts */
 234         int netcount;
 235         int dosyncppp;
 236         spinlock_t netlock;
 237
 238 #if SYNCLINK_GENERIC_HDLC
 239         struct net_device *netdev;
 240 #endif
 241
 242 } MGSLPC_INFO;
 243
 244 #define MGSLPC_MAGIC 0x5402
 245
 246 /*
 247  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 248  */
 249 #define TXBUFSIZE 4096
 250
 251
 252 #define CHA     0x00   /* channel A offset */
 253 #define CHB     0x40   /* channel B offset */
 254
 255 /*
 256  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 257  */
 258 #undef PVR
 259
 260 #define RXFIFO  0
 261 #define TXFIFO  0
 262 #define STAR    0x20
 263 #define CMDR    0x20
 264 #define RSTA    0x21
 265 #define PRE     0x21
 266 #define MODE    0x22
 267 #define TIMR    0x23
 268 #define XAD1    0x24
 269 #define XAD2    0x25
 270 #define RAH1    0x26
 271 #define RAH2    0x27
 272 #define DAFO    0x27
 273 #define RAL1    0x28
 274 #define RFC     0x28
 275 #define RHCR    0x29
 276 #define RAL2    0x29
 277 #define RBCL    0x2a
 278 #define XBCL    0x2a
 279 #define RBCH    0x2b
 280 #define XBCH    0x2b
 281 #define CCR0    0x2c
 282 #define CCR1    0x2d
 283 #define CCR2    0x2e
 284 #define CCR3    0x2f
 285 #define VSTR    0x34
 286 #define BGR     0x34
 287 #define RLCR    0x35
 288 #define AML     0x36
 289 #define AMH     0x37
 290 #define GIS     0x38
 291 #define IVA     0x38
 292 #define IPC     0x39
 293 #define ISR     0x3a
 294 #define IMR     0x3a
 295 #define PVR     0x3c
 296 #define PIS     0x3d
 297 #define PIM     0x3d
 298 #define PCR     0x3e
 299 #define CCR4    0x3f
 300
 301 // IMR/ISR
 302
 303 #define IRQ_BREAK_ON    BIT15   // rx break detected
 304 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 305 #define IRQ_ALLSENT     BIT13   // all sent
 306 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 307 #define IRQ_TIMER       BIT11   // timer interrupt
 308 #define IRQ_CTS         BIT10   // CTS status change
 309 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 310 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 311 #define IRQ_RXEOM       BIT7    // receive message end
 312 #define IRQ_EXITHUNT    BIT6    // receive frame start
 313 #define IRQ_RXTIME      BIT6    // rx char timeout
 314 #define IRQ_DCD         BIT2    // carrier detect status change
 315 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 316 #define IRQ_RXFIFO      BIT0    // receive pool full
 317
 318 // STAR
 319
 320 #define XFW   BIT6              // transmit FIFO write enable
 321 #define CEC   BIT2              // command executing
 322 #define CTS   BIT1              // CTS state
 323
 324 #define PVR_DTR      BIT0
 325 #define PVR_DSR      BIT1
 326 #define PVR_RI       BIT2
 327 #define PVR_AUTOCTS  BIT3
 328 #define PVR_RS232    0x20   /* 0010b */
 329 #define PVR_V35      0xe0   /* 1110b */
 330 #define PVR_RS422    0x40   /* 0100b */
 331
 332 /* Register access functions */
 333
 334 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 335 #define read_reg(info, reg) inb((info)->io_base + (reg))
 336
 337 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 338 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 339
 340 #define set_reg_bits(info, reg, mask) \
 341     write_reg(info, (reg), \
 342                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 343 #define clear_reg_bits(info, reg, mask) \
 344     write_reg(info, (reg), \
 345                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 346 /*
 347  * interrupt enable/disable routines
 348  */
 349 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 350 {
 351         if (channel == CHA) {
 352                 info->imra_value |= mask;
 353                 write_reg16(info, CHA + IMR, info->imra_value);
 354         } else {
 355                 info->imrb_value |= mask;
 356                 write_reg16(info, CHB + IMR, info->imrb_value);
 357         }
 358 }
 359 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 360 {
 361         if (channel == CHA) {
 362                 info->imra_value &= ~mask;
 363                 write_reg16(info, CHA + IMR, info->imra_value);
 364         } else {
 365                 info->imrb_value &= ~mask;
 366                 write_reg16(info, CHB + IMR, info->imrb_value);
 367         }
 368 }
 369
 370 #define port_irq_disable(info, mask) \
 371   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 372
 373 #define port_irq_enable(info, mask) \
 374   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 375
 376 static void rx_start(MGSLPC_INFO *info);
 377 static void rx_stop(MGSLPC_INFO *info);
 378
 379 static void tx_start(MGSLPC_INFO *info);
 380 static void tx_stop(MGSLPC_INFO *info);
 381 static void tx_set_idle(MGSLPC_INFO *info);
 382
 383 static void get_signals(MGSLPC_INFO *info);
 384 static void set_signals(MGSLPC_INFO *info);
 385
 386 static void reset_device(MGSLPC_INFO *info);
 387
 388 static void hdlc_mode(MGSLPC_INFO *info);
 389 static void async_mode(MGSLPC_INFO *info);
 390
 391 static void tx_timeout(unsigned long context);
 392
 393 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
 394
 395 #if SYNCLINK_GENERIC_HDLC
 396 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 397 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 398 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 399 static int  hdlcdev_init(MGSLPC_INFO *info);
 400 static void hdlcdev_exit(MGSLPC_INFO *info);
 401 #endif
 402
 403 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 404
 405 static BOOLEAN register_test(MGSLPC_INFO *info);
 406 static BOOLEAN irq_test(MGSLPC_INFO *info);
 407 static int adapter_test(MGSLPC_INFO *info);
 408
 409 static int claim_resources(MGSLPC_INFO *info);
 410 static void release_resources(MGSLPC_INFO *info);
 411 static void mgslpc_add_device(MGSLPC_INFO *info);
 412 static void mgslpc_remove_device(MGSLPC_INFO *info);
 413
 414 static int  rx_get_frame(MGSLPC_INFO *info);
 415 static void rx_reset_buffers(MGSLPC_INFO *info);
 416 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 417 static void rx_free_buffers(MGSLPC_INFO *info);
 418
 419 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 420
 421 /*
 422  * Bottom half interrupt handlers
 423  */
 424 static void bh_handler(struct work_struct *work);
 425 static void bh_transmit(MGSLPC_INFO *info);
 426 static void bh_status(MGSLPC_INFO *info);
 427
 428 /*
 429  * ioctl handlers
 430  */
 431 static int tiocmget(struct tty_struct *tty, struct file *file);
 432 static int tiocmset(struct tty_struct *tty, struct file *file,
 433                     unsigned int set, unsigned int clear);
 434 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 435 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 436 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
 437 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 438 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 439 static int set_txenable(MGSLPC_INFO *info, int enable);
 440 static int tx_abort(MGSLPC_INFO *info);
 441 static int set_rxenable(MGSLPC_INFO *info, int enable);
 442 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 443
 444 static MGSLPC_INFO *mgslpc_device_list = NULL;
 445 static int mgslpc_device_count = 0;
 446
 447 /*
 448  * Set this param to non-zero to load eax with the
 449  * .text section address and breakpoint on module load.
 450  * This is useful for use with gdb and add-symbol-file command.
 451  */
 452 static int break_on_load=0;
 453
 454 /*
 455  * Driver major number, defaults to zero to get auto
 456  * assigned major number. May be forced as module parameter.
 457  */
 458 static int ttymajor=0;
 459
 460 static int debug_level = 0;
 461 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 462 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
 463
 464 module_param(break_on_load, bool, 0);
 465 module_param(ttymajor, int, 0);
 466 module_param(debug_level, int, 0);
 467 module_param_array(maxframe, int, NULL, 0);
 468 module_param_array(dosyncppp, int, NULL, 0);
 469
 470 MODULE_LICENSE("GPL");
 471
 472 static char *driver_name = "SyncLink PC Card driver";
 473 static char *driver_version = "$Revision: 4.34 $";
 474
 475 static struct tty_driver *serial_driver;
 476
 477 /* number of characters left in xmit buffer before we ask for more */
 478 #define WAKEUP_CHARS 256
 479
 480 static void mgslpc_change_params(MGSLPC_INFO *info);
 481 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 482
 483 /* PCMCIA prototypes */
 484
 485 static int mgslpc_config(struct pcmcia_device *link);
 486 static void mgslpc_release(u_long arg);
 487 static void mgslpc_detach(struct pcmcia_device *p_dev);
 488
 489 /*
 490  * 1st function defined in .text section. Calling this function in
 491  * init_module() followed by a breakpoint allows a remote debugger
 492  * (gdb) to get the .text address for the add-symbol-file command.
 493  * This allows remote debugging of dynamically loadable modules.
 494  */
 495 static void* mgslpc_get_text_ptr(void)
 496 {
 497         return mgslpc_get_text_ptr;
 498 }
 499
 500 /**
 501  * line discipline callback wrappers
 502  *
 503  * The wrappers maintain line discipline references
 504  * while calling into the line discipline.
 505  *
 506  * ldisc_flush_buffer - flush line discipline receive buffers
 507  * ldisc_receive_buf  - pass receive data to line discipline
 508  */
 509
 510 static void ldisc_flush_buffer(struct tty_struct *tty)
 511 {
 512         struct tty_ldisc *ld = tty_ldisc_ref(tty);
 513         if (ld) {
 514                 if (ld->flush_buffer)
 515                         ld->flush_buffer(tty);
 516                 tty_ldisc_deref(ld);
 517         }
 518 }
 519
 520 static void ldisc_receive_buf(struct tty_struct *tty,
 521                               const __u8 *data, char *flags, int count)
 522 {
 523         struct tty_ldisc *ld;
 524         if (!tty)
 525                 return;
 526         ld = tty_ldisc_ref(tty);
 527         if (ld) {
 528                 if (ld->receive_buf)
 529                         ld->receive_buf(tty, data, flags, count);
 530                 tty_ldisc_deref(ld);
 531         }
 532 }
 533
 534 static int mgslpc_probe(struct pcmcia_device *link)
 535 {
 536     MGSLPC_INFO *info;
 537     int ret;
 538
 539     if (debug_level >= DEBUG_LEVEL_INFO)
 540             printk("mgslpc_attach\n");
 541
 542     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 543     if (!info) {
 544             printk("Error can't allocate device instance data\n");
 545             return -ENOMEM;
 546     }
 547
 548     info->magic = MGSLPC_MAGIC;
 549     INIT_WORK(&info->task, bh_handler);
 550     info->max_frame_size = 4096;
 551     info->close_delay = 5*HZ/10;
 552     info->closing_wait = 30*HZ;
 553     init_waitqueue_head(&info->open_wait);
 554     init_waitqueue_head(&info->close_wait);
 555     init_waitqueue_head(&info->status_event_wait_q);
 556     init_waitqueue_head(&info->event_wait_q);
 557     spin_lock_init(&info->lock);
 558     spin_lock_init(&info->netlock);
 559     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 560     info->idle_mode = HDLC_TXIDLE_FLAGS;
 561     info->imra_value = 0xffff;
 562     info->imrb_value = 0xffff;
 563     info->pim_value = 0xff;
 564
 565     info->p_dev = link;
 566     link->priv = info;
 567
 568     /* Initialize the struct pcmcia_device structure */
 569
 570     /* Interrupt setup */
 571     link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
 572     link->irq.IRQInfo1   = IRQ_LEVEL_ID;
 573     link->irq.Handler = NULL;
 574
 575     link->conf.Attributes = 0;
 576     link->conf.IntType = INT_MEMORY_AND_IO;
 577
 578     ret = mgslpc_config(link);
 579     if (ret)
 580             return ret;
 581
 582     mgslpc_add_device(info);
 583
 584     return 0;
 585 }
 586
 587 /* Card has been inserted.
 588  */
 589
 590 #define CS_CHECK(fn, ret) \
 591 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
 592
 593 static int mgslpc_config(struct pcmcia_device *link)
 594 {
 595     MGSLPC_INFO *info = link->priv;
 596     tuple_t tuple;
 597     cisparse_t parse;
 598     int last_fn, last_ret;
 599     u_char buf[64];
 600     cistpl_cftable_entry_t dflt = { 0 };
 601     cistpl_cftable_entry_t *cfg;
 602
 603     if (debug_level >= DEBUG_LEVEL_INFO)
 604             printk("mgslpc_config(0x%p)\n", link);
 605
 606     tuple.Attributes = 0;
 607     tuple.TupleData = buf;
 608     tuple.TupleDataMax = sizeof(buf);
 609     tuple.TupleOffset = 0;
 610
 611     /* get CIS configuration entry */
 612
 613     tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
 614     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
 615
 616     cfg = &(parse.cftable_entry);
 617     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
 618     CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
 619
 620     if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
 621     if (cfg->index == 0)
 622             goto cs_failed;
 623
 624     link->conf.ConfigIndex = cfg->index;
 625     link->conf.Attributes |= CONF_ENABLE_IRQ;
 626
 627     /* IO window settings */
 628     link->io.NumPorts1 = 0;
 629     if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
 630             cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
 631             link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
 632             if (!(io->flags & CISTPL_IO_8BIT))
 633                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
 634             if (!(io->flags & CISTPL_IO_16BIT))
 635                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
 636             link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
 637             link->io.BasePort1 = io->win[0].base;
 638             link->io.NumPorts1 = io->win[0].len;
 639             CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
 640     }
 641
 642     link->conf.Attributes = CONF_ENABLE_IRQ;
 643     link->conf.IntType = INT_MEMORY_AND_IO;
 644     link->conf.ConfigIndex = 8;
 645     link->conf.Present = PRESENT_OPTION;
 646
 647     link->irq.Attributes |= IRQ_HANDLE_PRESENT;
 648     link->irq.Handler     = mgslpc_isr;
 649     link->irq.Instance    = info;
 650     CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
 651
 652     CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
 653
 654     info->io_base = link->io.BasePort1;
 655     info->irq_level = link->irq.AssignedIRQ;
 656
 657     /* add to linked list of devices */
 658     sprintf(info->node.dev_name, "mgslpc0");
 659     info->node.major = info->node.minor = 0;
 660     link->dev_node = &info->node;
 661
 662     printk(KERN_INFO "%s: index 0x%02x:",
 663            info->node.dev_name, link->conf.ConfigIndex);
 664     if (link->conf.Attributes & CONF_ENABLE_IRQ)
 665             printk(", irq %d", link->irq.AssignedIRQ);
 666     if (link->io.NumPorts1)
 667             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
 668                    link->io.BasePort1+link->io.NumPorts1-1);
 669     printk("\n");
 670     return 0;
 671
 672 cs_failed:
 673     cs_error(link, last_fn, last_ret);
 674     mgslpc_release((u_long)link);
 675     return -ENODEV;
 676 }
 677
 678 /* Card has been removed.
 679  * Unregister device and release PCMCIA configuration.
 680  * If device is open, postpone until it is closed.
 681  */
 682 static void mgslpc_release(u_long arg)
 683 {
 684         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 685
 686         if (debug_level >= DEBUG_LEVEL_INFO)
 687                 printk("mgslpc_release(0x%p)\n", link);
 688
 689         pcmcia_disable_device(link);
 690 }
 691
 692 static void mgslpc_detach(struct pcmcia_device *link)
 693 {
 694         if (debug_level >= DEBUG_LEVEL_INFO)
 695                 printk("mgslpc_detach(0x%p)\n", link);
 696
 697         ((MGSLPC_INFO *)link->priv)->stop = 1;
 698         mgslpc_release((u_long)link);
 699
 700         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 701 }
 702
 703 static int mgslpc_suspend(struct pcmcia_device *link)
 704 {
 705         MGSLPC_INFO *info = link->priv;
 706
 707         info->stop = 1;
 708
 709         return 0;
 710 }
 711
 712 static int mgslpc_resume(struct pcmcia_device *link)
 713 {
 714         MGSLPC_INFO *info = link->priv;
 715
 716         info->stop = 0;
 717
 718         return 0;
 719 }
 720
 721
 722 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
 723                                         char *name, const char *routine)
 724 {
 725 #ifdef MGSLPC_PARANOIA_CHECK
 726         static const char *badmagic =
 727                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 728         static const char *badinfo =
 729                 "Warning: null mgslpc_info for (%s) in %s\n";
 730
 731         if (!info) {
 732                 printk(badinfo, name, routine);
 733                 return 1;
 734         }
 735         if (info->magic != MGSLPC_MAGIC) {
 736                 printk(badmagic, name, routine);
 737                 return 1;
 738         }
 739 #else
 740         if (!info)
 741                 return 1;
 742 #endif
 743         return 0;
 744 }
 745
 746
 747 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 748 #define CMD_RXRESET     BIT6    // receiver reset
 749 #define CMD_RXFIFO_READ BIT5
 750 #define CMD_START_TIMER BIT4
 751 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 752 #define CMD_TXEOM       BIT1    // transmit end message
 753 #define CMD_TXRESET     BIT0    // transmit reset
 754
 755 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 756 {
 757         int i = 0;
 758         /* wait for command completion */
 759         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 760                 udelay(1);
 761                 if (i++ == 1000)
 762                         return FALSE;
 763         }
 764         return TRUE;
 765 }
 766
 767 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 768 {
 769         wait_command_complete(info, channel);
 770         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 771 }
 772
 773 static void tx_pause(struct tty_struct *tty)
 774 {
 775         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 776         unsigned long flags;
 777
 778         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 779                 return;
 780         if (debug_level >= DEBUG_LEVEL_INFO)
 781                 printk("tx_pause(%s)\n",info->device_name);
 782
 783         spin_lock_irqsave(&info->lock,flags);
 784         if (info->tx_enabled)
 785                 tx_stop(info);
 786         spin_unlock_irqrestore(&info->lock,flags);
 787 }
 788
 789 static void tx_release(struct tty_struct *tty)
 790 {
 791         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 792         unsigned long flags;
 793
 794         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 795                 return;
 796         if (debug_level >= DEBUG_LEVEL_INFO)
 797                 printk("tx_release(%s)\n",info->device_name);
 798
 799         spin_lock_irqsave(&info->lock,flags);
 800         if (!info->tx_enabled)
 801                 tx_start(info);
 802         spin_unlock_irqrestore(&info->lock,flags);
 803 }
 804
 805 /* Return next bottom half action to perform.
 806  * or 0 if nothing to do.
 807  */
 808 static int bh_action(MGSLPC_INFO *info)
 809 {
 810         unsigned long flags;
 811         int rc = 0;
 812
 813         spin_lock_irqsave(&info->lock,flags);
 814
 815         if (info->pending_bh & BH_RECEIVE) {
 816                 info->pending_bh &= ~BH_RECEIVE;
 817                 rc = BH_RECEIVE;
 818         } else if (info->pending_bh & BH_TRANSMIT) {
 819                 info->pending_bh &= ~BH_TRANSMIT;
 820                 rc = BH_TRANSMIT;
 821         } else if (info->pending_bh & BH_STATUS) {
 822                 info->pending_bh &= ~BH_STATUS;
 823                 rc = BH_STATUS;
 824         }
 825
 826         if (!rc) {
 827                 /* Mark BH routine as complete */
 828                 info->bh_running   = 0;
 829                 info->bh_requested = 0;
 830         }
 831
 832         spin_unlock_irqrestore(&info->lock,flags);
 833
 834         return rc;
 835 }
 836
 837 static void bh_handler(struct work_struct *work)
 838 {
 839         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 840         int action;
 841
 842         if (!info)
 843                 return;
 844
 845         if (debug_level >= DEBUG_LEVEL_BH)
 846                 printk( "%s(%d):bh_handler(%s) entry\n",
 847                         __FILE__,__LINE__,info->device_name);
 848
 849         info->bh_running = 1;
 850
 851         while((action = bh_action(info)) != 0) {
 852
 853                 /* Process work item */
 854                 if ( debug_level >= DEBUG_LEVEL_BH )
 855                         printk( "%s(%d):bh_handler() work item action=%d\n",
 856                                 __FILE__,__LINE__,action);
 857
 858                 switch (action) {
 859
 860                 case BH_RECEIVE:
 861                         while(rx_get_frame(info));
 862                         break;
 863                 case BH_TRANSMIT:
 864                         bh_transmit(info);
 865                         break;
 866                 case BH_STATUS:
 867                         bh_status(info);
 868                         break;
 869                 default:
 870                         /* unknown work item ID */
 871                         printk("Unknown work item ID=%08X!\n", action);
 872                         break;
 873                 }
 874         }
 875
 876         if (debug_level >= DEBUG_LEVEL_BH)
 877                 printk( "%s(%d):bh_handler(%s) exit\n",
 878                         __FILE__,__LINE__,info->device_name);
 879 }
 880
 881 static void bh_transmit(MGSLPC_INFO *info)
 882 {
 883         struct tty_struct *tty = info->tty;
 884         if (debug_level >= DEBUG_LEVEL_BH)
 885                 printk("bh_transmit() entry on %s\n", info->device_name);
 886
 887         if (tty)
 888                 tty_wakeup(tty);
 889 }
 890
 891 static void bh_status(MGSLPC_INFO *info)
 892 {
 893         info->ri_chkcount = 0;
 894         info->dsr_chkcount = 0;
 895         info->dcd_chkcount = 0;
 896         info->cts_chkcount = 0;
 897 }
 898
 899 /* eom: non-zero = end of frame */
 900 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 901 {
 902         unsigned char data[2];
 903         unsigned char fifo_count, read_count, i;
 904         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 905
 906         if (debug_level >= DEBUG_LEVEL_ISR)
 907                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 908
 909         if (!info->rx_enabled)
 910                 return;
 911
 912         if (info->rx_frame_count >= info->rx_buf_count) {
 913                 /* no more free buffers */
 914                 issue_command(info, CHA, CMD_RXRESET);
 915                 info->pending_bh |= BH_RECEIVE;
 916                 info->rx_overflow = 1;
 917                 info->icount.buf_overrun++;
 918                 return;
 919         }
 920
 921         if (eom) {
 922                 /* end of frame, get FIFO count from RBCL register */
 923                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 924                         fifo_count = 32;
 925         } else
 926                 fifo_count = 32;
 927
 928         do {
 929                 if (fifo_count == 1) {
 930                         read_count = 1;
 931                         data[0] = read_reg(info, CHA + RXFIFO);
 932                 } else {
 933                         read_count = 2;
 934                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 935                 }
 936                 fifo_count -= read_count;
 937                 if (!fifo_count && eom)
 938                         buf->status = data[--read_count];
 939
 940                 for (i = 0; i < read_count; i++) {
 941                         if (buf->count >= info->max_frame_size) {
 942                                 /* frame too large, reset receiver and reset current buffer */
 943                                 issue_command(info, CHA, CMD_RXRESET);
 944                                 buf->count = 0;
 945                                 return;
 946                         }
 947                         *(buf->data + buf->count) = data[i];
 948                         buf->count++;
 949                 }
 950         } while (fifo_count);
 951
 952         if (eom) {
 953                 info->pending_bh |= BH_RECEIVE;
 954                 info->rx_frame_count++;
 955                 info->rx_put++;
 956                 if (info->rx_put >= info->rx_buf_count)
 957                         info->rx_put = 0;
 958         }
 959         issue_command(info, CHA, CMD_RXFIFO);
 960 }
 961
 962 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
 963 {
 964         unsigned char data, status, flag;
 965         int fifo_count;
 966         int work = 0;
 967         struct tty_struct *tty = info->tty;
 968         struct mgsl_icount *icount = &info->icount;
 969
 970         if (tcd) {
 971                 /* early termination, get FIFO count from RBCL register */
 972                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 973
 974                 /* Zero fifo count could mean 0 or 32 bytes available.
 975                  * If BIT5 of STAR is set then at least 1 byte is available.
 976                  */
 977                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 978                         fifo_count = 32;
 979         } else
 980                 fifo_count = 32;
 981
 982         tty_buffer_request_room(tty, fifo_count);
 983         /* Flush received async data to receive data buffer. */
 984         while (fifo_count) {
 985                 data   = read_reg(info, CHA + RXFIFO);
 986                 status = read_reg(info, CHA + RXFIFO);
 987                 fifo_count -= 2;
 988
 989                 icount->rx++;
 990                 flag = TTY_NORMAL;
 991
 992                 // if no frameing/crc error then save data
 993                 // BIT7:parity error
 994                 // BIT6:framing error
 995
 996                 if (status & (BIT7 + BIT6)) {
 997                         if (status & BIT7)
 998                                 icount->parity++;
 999                         else
1000                                 icount->frame++;
1001
1002                         /* discard char if tty control flags say so */
1003                         if (status & info->ignore_status_mask)
1004                                 continue;
1005
1006                         status &= info->read_status_mask;
1007
1008                         if (status & BIT7)
1009                                 flag = TTY_PARITY;
1010                         else if (status & BIT6)
1011                                 flag = TTY_FRAME;
1012                 }
1013                 work += tty_insert_flip_char(tty, data, flag);
1014         }
1015         issue_command(info, CHA, CMD_RXFIFO);
1016
1017         if (debug_level >= DEBUG_LEVEL_ISR) {
1018                 printk("%s(%d):rx_ready_async",
1019                         __FILE__,__LINE__);
1020                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1021                         __FILE__,__LINE__,icount->rx,icount->brk,
1022                         icount->parity,icount->frame,icount->overrun);
1023         }
1024
1025         if (work)
1026                 tty_flip_buffer_push(tty);
1027 }
1028
1029
1030 static void tx_done(MGSLPC_INFO *info)
1031 {
1032         if (!info->tx_active)
1033                 return;
1034
1035         info->tx_active = 0;
1036         info->tx_aborting = 0;
1037
1038         if (info->params.mode == MGSL_MODE_ASYNC)
1039                 return;
1040
1041         info->tx_count = info->tx_put = info->tx_get = 0;
1042         del_timer(&info->tx_timer);
1043
1044         if (info->drop_rts_on_tx_done) {
1045                 get_signals(info);
1046                 if (info->serial_signals & SerialSignal_RTS) {
1047                         info->serial_signals &= ~SerialSignal_RTS;
1048                         set_signals(info);
1049                 }
1050                 info->drop_rts_on_tx_done = 0;
1051         }
1052
1053 #if SYNCLINK_GENERIC_HDLC
1054         if (info->netcount)
1055                 hdlcdev_tx_done(info);
1056         else
1057 #endif
1058         {
1059                 if (info->tty->stopped || info->tty->hw_stopped) {
1060                         tx_stop(info);
1061                         return;
1062                 }
1063                 info->pending_bh |= BH_TRANSMIT;
1064         }
1065 }
1066
1067 static void tx_ready(MGSLPC_INFO *info)
1068 {
1069         unsigned char fifo_count = 32;
1070         int c;
1071
1072         if (debug_level >= DEBUG_LEVEL_ISR)
1073                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1074
1075         if (info->params.mode == MGSL_MODE_HDLC) {
1076                 if (!info->tx_active)
1077                         return;
1078         } else {
1079                 if (info->tty->stopped || info->tty->hw_stopped) {
1080                         tx_stop(info);
1081                         return;
1082                 }
1083                 if (!info->tx_count)
1084                         info->tx_active = 0;
1085         }
1086
1087         if (!info->tx_count)
1088                 return;
1089
1090         while (info->tx_count && fifo_count) {
1091                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1092
1093                 if (c == 1) {
1094                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1095                 } else {
1096                         write_reg16(info, CHA + TXFIFO,
1097                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1098                 }
1099                 info->tx_count -= c;
1100                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1101                 fifo_count -= c;
1102         }
1103
1104         if (info->params.mode == MGSL_MODE_ASYNC) {
1105                 if (info->tx_count < WAKEUP_CHARS)
1106                         info->pending_bh |= BH_TRANSMIT;
1107                 issue_command(info, CHA, CMD_TXFIFO);
1108         } else {
1109                 if (info->tx_count)
1110                         issue_command(info, CHA, CMD_TXFIFO);
1111                 else
1112                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1113         }
1114 }
1115
1116 static void cts_change(MGSLPC_INFO *info)
1117 {
1118         get_signals(info);
1119         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1120                 irq_disable(info, CHB, IRQ_CTS);
1121         info->icount.cts++;
1122         if (info->serial_signals & SerialSignal_CTS)
1123                 info->input_signal_events.cts_up++;
1124         else
1125                 info->input_signal_events.cts_down++;
1126         wake_up_interruptible(&info->status_event_wait_q);
1127         wake_up_interruptible(&info->event_wait_q);
1128
1129         if (info->flags & ASYNC_CTS_FLOW) {
1130                 if (info->tty->hw_stopped) {
1131                         if (info->serial_signals & SerialSignal_CTS) {
1132                                 if (debug_level >= DEBUG_LEVEL_ISR)
1133                                         printk("CTS tx start...");
1134                                 if (info->tty)
1135                                         info->tty->hw_stopped = 0;
1136                                 tx_start(info);
1137                                 info->pending_bh |= BH_TRANSMIT;
1138                                 return;
1139                         }
1140                 } else {
1141                         if (!(info->serial_signals & SerialSignal_CTS)) {
1142                                 if (debug_level >= DEBUG_LEVEL_ISR)
1143                                         printk("CTS tx stop...");
1144                                 if (info->tty)
1145                                         info->tty->hw_stopped = 1;
1146                                 tx_stop(info);
1147                         }
1148                 }
1149         }
1150         info->pending_bh |= BH_STATUS;
1151 }
1152
1153 static void dcd_change(MGSLPC_INFO *info)
1154 {
1155         get_signals(info);
1156         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1157                 irq_disable(info, CHB, IRQ_DCD);
1158         info->icount.dcd++;
1159         if (info->serial_signals & SerialSignal_DCD) {
1160                 info->input_signal_events.dcd_up++;
1161         }
1162         else
1163                 info->input_signal_events.dcd_down++;
1164 #if SYNCLINK_GENERIC_HDLC
1165         if (info->netcount) {
1166                 if (info->serial_signals & SerialSignal_DCD)
1167                         netif_carrier_on(info->netdev);
1168                 else
1169                         netif_carrier_off(info->netdev);
1170         }
1171 #endif
1172         wake_up_interruptible(&info->status_event_wait_q);
1173         wake_up_interruptible(&info->event_wait_q);
1174
1175         if (info->flags & ASYNC_CHECK_CD) {
1176                 if (debug_level >= DEBUG_LEVEL_ISR)
1177                         printk("%s CD now %s...", info->device_name,
1178                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1179                 if (info->serial_signals & SerialSignal_DCD)
1180                         wake_up_interruptible(&info->open_wait);
1181                 else {
1182                         if (debug_level >= DEBUG_LEVEL_ISR)
1183                                 printk("doing serial hangup...");
1184                         if (info->tty)
1185                                 tty_hangup(info->tty);
1186                 }
1187         }
1188         info->pending_bh |= BH_STATUS;
1189 }
1190
1191 static void dsr_change(MGSLPC_INFO *info)
1192 {
1193         get_signals(info);
1194         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1195                 port_irq_disable(info, PVR_DSR);
1196         info->icount.dsr++;
1197         if (info->serial_signals & SerialSignal_DSR)
1198                 info->input_signal_events.dsr_up++;
1199         else
1200                 info->input_signal_events.dsr_down++;
1201         wake_up_interruptible(&info->status_event_wait_q);
1202         wake_up_interruptible(&info->event_wait_q);
1203         info->pending_bh |= BH_STATUS;
1204 }
1205
1206 static void ri_change(MGSLPC_INFO *info)
1207 {
1208         get_signals(info);
1209         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1210                 port_irq_disable(info, PVR_RI);
1211         info->icount.rng++;
1212         if (info->serial_signals & SerialSignal_RI)
1213                 info->input_signal_events.ri_up++;
1214         else
1215                 info->input_signal_events.ri_down++;
1216         wake_up_interruptible(&info->status_event_wait_q);
1217         wake_up_interruptible(&info->event_wait_q);
1218         info->pending_bh |= BH_STATUS;
1219 }
1220
1221 /* Interrupt service routine entry point.
1222  *
1223  * Arguments:
1224  *
1225  * irq     interrupt number that caused interrupt
1226  * dev_id  device ID supplied during interrupt registration
1227  */
1228 static irqreturn_t mgslpc_isr(int irq, void *dev_id)
1229 {
1230         MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1231         unsigned short isr;
1232         unsigned char gis, pis;
1233         int count=0;
1234
1235         if (debug_level >= DEBUG_LEVEL_ISR)
1236                 printk("mgslpc_isr(%d) entry.\n", irq);
1237         if (!info)
1238                 return IRQ_NONE;
1239
1240         if (!(info->p_dev->_locked))
1241                 return IRQ_HANDLED;
1242
1243         spin_lock(&info->lock);
1244
1245         while ((gis = read_reg(info, CHA + GIS))) {
1246                 if (debug_level >= DEBUG_LEVEL_ISR)
1247                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1248
1249                 if ((gis & 0x70) || count > 1000) {
1250                         printk("synclink_cs:hardware failed or ejected\n");
1251                         break;
1252                 }
1253                 count++;
1254
1255                 if (gis & (BIT1 + BIT0)) {
1256                         isr = read_reg16(info, CHB + ISR);
1257                         if (isr & IRQ_DCD)
1258                                 dcd_change(info);
1259                         if (isr & IRQ_CTS)
1260                                 cts_change(info);
1261                 }
1262                 if (gis & (BIT3 + BIT2))
1263                 {
1264                         isr = read_reg16(info, CHA + ISR);
1265                         if (isr & IRQ_TIMER) {
1266                                 info->irq_occurred = 1;
1267                                 irq_disable(info, CHA, IRQ_TIMER);
1268                         }
1269
1270                         /* receive IRQs */
1271                         if (isr & IRQ_EXITHUNT) {
1272                                 info->icount.exithunt++;
1273                                 wake_up_interruptible(&info->event_wait_q);
1274                         }
1275                         if (isr & IRQ_BREAK_ON) {
1276                                 info->icount.brk++;
1277                                 if (info->flags & ASYNC_SAK)
1278                                         do_SAK(info->tty);
1279                         }
1280                         if (isr & IRQ_RXTIME) {
1281                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1282                         }
1283                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1284                                 if (info->params.mode == MGSL_MODE_HDLC)
1285                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1286                                 else
1287                                         rx_ready_async(info, isr & IRQ_RXEOM);
1288                         }
1289
1290                         /* transmit IRQs */
1291                         if (isr & IRQ_UNDERRUN) {
1292                                 if (info->tx_aborting)
1293                                         info->icount.txabort++;
1294                                 else
1295                                         info->icount.txunder++;
1296                                 tx_done(info);
1297                         }
1298                         else if (isr & IRQ_ALLSENT) {
1299                                 info->icount.txok++;
1300                                 tx_done(info);
1301                         }
1302                         else if (isr & IRQ_TXFIFO)
1303                                 tx_ready(info);
1304                 }
1305                 if (gis & BIT7) {
1306                         pis = read_reg(info, CHA + PIS);
1307                         if (pis & BIT1)
1308                                 dsr_change(info);
1309                         if (pis & BIT2)
1310                                 ri_change(info);
1311                 }
1312         }
1313
1314         /* Request bottom half processing if there's something
1315          * for it to do and the bh is not already running
1316          */
1317
1318         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1319                 if ( debug_level >= DEBUG_LEVEL_ISR )
1320                         printk("%s(%d):%s queueing bh task.\n",
1321                                 __FILE__,__LINE__,info->device_name);
1322                 schedule_work(&info->task);
1323                 info->bh_requested = 1;
1324         }
1325
1326         spin_unlock(&info->lock);
1327
1328         if (debug_level >= DEBUG_LEVEL_ISR)
1329                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1330                        __FILE__,__LINE__,irq);
1331
1332         return IRQ_HANDLED;
1333 }
1334
1335 /* Initialize and start device.
1336  */
1337 static int startup(MGSLPC_INFO * info)
1338 {
1339         int retval = 0;
1340
1341         if (debug_level >= DEBUG_LEVEL_INFO)
1342                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1343
1344         if (info->flags & ASYNC_INITIALIZED)
1345                 return 0;
1346
1347         if (!info->tx_buf) {
1348                 /* allocate a page of memory for a transmit buffer */
1349                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1350                 if (!info->tx_buf) {
1351                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1352                                 __FILE__,__LINE__,info->device_name);
1353                         return -ENOMEM;
1354                 }
1355         }
1356
1357         info->pending_bh = 0;
1358
1359         memset(&info->icount, 0, sizeof(info->icount));
1360
1361         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1362
1363         /* Allocate and claim adapter resources */
1364         retval = claim_resources(info);
1365
1366         /* perform existance check and diagnostics */
1367         if ( !retval )
1368                 retval = adapter_test(info);
1369
1370         if ( retval ) {
1371                 if (capable(CAP_SYS_ADMIN) && info->tty)
1372                         set_bit(TTY_IO_ERROR, &info->tty->flags);
1373                 release_resources(info);
1374                 return retval;
1375         }
1376
1377         /* program hardware for current parameters */
1378         mgslpc_change_params(info);
1379
1380         if (info->tty)
1381                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1382
1383         info->flags |= ASYNC_INITIALIZED;
1384
1385         return 0;
1386 }
1387
1388 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1389  */
1390 static void shutdown(MGSLPC_INFO * info)
1391 {
1392         unsigned long flags;
1393
1394         if (!(info->flags & ASYNC_INITIALIZED))
1395                 return;
1396
1397         if (debug_level >= DEBUG_LEVEL_INFO)
1398                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1399                          __FILE__,__LINE__, info->device_name );
1400
1401         /* clear status wait queue because status changes */
1402         /* can't happen after shutting down the hardware */
1403         wake_up_interruptible(&info->status_event_wait_q);
1404         wake_up_interruptible(&info->event_wait_q);
1405
1406         del_timer_sync(&info->tx_timer);
1407
1408         if (info->tx_buf) {
1409                 free_page((unsigned long) info->tx_buf);
1410                 info->tx_buf = NULL;
1411         }
1412
1413         spin_lock_irqsave(&info->lock,flags);
1414
1415         rx_stop(info);
1416         tx_stop(info);
1417
1418         /* TODO:disable interrupts instead of reset to preserve signal states */
1419         reset_device(info);
1420
1421         if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1422                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1423                 set_signals(info);
1424         }
1425
1426         spin_unlock_irqrestore(&info->lock,flags);
1427
1428         release_resources(info);
1429
1430         if (info->tty)
1431                 set_bit(TTY_IO_ERROR, &info->tty->flags);
1432
1433         info->flags &= ~ASYNC_INITIALIZED;
1434 }
1435
1436 static void mgslpc_program_hw(MGSLPC_INFO *info)
1437 {
1438         unsigned long flags;
1439
1440         spin_lock_irqsave(&info->lock,flags);
1441
1442         rx_stop(info);
1443         tx_stop(info);
1444         info->tx_count = info->tx_put = info->tx_get = 0;
1445
1446         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1447                 hdlc_mode(info);
1448         else
1449                 async_mode(info);
1450
1451         set_signals(info);
1452
1453         info->dcd_chkcount = 0;
1454         info->cts_chkcount = 0;
1455         info->ri_chkcount = 0;
1456         info->dsr_chkcount = 0;
1457
1458         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1459         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1460         get_signals(info);
1461
1462         if (info->netcount || info->tty->termios->c_cflag & CREAD)
1463                 rx_start(info);
1464
1465         spin_unlock_irqrestore(&info->lock,flags);
1466 }
1467
1468 /* Reconfigure adapter based on new parameters
1469  */
1470 static void mgslpc_change_params(MGSLPC_INFO *info)
1471 {
1472         unsigned cflag;
1473         int bits_per_char;
1474
1475         if (!info->tty || !info->tty->termios)
1476                 return;
1477
1478         if (debug_level >= DEBUG_LEVEL_INFO)
1479                 printk("%s(%d):mgslpc_change_params(%s)\n",
1480                          __FILE__,__LINE__, info->device_name );
1481
1482         cflag = info->tty->termios->c_cflag;
1483
1484         /* if B0 rate (hangup) specified then negate DTR and RTS */
1485         /* otherwise assert DTR and RTS */
1486         if (cflag & CBAUD)
1487                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1488         else
1489                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1490
1491         /* byte size and parity */
1492
1493         switch (cflag & CSIZE) {
1494         case CS5: info->params.data_bits = 5; break;
1495         case CS6: info->params.data_bits = 6; break;
1496         case CS7: info->params.data_bits = 7; break;
1497         case CS8: info->params.data_bits = 8; break;
1498         default:  info->params.data_bits = 7; break;
1499         }
1500
1501         if (cflag & CSTOPB)
1502                 info->params.stop_bits = 2;
1503         else
1504                 info->params.stop_bits = 1;
1505
1506         info->params.parity = ASYNC_PARITY_NONE;
1507         if (cflag & PARENB) {
1508                 if (cflag & PARODD)
1509                         info->params.parity = ASYNC_PARITY_ODD;
1510                 else
1511                         info->params.parity = ASYNC_PARITY_EVEN;
1512 #ifdef CMSPAR
1513                 if (cflag & CMSPAR)
1514                         info->params.parity = ASYNC_PARITY_SPACE;
1515 #endif
1516         }
1517
1518         /* calculate number of jiffies to transmit a full
1519          * FIFO (32 bytes) at specified data rate
1520          */
1521         bits_per_char = info->params.data_bits +
1522                         info->params.stop_bits + 1;
1523
1524         /* if port data rate is set to 460800 or less then
1525          * allow tty settings to override, otherwise keep the
1526          * current data rate.
1527          */
1528         if (info->params.data_rate <= 460800) {
1529                 info->params.data_rate = tty_get_baud_rate(info->tty);
1530         }
1531
1532         if ( info->params.data_rate ) {
1533                 info->timeout = (32*HZ*bits_per_char) /
1534                                 info->params.data_rate;
1535         }
1536         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1537
1538         if (cflag & CRTSCTS)
1539                 info->flags |= ASYNC_CTS_FLOW;
1540         else
1541                 info->flags &= ~ASYNC_CTS_FLOW;
1542
1543         if (cflag & CLOCAL)
1544                 info->flags &= ~ASYNC_CHECK_CD;
1545         else
1546                 info->flags |= ASYNC_CHECK_CD;
1547
1548         /* process tty input control flags */
1549
1550         info->read_status_mask = 0;
1551         if (I_INPCK(info->tty))
1552                 info->read_status_mask |= BIT7 | BIT6;
1553         if (I_IGNPAR(info->tty))
1554                 info->ignore_status_mask |= BIT7 | BIT6;
1555
1556         mgslpc_program_hw(info);
1557 }
1558
1559 /* Add a character to the transmit buffer
1560  */
1561 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1562 {
1563         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1564         unsigned long flags;
1565
1566         if (debug_level >= DEBUG_LEVEL_INFO) {
1567                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1568                         __FILE__,__LINE__,ch,info->device_name);
1569         }
1570
1571         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1572                 return;
1573
1574         if (!info->tx_buf)
1575                 return;
1576
1577         spin_lock_irqsave(&info->lock,flags);
1578
1579         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1580                 if (info->tx_count < TXBUFSIZE - 1) {
1581                         info->tx_buf[info->tx_put++] = ch;
1582                         info->tx_put &= TXBUFSIZE-1;
1583                         info->tx_count++;
1584                 }
1585         }
1586
1587         spin_unlock_irqrestore(&info->lock,flags);
1588 }
1589
1590 /* Enable transmitter so remaining characters in the
1591  * transmit buffer are sent.
1592  */
1593 static void mgslpc_flush_chars(struct tty_struct *tty)
1594 {
1595         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1596         unsigned long flags;
1597
1598         if (debug_level >= DEBUG_LEVEL_INFO)
1599                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1600                         __FILE__,__LINE__,info->device_name,info->tx_count);
1601
1602         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1603                 return;
1604
1605         if (info->tx_count <= 0 || tty->stopped ||
1606             tty->hw_stopped || !info->tx_buf)
1607                 return;
1608
1609         if (debug_level >= DEBUG_LEVEL_INFO)
1610                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1611                         __FILE__,__LINE__,info->device_name);
1612
1613         spin_lock_irqsave(&info->lock,flags);
1614         if (!info->tx_active)
1615                 tx_start(info);
1616         spin_unlock_irqrestore(&info->lock,flags);
1617 }
1618
1619 /* Send a block of data
1620  *
1621  * Arguments:
1622  *
1623  * tty        pointer to tty information structure
1624  * buf        pointer to buffer containing send data
1625  * count      size of send data in bytes
1626  *
1627  * Returns: number of characters written
1628  */
1629 static int mgslpc_write(struct tty_struct * tty,
1630                         const unsigned char *buf, int count)
1631 {
1632         int c, ret = 0;
1633         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1634         unsigned long flags;
1635
1636         if (debug_level >= DEBUG_LEVEL_INFO)
1637                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1638                         __FILE__,__LINE__,info->device_name,count);
1639
1640         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1641                 !info->tx_buf)
1642                 goto cleanup;
1643
1644         if (info->params.mode == MGSL_MODE_HDLC) {
1645                 if (count > TXBUFSIZE) {
1646                         ret = -EIO;
1647                         goto cleanup;
1648                 }
1649                 if (info->tx_active)
1650                         goto cleanup;
1651                 else if (info->tx_count)
1652                         goto start;
1653         }
1654
1655         for (;;) {
1656                 c = min(count,
1657                         min(TXBUFSIZE - info->tx_count - 1,
1658                             TXBUFSIZE - info->tx_put));
1659                 if (c <= 0)
1660                         break;
1661
1662                 memcpy(info->tx_buf + info->tx_put, buf, c);
1663
1664                 spin_lock_irqsave(&info->lock,flags);
1665                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1666                 info->tx_count += c;
1667                 spin_unlock_irqrestore(&info->lock,flags);
1668
1669                 buf += c;
1670                 count -= c;
1671                 ret += c;
1672         }
1673 start:
1674         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1675                 spin_lock_irqsave(&info->lock,flags);
1676                 if (!info->tx_active)
1677                         tx_start(info);
1678                 spin_unlock_irqrestore(&info->lock,flags);
1679         }
1680 cleanup:
1681         if (debug_level >= DEBUG_LEVEL_INFO)
1682                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1683                         __FILE__,__LINE__,info->device_name,ret);
1684         return ret;
1685 }
1686
1687 /* Return the count of free bytes in transmit buffer
1688  */
1689 static int mgslpc_write_room(struct tty_struct *tty)
1690 {
1691         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1692         int ret;
1693
1694         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1695                 return 0;
1696
1697         if (info->params.mode == MGSL_MODE_HDLC) {
1698                 /* HDLC (frame oriented) mode */
1699                 if (info->tx_active)
1700                         return 0;
1701                 else
1702                         return HDLC_MAX_FRAME_SIZE;
1703         } else {
1704                 ret = TXBUFSIZE - info->tx_count - 1;
1705                 if (ret < 0)
1706                         ret = 0;
1707         }
1708
1709         if (debug_level >= DEBUG_LEVEL_INFO)
1710                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1711                          __FILE__,__LINE__, info->device_name, ret);
1712         return ret;
1713 }
1714
1715 /* Return the count of bytes in transmit buffer
1716  */
1717 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1718 {
1719         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1720         int rc;
1721
1722         if (debug_level >= DEBUG_LEVEL_INFO)
1723                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1724                          __FILE__,__LINE__, info->device_name );
1725
1726         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1727                 return 0;
1728
1729         if (info->params.mode == MGSL_MODE_HDLC)
1730                 rc = info->tx_active ? info->max_frame_size : 0;
1731         else
1732                 rc = info->tx_count;
1733
1734         if (debug_level >= DEBUG_LEVEL_INFO)
1735                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1736                          __FILE__,__LINE__, info->device_name, rc);
1737
1738         return rc;
1739 }
1740
1741 /* Discard all data in the send buffer
1742  */
1743 static void mgslpc_flush_buffer(struct tty_struct *tty)
1744 {
1745         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1746         unsigned long flags;
1747
1748         if (debug_level >= DEBUG_LEVEL_INFO)
1749                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1750                          __FILE__,__LINE__, info->device_name );
1751
1752         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1753                 return;
1754
1755         spin_lock_irqsave(&info->lock,flags);
1756         info->tx_count = info->tx_put = info->tx_get = 0;
1757         del_timer(&info->tx_timer);
1758         spin_unlock_irqrestore(&info->lock,flags);
1759
1760         wake_up_interruptible(&tty->write_wait);
1761         tty_wakeup(tty);
1762 }
1763
1764 /* Send a high-priority XON/XOFF character
1765  */
1766 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1767 {
1768         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1769         unsigned long flags;
1770
1771         if (debug_level >= DEBUG_LEVEL_INFO)
1772                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1773                          __FILE__,__LINE__, info->device_name, ch );
1774
1775         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1776                 return;
1777
1778         info->x_char = ch;
1779         if (ch) {
1780                 spin_lock_irqsave(&info->lock,flags);
1781                 if (!info->tx_enabled)
1782                         tx_start(info);
1783                 spin_unlock_irqrestore(&info->lock,flags);
1784         }
1785 }
1786
1787 /* Signal remote device to throttle send data (our receive data)
1788  */
1789 static void mgslpc_throttle(struct tty_struct * tty)
1790 {
1791         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1792         unsigned long flags;
1793
1794         if (debug_level >= DEBUG_LEVEL_INFO)
1795                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1796                          __FILE__,__LINE__, info->device_name );
1797
1798         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1799                 return;
1800
1801         if (I_IXOFF(tty))
1802                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1803
1804         if (tty->termios->c_cflag & CRTSCTS) {
1805                 spin_lock_irqsave(&info->lock,flags);
1806                 info->serial_signals &= ~SerialSignal_RTS;
1807                 set_signals(info);
1808                 spin_unlock_irqrestore(&info->lock,flags);
1809         }
1810 }
1811
1812 /* Signal remote device to stop throttling send data (our receive data)
1813  */
1814 static void mgslpc_unthrottle(struct tty_struct * tty)
1815 {
1816         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1817         unsigned long flags;
1818
1819         if (debug_level >= DEBUG_LEVEL_INFO)
1820                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1821                          __FILE__,__LINE__, info->device_name );
1822
1823         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1824                 return;
1825
1826         if (I_IXOFF(tty)) {
1827                 if (info->x_char)
1828                         info->x_char = 0;
1829                 else
1830                         mgslpc_send_xchar(tty, START_CHAR(tty));
1831         }
1832
1833         if (tty->termios->c_cflag & CRTSCTS) {
1834                 spin_lock_irqsave(&info->lock,flags);
1835                 info->serial_signals |= SerialSignal_RTS;
1836                 set_signals(info);
1837                 spin_unlock_irqrestore(&info->lock,flags);
1838         }
1839 }
1840
1841 /* get the current serial statistics
1842  */
1843 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1844 {
1845         int err;
1846         if (debug_level >= DEBUG_LEVEL_INFO)
1847                 printk("get_params(%s)\n", info->device_name);
1848         if (!user_icount) {
1849                 memset(&info->icount, 0, sizeof(info->icount));
1850         } else {
1851                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1852                 if (err)
1853                         return -EFAULT;
1854         }
1855         return 0;
1856 }
1857
1858 /* get the current serial parameters
1859  */
1860 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1861 {
1862         int err;
1863         if (debug_level >= DEBUG_LEVEL_INFO)
1864                 printk("get_params(%s)\n", info->device_name);
1865         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1866         if (err)
1867                 return -EFAULT;
1868         return 0;
1869 }
1870
1871 /* set the serial parameters
1872  *
1873  * Arguments:
1874  *
1875  *      info            pointer to device instance data
1876  *      new_params      user buffer containing new serial params
1877  *
1878  * Returns:     0 if success, otherwise error code
1879  */
1880 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1881 {
1882         unsigned long flags;
1883         MGSL_PARAMS tmp_params;
1884         int err;
1885
1886         if (debug_level >= DEBUG_LEVEL_INFO)
1887                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1888                         info->device_name );
1889         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1890         if (err) {
1891                 if ( debug_level >= DEBUG_LEVEL_INFO )
1892                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1893                                 __FILE__,__LINE__,info->device_name);
1894                 return -EFAULT;
1895         }
1896
1897         spin_lock_irqsave(&info->lock,flags);
1898         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1899         spin_unlock_irqrestore(&info->lock,flags);
1900
1901         mgslpc_change_params(info);
1902
1903         return 0;
1904 }
1905
1906 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1907 {
1908         int err;
1909         if (debug_level >= DEBUG_LEVEL_INFO)
1910                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1911         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1912         if (err)
1913                 return -EFAULT;
1914         return 0;
1915 }
1916
1917 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1918 {
1919         unsigned long flags;
1920         if (debug_level >= DEBUG_LEVEL_INFO)
1921                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1922         spin_lock_irqsave(&info->lock,flags);
1923         info->idle_mode = idle_mode;
1924         tx_set_idle(info);
1925         spin_unlock_irqrestore(&info->lock,flags);
1926         return 0;
1927 }
1928
1929 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1930 {
1931         int err;
1932         if (debug_level >= DEBUG_LEVEL_INFO)
1933                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1934         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1935         if (err)
1936                 return -EFAULT;
1937         return 0;
1938 }
1939
1940 static int set_interface(MGSLPC_INFO * info, int if_mode)
1941 {
1942         unsigned long flags;
1943         unsigned char val;
1944         if (debug_level >= DEBUG_LEVEL_INFO)
1945                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1946         spin_lock_irqsave(&info->lock,flags);
1947         info->if_mode = if_mode;
1948
1949         val = read_reg(info, PVR) & 0x0f;
1950         switch (info->if_mode)
1951         {
1952         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1953         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1954         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1955         }
1956         write_reg(info, PVR, val);
1957
1958         spin_unlock_irqrestore(&info->lock,flags);
1959         return 0;
1960 }
1961
1962 static int set_txenable(MGSLPC_INFO * info, int enable)
1963 {
1964         unsigned long flags;
1965
1966         if (debug_level >= DEBUG_LEVEL_INFO)
1967                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1968
1969         spin_lock_irqsave(&info->lock,flags);
1970         if (enable) {
1971                 if (!info->tx_enabled)
1972                         tx_start(info);
1973         } else {
1974                 if (info->tx_enabled)
1975                         tx_stop(info);
1976         }
1977         spin_unlock_irqrestore(&info->lock,flags);
1978         return 0;
1979 }
1980
1981 static int tx_abort(MGSLPC_INFO * info)
1982 {
1983         unsigned long flags;
1984
1985         if (debug_level >= DEBUG_LEVEL_INFO)
1986                 printk("tx_abort(%s)\n", info->device_name);
1987
1988         spin_lock_irqsave(&info->lock,flags);
1989         if (info->tx_active && info->tx_count &&
1990             info->params.mode == MGSL_MODE_HDLC) {
1991                 /* clear data count so FIFO is not filled on next IRQ.
1992                  * This results in underrun and abort transmission.
1993                  */
1994                 info->tx_count = info->tx_put = info->tx_get = 0;
1995                 info->tx_aborting = TRUE;
1996         }
1997         spin_unlock_irqrestore(&info->lock,flags);
1998         return 0;
1999 }
2000
2001 static int set_rxenable(MGSLPC_INFO * info, int enable)
2002 {
2003         unsigned long flags;
2004
2005         if (debug_level >= DEBUG_LEVEL_INFO)
2006                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2007
2008         spin_lock_irqsave(&info->lock,flags);
2009         if (enable) {
2010                 if (!info->rx_enabled)
2011                         rx_start(info);
2012         } else {
2013                 if (info->rx_enabled)
2014                         rx_stop(info);
2015         }
2016         spin_unlock_irqrestore(&info->lock,flags);
2017         return 0;
2018 }
2019
2020 /* wait for specified event to occur
2021  *
2022  * Arguments:           info    pointer to device instance data
2023  *                      mask    pointer to bitmask of events to wait for
2024  * Return Value:        0       if successful and bit mask updated with
2025  *                              of events triggerred,
2026  *                      otherwise error code
2027  */
2028 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2029 {
2030         unsigned long flags;
2031         int s;
2032         int rc=0;
2033         struct mgsl_icount cprev, cnow;
2034         int events;
2035         int mask;
2036         struct  _input_signal_events oldsigs, newsigs;
2037         DECLARE_WAITQUEUE(wait, current);
2038
2039         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2040         if (rc)
2041                 return  -EFAULT;
2042
2043         if (debug_level >= DEBUG_LEVEL_INFO)
2044                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2045
2046         spin_lock_irqsave(&info->lock,flags);
2047
2048         /* return immediately if state matches requested events */
2049         get_signals(info);
2050         s = info->serial_signals;
2051         events = mask &
2052                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2053                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2054                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2055                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2056         if (events) {
2057                 spin_unlock_irqrestore(&info->lock,flags);
2058                 goto exit;
2059         }
2060
2061         /* save current irq counts */
2062         cprev = info->icount;
2063         oldsigs = info->input_signal_events;
2064
2065         if ((info->params.mode == MGSL_MODE_HDLC) &&
2066             (mask & MgslEvent_ExitHuntMode))
2067                 irq_enable(info, CHA, IRQ_EXITHUNT);
2068
2069         set_current_state(TASK_INTERRUPTIBLE);
2070         add_wait_queue(&info->event_wait_q, &wait);
2071
2072         spin_unlock_irqrestore(&info->lock,flags);
2073
2074
2075         for(;;) {
2076                 schedule();
2077                 if (signal_pending(current)) {
2078                         rc = -ERESTARTSYS;
2079                         break;
2080                 }
2081
2082                 /* get current irq counts */
2083                 spin_lock_irqsave(&info->lock,flags);
2084                 cnow = info->icount;
2085                 newsigs = info->input_signal_events;
2086                 set_current_state(TASK_INTERRUPTIBLE);
2087                 spin_unlock_irqrestore(&info->lock,flags);
2088
2089                 /* if no change, wait aborted for some reason */
2090                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2091                     newsigs.dsr_down == oldsigs.dsr_down &&
2092                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2093                     newsigs.dcd_down == oldsigs.dcd_down &&
2094                     newsigs.cts_up   == oldsigs.cts_up   &&
2095                     newsigs.cts_down == oldsigs.cts_down &&
2096                     newsigs.ri_up    == oldsigs.ri_up    &&
2097                     newsigs.ri_down  == oldsigs.ri_down  &&
2098                     cnow.exithunt    == cprev.exithunt   &&
2099                     cnow.rxidle      == cprev.rxidle) {
2100                         rc = -EIO;
2101                         break;
2102                 }
2103
2104                 events = mask &
2105                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2106                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2107                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2108                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2109                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2110                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2111                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2112                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2113                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2114                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2115                 if (events)
2116                         break;
2117
2118                 cprev = cnow;
2119                 oldsigs = newsigs;
2120         }
2121
2122         remove_wait_queue(&info->event_wait_q, &wait);
2123         set_current_state(TASK_RUNNING);
2124
2125         if (mask & MgslEvent_ExitHuntMode) {
2126                 spin_lock_irqsave(&info->lock,flags);
2127                 if (!waitqueue_active(&info->event_wait_q))
2128                         irq_disable(info, CHA, IRQ_EXITHUNT);
2129                 spin_unlock_irqrestore(&info->lock,flags);
2130         }
2131 exit:
2132         if (rc == 0)
2133                 PUT_USER(rc, events, mask_ptr);
2134         return rc;
2135 }
2136
2137 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2138 {
2139         unsigned long flags;
2140         int rc;
2141         struct mgsl_icount cprev, cnow;
2142         DECLARE_WAITQUEUE(wait, current);
2143
2144         /* save current irq counts */
2145         spin_lock_irqsave(&info->lock,flags);
2146         cprev = info->icount;
2147         add_wait_queue(&info->status_event_wait_q, &wait);
2148         set_current_state(TASK_INTERRUPTIBLE);
2149         spin_unlock_irqrestore(&info->lock,flags);
2150
2151         for(;;) {
2152                 schedule();
2153                 if (signal_pending(current)) {
2154                         rc = -ERESTARTSYS;
2155                         break;
2156                 }
2157
2158                 /* get new irq counts */
2159                 spin_lock_irqsave(&info->lock,flags);
2160                 cnow = info->icount;
2161                 set_current_state(TASK_INTERRUPTIBLE);
2162                 spin_unlock_irqrestore(&info->lock,flags);
2163
2164                 /* if no change, wait aborted for some reason */
2165                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2166                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2167                         rc = -EIO;
2168                         break;
2169                 }
2170
2171                 /* check for change in caller specified modem input */
2172                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2173                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2174                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2175                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2176                         rc = 0;
2177                         break;
2178                 }
2179
2180                 cprev = cnow;
2181         }
2182         remove_wait_queue(&info->status_event_wait_q, &wait);
2183         set_current_state(TASK_RUNNING);
2184         return rc;
2185 }
2186
2187 /* return the state of the serial control and status signals
2188  */
2189 static int tiocmget(struct tty_struct *tty, struct file *file)
2190 {
2191         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2192         unsigned int result;
2193         unsigned long flags;
2194
2195         spin_lock_irqsave(&info->lock,flags);
2196         get_signals(info);
2197         spin_unlock_irqrestore(&info->lock,flags);
2198
2199         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2200                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2201                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2202                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2203                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2204                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2205
2206         if (debug_level >= DEBUG_LEVEL_INFO)
2207                 printk("%s(%d):%s tiocmget() value=%08X\n",
2208                          __FILE__,__LINE__, info->device_name, result );
2209         return result;
2210 }
2211
2212 /* set modem control signals (DTR/RTS)
2213  */
2214 static int tiocmset(struct tty_struct *tty, struct file *file,
2215                     unsigned int set, unsigned int clear)
2216 {
2217         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2218         unsigned long flags;
2219
2220         if (debug_level >= DEBUG_LEVEL_INFO)
2221                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2222                         __FILE__,__LINE__,info->device_name, set, clear);
2223
2224         if (set & TIOCM_RTS)
2225                 info->serial_signals |= SerialSignal_RTS;
2226         if (set & TIOCM_DTR)
2227                 info->serial_signals |= SerialSignal_DTR;
2228         if (clear & TIOCM_RTS)
2229                 info->serial_signals &= ~SerialSignal_RTS;
2230         if (clear & TIOCM_DTR)
2231                 info->serial_signals &= ~SerialSignal_DTR;
2232
2233         spin_lock_irqsave(&info->lock,flags);
2234         set_signals(info);
2235         spin_unlock_irqrestore(&info->lock,flags);
2236
2237         return 0;
2238 }
2239
2240 /* Set or clear transmit break condition
2241  *
2242  * Arguments:           tty             pointer to tty instance data
2243  *                      break_state     -1=set break condition, 0=clear
2244  */
2245 static void mgslpc_break(struct tty_struct *tty, int break_state)
2246 {
2247         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2248         unsigned long flags;
2249
2250         if (debug_level >= DEBUG_LEVEL_INFO)
2251                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2252                          __FILE__,__LINE__, info->device_name, break_state);
2253
2254         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2255                 return;
2256
2257         spin_lock_irqsave(&info->lock,flags);
2258         if (break_state == -1)
2259                 set_reg_bits(info, CHA+DAFO, BIT6);
2260         else
2261                 clear_reg_bits(info, CHA+DAFO, BIT6);
2262         spin_unlock_irqrestore(&info->lock,flags);
2263 }
2264
2265 /* Service an IOCTL request
2266  *
2267  * Arguments:
2268  *
2269  *      tty     pointer to tty instance data
2270  *      file    pointer to associated file object for device
2271  *      cmd     IOCTL command code
2272  *      arg     command argument/context
2273  *
2274  * Return Value:        0 if success, otherwise error code
2275  */
2276 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2277                         unsigned int cmd, unsigned long arg)
2278 {
2279         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2280
2281         if (debug_level >= DEBUG_LEVEL_INFO)
2282                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2283                         info->device_name, cmd );
2284
2285         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2286                 return -ENODEV;
2287
2288         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2289             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2290                 if (tty->flags & (1 << TTY_IO_ERROR))
2291                     return -EIO;
2292         }
2293
2294         return ioctl_common(info, cmd, arg);
2295 }
2296
2297 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2298 {
2299         int error;
2300         struct mgsl_icount cnow;        /* kernel counter temps */
2301         struct serial_icounter_struct __user *p_cuser;  /* user space */
2302         void __user *argp = (void __user *)arg;
2303         unsigned long flags;
2304
2305         switch (cmd) {
2306         case MGSL_IOCGPARAMS:
2307                 return get_params(info, argp);
2308         case MGSL_IOCSPARAMS:
2309                 return set_params(info, argp);
2310         case MGSL_IOCGTXIDLE:
2311                 return get_txidle(info, argp);
2312         case MGSL_IOCSTXIDLE:
2313                 return set_txidle(info, (int)arg);
2314         case MGSL_IOCGIF:
2315                 return get_interface(info, argp);
2316         case MGSL_IOCSIF:
2317                 return set_interface(info,(int)arg);
2318         case MGSL_IOCTXENABLE:
2319                 return set_txenable(info,(int)arg);
2320         case MGSL_IOCRXENABLE:
2321                 return set_rxenable(info,(int)arg);
2322         case MGSL_IOCTXABORT:
2323                 return tx_abort(info);
2324         case MGSL_IOCGSTATS:
2325                 return get_stats(info, argp);
2326         case MGSL_IOCWAITEVENT:
2327                 return wait_events(info, argp);
2328         case TIOCMIWAIT:
2329                 return modem_input_wait(info,(int)arg);
2330         case TIOCGICOUNT:
2331                 spin_lock_irqsave(&info->lock,flags);
2332                 cnow = info->icount;
2333                 spin_unlock_irqrestore(&info->lock,flags);
2334                 p_cuser = argp;
2335                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2336                 if (error) return error;
2337                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2338                 if (error) return error;
2339                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2340                 if (error) return error;
2341                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2342                 if (error) return error;
2343                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2344                 if (error) return error;
2345                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2346                 if (error) return error;
2347                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2348                 if (error) return error;
2349                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2350                 if (error) return error;
2351                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2352                 if (error) return error;
2353                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2354                 if (error) return error;
2355                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2356                 if (error) return error;
2357                 return 0;
2358         default:
2359                 return -ENOIOCTLCMD;
2360         }
2361         return 0;
2362 }
2363
2364 /* Set new termios settings
2365  *
2366  * Arguments:
2367  *
2368  *      tty             pointer to tty structure
2369  *      termios         pointer to buffer to hold returned old termios
2370  */
2371 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2372 {
2373         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2374         unsigned long flags;
2375
2376         if (debug_level >= DEBUG_LEVEL_INFO)
2377                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2378                         tty->driver->name );
2379
2380         /* just return if nothing has changed */
2381         if ((tty->termios->c_cflag == old_termios->c_cflag)
2382             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2383                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2384           return;
2385
2386         mgslpc_change_params(info);
2387
2388         /* Handle transition to B0 status */
2389         if (old_termios->c_cflag & CBAUD &&
2390             !(tty->termios->c_cflag & CBAUD)) {
2391                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2392                 spin_lock_irqsave(&info->lock,flags);
2393                 set_signals(info);
2394                 spin_unlock_irqrestore(&info->lock,flags);
2395         }
2396
2397         /* Handle transition away from B0 status */
2398         if (!(old_termios->c_cflag & CBAUD) &&
2399             tty->termios->c_cflag & CBAUD) {
2400                 info->serial_signals |= SerialSignal_DTR;
2401                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2402                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2403                         info->serial_signals |= SerialSignal_RTS;
2404                 }
2405                 spin_lock_irqsave(&info->lock,flags);
2406                 set_signals(info);
2407                 spin_unlock_irqrestore(&info->lock,flags);
2408         }
2409
2410         /* Handle turning off CRTSCTS */
2411         if (old_termios->c_cflag & CRTSCTS &&
2412             !(tty->termios->c_cflag & CRTSCTS)) {
2413                 tty->hw_stopped = 0;
2414                 tx_release(tty);
2415         }
2416 }
2417
2418 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2419 {
2420         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2421
2422         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2423                 return;
2424
2425         if (debug_level >= DEBUG_LEVEL_INFO)
2426                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2427                          __FILE__,__LINE__, info->device_name, info->count);
2428
2429         if (!info->count)
2430                 return;
2431
2432         if (tty_hung_up_p(filp))
2433                 goto cleanup;
2434
2435         if ((tty->count == 1) && (info->count != 1)) {
2436                 /*
2437                  * tty->count is 1 and the tty structure will be freed.
2438                  * info->count should be one in this case.
2439                  * if it's not, correct it so that the port is shutdown.
2440                  */
2441                 printk("mgslpc_close: bad refcount; tty->count is 1, "
2442                        "info->count is %d\n", info->count);
2443                 info->count = 1;
2444         }
2445
2446         info->count--;
2447
2448         /* if at least one open remaining, leave hardware active */
2449         if (info->count)
2450                 goto cleanup;
2451
2452         info->flags |= ASYNC_CLOSING;
2453
2454         /* set tty->closing to notify line discipline to
2455          * only process XON/XOFF characters. Only the N_TTY
2456          * discipline appears to use this (ppp does not).
2457          */
2458         tty->closing = 1;
2459
2460         /* wait for transmit data to clear all layers */
2461
2462         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2463                 if (debug_level >= DEBUG_LEVEL_INFO)
2464                         printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2465                                  __FILE__,__LINE__, info->device_name );
2466                 tty_wait_until_sent(tty, info->closing_wait);
2467         }
2468
2469         if (info->flags & ASYNC_INITIALIZED)
2470                 mgslpc_wait_until_sent(tty, info->timeout);
2471
2472         if (tty->driver->flush_buffer)
2473                 tty->driver->flush_buffer(tty);
2474
2475         ldisc_flush_buffer(tty);
2476
2477         shutdown(info);
2478
2479         tty->closing = 0;
2480         info->tty = NULL;
2481
2482         if (info->blocked_open) {
2483                 if (info->close_delay) {
2484                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
2485                 }
2486                 wake_up_interruptible(&info->open_wait);
2487         }
2488
2489         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2490
2491         wake_up_interruptible(&info->close_wait);
2492
2493 cleanup:
2494         if (debug_level >= DEBUG_LEVEL_INFO)
2495                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2496                         tty->driver->name, info->count);
2497 }
2498
2499 /* Wait until the transmitter is empty.
2500  */
2501 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2502 {
2503         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2504         unsigned long orig_jiffies, char_time;
2505
2506         if (!info )
2507                 return;
2508
2509         if (debug_level >= DEBUG_LEVEL_INFO)
2510                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2511                          __FILE__,__LINE__, info->device_name );
2512
2513         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2514                 return;
2515
2516         if (!(info->flags & ASYNC_INITIALIZED))
2517                 goto exit;
2518
2519         orig_jiffies = jiffies;
2520
2521         /* Set check interval to 1/5 of estimated time to
2522          * send a character, and make it at least 1. The check
2523          * interval should also be less than the timeout.
2524          * Note: use tight timings here to satisfy the NIST-PCTS.
2525          */
2526
2527         if ( info->params.data_rate ) {
2528                 char_time = info->timeout/(32 * 5);
2529                 if (!char_time)
2530                         char_time++;
2531         } else
2532                 char_time = 1;
2533
2534         if (timeout)
2535                 char_time = min_t(unsigned long, char_time, timeout);
2536
2537         if (info->params.mode == MGSL_MODE_HDLC) {
2538                 while (info->tx_active) {
2539                         msleep_interruptible(jiffies_to_msecs(char_time));
2540                         if (signal_pending(current))
2541                                 break;
2542                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2543                                 break;
2544                 }
2545         } else {
2546                 while ((info->tx_count || info->tx_active) &&
2547                         info->tx_enabled) {
2548                         msleep_interruptible(jiffies_to_msecs(char_time));
2549                         if (signal_pending(current))
2550                                 break;
2551                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2552                                 break;
2553                 }
2554         }
2555
2556 exit:
2557         if (debug_level >= DEBUG_LEVEL_INFO)
2558                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2559                          __FILE__,__LINE__, info->device_name );
2560 }
2561
2562 /* Called by tty_hangup() when a hangup is signaled.
2563  * This is the same as closing all open files for the port.
2564  */
2565 static void mgslpc_hangup(struct tty_struct *tty)
2566 {
2567         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2568
2569         if (debug_level >= DEBUG_LEVEL_INFO)
2570                 printk("%s(%d):mgslpc_hangup(%s)\n",
2571                          __FILE__,__LINE__, info->device_name );
2572
2573         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2574                 return;
2575
2576         mgslpc_flush_buffer(tty);
2577         shutdown(info);
2578
2579         info->count = 0;
2580         info->flags &= ~ASYNC_NORMAL_ACTIVE;
2581         info->tty = NULL;
2582
2583         wake_up_interruptible(&info->open_wait);
2584 }
2585
2586 /* Block the current process until the specified port
2587  * is ready to be opened.
2588  */
2589 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2590                            MGSLPC_INFO *info)
2591 {
2592         DECLARE_WAITQUEUE(wait, current);
2593         int             retval;
2594         int             do_clocal = 0, extra_count = 0;
2595         unsigned long   flags;
2596
2597         if (debug_level >= DEBUG_LEVEL_INFO)
2598                 printk("%s(%d):block_til_ready on %s\n",
2599                          __FILE__,__LINE__, tty->driver->name );
2600
2601         if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2602                 /* nonblock mode is set or port is not enabled */
2603                 /* just verify that callout device is not active */
2604                 info->flags |= ASYNC_NORMAL_ACTIVE;
2605                 return 0;
2606         }
2607
2608         if (tty->termios->c_cflag & CLOCAL)
2609                 do_clocal = 1;
2610
2611         /* Wait for carrier detect and the line to become
2612          * free (i.e., not in use by the callout).  While we are in
2613          * this loop, info->count is dropped by one, so that
2614          * mgslpc_close() knows when to free things.  We restore it upon
2615          * exit, either normal or abnormal.
2616          */
2617
2618         retval = 0;
2619         add_wait_queue(&info->open_wait, &wait);
2620
2621         if (debug_level >= DEBUG_LEVEL_INFO)
2622                 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2623                          __FILE__,__LINE__, tty->driver->name, info->count );
2624
2625         spin_lock_irqsave(&info->lock, flags);
2626         if (!tty_hung_up_p(filp)) {
2627                 extra_count = 1;
2628                 info->count--;
2629         }
2630         spin_unlock_irqrestore(&info->lock, flags);
2631         info->blocked_open++;
2632
2633         while (1) {
2634                 if ((tty->termios->c_cflag & CBAUD)) {
2635                         spin_lock_irqsave(&info->lock,flags);
2636                         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2637                         set_signals(info);
2638                         spin_unlock_irqrestore(&info->lock,flags);
2639                 }
2640
2641                 set_current_state(TASK_INTERRUPTIBLE);
2642
2643                 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2644                         retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2645                                         -EAGAIN : -ERESTARTSYS;
2646                         break;
2647                 }
2648
2649                 spin_lock_irqsave(&info->lock,flags);
2650                 get_signals(info);
2651                 spin_unlock_irqrestore(&info->lock,flags);
2652
2653                 if (!(info->flags & ASYNC_CLOSING) &&
2654                     (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2655                         break;
2656                 }
2657
2658                 if (signal_pending(current)) {
2659                         retval = -ERESTARTSYS;
2660                         break;
2661                 }
2662
2663                 if (debug_level >= DEBUG_LEVEL_INFO)
2664                         printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2665                                  __FILE__,__LINE__, tty->driver->name, info->count );
2666
2667                 schedule();
2668         }
2669
2670         set_current_state(TASK_RUNNING);
2671         remove_wait_queue(&info->open_wait, &wait);
2672
2673         if (extra_count)
2674                 info->count++;
2675         info->blocked_open--;
2676
2677         if (debug_level >= DEBUG_LEVEL_INFO)
2678                 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2679                          __FILE__,__LINE__, tty->driver->name, info->count );
2680
2681         if (!retval)
2682                 info->flags |= ASYNC_NORMAL_ACTIVE;
2683
2684         return retval;
2685 }
2686
2687 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2688 {
2689         MGSLPC_INFO     *info;
2690         int                     retval, line;
2691         unsigned long flags;
2692
2693         /* verify range of specified line number */
2694         line = tty->index;
2695         if ((line < 0) || (line >= mgslpc_device_count)) {
2696                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2697                         __FILE__,__LINE__,line);
2698                 return -ENODEV;
2699         }
2700
2701         /* find the info structure for the specified line */
2702         info = mgslpc_device_list;
2703         while(info && info->line != line)
2704                 info = info->next_device;
2705         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2706                 return -ENODEV;
2707
2708         tty->driver_data = info;
2709         info->tty = tty;
2710
2711         if (debug_level >= DEBUG_LEVEL_INFO)
2712                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2713                          __FILE__,__LINE__,tty->driver->name, info->count);
2714
2715         /* If port is closing, signal caller to try again */
2716         if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2717                 if (info->flags & ASYNC_CLOSING)
2718                         interruptible_sleep_on(&info->close_wait);
2719                 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2720                         -EAGAIN : -ERESTARTSYS);
2721                 goto cleanup;
2722         }
2723
2724         info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2725
2726         spin_lock_irqsave(&info->netlock, flags);
2727         if (info->netcount) {
2728                 retval = -EBUSY;
2729                 spin_unlock_irqrestore(&info->netlock, flags);
2730                 goto cleanup;
2731         }
2732         info->count++;
2733         spin_unlock_irqrestore(&info->netlock, flags);
2734
2735         if (info->count == 1) {
2736                 /* 1st open on this device, init hardware */
2737                 retval = startup(info);
2738                 if (retval < 0)
2739                         goto cleanup;
2740         }
2741
2742         retval = block_til_ready(tty, filp, info);
2743         if (retval) {
2744                 if (debug_level >= DEBUG_LEVEL_INFO)
2745                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2746                                  __FILE__,__LINE__, info->device_name, retval);
2747                 goto cleanup;
2748         }
2749
2750         if (debug_level >= DEBUG_LEVEL_INFO)
2751                 printk("%s(%d):mgslpc_open(%s) success\n",
2752                          __FILE__,__LINE__, info->device_name);
2753         retval = 0;
2754
2755 cleanup:
2756         if (retval) {
2757                 if (tty->count == 1)
2758                         info->tty = NULL; /* tty layer will release tty struct */
2759                 if(info->count)
2760                         info->count--;
2761         }
2762
2763         return retval;
2764 }
2765
2766 /*
2767  * /proc fs routines....
2768  */
2769
2770 static inline int line_info(char *buf, MGSLPC_INFO *info)
2771 {
2772         char    stat_buf[30];
2773         int     ret;
2774         unsigned long flags;
2775
2776         ret = sprintf(buf, "%s:io:%04X irq:%d",
2777                       info->device_name, info->io_base, info->irq_level);
2778
2779         /* output current serial signal states */
2780         spin_lock_irqsave(&info->lock,flags);
2781         get_signals(info);
2782         spin_unlock_irqrestore(&info->lock,flags);
2783
2784         stat_buf[0] = 0;
2785         stat_buf[1] = 0;
2786         if (info->serial_signals & SerialSignal_RTS)
2787                 strcat(stat_buf, "|RTS");
2788         if (info->serial_signals & SerialSignal_CTS)
2789                 strcat(stat_buf, "|CTS");
2790         if (info->serial_signals & SerialSignal_DTR)
2791                 strcat(stat_buf, "|DTR");
2792         if (info->serial_signals & SerialSignal_DSR)
2793                 strcat(stat_buf, "|DSR");
2794         if (info->serial_signals & SerialSignal_DCD)
2795                 strcat(stat_buf, "|CD");
2796         if (info->serial_signals & SerialSignal_RI)
2797                 strcat(stat_buf, "|RI");
2798
2799         if (info->params.mode == MGSL_MODE_HDLC) {
2800                 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2801                               info->icount.txok, info->icount.rxok);
2802                 if (info->icount.txunder)
2803                         ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2804                 if (info->icount.txabort)
2805                         ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2806                 if (info->icount.rxshort)
2807                         ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2808                 if (info->icount.rxlong)
2809                         ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2810                 if (info->icount.rxover)
2811                         ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2812                 if (info->icount.rxcrc)
2813                         ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2814         } else {
2815                 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2816                               info->icount.tx, info->icount.rx);
2817                 if (info->icount.frame)
2818                         ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2819                 if (info->icount.parity)
2820                         ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2821                 if (info->icount.brk)
2822                         ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2823                 if (info->icount.overrun)
2824                         ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2825         }
2826
2827         /* Append serial signal status to end */
2828         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2829
2830         ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2831                        info->tx_active,info->bh_requested,info->bh_running,
2832                        info->pending_bh);
2833
2834         return ret;
2835 }
2836
2837 /* Called to print information about devices
2838  */
2839 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2840                  int *eof, void *data)
2841 {
2842         int len = 0, l;
2843         off_t   begin = 0;
2844         MGSLPC_INFO *info;
2845
2846         len += sprintf(page, "synclink driver:%s\n", driver_version);
2847
2848         info = mgslpc_device_list;
2849         while( info ) {
2850                 l = line_info(page + len, info);
2851                 len += l;
2852                 if (len+begin > off+count)
2853                         goto done;
2854                 if (len+begin < off) {
2855                         begin += len;
2856                         len = 0;
2857                 }
2858                 info = info->next_device;
2859         }
2860
2861         *eof = 1;
2862 done:
2863         if (off >= len+begin)
2864                 return 0;
2865         *start = page + (off-begin);
2866         return ((count < begin+len-off) ? count : begin+len-off);
2867 }
2868
2869 static int rx_alloc_buffers(MGSLPC_INFO *info)
2870 {
2871         /* each buffer has header and data */
2872         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2873
2874         /* calculate total allocation size for 8 buffers */
2875         info->rx_buf_total_size = info->rx_buf_size * 8;
2876
2877         /* limit total allocated memory */
2878         if (info->rx_buf_total_size > 0x10000)
2879                 info->rx_buf_total_size = 0x10000;
2880
2881         /* calculate number of buffers */
2882         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2883
2884         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2885         if (info->rx_buf == NULL)
2886                 return -ENOMEM;
2887
2888         rx_reset_buffers(info);
2889         return 0;
2890 }
2891
2892 static void rx_free_buffers(MGSLPC_INFO *info)
2893 {
2894         kfree(info->rx_buf);
2895         info->rx_buf = NULL;
2896 }
2897
2898 static int claim_resources(MGSLPC_INFO *info)
2899 {
2900         if (rx_alloc_buffers(info) < 0 ) {
2901                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2902                 release_resources(info);
2903                 return -ENODEV;
2904         }
2905         return 0;
2906 }
2907
2908 static void release_resources(MGSLPC_INFO *info)
2909 {
2910         if (debug_level >= DEBUG_LEVEL_INFO)
2911                 printk("release_resources(%s)\n", info->device_name);
2912         rx_free_buffers(info);
2913 }
2914
2915 /* Add the specified device instance data structure to the
2916  * global linked list of devices and increment the device count.
2917  *
2918  * Arguments:           info    pointer to device instance data
2919  */
2920 static void mgslpc_add_device(MGSLPC_INFO *info)
2921 {
2922         info->next_device = NULL;
2923         info->line = mgslpc_device_count;
2924         sprintf(info->device_name,"ttySLP%d",info->line);
2925
2926         if (info->line < MAX_DEVICE_COUNT) {
2927                 if (maxframe[info->line])
2928                         info->max_frame_size = maxframe[info->line];
2929                 info->dosyncppp = dosyncppp[info->line];
2930         }
2931
2932         mgslpc_device_count++;
2933
2934         if (!mgslpc_device_list)
2935                 mgslpc_device_list = info;
2936         else {
2937                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2938                 while( current_dev->next_device )
2939                         current_dev = current_dev->next_device;
2940                 current_dev->next_device = info;
2941         }
2942
2943         if (info->max_frame_size < 4096)
2944                 info->max_frame_size = 4096;
2945         else if (info->max_frame_size > 65535)
2946                 info->max_frame_size = 65535;
2947
2948         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2949                 info->device_name, info->io_base, info->irq_level);
2950
2951 #if SYNCLINK_GENERIC_HDLC
2952         hdlcdev_init(info);
2953 #endif
2954 }
2955
2956 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2957 {
2958         MGSLPC_INFO *info = mgslpc_device_list;
2959         MGSLPC_INFO *last = NULL;
2960
2961         while(info) {
2962                 if (info == remove_info) {
2963                         if (last)
2964                                 last->next_device = info->next_device;
2965                         else
2966                                 mgslpc_device_list = info->next_device;
2967 #if SYNCLINK_GENERIC_HDLC
2968                         hdlcdev_exit(info);
2969 #endif
2970                         release_resources(info);
2971                         kfree(info);
2972                         mgslpc_device_count--;
2973                         return;
2974                 }
2975                 last = info;
2976                 info = info->next_device;
2977         }
2978 }
2979
2980 static struct pcmcia_device_id mgslpc_ids[] = {
2981         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2982         PCMCIA_DEVICE_NULL
2983 };
2984 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2985
2986 static struct pcmcia_driver mgslpc_driver = {
2987         .owner          = THIS_MODULE,
2988         .drv            = {
2989                 .name   = "synclink_cs",
2990         },
2991         .probe          = mgslpc_probe,
2992         .remove         = mgslpc_detach,
2993         .id_table       = mgslpc_ids,
2994         .suspend        = mgslpc_suspend,
2995         .resume         = mgslpc_resume,
2996 };
2997
2998 static const struct tty_operations mgslpc_ops = {
2999         .open = mgslpc_open,
3000         .close = mgslpc_close,
3001         .write = mgslpc_write,
3002         .put_char = mgslpc_put_char,
3003         .flush_chars = mgslpc_flush_chars,
3004         .write_room = mgslpc_write_room,
3005         .chars_in_buffer = mgslpc_chars_in_buffer,
3006         .flush_buffer = mgslpc_flush_buffer,
3007         .ioctl = mgslpc_ioctl,
3008         .throttle = mgslpc_throttle,
3009         .unthrottle = mgslpc_unthrottle,
3010         .send_xchar = mgslpc_send_xchar,
3011         .break_ctl = mgslpc_break,
3012         .wait_until_sent = mgslpc_wait_until_sent,
3013         .read_proc = mgslpc_read_proc,
3014         .set_termios = mgslpc_set_termios,
3015         .stop = tx_pause,
3016         .start = tx_release,
3017         .hangup = mgslpc_hangup,
3018         .tiocmget = tiocmget,
3019         .tiocmset = tiocmset,
3020 };
3021
3022 static void synclink_cs_cleanup(void)
3023 {
3024         int rc;
3025
3026         printk("Unloading %s: version %s\n", driver_name, driver_version);
3027
3028         while(mgslpc_device_list)
3029                 mgslpc_remove_device(mgslpc_device_list);
3030
3031         if (serial_driver) {
3032                 if ((rc = tty_unregister_driver(serial_driver)))
3033                         printk("%s(%d) failed to unregister tty driver err=%d\n",
3034                                __FILE__,__LINE__,rc);
3035                 put_tty_driver(serial_driver);
3036         }
3037
3038         pcmcia_unregister_driver(&mgslpc_driver);
3039 }
3040
3041 static int __init synclink_cs_init(void)
3042 {
3043     int rc;
3044
3045     if (break_on_load) {
3046             mgslpc_get_text_ptr();
3047             BREAKPOINT();
3048     }
3049
3050     printk("%s %s\n", driver_name, driver_version);
3051
3052     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3053             return rc;
3054
3055     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3056     if (!serial_driver) {
3057             rc = -ENOMEM;
3058             goto error;
3059     }
3060
3061     /* Initialize the tty_driver structure */
3062
3063     serial_driver->owner = THIS_MODULE;
3064     serial_driver->driver_name = "synclink_cs";
3065     serial_driver->name = "ttySLP";
3066     serial_driver->major = ttymajor;
3067     serial_driver->minor_start = 64;
3068     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3069     serial_driver->subtype = SERIAL_TYPE_NORMAL;
3070     serial_driver->init_termios = tty_std_termios;
3071     serial_driver->init_termios.c_cflag =
3072             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3073     serial_driver->flags = TTY_DRIVER_REAL_RAW;
3074     tty_set_operations(serial_driver, &mgslpc_ops);
3075
3076     if ((rc = tty_register_driver(serial_driver)) < 0) {
3077             printk("%s(%d):Couldn't register serial driver\n",
3078                    __FILE__,__LINE__);
3079             put_tty_driver(serial_driver);
3080             serial_driver = NULL;
3081             goto error;
3082     }
3083
3084     printk("%s %s, tty major#%d\n",
3085            driver_name, driver_version,
3086            serial_driver->major);
3087
3088     return 0;
3089
3090 error:
3091     synclink_cs_cleanup();
3092     return rc;
3093 }
3094
3095 static void __exit synclink_cs_exit(void)
3096 {
3097         synclink_cs_cleanup();
3098 }
3099
3100 module_init(synclink_cs_init);
3101 module_exit(synclink_cs_exit);
3102
3103 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3104 {
3105         unsigned int M, N;
3106         unsigned char val;
3107
3108         /* note:standard BRG mode is broken in V3.2 chip
3109          * so enhanced mode is always used
3110          */
3111
3112         if (rate) {
3113                 N = 3686400 / rate;
3114                 if (!N)
3115                         N = 1;
3116                 N >>= 1;
3117                 for (M = 1; N > 64 && M < 16; M++)
3118                         N >>= 1;
3119                 N--;
3120
3121                 /* BGR[5..0] = N
3122                  * BGR[9..6] = M
3123                  * BGR[7..0] contained in BGR register
3124                  * BGR[9..8] contained in CCR2[7..6]
3125                  * divisor = (N+1)*2^M
3126                  *
3127                  * Note: M *must* not be zero (causes asymetric duty cycle)
3128                  */
3129                 write_reg(info, (unsigned char) (channel + BGR),
3130                                   (unsigned char) ((M << 6) + N));
3131                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3132                 val |= ((M << 4) & 0xc0);
3133                 write_reg(info, (unsigned char) (channel + CCR2), val);
3134         }
3135 }
3136
3137 /* Enabled the AUX clock output at the specified frequency.
3138  */
3139 static void enable_auxclk(MGSLPC_INFO *info)
3140 {
3141         unsigned char val;
3142
3143         /* MODE
3144          *
3145          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3146          * 05      ADM Address Mode, 0 = no addr recognition
3147          * 04      TMD Timer Mode, 0 = external
3148          * 03      RAC Receiver Active, 0 = inactive
3149          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3150          * 01      TRS Timer Resolution, 1=512
3151          * 00      TLP Test Loop, 0 = no loop
3152          *
3153          * 1000 0010
3154          */
3155         val = 0x82;
3156
3157         /* channel B RTS is used to enable AUXCLK driver on SP505 */
3158         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3159                 val |= BIT2;
3160         write_reg(info, CHB + MODE, val);
3161
3162         /* CCR0
3163          *
3164          * 07      PU Power Up, 1=active, 0=power down
3165          * 06      MCE Master Clock Enable, 1=enabled
3166          * 05      Reserved, 0
3167          * 04..02  SC[2..0] Encoding
3168          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3169          *
3170          * 11000000
3171          */
3172         write_reg(info, CHB + CCR0, 0xc0);
3173
3174         /* CCR1
3175          *
3176          * 07      SFLG Shared Flag, 0 = disable shared flags
3177          * 06      GALP Go Active On Loop, 0 = not used
3178          * 05      GLP Go On Loop, 0 = not used
3179          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3180          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3181          * 02..00  CM[2..0] Clock Mode
3182          *
3183          * 0001 0111
3184          */
3185         write_reg(info, CHB + CCR1, 0x17);
3186
3187         /* CCR2 (Channel B)
3188          *
3189          * 07..06  BGR[9..8] Baud rate bits 9..8
3190          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3191          * 04      SSEL Clock source select, 1=submode b
3192          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3193          * 02      RWX Read/Write Exchange 0=disabled
3194          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3195          * 00      DIV, data inversion 0=disabled, 1=enabled
3196          *
3197          * 0011 1000
3198          */
3199         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3200                 write_reg(info, CHB + CCR2, 0x38);
3201         else
3202                 write_reg(info, CHB + CCR2, 0x30);
3203
3204         /* CCR4
3205          *
3206          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3207          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3208          * 05      TST1 Test Pin, 0=normal operation
3209          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3210          * 03..02  Reserved, must be 0
3211          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3212          *
3213          * 0101 0000
3214          */
3215         write_reg(info, CHB + CCR4, 0x50);
3216
3217         /* if auxclk not enabled, set internal BRG so
3218          * CTS transitions can be detected (requires TxC)
3219          */
3220         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3221                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3222         else
3223                 mgslpc_set_rate(info, CHB, 921600);
3224 }
3225
3226 static void loopback_enable(MGSLPC_INFO *info)
3227 {
3228         unsigned char val;
3229
3230         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3231         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3232         write_reg(info, CHA + CCR1, val);
3233
3234         /* CCR2:04 SSEL Clock source select, 1=submode b */
3235         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3236         write_reg(info, CHA + CCR2, val);
3237
3238         /* set LinkSpeed if available, otherwise default to 2Mbps */
3239         if (info->params.clock_speed)
3240                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3241         else
3242                 mgslpc_set_rate(info, CHA, 1843200);
3243
3244         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3245         val = read_reg(info, CHA + MODE) | BIT0;
3246         write_reg(info, CHA + MODE, val);
3247 }
3248
3249 static void hdlc_mode(MGSLPC_INFO *info)
3250 {
3251         unsigned char val;
3252         unsigned char clkmode, clksubmode;
3253
3254         /* disable all interrupts */
3255         irq_disable(info, CHA, 0xffff);
3256         irq_disable(info, CHB, 0xffff);
3257         port_irq_disable(info, 0xff);
3258
3259         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3260         clkmode = clksubmode = 0;
3261         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3262             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3263                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3264                 clkmode = 7;
3265         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3266                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3267                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3268                 clkmode = 7;
3269                 clksubmode = 1;
3270         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3271                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3272                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3273                         clkmode = 6;
3274                         clksubmode = 1;
3275                 } else {
3276                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3277                         clkmode = 6;
3278                 }
3279         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3280                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3281                 clksubmode = 1;
3282         }
3283
3284         /* MODE
3285          *
3286          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3287          * 05      ADM Address Mode, 0 = no addr recognition
3288          * 04      TMD Timer Mode, 0 = external
3289          * 03      RAC Receiver Active, 0 = inactive
3290          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3291          * 01      TRS Timer Resolution, 1=512
3292          * 00      TLP Test Loop, 0 = no loop
3293          *
3294          * 1000 0010
3295          */
3296         val = 0x82;
3297         if (info->params.loopback)
3298                 val |= BIT0;
3299
3300         /* preserve RTS state */
3301         if (info->serial_signals & SerialSignal_RTS)
3302                 val |= BIT2;
3303         write_reg(info, CHA + MODE, val);
3304
3305         /* CCR0
3306          *
3307          * 07      PU Power Up, 1=active, 0=power down
3308          * 06      MCE Master Clock Enable, 1=enabled
3309          * 05      Reserved, 0
3310          * 04..02  SC[2..0] Encoding
3311          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3312          *
3313          * 11000000
3314          */
3315         val = 0xc0;
3316         switch (info->params.encoding)
3317         {
3318         case HDLC_ENCODING_NRZI:
3319                 val |= BIT3;
3320                 break;
3321         case HDLC_ENCODING_BIPHASE_SPACE:
3322                 val |= BIT4;
3323                 break;          // FM0
3324         case HDLC_ENCODING_BIPHASE_MARK:
3325                 val |= BIT4 + BIT2;
3326                 break;          // FM1
3327         case HDLC_ENCODING_BIPHASE_LEVEL:
3328                 val |= BIT4 + BIT3;
3329                 break;          // Manchester
3330         }
3331         write_reg(info, CHA + CCR0, val);
3332
3333         /* CCR1
3334          *
3335          * 07      SFLG Shared Flag, 0 = disable shared flags
3336          * 06      GALP Go Active On Loop, 0 = not used
3337          * 05      GLP Go On Loop, 0 = not used
3338          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3339          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3340          * 02..00  CM[2..0] Clock Mode
3341          *
3342          * 0001 0000
3343          */
3344         val = 0x10 + clkmode;
3345         write_reg(info, CHA + CCR1, val);
3346
3347         /* CCR2
3348          *
3349          * 07..06  BGR[9..8] Baud rate bits 9..8
3350          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3351          * 04      SSEL Clock source select, 1=submode b
3352          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3353          * 02      RWX Read/Write Exchange 0=disabled
3354          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3355          * 00      DIV, data inversion 0=disabled, 1=enabled
3356          *
3357          * 0000 0000
3358          */
3359         val = 0x00;
3360         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3361             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3362                 val |= BIT5;
3363         if (clksubmode)
3364                 val |= BIT4;
3365         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3366                 val |= BIT1;
3367         if (info->params.encoding == HDLC_ENCODING_NRZB)
3368                 val |= BIT0;
3369         write_reg(info, CHA + CCR2, val);
3370
3371         /* CCR3
3372          *
3373          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3374          * 05      EPT Enable preamble transmission, 1=enabled
3375          * 04      RADD Receive address pushed to FIFO, 0=disabled
3376          * 03      CRL CRC Reset Level, 0=FFFF
3377          * 02      RCRC Rx CRC 0=On 1=Off
3378          * 01      TCRC Tx CRC 0=On 1=Off
3379          * 00      PSD DPLL Phase Shift Disable
3380          *
3381          * 0000 0000
3382          */
3383         val = 0x00;
3384         if (info->params.crc_type == HDLC_CRC_NONE)
3385                 val |= BIT2 + BIT1;
3386         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3387                 val |= BIT5;
3388         switch (info->params.preamble_length)
3389         {
3390         case HDLC_PREAMBLE_LENGTH_16BITS:
3391                 val |= BIT6;
3392                 break;
3393         case HDLC_PREAMBLE_LENGTH_32BITS:
3394                 val |= BIT6;
3395                 break;
3396         case HDLC_PREAMBLE_LENGTH_64BITS:
3397                 val |= BIT7 + BIT6;
3398                 break;
3399         }
3400         write_reg(info, CHA + CCR3, val);
3401
3402         /* PRE - Preamble pattern */
3403         val = 0;
3404         switch (info->params.preamble)
3405         {
3406         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3407         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3408         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3409         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3410         }
3411         write_reg(info, CHA + PRE, val);
3412
3413         /* CCR4
3414          *
3415          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3416          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3417          * 05      TST1 Test Pin, 0=normal operation
3418          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3419          * 03..02  Reserved, must be 0
3420          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3421          *
3422          * 0101 0000
3423          */
3424         val = 0x50;
3425         write_reg(info, CHA + CCR4, val);
3426         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3427                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3428         else
3429                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3430
3431         /* RLCR Receive length check register
3432          *
3433          * 7     1=enable receive length check
3434          * 6..0  Max frame length = (RL + 1) * 32
3435          */
3436         write_reg(info, CHA + RLCR, 0);
3437
3438         /* XBCH Transmit Byte Count High
3439          *
3440          * 07      DMA mode, 0 = interrupt driven
3441          * 06      NRM, 0=ABM (ignored)
3442          * 05      CAS Carrier Auto Start
3443          * 04      XC Transmit Continuously (ignored)
3444          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3445          *
3446          * 0000 0000
3447          */
3448         val = 0x00;
3449         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3450                 val |= BIT5;
3451         write_reg(info, CHA + XBCH, val);
3452         enable_auxclk(info);
3453         if (info->params.loopback || info->testing_irq)
3454                 loopback_enable(info);
3455         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3456         {
3457                 irq_enable(info, CHB, IRQ_CTS);
3458                 /* PVR[3] 1=AUTO CTS active */
3459                 set_reg_bits(info, CHA + PVR, BIT3);
3460         } else
3461                 clear_reg_bits(info, CHA + PVR, BIT3);
3462
3463         irq_enable(info, CHA,
3464                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3465                          IRQ_UNDERRUN + IRQ_TXFIFO);
3466         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3467         wait_command_complete(info, CHA);
3468         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3469
3470         /* Master clock mode enabled above to allow reset commands
3471          * to complete even if no data clocks are present.
3472          *
3473          * Disable master clock mode for normal communications because
3474          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3475          * IRQ when in master clock mode.
3476          *
3477          * Leave master clock mode enabled for IRQ test because the
3478          * timer IRQ used by the test can only happen in master clock mode.
3479          */
3480         if (!info->testing_irq)
3481                 clear_reg_bits(info, CHA + CCR0, BIT6);
3482
3483         tx_set_idle(info);
3484
3485         tx_stop(info);
3486         rx_stop(info);
3487 }
3488
3489 static void rx_stop(MGSLPC_INFO *info)
3490 {
3491         if (debug_level >= DEBUG_LEVEL_ISR)
3492                 printk("%s(%d):rx_stop(%s)\n",
3493                          __FILE__,__LINE__, info->device_name );
3494
3495         /* MODE:03 RAC Receiver Active, 0=inactive */
3496         clear_reg_bits(info, CHA + MODE, BIT3);
3497
3498         info->rx_enabled = 0;
3499         info->rx_overflow = 0;
3500 }
3501
3502 static void rx_start(MGSLPC_INFO *info)
3503 {
3504         if (debug_level >= DEBUG_LEVEL_ISR)
3505                 printk("%s(%d):rx_start(%s)\n",
3506                          __FILE__,__LINE__, info->device_name );
3507
3508         rx_reset_buffers(info);
3509         info->rx_enabled = 0;
3510         info->rx_overflow = 0;
3511
3512         /* MODE:03 RAC Receiver Active, 1=active */
3513         set_reg_bits(info, CHA + MODE, BIT3);
3514
3515         info->rx_enabled = 1;
3516 }
3517
3518 static void tx_start(MGSLPC_INFO *info)
3519 {
3520         if (debug_level >= DEBUG_LEVEL_ISR)
3521                 printk("%s(%d):tx_start(%s)\n",
3522                          __FILE__,__LINE__, info->device_name );
3523
3524         if (info->tx_count) {
3525                 /* If auto RTS enabled and RTS is inactive, then assert */
3526                 /* RTS and set a flag indicating that the driver should */
3527                 /* negate RTS when the transmission completes. */
3528                 info->drop_rts_on_tx_done = 0;
3529
3530                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3531                         get_signals(info);
3532                         if (!(info->serial_signals & SerialSignal_RTS)) {
3533                                 info->serial_signals |= SerialSignal_RTS;
3534                                 set_signals(info);
3535                                 info->drop_rts_on_tx_done = 1;
3536                         }
3537                 }
3538
3539                 if (info->params.mode == MGSL_MODE_ASYNC) {
3540                         if (!info->tx_active) {
3541                                 info->tx_active = 1;
3542                                 tx_ready(info);
3543                         }
3544                 } else {
3545                         info->tx_active = 1;
3546                         tx_ready(info);
3547                         mod_timer(&info->tx_timer, jiffies +
3548                                         msecs_to_jiffies(5000));
3549                 }
3550         }
3551
3552         if (!info->tx_enabled)
3553                 info->tx_enabled = 1;
3554 }
3555
3556 static void tx_stop(MGSLPC_INFO *info)
3557 {
3558         if (debug_level >= DEBUG_LEVEL_ISR)
3559                 printk("%s(%d):tx_stop(%s)\n",
3560                          __FILE__,__LINE__, info->device_name );
3561
3562         del_timer(&info->tx_timer);
3563
3564         info->tx_enabled = 0;
3565         info->tx_active  = 0;
3566 }
3567
3568 /* Reset the adapter to a known state and prepare it for further use.
3569  */
3570 static void reset_device(MGSLPC_INFO *info)
3571 {
3572         /* power up both channels (set BIT7) */
3573         write_reg(info, CHA + CCR0, 0x80);
3574         write_reg(info, CHB + CCR0, 0x80);
3575         write_reg(info, CHA + MODE, 0);
3576         write_reg(info, CHB + MODE, 0);
3577
3578         /* disable all interrupts */
3579         irq_disable(info, CHA, 0xffff);
3580         irq_disable(info, CHB, 0xffff);
3581         port_irq_disable(info, 0xff);
3582
3583         /* PCR Port Configuration Register
3584          *
3585          * 07..04  DEC[3..0] Serial I/F select outputs
3586          * 03      output, 1=AUTO CTS control enabled
3587          * 02      RI Ring Indicator input 0=active
3588          * 01      DSR input 0=active
3589          * 00      DTR output 0=active
3590          *
3591          * 0000 0110
3592          */
3593         write_reg(info, PCR, 0x06);
3594
3595         /* PVR Port Value Register
3596          *
3597          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3598          * 03      AUTO CTS output 1=enabled
3599          * 02      RI Ring Indicator input
3600          * 01      DSR input
3601          * 00      DTR output (1=inactive)
3602          *
3603          * 0000 0001
3604          */
3605 //      write_reg(info, PVR, PVR_DTR);
3606
3607         /* IPC Interrupt Port Configuration
3608          *
3609          * 07      VIS 1=Masked interrupts visible
3610          * 06..05  Reserved, 0
3611          * 04..03  SLA Slave address, 00 ignored
3612          * 02      CASM Cascading Mode, 1=daisy chain
3613          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3614          *
3615          * 0000 0101
3616          */
3617         write_reg(info, IPC, 0x05);
3618 }
3619
3620 static void async_mode(MGSLPC_INFO *info)
3621 {
3622         unsigned char val;
3623
3624         /* disable all interrupts */
3625         irq_disable(info, CHA, 0xffff);
3626         irq_disable(info, CHB, 0xffff);
3627         port_irq_disable(info, 0xff);
3628
3629         /* MODE
3630          *
3631          * 07      Reserved, 0
3632          * 06      FRTS RTS State, 0=active
3633          * 05      FCTS Flow Control on CTS
3634          * 04      FLON Flow Control Enable
3635          * 03      RAC Receiver Active, 0 = inactive
3636          * 02      RTS 0=Auto RTS, 1=manual RTS
3637          * 01      TRS Timer Resolution, 1=512
3638          * 00      TLP Test Loop, 0 = no loop
3639          *
3640          * 0000 0110
3641          */
3642         val = 0x06;
3643         if (info->params.loopback)
3644                 val |= BIT0;
3645
3646         /* preserve RTS state */
3647         if (!(info->serial_signals & SerialSignal_RTS))
3648                 val |= BIT6;
3649         write_reg(info, CHA + MODE, val);
3650
3651         /* CCR0
3652          *
3653          * 07      PU Power Up, 1=active, 0=power down
3654          * 06      MCE Master Clock Enable, 1=enabled
3655          * 05      Reserved, 0
3656          * 04..02  SC[2..0] Encoding, 000=NRZ
3657          * 01..00  SM[1..0] Serial Mode, 11=Async
3658          *
3659          * 1000 0011
3660          */
3661         write_reg(info, CHA + CCR0, 0x83);
3662
3663         /* CCR1
3664          *
3665          * 07..05  Reserved, 0
3666          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3667          * 03      BCR Bit Clock Rate, 1=16x
3668          * 02..00  CM[2..0] Clock Mode, 111=BRG
3669          *
3670          * 0001 1111
3671          */
3672         write_reg(info, CHA + CCR1, 0x1f);
3673
3674         /* CCR2 (channel A)
3675          *
3676          * 07..06  BGR[9..8] Baud rate bits 9..8
3677          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3678          * 04      SSEL Clock source select, 1=submode b
3679          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3680          * 02      RWX Read/Write Exchange 0=disabled
3681          * 01      Reserved, 0
3682          * 00      DIV, data inversion 0=disabled, 1=enabled
3683          *
3684          * 0001 0000
3685          */
3686         write_reg(info, CHA + CCR2, 0x10);
3687
3688         /* CCR3
3689          *
3690          * 07..01  Reserved, 0
3691          * 00      PSD DPLL Phase Shift Disable
3692          *
3693          * 0000 0000
3694          */
3695         write_reg(info, CHA + CCR3, 0);
3696
3697         /* CCR4
3698          *
3699          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3700          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3701          * 05      TST1 Test Pin, 0=normal operation
3702          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3703          * 03..00  Reserved, must be 0
3704          *
3705          * 0101 0000
3706          */
3707         write_reg(info, CHA + CCR4, 0x50);
3708         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3709
3710         /* DAFO Data Format
3711          *
3712          * 07      Reserved, 0
3713          * 06      XBRK transmit break, 0=normal operation
3714          * 05      Stop bits (0=1, 1=2)
3715          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3716          * 02      PAREN Parity Enable
3717          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3718          *
3719          */
3720         val = 0x00;
3721         if (info->params.data_bits != 8)
3722                 val |= BIT0;    /* 7 bits */
3723         if (info->params.stop_bits != 1)
3724                 val |= BIT5;
3725         if (info->params.parity != ASYNC_PARITY_NONE)
3726         {
3727                 val |= BIT2;    /* Parity enable */
3728                 if (info->params.parity == ASYNC_PARITY_ODD)
3729                         val |= BIT3;
3730                 else
3731                         val |= BIT4;
3732         }
3733         write_reg(info, CHA + DAFO, val);
3734
3735         /* RFC Rx FIFO Control
3736          *
3737          * 07      Reserved, 0
3738          * 06      DPS, 1=parity bit not stored in data byte
3739          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3740          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3741          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3742          * 01      Reserved, 0
3743          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3744          *
3745          * 0101 1100
3746          */
3747         write_reg(info, CHA + RFC, 0x5c);
3748
3749         /* RLCR Receive length check register
3750          *
3751          * Max frame length = (RL + 1) * 32
3752          */
3753         write_reg(info, CHA + RLCR, 0);
3754
3755         /* XBCH Transmit Byte Count High
3756          *
3757          * 07      DMA mode, 0 = interrupt driven
3758          * 06      NRM, 0=ABM (ignored)
3759          * 05      CAS Carrier Auto Start
3760          * 04      XC Transmit Continuously (ignored)
3761          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3762          *
3763          * 0000 0000
3764          */
3765         val = 0x00;
3766         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3767                 val |= BIT5;
3768         write_reg(info, CHA + XBCH, val);
3769         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3770                 irq_enable(info, CHA, IRQ_CTS);
3771
3772         /* MODE:03 RAC Receiver Active, 1=active */
3773         set_reg_bits(info, CHA + MODE, BIT3);
3774         enable_auxclk(info);
3775         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3776                 irq_enable(info, CHB, IRQ_CTS);
3777                 /* PVR[3] 1=AUTO CTS active */
3778                 set_reg_bits(info, CHA + PVR, BIT3);
3779         } else
3780                 clear_reg_bits(info, CHA + PVR, BIT3);
3781         irq_enable(info, CHA,
3782                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3783                           IRQ_ALLSENT + IRQ_TXFIFO);
3784         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3785         wait_command_complete(info, CHA);
3786         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3787 }
3788
3789 /* Set the HDLC idle mode for the transmitter.
3790  */
3791 static void tx_set_idle(MGSLPC_INFO *info)
3792 {
3793         /* Note: ESCC2 only supports flags and one idle modes */
3794         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3795                 set_reg_bits(info, CHA + CCR1, BIT3);
3796         else
3797                 clear_reg_bits(info, CHA + CCR1, BIT3);
3798 }
3799
3800 /* get state of the V24 status (input) signals.
3801  */
3802 static void get_signals(MGSLPC_INFO *info)
3803 {
3804         unsigned char status = 0;
3805
3806         /* preserve DTR and RTS */
3807         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3808
3809         if (read_reg(info, CHB + VSTR) & BIT7)
3810                 info->serial_signals |= SerialSignal_DCD;
3811         if (read_reg(info, CHB + STAR) & BIT1)
3812                 info->serial_signals |= SerialSignal_CTS;
3813
3814         status = read_reg(info, CHA + PVR);
3815         if (!(status & PVR_RI))
3816                 info->serial_signals |= SerialSignal_RI;
3817         if (!(status & PVR_DSR))
3818                 info->serial_signals |= SerialSignal_DSR;
3819 }
3820
3821 /* Set the state of DTR and RTS based on contents of
3822  * serial_signals member of device extension.
3823  */
3824 static void set_signals(MGSLPC_INFO *info)
3825 {
3826         unsigned char val;
3827
3828         val = read_reg(info, CHA + MODE);
3829         if (info->params.mode == MGSL_MODE_ASYNC) {
3830                 if (info->serial_signals & SerialSignal_RTS)
3831                         val &= ~BIT6;
3832                 else
3833                         val |= BIT6;
3834         } else {
3835                 if (info->serial_signals & SerialSignal_RTS)
3836                         val |= BIT2;
3837                 else
3838                         val &= ~BIT2;
3839         }
3840         write_reg(info, CHA + MODE, val);
3841
3842         if (info->serial_signals & SerialSignal_DTR)
3843                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3844         else
3845                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3846 }
3847
3848 static void rx_reset_buffers(MGSLPC_INFO *info)
3849 {
3850         RXBUF *buf;
3851         int i;
3852
3853         info->rx_put = 0;
3854         info->rx_get = 0;
3855         info->rx_frame_count = 0;
3856         for (i=0 ; i < info->rx_buf_count ; i++) {
3857                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3858                 buf->status = buf->count = 0;
3859         }
3860 }
3861
3862 /* Attempt to return a received HDLC frame
3863  * Only frames received without errors are returned.
3864  *
3865  * Returns 1 if frame returned, otherwise 0
3866  */
3867 static int rx_get_frame(MGSLPC_INFO *info)
3868 {
3869         unsigned short status;
3870         RXBUF *buf;
3871         unsigned int framesize = 0;
3872         unsigned long flags;
3873         struct tty_struct *tty = info->tty;
3874         int return_frame = 0;
3875
3876         if (info->rx_frame_count == 0)
3877                 return 0;
3878
3879         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3880
3881         status = buf->status;
3882
3883         /* 07  VFR  1=valid frame
3884          * 06  RDO  1=data overrun
3885          * 05  CRC  1=OK, 0=error
3886          * 04  RAB  1=frame aborted
3887          */
3888         if ((status & 0xf0) != 0xA0) {
3889                 if (!(status & BIT7) || (status & BIT4))
3890                         info->icount.rxabort++;
3891                 else if (status & BIT6)
3892                         info->icount.rxover++;
3893                 else if (!(status & BIT5)) {
3894                         info->icount.rxcrc++;
3895                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3896                                 return_frame = 1;
3897                 }
3898                 framesize = 0;
3899 #if SYNCLINK_GENERIC_HDLC
3900                 {
3901                         struct net_device_stats *stats = hdlc_stats(info->netdev);
3902                         stats->rx_errors++;
3903                         stats->rx_frame_errors++;
3904                 }
3905 #endif
3906         } else
3907                 return_frame = 1;
3908
3909         if (return_frame)
3910                 framesize = buf->count;
3911
3912         if (debug_level >= DEBUG_LEVEL_BH)
3913                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3914                         __FILE__,__LINE__,info->device_name,status,framesize);
3915
3916         if (debug_level >= DEBUG_LEVEL_DATA)
3917                 trace_block(info, buf->data, framesize, 0);
3918
3919         if (framesize) {
3920                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3921                       framesize+1 > info->max_frame_size) ||
3922                     framesize > info->max_frame_size)
3923                         info->icount.rxlong++;
3924                 else {
3925                         if (status & BIT5)
3926                                 info->icount.rxok++;
3927
3928                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3929                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3930                                 ++framesize;
3931                         }
3932
3933 #if SYNCLINK_GENERIC_HDLC
3934                         if (info->netcount)
3935                                 hdlcdev_rx(info, buf->data, framesize);
3936                         else
3937 #endif
3938                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3939                 }
3940         }
3941
3942         spin_lock_irqsave(&info->lock,flags);
3943         buf->status = buf->count = 0;
3944         info->rx_frame_count--;
3945         info->rx_get++;
3946         if (info->rx_get >= info->rx_buf_count)
3947                 info->rx_get = 0;
3948         spin_unlock_irqrestore(&info->lock,flags);
3949
3950         return 1;
3951 }
3952
3953 static BOOLEAN register_test(MGSLPC_INFO *info)
3954 {
3955         static unsigned char patterns[] =
3956             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3957         static unsigned int count = ARRAY_SIZE(patterns);
3958         unsigned int i;
3959         BOOLEAN rc = TRUE;
3960         unsigned long flags;
3961
3962         spin_lock_irqsave(&info->lock,flags);
3963         reset_device(info);
3964
3965         for (i = 0; i < count; i++) {
3966                 write_reg(info, XAD1, patterns[i]);
3967                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3968                 if ((read_reg(info, XAD1) != patterns[i]) ||
3969                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3970                         rc = FALSE;
3971                         break;
3972                 }
3973         }
3974
3975         spin_unlock_irqrestore(&info->lock,flags);
3976         return rc;
3977 }
3978
3979 static BOOLEAN irq_test(MGSLPC_INFO *info)
3980 {
3981         unsigned long end_time;
3982         unsigned long flags;
3983
3984         spin_lock_irqsave(&info->lock,flags);
3985         reset_device(info);
3986
3987         info->testing_irq = TRUE;
3988         hdlc_mode(info);
3989
3990         info->irq_occurred = FALSE;
3991
3992         /* init hdlc mode */
3993
3994         irq_enable(info, CHA, IRQ_TIMER);
3995         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3996         issue_command(info, CHA, CMD_START_TIMER);
3997
3998         spin_unlock_irqrestore(&info->lock,flags);
3999
4000         end_time=100;
4001         while(end_time-- && !info->irq_occurred) {
4002                 msleep_interruptible(10);
4003         }
4004
4005         info->testing_irq = FALSE;
4006
4007         spin_lock_irqsave(&info->lock,flags);
4008         reset_device(info);
4009         spin_unlock_irqrestore(&info->lock,flags);
4010
4011         return info->irq_occurred ? TRUE : FALSE;
4012 }
4013
4014 static int adapter_test(MGSLPC_INFO *info)
4015 {
4016         if (!register_test(info)) {
4017                 info->init_error = DiagStatus_AddressFailure;
4018                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4019                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4020                 return -ENODEV;
4021         }
4022
4023         if (!irq_test(info)) {
4024                 info->init_error = DiagStatus_IrqFailure;
4025                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4026                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4027                 return -ENODEV;
4028         }
4029
4030         if (debug_level >= DEBUG_LEVEL_INFO)
4031                 printk("%s(%d):device %s passed diagnostics\n",
4032                         __FILE__,__LINE__,info->device_name);
4033         return 0;
4034 }
4035
4036 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4037 {
4038         int i;
4039         int linecount;
4040         if (xmit)
4041                 printk("%s tx data:\n",info->device_name);
4042         else
4043                 printk("%s rx data:\n",info->device_name);
4044
4045         while(count) {
4046                 if (count > 16)
4047                         linecount = 16;
4048                 else
4049                         linecount = count;
4050
4051                 for(i=0;i<linecount;i++)
4052                         printk("%02X ",(unsigned char)data[i]);
4053                 for(;i<17;i++)
4054                         printk("   ");
4055                 for(i=0;i<linecount;i++) {
4056                         if (data[i]>=040 && data[i]<=0176)
4057                                 printk("%c",data[i]);
4058                         else
4059                                 printk(".");
4060                 }
4061                 printk("\n");
4062
4063                 data  += linecount;
4064                 count -= linecount;
4065         }
4066 }
4067
4068 /* HDLC frame time out
4069  * update stats and do tx completion processing
4070  */
4071 static void tx_timeout(unsigned long context)
4072 {
4073         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4074         unsigned long flags;
4075
4076         if ( debug_level >= DEBUG_LEVEL_INFO )
4077                 printk( "%s(%d):tx_timeout(%s)\n",
4078                         __FILE__,__LINE__,info->device_name);
4079         if(info->tx_active &&
4080            info->params.mode == MGSL_MODE_HDLC) {
4081                 info->icount.txtimeout++;
4082         }
4083         spin_lock_irqsave(&info->lock,flags);
4084         info->tx_active = 0;
4085         info->tx_count = info->tx_put = info->tx_get = 0;
4086
4087         spin_unlock_irqrestore(&info->lock,flags);
4088
4089 #if SYNCLINK_GENERIC_HDLC
4090         if (info->netcount)
4091                 hdlcdev_tx_done(info);
4092         else
4093 #endif
4094                 bh_transmit(info);
4095 }
4096
4097 #if SYNCLINK_GENERIC_HDLC
4098
4099 /**
4100  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4101  * set encoding and frame check sequence (FCS) options
4102  *
4103  * dev       pointer to network device structure
4104  * encoding  serial encoding setting
4105  * parity    FCS setting
4106  *
4107  * returns 0 if success, otherwise error code
4108  */
4109 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4110                           unsigned short parity)
4111 {
4112         MGSLPC_INFO *info = dev_to_port(dev);
4113         unsigned char  new_encoding;
4114         unsigned short new_crctype;
4115
4116         /* return error if TTY interface open */
4117         if (info->count)
4118                 return -EBUSY;
4119
4120         switch (encoding)
4121         {
4122         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
4123         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4124         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4125         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4126         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4127         default: return -EINVAL;
4128         }
4129
4130         switch (parity)
4131         {
4132         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
4133         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4134         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4135         default: return -EINVAL;
4136         }
4137
4138         info->params.encoding = new_encoding;
4139         info->params.crc_type = new_crctype;
4140
4141         /* if network interface up, reprogram hardware */
4142         if (info->netcount)
4143                 mgslpc_program_hw(info);
4144
4145         return 0;
4146 }
4147
4148 /**
4149  * called by generic HDLC layer to send frame
4150  *
4151  * skb  socket buffer containing HDLC frame
4152  * dev  pointer to network device structure
4153  *
4154  * returns 0 if success, otherwise error code
4155  */
4156 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4157 {
4158         MGSLPC_INFO *info = dev_to_port(dev);
4159         struct net_device_stats *stats = hdlc_stats(dev);
4160         unsigned long flags;
4161
4162         if (debug_level >= DEBUG_LEVEL_INFO)
4163                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4164
4165         /* stop sending until this frame completes */
4166         netif_stop_queue(dev);
4167
4168         /* copy data to device buffers */
4169         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4170         info->tx_get = 0;
4171         info->tx_put = info->tx_count = skb->len;
4172
4173         /* update network statistics */
4174         stats->tx_packets++;
4175         stats->tx_bytes += skb->len;
4176
4177         /* done with socket buffer, so free it */
4178         dev_kfree_skb(skb);
4179
4180         /* save start time for transmit timeout detection */
4181         dev->trans_start = jiffies;
4182
4183         /* start hardware transmitter if necessary */
4184         spin_lock_irqsave(&info->lock,flags);
4185         if (!info->tx_active)
4186                 tx_start(info);
4187         spin_unlock_irqrestore(&info->lock,flags);
4188
4189         return 0;
4190 }
4191
4192 /**
4193  * called by network layer when interface enabled
4194  * claim resources and initialize hardware
4195  *
4196  * dev  pointer to network device structure
4197  *
4198  * returns 0 if success, otherwise error code
4199  */
4200 static int hdlcdev_open(struct net_device *dev)
4201 {
4202         MGSLPC_INFO *info = dev_to_port(dev);
4203         int rc;
4204         unsigned long flags;
4205
4206         if (debug_level >= DEBUG_LEVEL_INFO)
4207                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4208
4209         /* generic HDLC layer open processing */
4210         if ((rc = hdlc_open(dev)))
4211                 return rc;
4212
4213         /* arbitrate between network and tty opens */
4214         spin_lock_irqsave(&info->netlock, flags);
4215         if (info->count != 0 || info->netcount != 0) {
4216                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4217                 spin_unlock_irqrestore(&info->netlock, flags);
4218                 return -EBUSY;
4219         }
4220         info->netcount=1;
4221         spin_unlock_irqrestore(&info->netlock, flags);
4222
4223         /* claim resources and init adapter */
4224         if ((rc = startup(info)) != 0) {
4225                 spin_lock_irqsave(&info->netlock, flags);
4226                 info->netcount=0;
4227                 spin_unlock_irqrestore(&info->netlock, flags);
4228                 return rc;
4229         }
4230
4231         /* assert DTR and RTS, apply hardware settings */
4232         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4233         mgslpc_program_hw(info);
4234
4235         /* enable network layer transmit */
4236         dev->trans_start = jiffies;
4237         netif_start_queue(dev);
4238
4239         /* inform generic HDLC layer of current DCD status */
4240         spin_lock_irqsave(&info->lock, flags);
4241         get_signals(info);
4242         spin_unlock_irqrestore(&info->lock, flags);
4243         if (info->serial_signals & SerialSignal_DCD)
4244                 netif_carrier_on(dev);
4245         else
4246                 netif_carrier_off(dev);
4247         return 0;
4248 }
4249
4250 /**
4251  * called by network layer when interface is disabled
4252  * shutdown hardware and release resources
4253  *
4254  * dev  pointer to network device structure
4255  *
4256  * returns 0 if success, otherwise error code
4257  */
4258 static int hdlcdev_close(struct net_device *dev)
4259 {
4260         MGSLPC_INFO *info = dev_to_port(dev);
4261         unsigned long flags;
4262
4263         if (debug_level >= DEBUG_LEVEL_INFO)
4264                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4265
4266         netif_stop_queue(dev);
4267
4268         /* shutdown adapter and release resources */
4269         shutdown(info);
4270
4271         hdlc_close(dev);
4272
4273         spin_lock_irqsave(&info->netlock, flags);
4274         info->netcount=0;
4275         spin_unlock_irqrestore(&info->netlock, flags);
4276
4277         return 0;
4278 }
4279
4280 /**
4281  * called by network layer to process IOCTL call to network device
4282  *
4283  * dev  pointer to network device structure
4284  * ifr  pointer to network interface request structure
4285  * cmd  IOCTL command code
4286  *
4287  * returns 0 if success, otherwise error code
4288  */
4289 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4290 {
4291         const size_t size = sizeof(sync_serial_settings);
4292         sync_serial_settings new_line;
4293         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4294         MGSLPC_INFO *info = dev_to_port(dev);
4295         unsigned int flags;
4296
4297         if (debug_level >= DEBUG_LEVEL_INFO)
4298                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4299
4300         /* return error if TTY interface open */
4301         if (info->count)
4302                 return -EBUSY;
4303
4304         if (cmd != SIOCWANDEV)
4305                 return hdlc_ioctl(dev, ifr, cmd);
4306
4307         switch(ifr->ifr_settings.type) {
4308         case IF_GET_IFACE: /* return current sync_serial_settings */
4309
4310                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4311                 if (ifr->ifr_settings.size < size) {
4312                         ifr->ifr_settings.size = size; /* data size wanted */
4313                         return -ENOBUFS;
4314                 }
4315
4316                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4317                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4318                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4319                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4320
4321                 switch (flags){
4322                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4323                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4324                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4325                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4326                 default: new_line.clock_type = CLOCK_DEFAULT;
4327                 }
4328
4329                 new_line.clock_rate = info->params.clock_speed;
4330                 new_line.loopback   = info->params.loopback ? 1:0;
4331
4332                 if (copy_to_user(line, &new_line, size))
4333                         return -EFAULT;
4334                 return 0;
4335
4336         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4337
4338                 if(!capable(CAP_NET_ADMIN))
4339                         return -EPERM;
4340                 if (copy_from_user(&new_line, line, size))
4341                         return -EFAULT;
4342
4343                 switch (new_line.clock_type)
4344                 {
4345                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4346                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4347                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4348                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4349                 case CLOCK_DEFAULT:  flags = info->params.flags &
4350                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4351                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4352                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4353                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4354                 default: return -EINVAL;
4355                 }
4356
4357                 if (new_line.loopback != 0 && new_line.loopback != 1)
4358                         return -EINVAL;
4359
4360                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4361                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4362                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4363                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4364                 info->params.flags |= flags;
4365
4366                 info->params.loopback = new_line.loopback;
4367
4368                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4369                         info->params.clock_speed = new_line.clock_rate;
4370                 else
4371                         info->params.clock_speed = 0;
4372
4373                 /* if network interface up, reprogram hardware */
4374                 if (info->netcount)
4375                         mgslpc_program_hw(info);
4376                 return 0;
4377
4378         default:
4379                 return hdlc_ioctl(dev, ifr, cmd);
4380         }
4381 }
4382
4383 /**
4384  * called by network layer when transmit timeout is detected
4385  *
4386  * dev  pointer to network device structure
4387  */
4388 static void hdlcdev_tx_timeout(struct net_device *dev)
4389 {
4390         MGSLPC_INFO *info = dev_to_port(dev);
4391         struct net_device_stats *stats = hdlc_stats(dev);
4392         unsigned long flags;
4393
4394         if (debug_level >= DEBUG_LEVEL_INFO)
4395                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4396
4397         stats->tx_errors++;
4398         stats->tx_aborted_errors++;
4399
4400         spin_lock_irqsave(&info->lock,flags);
4401         tx_stop(info);
4402         spin_unlock_irqrestore(&info->lock,flags);
4403
4404         netif_wake_queue(dev);
4405 }
4406
4407 /**
4408  * called by device driver when transmit completes
4409  * reenable network layer transmit if stopped
4410  *
4411  * info  pointer to device instance information
4412  */
4413 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4414 {
4415         if (netif_queue_stopped(info->netdev))
4416                 netif_wake_queue(info->netdev);
4417 }
4418
4419 /**
4420  * called by device driver when frame received
4421  * pass frame to network layer
4422  *
4423  * info  pointer to device instance information
4424  * buf   pointer to buffer contianing frame data
4425  * size  count of data bytes in buf
4426  */
4427 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4428 {
4429         struct sk_buff *skb = dev_alloc_skb(size);
4430         struct net_device *dev = info->netdev;
4431         struct net_device_stats *stats = hdlc_stats(dev);
4432
4433         if (debug_level >= DEBUG_LEVEL_INFO)
4434                 printk("hdlcdev_rx(%s)\n",dev->name);
4435
4436         if (skb == NULL) {
4437                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4438                 stats->rx_dropped++;
4439                 return;
4440         }
4441
4442         memcpy(skb_put(skb, size),buf,size);
4443
4444         skb->protocol = hdlc_type_trans(skb, info->netdev);
4445
4446         stats->rx_packets++;
4447         stats->rx_bytes += size;
4448
4449         netif_rx(skb);
4450
4451         info->netdev->last_rx = jiffies;
4452 }
4453
4454 /**
4455  * called by device driver when adding device instance
4456  * do generic HDLC initialization
4457  *
4458  * info  pointer to device instance information
4459  *
4460  * returns 0 if success, otherwise error code
4461  */
4462 static int hdlcdev_init(MGSLPC_INFO *info)
4463 {
4464         int rc;
4465         struct net_device *dev;
4466         hdlc_device *hdlc;
4467
4468         /* allocate and initialize network and HDLC layer objects */
4469
4470         if (!(dev = alloc_hdlcdev(info))) {
4471                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4472                 return -ENOMEM;
4473         }
4474
4475         /* for network layer reporting purposes only */
4476         dev->base_addr = info->io_base;
4477         dev->irq       = info->irq_level;
4478
4479         /* network layer callbacks and settings */
4480         dev->do_ioctl       = hdlcdev_ioctl;
4481         dev->open           = hdlcdev_open;
4482         dev->stop           = hdlcdev_close;
4483         dev->tx_timeout     = hdlcdev_tx_timeout;
4484         dev->watchdog_timeo = 10*HZ;
4485         dev->tx_queue_len   = 50;
4486
4487         /* generic HDLC layer callbacks and settings */
4488         hdlc         = dev_to_hdlc(dev);
4489         hdlc->attach = hdlcdev_attach;
4490         hdlc->xmit   = hdlcdev_xmit;
4491
4492         /* register objects with HDLC layer */
4493         if ((rc = register_hdlc_device(dev))) {
4494                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4495                 free_netdev(dev);
4496                 return rc;
4497         }
4498
4499         info->netdev = dev;
4500         return 0;
4501 }
4502
4503 /**
4504  * called by device driver when removing device instance
4505  * do generic HDLC cleanup
4506  *
4507  * info  pointer to device instance information
4508  */
4509 static void hdlcdev_exit(MGSLPC_INFO *info)
4510 {
4511         unregister_hdlc_device(info->netdev);
4512         free_netdev(info->netdev);
4513         info->netdev = NULL;
4514 }
4515
4516 #endif /* CONFIG_HDLC */
4517