drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/slab.h>
  55 #include <linux/netdevice.h>
  56 #include <linux/vmalloc.h>
  57 #include <linux/init.h>
  58 #include <linux/delay.h>
  59 #include <linux/ioctl.h>
  60 #include <linux/synclink.h>
  61
  62 #include <asm/system.h>
  63 #include <asm/io.h>
  64 #include <asm/irq.h>
  65 #include <asm/dma.h>
  66 #include <linux/bitops.h>
  67 #include <asm/types.h>
  68 #include <linux/termios.h>
  69 #include <linux/workqueue.h>
  70 #include <linux/hdlc.h>
  71
  72 #include <pcmcia/cs_types.h>
  73 #include <pcmcia/cs.h>
  74 #include <pcmcia/cistpl.h>
  75 #include <pcmcia/cisreg.h>
  76 #include <pcmcia/ds.h>
  77
  78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  79 #define SYNCLINK_GENERIC_HDLC 1
  80 #else
  81 #define SYNCLINK_GENERIC_HDLC 0
  82 #endif
  83
  84 #define GET_USER(error,value,addr) error = get_user(value,addr)
  85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  88
  89 #include <asm/uaccess.h>
  90
  91 static MGSL_PARAMS default_params = {
  92         MGSL_MODE_HDLC,                 /* unsigned long mode */
  93         0,                              /* unsigned char loopback; */
  94         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  95         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  96         0,                              /* unsigned long clock_speed; */
  97         0xff,                           /* unsigned char addr_filter; */
  98         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  99         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
 100         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 101         9600,                           /* unsigned long data_rate; */
 102         8,                              /* unsigned char data_bits; */
 103         1,                              /* unsigned char stop_bits; */
 104         ASYNC_PARITY_NONE               /* unsigned char parity; */
 105 };
 106
 107 typedef struct
 108 {
 109         int count;
 110         unsigned char status;
 111         char data[1];
 112 } RXBUF;
 113
 114 /* The queue of BH actions to be performed */
 115
 116 #define BH_RECEIVE  1
 117 #define BH_TRANSMIT 2
 118 #define BH_STATUS   4
 119
 120 #define IO_PIN_SHUTDOWN_LIMIT 100
 121
 122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 123
 124 struct _input_signal_events {
 125         int     ri_up;
 126         int     ri_down;
 127         int     dsr_up;
 128         int     dsr_down;
 129         int     dcd_up;
 130         int     dcd_down;
 131         int     cts_up;
 132         int     cts_down;
 133 };
 134
 135
 136 /*
 137  * Device instance data structure
 138  */
 139
 140 typedef struct _mgslpc_info {
 141         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 142         int                     magic;
 143         int                     flags;
 144         int                     count;          /* count of opens */
 145         int                     line;
 146         unsigned short          close_delay;
 147         unsigned short          closing_wait;   /* time to wait before closing */
 148
 149         struct mgsl_icount      icount;
 150
 151         struct tty_struct       *tty;
 152         int                     timeout;
 153         int                     x_char;         /* xon/xoff character */
 154         int                     blocked_open;   /* # of blocked opens */
 155         unsigned char           read_status_mask;
 156         unsigned char           ignore_status_mask;
 157
 158         unsigned char *tx_buf;
 159         int            tx_put;
 160         int            tx_get;
 161         int            tx_count;
 162
 163         /* circular list of fixed length rx buffers */
 164
 165         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 166         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 167         int            rx_put;         /* index of next empty rx buffer */
 168         int            rx_get;         /* index of next full rx buffer */
 169         int            rx_buf_size;    /* size in bytes of single rx buffer */
 170         int            rx_buf_count;   /* total number of rx buffers */
 171         int            rx_frame_count; /* number of full rx buffers */
 172
 173         wait_queue_head_t       open_wait;
 174         wait_queue_head_t       close_wait;
 175
 176         wait_queue_head_t       status_event_wait_q;
 177         wait_queue_head_t       event_wait_q;
 178         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 179         struct _mgslpc_info     *next_device;   /* device list link */
 180
 181         unsigned short imra_value;
 182         unsigned short imrb_value;
 183         unsigned char  pim_value;
 184
 185         spinlock_t lock;
 186         struct work_struct task;                /* task structure for scheduling bh */
 187
 188         u32 max_frame_size;
 189
 190         u32 pending_bh;
 191
 192         bool bh_running;
 193         bool bh_requested;
 194
 195         int dcd_chkcount; /* check counts to prevent */
 196         int cts_chkcount; /* too many IRQs if a signal */
 197         int dsr_chkcount; /* is floating */
 198         int ri_chkcount;
 199
 200         bool rx_enabled;
 201         bool rx_overflow;
 202
 203         bool tx_enabled;
 204         bool tx_active;
 205         bool tx_aborting;
 206         u32 idle_mode;
 207
 208         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 209
 210         char device_name[25];           /* device instance name */
 211
 212         unsigned int io_base;   /* base I/O address of adapter */
 213         unsigned int irq_level;
 214
 215         MGSL_PARAMS params;             /* communications parameters */
 216
 217         unsigned char serial_signals;   /* current serial signal states */
 218
 219         bool irq_occurred;              /* for diagnostics use */
 220         char testing_irq;
 221         unsigned int init_error;        /* startup error (DIAGS)        */
 222
 223         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 224         bool drop_rts_on_tx_done;
 225
 226         struct  _input_signal_events    input_signal_events;
 227
 228         /* PCMCIA support */
 229         struct pcmcia_device    *p_dev;
 230         dev_node_t            node;
 231         int                   stop;
 232
 233         /* SPPP/Cisco HDLC device parts */
 234         int netcount;
 235         int dosyncppp;
 236         spinlock_t netlock;
 237
 238 #if SYNCLINK_GENERIC_HDLC
 239         struct net_device *netdev;
 240 #endif
 241
 242 } MGSLPC_INFO;
 243
 244 #define MGSLPC_MAGIC 0x5402
 245
 246 /*
 247  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 248  */
 249 #define TXBUFSIZE 4096
 250
 251
 252 #define CHA     0x00   /* channel A offset */
 253 #define CHB     0x40   /* channel B offset */
 254
 255 /*
 256  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 257  */
 258 #undef PVR
 259
 260 #define RXFIFO  0
 261 #define TXFIFO  0
 262 #define STAR    0x20
 263 #define CMDR    0x20
 264 #define RSTA    0x21
 265 #define PRE     0x21
 266 #define MODE    0x22
 267 #define TIMR    0x23
 268 #define XAD1    0x24
 269 #define XAD2    0x25
 270 #define RAH1    0x26
 271 #define RAH2    0x27
 272 #define DAFO    0x27
 273 #define RAL1    0x28
 274 #define RFC     0x28
 275 #define RHCR    0x29
 276 #define RAL2    0x29
 277 #define RBCL    0x2a
 278 #define XBCL    0x2a
 279 #define RBCH    0x2b
 280 #define XBCH    0x2b
 281 #define CCR0    0x2c
 282 #define CCR1    0x2d
 283 #define CCR2    0x2e
 284 #define CCR3    0x2f
 285 #define VSTR    0x34
 286 #define BGR     0x34
 287 #define RLCR    0x35
 288 #define AML     0x36
 289 #define AMH     0x37
 290 #define GIS     0x38
 291 #define IVA     0x38
 292 #define IPC     0x39
 293 #define ISR     0x3a
 294 #define IMR     0x3a
 295 #define PVR     0x3c
 296 #define PIS     0x3d
 297 #define PIM     0x3d
 298 #define PCR     0x3e
 299 #define CCR4    0x3f
 300
 301 // IMR/ISR
 302
 303 #define IRQ_BREAK_ON    BIT15   // rx break detected
 304 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 305 #define IRQ_ALLSENT     BIT13   // all sent
 306 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 307 #define IRQ_TIMER       BIT11   // timer interrupt
 308 #define IRQ_CTS         BIT10   // CTS status change
 309 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 310 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 311 #define IRQ_RXEOM       BIT7    // receive message end
 312 #define IRQ_EXITHUNT    BIT6    // receive frame start
 313 #define IRQ_RXTIME      BIT6    // rx char timeout
 314 #define IRQ_DCD         BIT2    // carrier detect status change
 315 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 316 #define IRQ_RXFIFO      BIT0    // receive pool full
 317
 318 // STAR
 319
 320 #define XFW   BIT6              // transmit FIFO write enable
 321 #define CEC   BIT2              // command executing
 322 #define CTS   BIT1              // CTS state
 323
 324 #define PVR_DTR      BIT0
 325 #define PVR_DSR      BIT1
 326 #define PVR_RI       BIT2
 327 #define PVR_AUTOCTS  BIT3
 328 #define PVR_RS232    0x20   /* 0010b */
 329 #define PVR_V35      0xe0   /* 1110b */
 330 #define PVR_RS422    0x40   /* 0100b */
 331
 332 /* Register access functions */
 333
 334 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 335 #define read_reg(info, reg) inb((info)->io_base + (reg))
 336
 337 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 338 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 339
 340 #define set_reg_bits(info, reg, mask) \
 341     write_reg(info, (reg), \
 342                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 343 #define clear_reg_bits(info, reg, mask) \
 344     write_reg(info, (reg), \
 345                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 346 /*
 347  * interrupt enable/disable routines
 348  */
 349 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 350 {
 351         if (channel == CHA) {
 352                 info->imra_value |= mask;
 353                 write_reg16(info, CHA + IMR, info->imra_value);
 354         } else {
 355                 info->imrb_value |= mask;
 356                 write_reg16(info, CHB + IMR, info->imrb_value);
 357         }
 358 }
 359 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 360 {
 361         if (channel == CHA) {
 362                 info->imra_value &= ~mask;
 363                 write_reg16(info, CHA + IMR, info->imra_value);
 364         } else {
 365                 info->imrb_value &= ~mask;
 366                 write_reg16(info, CHB + IMR, info->imrb_value);
 367         }
 368 }
 369
 370 #define port_irq_disable(info, mask) \
 371   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 372
 373 #define port_irq_enable(info, mask) \
 374   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 375
 376 static void rx_start(MGSLPC_INFO *info);
 377 static void rx_stop(MGSLPC_INFO *info);
 378
 379 static void tx_start(MGSLPC_INFO *info);
 380 static void tx_stop(MGSLPC_INFO *info);
 381 static void tx_set_idle(MGSLPC_INFO *info);
 382
 383 static void get_signals(MGSLPC_INFO *info);
 384 static void set_signals(MGSLPC_INFO *info);
 385
 386 static void reset_device(MGSLPC_INFO *info);
 387
 388 static void hdlc_mode(MGSLPC_INFO *info);
 389 static void async_mode(MGSLPC_INFO *info);
 390
 391 static void tx_timeout(unsigned long context);
 392
 393 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
 394
 395 #if SYNCLINK_GENERIC_HDLC
 396 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 397 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 398 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 399 static int  hdlcdev_init(MGSLPC_INFO *info);
 400 static void hdlcdev_exit(MGSLPC_INFO *info);
 401 #endif
 402
 403 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 404
 405 static bool register_test(MGSLPC_INFO *info);
 406 static bool irq_test(MGSLPC_INFO *info);
 407 static int adapter_test(MGSLPC_INFO *info);
 408
 409 static int claim_resources(MGSLPC_INFO *info);
 410 static void release_resources(MGSLPC_INFO *info);
 411 static void mgslpc_add_device(MGSLPC_INFO *info);
 412 static void mgslpc_remove_device(MGSLPC_INFO *info);
 413
 414 static bool rx_get_frame(MGSLPC_INFO *info);
 415 static void rx_reset_buffers(MGSLPC_INFO *info);
 416 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 417 static void rx_free_buffers(MGSLPC_INFO *info);
 418
 419 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 420
 421 /*
 422  * Bottom half interrupt handlers
 423  */
 424 static void bh_handler(struct work_struct *work);
 425 static void bh_transmit(MGSLPC_INFO *info);
 426 static void bh_status(MGSLPC_INFO *info);
 427
 428 /*
 429  * ioctl handlers
 430  */
 431 static int tiocmget(struct tty_struct *tty, struct file *file);
 432 static int tiocmset(struct tty_struct *tty, struct file *file,
 433                     unsigned int set, unsigned int clear);
 434 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 435 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 436 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
 437 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 438 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 439 static int set_txenable(MGSLPC_INFO *info, int enable);
 440 static int tx_abort(MGSLPC_INFO *info);
 441 static int set_rxenable(MGSLPC_INFO *info, int enable);
 442 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 443
 444 static MGSLPC_INFO *mgslpc_device_list = NULL;
 445 static int mgslpc_device_count = 0;
 446
 447 /*
 448  * Set this param to non-zero to load eax with the
 449  * .text section address and breakpoint on module load.
 450  * This is useful for use with gdb and add-symbol-file command.
 451  */
 452 static int break_on_load=0;
 453
 454 /*
 455  * Driver major number, defaults to zero to get auto
 456  * assigned major number. May be forced as module parameter.
 457  */
 458 static int ttymajor=0;
 459
 460 static int debug_level = 0;
 461 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 462 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
 463
 464 module_param(break_on_load, bool, 0);
 465 module_param(ttymajor, int, 0);
 466 module_param(debug_level, int, 0);
 467 module_param_array(maxframe, int, NULL, 0);
 468 module_param_array(dosyncppp, int, NULL, 0);
 469
 470 MODULE_LICENSE("GPL");
 471
 472 static char *driver_name = "SyncLink PC Card driver";
 473 static char *driver_version = "$Revision: 4.34 $";
 474
 475 static struct tty_driver *serial_driver;
 476
 477 /* number of characters left in xmit buffer before we ask for more */
 478 #define WAKEUP_CHARS 256
 479
 480 static void mgslpc_change_params(MGSLPC_INFO *info);
 481 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 482
 483 /* PCMCIA prototypes */
 484
 485 static int mgslpc_config(struct pcmcia_device *link);
 486 static void mgslpc_release(u_long arg);
 487 static void mgslpc_detach(struct pcmcia_device *p_dev);
 488
 489 /*
 490  * 1st function defined in .text section. Calling this function in
 491  * init_module() followed by a breakpoint allows a remote debugger
 492  * (gdb) to get the .text address for the add-symbol-file command.
 493  * This allows remote debugging of dynamically loadable modules.
 494  */
 495 static void* mgslpc_get_text_ptr(void)
 496 {
 497         return mgslpc_get_text_ptr;
 498 }
 499
 500 /**
 501  * line discipline callback wrappers
 502  *
 503  * The wrappers maintain line discipline references
 504  * while calling into the line discipline.
 505  *
 506  * ldisc_flush_buffer - flush line discipline receive buffers
 507  * ldisc_receive_buf  - pass receive data to line discipline
 508  */
 509
 510 static void ldisc_flush_buffer(struct tty_struct *tty)
 511 {
 512         struct tty_ldisc *ld = tty_ldisc_ref(tty);
 513         if (ld) {
 514                 if (ld->flush_buffer)
 515                         ld->flush_buffer(tty);
 516                 tty_ldisc_deref(ld);
 517         }
 518 }
 519
 520 static void ldisc_receive_buf(struct tty_struct *tty,
 521                               const __u8 *data, char *flags, int count)
 522 {
 523         struct tty_ldisc *ld;
 524         if (!tty)
 525                 return;
 526         ld = tty_ldisc_ref(tty);
 527         if (ld) {
 528                 if (ld->receive_buf)
 529                         ld->receive_buf(tty, data, flags, count);
 530                 tty_ldisc_deref(ld);
 531         }
 532 }
 533
 534 static int mgslpc_probe(struct pcmcia_device *link)
 535 {
 536     MGSLPC_INFO *info;
 537     int ret;
 538
 539     if (debug_level >= DEBUG_LEVEL_INFO)
 540             printk("mgslpc_attach\n");
 541
 542     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 543     if (!info) {
 544             printk("Error can't allocate device instance data\n");
 545             return -ENOMEM;
 546     }
 547
 548     info->magic = MGSLPC_MAGIC;
 549     INIT_WORK(&info->task, bh_handler);
 550     info->max_frame_size = 4096;
 551     info->close_delay = 5*HZ/10;
 552     info->closing_wait = 30*HZ;
 553     init_waitqueue_head(&info->open_wait);
 554     init_waitqueue_head(&info->close_wait);
 555     init_waitqueue_head(&info->status_event_wait_q);
 556     init_waitqueue_head(&info->event_wait_q);
 557     spin_lock_init(&info->lock);
 558     spin_lock_init(&info->netlock);
 559     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 560     info->idle_mode = HDLC_TXIDLE_FLAGS;
 561     info->imra_value = 0xffff;
 562     info->imrb_value = 0xffff;
 563     info->pim_value = 0xff;
 564
 565     info->p_dev = link;
 566     link->priv = info;
 567
 568     /* Initialize the struct pcmcia_device structure */
 569
 570     /* Interrupt setup */
 571     link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
 572     link->irq.IRQInfo1   = IRQ_LEVEL_ID;
 573     link->irq.Handler = NULL;
 574
 575     link->conf.Attributes = 0;
 576     link->conf.IntType = INT_MEMORY_AND_IO;
 577
 578     ret = mgslpc_config(link);
 579     if (ret)
 580             return ret;
 581
 582     mgslpc_add_device(info);
 583
 584     return 0;
 585 }
 586
 587 /* Card has been inserted.
 588  */
 589
 590 #define CS_CHECK(fn, ret) \
 591 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
 592
 593 static int mgslpc_config(struct pcmcia_device *link)
 594 {
 595     MGSLPC_INFO *info = link->priv;
 596     tuple_t tuple;
 597     cisparse_t parse;
 598     int last_fn, last_ret;
 599     u_char buf[64];
 600     cistpl_cftable_entry_t dflt = { 0 };
 601     cistpl_cftable_entry_t *cfg;
 602
 603     if (debug_level >= DEBUG_LEVEL_INFO)
 604             printk("mgslpc_config(0x%p)\n", link);
 605
 606     tuple.Attributes = 0;
 607     tuple.TupleData = buf;
 608     tuple.TupleDataMax = sizeof(buf);
 609     tuple.TupleOffset = 0;
 610
 611     /* get CIS configuration entry */
 612
 613     tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
 614     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
 615
 616     cfg = &(parse.cftable_entry);
 617     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
 618     CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
 619
 620     if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
 621     if (cfg->index == 0)
 622             goto cs_failed;
 623
 624     link->conf.ConfigIndex = cfg->index;
 625     link->conf.Attributes |= CONF_ENABLE_IRQ;
 626
 627     /* IO window settings */
 628     link->io.NumPorts1 = 0;
 629     if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
 630             cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
 631             link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
 632             if (!(io->flags & CISTPL_IO_8BIT))
 633                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
 634             if (!(io->flags & CISTPL_IO_16BIT))
 635                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
 636             link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
 637             link->io.BasePort1 = io->win[0].base;
 638             link->io.NumPorts1 = io->win[0].len;
 639             CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
 640     }
 641
 642     link->conf.Attributes = CONF_ENABLE_IRQ;
 643     link->conf.IntType = INT_MEMORY_AND_IO;
 644     link->conf.ConfigIndex = 8;
 645     link->conf.Present = PRESENT_OPTION;
 646
 647     link->irq.Attributes |= IRQ_HANDLE_PRESENT;
 648     link->irq.Handler     = mgslpc_isr;
 649     link->irq.Instance    = info;
 650     CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
 651
 652     CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
 653
 654     info->io_base = link->io.BasePort1;
 655     info->irq_level = link->irq.AssignedIRQ;
 656
 657     /* add to linked list of devices */
 658     sprintf(info->node.dev_name, "mgslpc0");
 659     info->node.major = info->node.minor = 0;
 660     link->dev_node = &info->node;
 661
 662     printk(KERN_INFO "%s: index 0x%02x:",
 663            info->node.dev_name, link->conf.ConfigIndex);
 664     if (link->conf.Attributes & CONF_ENABLE_IRQ)
 665             printk(", irq %d", link->irq.AssignedIRQ);
 666     if (link->io.NumPorts1)
 667             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
 668                    link->io.BasePort1+link->io.NumPorts1-1);
 669     printk("\n");
 670     return 0;
 671
 672 cs_failed:
 673     cs_error(link, last_fn, last_ret);
 674     mgslpc_release((u_long)link);
 675     return -ENODEV;
 676 }
 677
 678 /* Card has been removed.
 679  * Unregister device and release PCMCIA configuration.
 680  * If device is open, postpone until it is closed.
 681  */
 682 static void mgslpc_release(u_long arg)
 683 {
 684         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 685
 686         if (debug_level >= DEBUG_LEVEL_INFO)
 687                 printk("mgslpc_release(0x%p)\n", link);
 688
 689         pcmcia_disable_device(link);
 690 }
 691
 692 static void mgslpc_detach(struct pcmcia_device *link)
 693 {
 694         if (debug_level >= DEBUG_LEVEL_INFO)
 695                 printk("mgslpc_detach(0x%p)\n", link);
 696
 697         ((MGSLPC_INFO *)link->priv)->stop = 1;
 698         mgslpc_release((u_long)link);
 699
 700         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 701 }
 702
 703 static int mgslpc_suspend(struct pcmcia_device *link)
 704 {
 705         MGSLPC_INFO *info = link->priv;
 706
 707         info->stop = 1;
 708
 709         return 0;
 710 }
 711
 712 static int mgslpc_resume(struct pcmcia_device *link)
 713 {
 714         MGSLPC_INFO *info = link->priv;
 715
 716         info->stop = 0;
 717
 718         return 0;
 719 }
 720
 721
 722 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 723                                         char *name, const char *routine)
 724 {
 725 #ifdef MGSLPC_PARANOIA_CHECK
 726         static const char *badmagic =
 727                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 728         static const char *badinfo =
 729                 "Warning: null mgslpc_info for (%s) in %s\n";
 730
 731         if (!info) {
 732                 printk(badinfo, name, routine);
 733                 return true;
 734         }
 735         if (info->magic != MGSLPC_MAGIC) {
 736                 printk(badmagic, name, routine);
 737                 return true;
 738         }
 739 #else
 740         if (!info)
 741                 return true;
 742 #endif
 743         return false;
 744 }
 745
 746
 747 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 748 #define CMD_RXRESET     BIT6    // receiver reset
 749 #define CMD_RXFIFO_READ BIT5
 750 #define CMD_START_TIMER BIT4
 751 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 752 #define CMD_TXEOM       BIT1    // transmit end message
 753 #define CMD_TXRESET     BIT0    // transmit reset
 754
 755 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 756 {
 757         int i = 0;
 758         /* wait for command completion */
 759         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 760                 udelay(1);
 761                 if (i++ == 1000)
 762                         return false;
 763         }
 764         return true;
 765 }
 766
 767 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 768 {
 769         wait_command_complete(info, channel);
 770         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 771 }
 772
 773 static void tx_pause(struct tty_struct *tty)
 774 {
 775         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 776         unsigned long flags;
 777
 778         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 779                 return;
 780         if (debug_level >= DEBUG_LEVEL_INFO)
 781                 printk("tx_pause(%s)\n",info->device_name);
 782
 783         spin_lock_irqsave(&info->lock,flags);
 784         if (info->tx_enabled)
 785                 tx_stop(info);
 786         spin_unlock_irqrestore(&info->lock,flags);
 787 }
 788
 789 static void tx_release(struct tty_struct *tty)
 790 {
 791         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 792         unsigned long flags;
 793
 794         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 795                 return;
 796         if (debug_level >= DEBUG_LEVEL_INFO)
 797                 printk("tx_release(%s)\n",info->device_name);
 798
 799         spin_lock_irqsave(&info->lock,flags);
 800         if (!info->tx_enabled)
 801                 tx_start(info);
 802         spin_unlock_irqrestore(&info->lock,flags);
 803 }
 804
 805 /* Return next bottom half action to perform.
 806  * or 0 if nothing to do.
 807  */
 808 static int bh_action(MGSLPC_INFO *info)
 809 {
 810         unsigned long flags;
 811         int rc = 0;
 812
 813         spin_lock_irqsave(&info->lock,flags);
 814
 815         if (info->pending_bh & BH_RECEIVE) {
 816                 info->pending_bh &= ~BH_RECEIVE;
 817                 rc = BH_RECEIVE;
 818         } else if (info->pending_bh & BH_TRANSMIT) {
 819                 info->pending_bh &= ~BH_TRANSMIT;
 820                 rc = BH_TRANSMIT;
 821         } else if (info->pending_bh & BH_STATUS) {
 822                 info->pending_bh &= ~BH_STATUS;
 823                 rc = BH_STATUS;
 824         }
 825
 826         if (!rc) {
 827                 /* Mark BH routine as complete */
 828                 info->bh_running = false;
 829                 info->bh_requested = false;
 830         }
 831
 832         spin_unlock_irqrestore(&info->lock,flags);
 833
 834         return rc;
 835 }
 836
 837 static void bh_handler(struct work_struct *work)
 838 {
 839         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 840         int action;
 841
 842         if (!info)
 843                 return;
 844
 845         if (debug_level >= DEBUG_LEVEL_BH)
 846                 printk( "%s(%d):bh_handler(%s) entry\n",
 847                         __FILE__,__LINE__,info->device_name);
 848
 849         info->bh_running = true;
 850
 851         while((action = bh_action(info)) != 0) {
 852
 853                 /* Process work item */
 854                 if ( debug_level >= DEBUG_LEVEL_BH )
 855                         printk( "%s(%d):bh_handler() work item action=%d\n",
 856                                 __FILE__,__LINE__,action);
 857
 858                 switch (action) {
 859
 860                 case BH_RECEIVE:
 861                         while(rx_get_frame(info));
 862                         break;
 863                 case BH_TRANSMIT:
 864                         bh_transmit(info);
 865                         break;
 866                 case BH_STATUS:
 867                         bh_status(info);
 868                         break;
 869                 default:
 870                         /* unknown work item ID */
 871                         printk("Unknown work item ID=%08X!\n", action);
 872                         break;
 873                 }
 874         }
 875
 876         if (debug_level >= DEBUG_LEVEL_BH)
 877                 printk( "%s(%d):bh_handler(%s) exit\n",
 878                         __FILE__,__LINE__,info->device_name);
 879 }
 880
 881 static void bh_transmit(MGSLPC_INFO *info)
 882 {
 883         struct tty_struct *tty = info->tty;
 884         if (debug_level >= DEBUG_LEVEL_BH)
 885                 printk("bh_transmit() entry on %s\n", info->device_name);
 886
 887         if (tty)
 888                 tty_wakeup(tty);
 889 }
 890
 891 static void bh_status(MGSLPC_INFO *info)
 892 {
 893         info->ri_chkcount = 0;
 894         info->dsr_chkcount = 0;
 895         info->dcd_chkcount = 0;
 896         info->cts_chkcount = 0;
 897 }
 898
 899 /* eom: non-zero = end of frame */
 900 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 901 {
 902         unsigned char data[2];
 903         unsigned char fifo_count, read_count, i;
 904         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 905
 906         if (debug_level >= DEBUG_LEVEL_ISR)
 907                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 908
 909         if (!info->rx_enabled)
 910                 return;
 911
 912         if (info->rx_frame_count >= info->rx_buf_count) {
 913                 /* no more free buffers */
 914                 issue_command(info, CHA, CMD_RXRESET);
 915                 info->pending_bh |= BH_RECEIVE;
 916                 info->rx_overflow = true;
 917                 info->icount.buf_overrun++;
 918                 return;
 919         }
 920
 921         if (eom) {
 922                 /* end of frame, get FIFO count from RBCL register */
 923                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 924                         fifo_count = 32;
 925         } else
 926                 fifo_count = 32;
 927
 928         do {
 929                 if (fifo_count == 1) {
 930                         read_count = 1;
 931                         data[0] = read_reg(info, CHA + RXFIFO);
 932                 } else {
 933                         read_count = 2;
 934                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 935                 }
 936                 fifo_count -= read_count;
 937                 if (!fifo_count && eom)
 938                         buf->status = data[--read_count];
 939
 940                 for (i = 0; i < read_count; i++) {
 941                         if (buf->count >= info->max_frame_size) {
 942                                 /* frame too large, reset receiver and reset current buffer */
 943                                 issue_command(info, CHA, CMD_RXRESET);
 944                                 buf->count = 0;
 945                                 return;
 946                         }
 947                         *(buf->data + buf->count) = data[i];
 948                         buf->count++;
 949                 }
 950         } while (fifo_count);
 951
 952         if (eom) {
 953                 info->pending_bh |= BH_RECEIVE;
 954                 info->rx_frame_count++;
 955                 info->rx_put++;
 956                 if (info->rx_put >= info->rx_buf_count)
 957                         info->rx_put = 0;
 958         }
 959         issue_command(info, CHA, CMD_RXFIFO);
 960 }
 961
 962 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
 963 {
 964         unsigned char data, status, flag;
 965         int fifo_count;
 966         int work = 0;
 967         struct tty_struct *tty = info->tty;
 968         struct mgsl_icount *icount = &info->icount;
 969
 970         if (tcd) {
 971                 /* early termination, get FIFO count from RBCL register */
 972                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 973
 974                 /* Zero fifo count could mean 0 or 32 bytes available.
 975                  * If BIT5 of STAR is set then at least 1 byte is available.
 976                  */
 977                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 978                         fifo_count = 32;
 979         } else
 980                 fifo_count = 32;
 981
 982         tty_buffer_request_room(tty, fifo_count);
 983         /* Flush received async data to receive data buffer. */
 984         while (fifo_count) {
 985                 data   = read_reg(info, CHA + RXFIFO);
 986                 status = read_reg(info, CHA + RXFIFO);
 987                 fifo_count -= 2;
 988
 989                 icount->rx++;
 990                 flag = TTY_NORMAL;
 991
 992                 // if no frameing/crc error then save data
 993                 // BIT7:parity error
 994                 // BIT6:framing error
 995
 996                 if (status & (BIT7 + BIT6)) {
 997                         if (status & BIT7)
 998                                 icount->parity++;
 999                         else
1000                                 icount->frame++;
1001
1002                         /* discard char if tty control flags say so */
1003                         if (status & info->ignore_status_mask)
1004                                 continue;
1005
1006                         status &= info->read_status_mask;
1007
1008                         if (status & BIT7)
1009                                 flag = TTY_PARITY;
1010                         else if (status & BIT6)
1011                                 flag = TTY_FRAME;
1012                 }
1013                 work += tty_insert_flip_char(tty, data, flag);
1014         }
1015         issue_command(info, CHA, CMD_RXFIFO);
1016
1017         if (debug_level >= DEBUG_LEVEL_ISR) {
1018                 printk("%s(%d):rx_ready_async",
1019                         __FILE__,__LINE__);
1020                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1021                         __FILE__,__LINE__,icount->rx,icount->brk,
1022                         icount->parity,icount->frame,icount->overrun);
1023         }
1024
1025         if (work)
1026                 tty_flip_buffer_push(tty);
1027 }
1028
1029
1030 static void tx_done(MGSLPC_INFO *info)
1031 {
1032         if (!info->tx_active)
1033                 return;
1034
1035         info->tx_active = false;
1036         info->tx_aborting = false;
1037
1038         if (info->params.mode == MGSL_MODE_ASYNC)
1039                 return;
1040
1041         info->tx_count = info->tx_put = info->tx_get = 0;
1042         del_timer(&info->tx_timer);
1043
1044         if (info->drop_rts_on_tx_done) {
1045                 get_signals(info);
1046                 if (info->serial_signals & SerialSignal_RTS) {
1047                         info->serial_signals &= ~SerialSignal_RTS;
1048                         set_signals(info);
1049                 }
1050                 info->drop_rts_on_tx_done = false;
1051         }
1052
1053 #if SYNCLINK_GENERIC_HDLC
1054         if (info->netcount)
1055                 hdlcdev_tx_done(info);
1056         else
1057 #endif
1058         {
1059                 if (info->tty->stopped || info->tty->hw_stopped) {
1060                         tx_stop(info);
1061                         return;
1062                 }
1063                 info->pending_bh |= BH_TRANSMIT;
1064         }
1065 }
1066
1067 static void tx_ready(MGSLPC_INFO *info)
1068 {
1069         unsigned char fifo_count = 32;
1070         int c;
1071
1072         if (debug_level >= DEBUG_LEVEL_ISR)
1073                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1074
1075         if (info->params.mode == MGSL_MODE_HDLC) {
1076                 if (!info->tx_active)
1077                         return;
1078         } else {
1079                 if (info->tty->stopped || info->tty->hw_stopped) {
1080                         tx_stop(info);
1081                         return;
1082                 }
1083                 if (!info->tx_count)
1084                         info->tx_active = false;
1085         }
1086
1087         if (!info->tx_count)
1088                 return;
1089
1090         while (info->tx_count && fifo_count) {
1091                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1092
1093                 if (c == 1) {
1094                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1095                 } else {
1096                         write_reg16(info, CHA + TXFIFO,
1097                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1098                 }
1099                 info->tx_count -= c;
1100                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1101                 fifo_count -= c;
1102         }
1103
1104         if (info->params.mode == MGSL_MODE_ASYNC) {
1105                 if (info->tx_count < WAKEUP_CHARS)
1106                         info->pending_bh |= BH_TRANSMIT;
1107                 issue_command(info, CHA, CMD_TXFIFO);
1108         } else {
1109                 if (info->tx_count)
1110                         issue_command(info, CHA, CMD_TXFIFO);
1111                 else
1112                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1113         }
1114 }
1115
1116 static void cts_change(MGSLPC_INFO *info)
1117 {
1118         get_signals(info);
1119         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1120                 irq_disable(info, CHB, IRQ_CTS);
1121         info->icount.cts++;
1122         if (info->serial_signals & SerialSignal_CTS)
1123                 info->input_signal_events.cts_up++;
1124         else
1125                 info->input_signal_events.cts_down++;
1126         wake_up_interruptible(&info->status_event_wait_q);
1127         wake_up_interruptible(&info->event_wait_q);
1128
1129         if (info->flags & ASYNC_CTS_FLOW) {
1130                 if (info->tty->hw_stopped) {
1131                         if (info->serial_signals & SerialSignal_CTS) {
1132                                 if (debug_level >= DEBUG_LEVEL_ISR)
1133                                         printk("CTS tx start...");
1134                                 if (info->tty)
1135                                         info->tty->hw_stopped = 0;
1136                                 tx_start(info);
1137                                 info->pending_bh |= BH_TRANSMIT;
1138                                 return;
1139                         }
1140                 } else {
1141                         if (!(info->serial_signals & SerialSignal_CTS)) {
1142                                 if (debug_level >= DEBUG_LEVEL_ISR)
1143                                         printk("CTS tx stop...");
1144                                 if (info->tty)
1145                                         info->tty->hw_stopped = 1;
1146                                 tx_stop(info);
1147                         }
1148                 }
1149         }
1150         info->pending_bh |= BH_STATUS;
1151 }
1152
1153 static void dcd_change(MGSLPC_INFO *info)
1154 {
1155         get_signals(info);
1156         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1157                 irq_disable(info, CHB, IRQ_DCD);
1158         info->icount.dcd++;
1159         if (info->serial_signals & SerialSignal_DCD) {
1160                 info->input_signal_events.dcd_up++;
1161         }
1162         else
1163                 info->input_signal_events.dcd_down++;
1164 #if SYNCLINK_GENERIC_HDLC
1165         if (info->netcount) {
1166                 if (info->serial_signals & SerialSignal_DCD)
1167                         netif_carrier_on(info->netdev);
1168                 else
1169                         netif_carrier_off(info->netdev);
1170         }
1171 #endif
1172         wake_up_interruptible(&info->status_event_wait_q);
1173         wake_up_interruptible(&info->event_wait_q);
1174
1175         if (info->flags & ASYNC_CHECK_CD) {
1176                 if (debug_level >= DEBUG_LEVEL_ISR)
1177                         printk("%s CD now %s...", info->device_name,
1178                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1179                 if (info->serial_signals & SerialSignal_DCD)
1180                         wake_up_interruptible(&info->open_wait);
1181                 else {
1182                         if (debug_level >= DEBUG_LEVEL_ISR)
1183                                 printk("doing serial hangup...");
1184                         if (info->tty)
1185                                 tty_hangup(info->tty);
1186                 }
1187         }
1188         info->pending_bh |= BH_STATUS;
1189 }
1190
1191 static void dsr_change(MGSLPC_INFO *info)
1192 {
1193         get_signals(info);
1194         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1195                 port_irq_disable(info, PVR_DSR);
1196         info->icount.dsr++;
1197         if (info->serial_signals & SerialSignal_DSR)
1198                 info->input_signal_events.dsr_up++;
1199         else
1200                 info->input_signal_events.dsr_down++;
1201         wake_up_interruptible(&info->status_event_wait_q);
1202         wake_up_interruptible(&info->event_wait_q);
1203         info->pending_bh |= BH_STATUS;
1204 }
1205
1206 static void ri_change(MGSLPC_INFO *info)
1207 {
1208         get_signals(info);
1209         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1210                 port_irq_disable(info, PVR_RI);
1211         info->icount.rng++;
1212         if (info->serial_signals & SerialSignal_RI)
1213                 info->input_signal_events.ri_up++;
1214         else
1215                 info->input_signal_events.ri_down++;
1216         wake_up_interruptible(&info->status_event_wait_q);
1217         wake_up_interruptible(&info->event_wait_q);
1218         info->pending_bh |= BH_STATUS;
1219 }
1220
1221 /* Interrupt service routine entry point.
1222  *
1223  * Arguments:
1224  *
1225  * irq     interrupt number that caused interrupt
1226  * dev_id  device ID supplied during interrupt registration
1227  */
1228 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1229 {
1230         MGSLPC_INFO *info = dev_id;
1231         unsigned short isr;
1232         unsigned char gis, pis;
1233         int count=0;
1234
1235         if (debug_level >= DEBUG_LEVEL_ISR)
1236                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1237
1238         if (!(info->p_dev->_locked))
1239                 return IRQ_HANDLED;
1240
1241         spin_lock(&info->lock);
1242
1243         while ((gis = read_reg(info, CHA + GIS))) {
1244                 if (debug_level >= DEBUG_LEVEL_ISR)
1245                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1246
1247                 if ((gis & 0x70) || count > 1000) {
1248                         printk("synclink_cs:hardware failed or ejected\n");
1249                         break;
1250                 }
1251                 count++;
1252
1253                 if (gis & (BIT1 + BIT0)) {
1254                         isr = read_reg16(info, CHB + ISR);
1255                         if (isr & IRQ_DCD)
1256                                 dcd_change(info);
1257                         if (isr & IRQ_CTS)
1258                                 cts_change(info);
1259                 }
1260                 if (gis & (BIT3 + BIT2))
1261                 {
1262                         isr = read_reg16(info, CHA + ISR);
1263                         if (isr & IRQ_TIMER) {
1264                                 info->irq_occurred = true;
1265                                 irq_disable(info, CHA, IRQ_TIMER);
1266                         }
1267
1268                         /* receive IRQs */
1269                         if (isr & IRQ_EXITHUNT) {
1270                                 info->icount.exithunt++;
1271                                 wake_up_interruptible(&info->event_wait_q);
1272                         }
1273                         if (isr & IRQ_BREAK_ON) {
1274                                 info->icount.brk++;
1275                                 if (info->flags & ASYNC_SAK)
1276                                         do_SAK(info->tty);
1277                         }
1278                         if (isr & IRQ_RXTIME) {
1279                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1280                         }
1281                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1282                                 if (info->params.mode == MGSL_MODE_HDLC)
1283                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1284                                 else
1285                                         rx_ready_async(info, isr & IRQ_RXEOM);
1286                         }
1287
1288                         /* transmit IRQs */
1289                         if (isr & IRQ_UNDERRUN) {
1290                                 if (info->tx_aborting)
1291                                         info->icount.txabort++;
1292                                 else
1293                                         info->icount.txunder++;
1294                                 tx_done(info);
1295                         }
1296                         else if (isr & IRQ_ALLSENT) {
1297                                 info->icount.txok++;
1298                                 tx_done(info);
1299                         }
1300                         else if (isr & IRQ_TXFIFO)
1301                                 tx_ready(info);
1302                 }
1303                 if (gis & BIT7) {
1304                         pis = read_reg(info, CHA + PIS);
1305                         if (pis & BIT1)
1306                                 dsr_change(info);
1307                         if (pis & BIT2)
1308                                 ri_change(info);
1309                 }
1310         }
1311
1312         /* Request bottom half processing if there's something
1313          * for it to do and the bh is not already running
1314          */
1315
1316         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1317                 if ( debug_level >= DEBUG_LEVEL_ISR )
1318                         printk("%s(%d):%s queueing bh task.\n",
1319                                 __FILE__,__LINE__,info->device_name);
1320                 schedule_work(&info->task);
1321                 info->bh_requested = true;
1322         }
1323
1324         spin_unlock(&info->lock);
1325
1326         if (debug_level >= DEBUG_LEVEL_ISR)
1327                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1328                        __FILE__, __LINE__, info->irq_level);
1329
1330         return IRQ_HANDLED;
1331 }
1332
1333 /* Initialize and start device.
1334  */
1335 static int startup(MGSLPC_INFO * info)
1336 {
1337         int retval = 0;
1338
1339         if (debug_level >= DEBUG_LEVEL_INFO)
1340                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1341
1342         if (info->flags & ASYNC_INITIALIZED)
1343                 return 0;
1344
1345         if (!info->tx_buf) {
1346                 /* allocate a page of memory for a transmit buffer */
1347                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1348                 if (!info->tx_buf) {
1349                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1350                                 __FILE__,__LINE__,info->device_name);
1351                         return -ENOMEM;
1352                 }
1353         }
1354
1355         info->pending_bh = 0;
1356
1357         memset(&info->icount, 0, sizeof(info->icount));
1358
1359         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1360
1361         /* Allocate and claim adapter resources */
1362         retval = claim_resources(info);
1363
1364         /* perform existance check and diagnostics */
1365         if ( !retval )
1366                 retval = adapter_test(info);
1367
1368         if ( retval ) {
1369                 if (capable(CAP_SYS_ADMIN) && info->tty)
1370                         set_bit(TTY_IO_ERROR, &info->tty->flags);
1371                 release_resources(info);
1372                 return retval;
1373         }
1374
1375         /* program hardware for current parameters */
1376         mgslpc_change_params(info);
1377
1378         if (info->tty)
1379                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1380
1381         info->flags |= ASYNC_INITIALIZED;
1382
1383         return 0;
1384 }
1385
1386 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1387  */
1388 static void shutdown(MGSLPC_INFO * info)
1389 {
1390         unsigned long flags;
1391
1392         if (!(info->flags & ASYNC_INITIALIZED))
1393                 return;
1394
1395         if (debug_level >= DEBUG_LEVEL_INFO)
1396                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1397                          __FILE__,__LINE__, info->device_name );
1398
1399         /* clear status wait queue because status changes */
1400         /* can't happen after shutting down the hardware */
1401         wake_up_interruptible(&info->status_event_wait_q);
1402         wake_up_interruptible(&info->event_wait_q);
1403
1404         del_timer_sync(&info->tx_timer);
1405
1406         if (info->tx_buf) {
1407                 free_page((unsigned long) info->tx_buf);
1408                 info->tx_buf = NULL;
1409         }
1410
1411         spin_lock_irqsave(&info->lock,flags);
1412
1413         rx_stop(info);
1414         tx_stop(info);
1415
1416         /* TODO:disable interrupts instead of reset to preserve signal states */
1417         reset_device(info);
1418
1419         if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1420                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1421                 set_signals(info);
1422         }
1423
1424         spin_unlock_irqrestore(&info->lock,flags);
1425
1426         release_resources(info);
1427
1428         if (info->tty)
1429                 set_bit(TTY_IO_ERROR, &info->tty->flags);
1430
1431         info->flags &= ~ASYNC_INITIALIZED;
1432 }
1433
1434 static void mgslpc_program_hw(MGSLPC_INFO *info)
1435 {
1436         unsigned long flags;
1437
1438         spin_lock_irqsave(&info->lock,flags);
1439
1440         rx_stop(info);
1441         tx_stop(info);
1442         info->tx_count = info->tx_put = info->tx_get = 0;
1443
1444         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1445                 hdlc_mode(info);
1446         else
1447                 async_mode(info);
1448
1449         set_signals(info);
1450
1451         info->dcd_chkcount = 0;
1452         info->cts_chkcount = 0;
1453         info->ri_chkcount = 0;
1454         info->dsr_chkcount = 0;
1455
1456         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1457         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1458         get_signals(info);
1459
1460         if (info->netcount || info->tty->termios->c_cflag & CREAD)
1461                 rx_start(info);
1462
1463         spin_unlock_irqrestore(&info->lock,flags);
1464 }
1465
1466 /* Reconfigure adapter based on new parameters
1467  */
1468 static void mgslpc_change_params(MGSLPC_INFO *info)
1469 {
1470         unsigned cflag;
1471         int bits_per_char;
1472
1473         if (!info->tty || !info->tty->termios)
1474                 return;
1475
1476         if (debug_level >= DEBUG_LEVEL_INFO)
1477                 printk("%s(%d):mgslpc_change_params(%s)\n",
1478                          __FILE__,__LINE__, info->device_name );
1479
1480         cflag = info->tty->termios->c_cflag;
1481
1482         /* if B0 rate (hangup) specified then negate DTR and RTS */
1483         /* otherwise assert DTR and RTS */
1484         if (cflag & CBAUD)
1485                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1486         else
1487                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1488
1489         /* byte size and parity */
1490
1491         switch (cflag & CSIZE) {
1492         case CS5: info->params.data_bits = 5; break;
1493         case CS6: info->params.data_bits = 6; break;
1494         case CS7: info->params.data_bits = 7; break;
1495         case CS8: info->params.data_bits = 8; break;
1496         default:  info->params.data_bits = 7; break;
1497         }
1498
1499         if (cflag & CSTOPB)
1500                 info->params.stop_bits = 2;
1501         else
1502                 info->params.stop_bits = 1;
1503
1504         info->params.parity = ASYNC_PARITY_NONE;
1505         if (cflag & PARENB) {
1506                 if (cflag & PARODD)
1507                         info->params.parity = ASYNC_PARITY_ODD;
1508                 else
1509                         info->params.parity = ASYNC_PARITY_EVEN;
1510 #ifdef CMSPAR
1511                 if (cflag & CMSPAR)
1512                         info->params.parity = ASYNC_PARITY_SPACE;
1513 #endif
1514         }
1515
1516         /* calculate number of jiffies to transmit a full
1517          * FIFO (32 bytes) at specified data rate
1518          */
1519         bits_per_char = info->params.data_bits +
1520                         info->params.stop_bits + 1;
1521
1522         /* if port data rate is set to 460800 or less then
1523          * allow tty settings to override, otherwise keep the
1524          * current data rate.
1525          */
1526         if (info->params.data_rate <= 460800) {
1527                 info->params.data_rate = tty_get_baud_rate(info->tty);
1528         }
1529
1530         if ( info->params.data_rate ) {
1531                 info->timeout = (32*HZ*bits_per_char) /
1532                                 info->params.data_rate;
1533         }
1534         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1535
1536         if (cflag & CRTSCTS)
1537                 info->flags |= ASYNC_CTS_FLOW;
1538         else
1539                 info->flags &= ~ASYNC_CTS_FLOW;
1540
1541         if (cflag & CLOCAL)
1542                 info->flags &= ~ASYNC_CHECK_CD;
1543         else
1544                 info->flags |= ASYNC_CHECK_CD;
1545
1546         /* process tty input control flags */
1547
1548         info->read_status_mask = 0;
1549         if (I_INPCK(info->tty))
1550                 info->read_status_mask |= BIT7 | BIT6;
1551         if (I_IGNPAR(info->tty))
1552                 info->ignore_status_mask |= BIT7 | BIT6;
1553
1554         mgslpc_program_hw(info);
1555 }
1556
1557 /* Add a character to the transmit buffer
1558  */
1559 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1560 {
1561         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1562         unsigned long flags;
1563
1564         if (debug_level >= DEBUG_LEVEL_INFO) {
1565                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1566                         __FILE__,__LINE__,ch,info->device_name);
1567         }
1568
1569         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1570                 return;
1571
1572         if (!info->tx_buf)
1573                 return;
1574
1575         spin_lock_irqsave(&info->lock,flags);
1576
1577         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1578                 if (info->tx_count < TXBUFSIZE - 1) {
1579                         info->tx_buf[info->tx_put++] = ch;
1580                         info->tx_put &= TXBUFSIZE-1;
1581                         info->tx_count++;
1582                 }
1583         }
1584
1585         spin_unlock_irqrestore(&info->lock,flags);
1586 }
1587
1588 /* Enable transmitter so remaining characters in the
1589  * transmit buffer are sent.
1590  */
1591 static void mgslpc_flush_chars(struct tty_struct *tty)
1592 {
1593         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1594         unsigned long flags;
1595
1596         if (debug_level >= DEBUG_LEVEL_INFO)
1597                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1598                         __FILE__,__LINE__,info->device_name,info->tx_count);
1599
1600         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1601                 return;
1602
1603         if (info->tx_count <= 0 || tty->stopped ||
1604             tty->hw_stopped || !info->tx_buf)
1605                 return;
1606
1607         if (debug_level >= DEBUG_LEVEL_INFO)
1608                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1609                         __FILE__,__LINE__,info->device_name);
1610
1611         spin_lock_irqsave(&info->lock,flags);
1612         if (!info->tx_active)
1613                 tx_start(info);
1614         spin_unlock_irqrestore(&info->lock,flags);
1615 }
1616
1617 /* Send a block of data
1618  *
1619  * Arguments:
1620  *
1621  * tty        pointer to tty information structure
1622  * buf        pointer to buffer containing send data
1623  * count      size of send data in bytes
1624  *
1625  * Returns: number of characters written
1626  */
1627 static int mgslpc_write(struct tty_struct * tty,
1628                         const unsigned char *buf, int count)
1629 {
1630         int c, ret = 0;
1631         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1632         unsigned long flags;
1633
1634         if (debug_level >= DEBUG_LEVEL_INFO)
1635                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1636                         __FILE__,__LINE__,info->device_name,count);
1637
1638         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1639                 !info->tx_buf)
1640                 goto cleanup;
1641
1642         if (info->params.mode == MGSL_MODE_HDLC) {
1643                 if (count > TXBUFSIZE) {
1644                         ret = -EIO;
1645                         goto cleanup;
1646                 }
1647                 if (info->tx_active)
1648                         goto cleanup;
1649                 else if (info->tx_count)
1650                         goto start;
1651         }
1652
1653         for (;;) {
1654                 c = min(count,
1655                         min(TXBUFSIZE - info->tx_count - 1,
1656                             TXBUFSIZE - info->tx_put));
1657                 if (c <= 0)
1658                         break;
1659
1660                 memcpy(info->tx_buf + info->tx_put, buf, c);
1661
1662                 spin_lock_irqsave(&info->lock,flags);
1663                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1664                 info->tx_count += c;
1665                 spin_unlock_irqrestore(&info->lock,flags);
1666
1667                 buf += c;
1668                 count -= c;
1669                 ret += c;
1670         }
1671 start:
1672         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1673                 spin_lock_irqsave(&info->lock,flags);
1674                 if (!info->tx_active)
1675                         tx_start(info);
1676                 spin_unlock_irqrestore(&info->lock,flags);
1677         }
1678 cleanup:
1679         if (debug_level >= DEBUG_LEVEL_INFO)
1680                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1681                         __FILE__,__LINE__,info->device_name,ret);
1682         return ret;
1683 }
1684
1685 /* Return the count of free bytes in transmit buffer
1686  */
1687 static int mgslpc_write_room(struct tty_struct *tty)
1688 {
1689         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1690         int ret;
1691
1692         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1693                 return 0;
1694
1695         if (info->params.mode == MGSL_MODE_HDLC) {
1696                 /* HDLC (frame oriented) mode */
1697                 if (info->tx_active)
1698                         return 0;
1699                 else
1700                         return HDLC_MAX_FRAME_SIZE;
1701         } else {
1702                 ret = TXBUFSIZE - info->tx_count - 1;
1703                 if (ret < 0)
1704                         ret = 0;
1705         }
1706
1707         if (debug_level >= DEBUG_LEVEL_INFO)
1708                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1709                          __FILE__,__LINE__, info->device_name, ret);
1710         return ret;
1711 }
1712
1713 /* Return the count of bytes in transmit buffer
1714  */
1715 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1716 {
1717         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1718         int rc;
1719
1720         if (debug_level >= DEBUG_LEVEL_INFO)
1721                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1722                          __FILE__,__LINE__, info->device_name );
1723
1724         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1725                 return 0;
1726
1727         if (info->params.mode == MGSL_MODE_HDLC)
1728                 rc = info->tx_active ? info->max_frame_size : 0;
1729         else
1730                 rc = info->tx_count;
1731
1732         if (debug_level >= DEBUG_LEVEL_INFO)
1733                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1734                          __FILE__,__LINE__, info->device_name, rc);
1735
1736         return rc;
1737 }
1738
1739 /* Discard all data in the send buffer
1740  */
1741 static void mgslpc_flush_buffer(struct tty_struct *tty)
1742 {
1743         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1744         unsigned long flags;
1745
1746         if (debug_level >= DEBUG_LEVEL_INFO)
1747                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1748                          __FILE__,__LINE__, info->device_name );
1749
1750         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1751                 return;
1752
1753         spin_lock_irqsave(&info->lock,flags);
1754         info->tx_count = info->tx_put = info->tx_get = 0;
1755         del_timer(&info->tx_timer);
1756         spin_unlock_irqrestore(&info->lock,flags);
1757
1758         wake_up_interruptible(&tty->write_wait);
1759         tty_wakeup(tty);
1760 }
1761
1762 /* Send a high-priority XON/XOFF character
1763  */
1764 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1765 {
1766         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1767         unsigned long flags;
1768
1769         if (debug_level >= DEBUG_LEVEL_INFO)
1770                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1771                          __FILE__,__LINE__, info->device_name, ch );
1772
1773         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1774                 return;
1775
1776         info->x_char = ch;
1777         if (ch) {
1778                 spin_lock_irqsave(&info->lock,flags);
1779                 if (!info->tx_enabled)
1780                         tx_start(info);
1781                 spin_unlock_irqrestore(&info->lock,flags);
1782         }
1783 }
1784
1785 /* Signal remote device to throttle send data (our receive data)
1786  */
1787 static void mgslpc_throttle(struct tty_struct * tty)
1788 {
1789         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1790         unsigned long flags;
1791
1792         if (debug_level >= DEBUG_LEVEL_INFO)
1793                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1794                          __FILE__,__LINE__, info->device_name );
1795
1796         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1797                 return;
1798
1799         if (I_IXOFF(tty))
1800                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1801
1802         if (tty->termios->c_cflag & CRTSCTS) {
1803                 spin_lock_irqsave(&info->lock,flags);
1804                 info->serial_signals &= ~SerialSignal_RTS;
1805                 set_signals(info);
1806                 spin_unlock_irqrestore(&info->lock,flags);
1807         }
1808 }
1809
1810 /* Signal remote device to stop throttling send data (our receive data)
1811  */
1812 static void mgslpc_unthrottle(struct tty_struct * tty)
1813 {
1814         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1815         unsigned long flags;
1816
1817         if (debug_level >= DEBUG_LEVEL_INFO)
1818                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1819                          __FILE__,__LINE__, info->device_name );
1820
1821         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1822                 return;
1823
1824         if (I_IXOFF(tty)) {
1825                 if (info->x_char)
1826                         info->x_char = 0;
1827                 else
1828                         mgslpc_send_xchar(tty, START_CHAR(tty));
1829         }
1830
1831         if (tty->termios->c_cflag & CRTSCTS) {
1832                 spin_lock_irqsave(&info->lock,flags);
1833                 info->serial_signals |= SerialSignal_RTS;
1834                 set_signals(info);
1835                 spin_unlock_irqrestore(&info->lock,flags);
1836         }
1837 }
1838
1839 /* get the current serial statistics
1840  */
1841 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1842 {
1843         int err;
1844         if (debug_level >= DEBUG_LEVEL_INFO)
1845                 printk("get_params(%s)\n", info->device_name);
1846         if (!user_icount) {
1847                 memset(&info->icount, 0, sizeof(info->icount));
1848         } else {
1849                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1850                 if (err)
1851                         return -EFAULT;
1852         }
1853         return 0;
1854 }
1855
1856 /* get the current serial parameters
1857  */
1858 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1859 {
1860         int err;
1861         if (debug_level >= DEBUG_LEVEL_INFO)
1862                 printk("get_params(%s)\n", info->device_name);
1863         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1864         if (err)
1865                 return -EFAULT;
1866         return 0;
1867 }
1868
1869 /* set the serial parameters
1870  *
1871  * Arguments:
1872  *
1873  *      info            pointer to device instance data
1874  *      new_params      user buffer containing new serial params
1875  *
1876  * Returns:     0 if success, otherwise error code
1877  */
1878 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1879 {
1880         unsigned long flags;
1881         MGSL_PARAMS tmp_params;
1882         int err;
1883
1884         if (debug_level >= DEBUG_LEVEL_INFO)
1885                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1886                         info->device_name );
1887         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1888         if (err) {
1889                 if ( debug_level >= DEBUG_LEVEL_INFO )
1890                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1891                                 __FILE__,__LINE__,info->device_name);
1892                 return -EFAULT;
1893         }
1894
1895         spin_lock_irqsave(&info->lock,flags);
1896         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1897         spin_unlock_irqrestore(&info->lock,flags);
1898
1899         mgslpc_change_params(info);
1900
1901         return 0;
1902 }
1903
1904 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1905 {
1906         int err;
1907         if (debug_level >= DEBUG_LEVEL_INFO)
1908                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1909         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1910         if (err)
1911                 return -EFAULT;
1912         return 0;
1913 }
1914
1915 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1916 {
1917         unsigned long flags;
1918         if (debug_level >= DEBUG_LEVEL_INFO)
1919                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1920         spin_lock_irqsave(&info->lock,flags);
1921         info->idle_mode = idle_mode;
1922         tx_set_idle(info);
1923         spin_unlock_irqrestore(&info->lock,flags);
1924         return 0;
1925 }
1926
1927 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1928 {
1929         int err;
1930         if (debug_level >= DEBUG_LEVEL_INFO)
1931                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1932         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1933         if (err)
1934                 return -EFAULT;
1935         return 0;
1936 }
1937
1938 static int set_interface(MGSLPC_INFO * info, int if_mode)
1939 {
1940         unsigned long flags;
1941         unsigned char val;
1942         if (debug_level >= DEBUG_LEVEL_INFO)
1943                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1944         spin_lock_irqsave(&info->lock,flags);
1945         info->if_mode = if_mode;
1946
1947         val = read_reg(info, PVR) & 0x0f;
1948         switch (info->if_mode)
1949         {
1950         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1951         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1952         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1953         }
1954         write_reg(info, PVR, val);
1955
1956         spin_unlock_irqrestore(&info->lock,flags);
1957         return 0;
1958 }
1959
1960 static int set_txenable(MGSLPC_INFO * info, int enable)
1961 {
1962         unsigned long flags;
1963
1964         if (debug_level >= DEBUG_LEVEL_INFO)
1965                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1966
1967         spin_lock_irqsave(&info->lock,flags);
1968         if (enable) {
1969                 if (!info->tx_enabled)
1970                         tx_start(info);
1971         } else {
1972                 if (info->tx_enabled)
1973                         tx_stop(info);
1974         }
1975         spin_unlock_irqrestore(&info->lock,flags);
1976         return 0;
1977 }
1978
1979 static int tx_abort(MGSLPC_INFO * info)
1980 {
1981         unsigned long flags;
1982
1983         if (debug_level >= DEBUG_LEVEL_INFO)
1984                 printk("tx_abort(%s)\n", info->device_name);
1985
1986         spin_lock_irqsave(&info->lock,flags);
1987         if (info->tx_active && info->tx_count &&
1988             info->params.mode == MGSL_MODE_HDLC) {
1989                 /* clear data count so FIFO is not filled on next IRQ.
1990                  * This results in underrun and abort transmission.
1991                  */
1992                 info->tx_count = info->tx_put = info->tx_get = 0;
1993                 info->tx_aborting = true;
1994         }
1995         spin_unlock_irqrestore(&info->lock,flags);
1996         return 0;
1997 }
1998
1999 static int set_rxenable(MGSLPC_INFO * info, int enable)
2000 {
2001         unsigned long flags;
2002
2003         if (debug_level >= DEBUG_LEVEL_INFO)
2004                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2005
2006         spin_lock_irqsave(&info->lock,flags);
2007         if (enable) {
2008                 if (!info->rx_enabled)
2009                         rx_start(info);
2010         } else {
2011                 if (info->rx_enabled)
2012                         rx_stop(info);
2013         }
2014         spin_unlock_irqrestore(&info->lock,flags);
2015         return 0;
2016 }
2017
2018 /* wait for specified event to occur
2019  *
2020  * Arguments:           info    pointer to device instance data
2021  *                      mask    pointer to bitmask of events to wait for
2022  * Return Value:        0       if successful and bit mask updated with
2023  *                              of events triggerred,
2024  *                      otherwise error code
2025  */
2026 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2027 {
2028         unsigned long flags;
2029         int s;
2030         int rc=0;
2031         struct mgsl_icount cprev, cnow;
2032         int events;
2033         int mask;
2034         struct  _input_signal_events oldsigs, newsigs;
2035         DECLARE_WAITQUEUE(wait, current);
2036
2037         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2038         if (rc)
2039                 return  -EFAULT;
2040
2041         if (debug_level >= DEBUG_LEVEL_INFO)
2042                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2043
2044         spin_lock_irqsave(&info->lock,flags);
2045
2046         /* return immediately if state matches requested events */
2047         get_signals(info);
2048         s = info->serial_signals;
2049         events = mask &
2050                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2051                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2052                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2053                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2054         if (events) {
2055                 spin_unlock_irqrestore(&info->lock,flags);
2056                 goto exit;
2057         }
2058
2059         /* save current irq counts */
2060         cprev = info->icount;
2061         oldsigs = info->input_signal_events;
2062
2063         if ((info->params.mode == MGSL_MODE_HDLC) &&
2064             (mask & MgslEvent_ExitHuntMode))
2065                 irq_enable(info, CHA, IRQ_EXITHUNT);
2066
2067         set_current_state(TASK_INTERRUPTIBLE);
2068         add_wait_queue(&info->event_wait_q, &wait);
2069
2070         spin_unlock_irqrestore(&info->lock,flags);
2071
2072
2073         for(;;) {
2074                 schedule();
2075                 if (signal_pending(current)) {
2076                         rc = -ERESTARTSYS;
2077                         break;
2078                 }
2079
2080                 /* get current irq counts */
2081                 spin_lock_irqsave(&info->lock,flags);
2082                 cnow = info->icount;
2083                 newsigs = info->input_signal_events;
2084                 set_current_state(TASK_INTERRUPTIBLE);
2085                 spin_unlock_irqrestore(&info->lock,flags);
2086
2087                 /* if no change, wait aborted for some reason */
2088                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2089                     newsigs.dsr_down == oldsigs.dsr_down &&
2090                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2091                     newsigs.dcd_down == oldsigs.dcd_down &&
2092                     newsigs.cts_up   == oldsigs.cts_up   &&
2093                     newsigs.cts_down == oldsigs.cts_down &&
2094                     newsigs.ri_up    == oldsigs.ri_up    &&
2095                     newsigs.ri_down  == oldsigs.ri_down  &&
2096                     cnow.exithunt    == cprev.exithunt   &&
2097                     cnow.rxidle      == cprev.rxidle) {
2098                         rc = -EIO;
2099                         break;
2100                 }
2101
2102                 events = mask &
2103                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2104                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2105                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2106                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2107                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2108                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2109                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2110                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2111                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2112                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2113                 if (events)
2114                         break;
2115
2116                 cprev = cnow;
2117                 oldsigs = newsigs;
2118         }
2119
2120         remove_wait_queue(&info->event_wait_q, &wait);
2121         set_current_state(TASK_RUNNING);
2122
2123         if (mask & MgslEvent_ExitHuntMode) {
2124                 spin_lock_irqsave(&info->lock,flags);
2125                 if (!waitqueue_active(&info->event_wait_q))
2126                         irq_disable(info, CHA, IRQ_EXITHUNT);
2127                 spin_unlock_irqrestore(&info->lock,flags);
2128         }
2129 exit:
2130         if (rc == 0)
2131                 PUT_USER(rc, events, mask_ptr);
2132         return rc;
2133 }
2134
2135 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2136 {
2137         unsigned long flags;
2138         int rc;
2139         struct mgsl_icount cprev, cnow;
2140         DECLARE_WAITQUEUE(wait, current);
2141
2142         /* save current irq counts */
2143         spin_lock_irqsave(&info->lock,flags);
2144         cprev = info->icount;
2145         add_wait_queue(&info->status_event_wait_q, &wait);
2146         set_current_state(TASK_INTERRUPTIBLE);
2147         spin_unlock_irqrestore(&info->lock,flags);
2148
2149         for(;;) {
2150                 schedule();
2151                 if (signal_pending(current)) {
2152                         rc = -ERESTARTSYS;
2153                         break;
2154                 }
2155
2156                 /* get new irq counts */
2157                 spin_lock_irqsave(&info->lock,flags);
2158                 cnow = info->icount;
2159                 set_current_state(TASK_INTERRUPTIBLE);
2160                 spin_unlock_irqrestore(&info->lock,flags);
2161
2162                 /* if no change, wait aborted for some reason */
2163                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2164                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2165                         rc = -EIO;
2166                         break;
2167                 }
2168
2169                 /* check for change in caller specified modem input */
2170                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2171                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2172                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2173                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2174                         rc = 0;
2175                         break;
2176                 }
2177
2178                 cprev = cnow;
2179         }
2180         remove_wait_queue(&info->status_event_wait_q, &wait);
2181         set_current_state(TASK_RUNNING);
2182         return rc;
2183 }
2184
2185 /* return the state of the serial control and status signals
2186  */
2187 static int tiocmget(struct tty_struct *tty, struct file *file)
2188 {
2189         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2190         unsigned int result;
2191         unsigned long flags;
2192
2193         spin_lock_irqsave(&info->lock,flags);
2194         get_signals(info);
2195         spin_unlock_irqrestore(&info->lock,flags);
2196
2197         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2198                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2199                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2200                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2201                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2202                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2203
2204         if (debug_level >= DEBUG_LEVEL_INFO)
2205                 printk("%s(%d):%s tiocmget() value=%08X\n",
2206                          __FILE__,__LINE__, info->device_name, result );
2207         return result;
2208 }
2209
2210 /* set modem control signals (DTR/RTS)
2211  */
2212 static int tiocmset(struct tty_struct *tty, struct file *file,
2213                     unsigned int set, unsigned int clear)
2214 {
2215         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2216         unsigned long flags;
2217
2218         if (debug_level >= DEBUG_LEVEL_INFO)
2219                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2220                         __FILE__,__LINE__,info->device_name, set, clear);
2221
2222         if (set & TIOCM_RTS)
2223                 info->serial_signals |= SerialSignal_RTS;
2224         if (set & TIOCM_DTR)
2225                 info->serial_signals |= SerialSignal_DTR;
2226         if (clear & TIOCM_RTS)
2227                 info->serial_signals &= ~SerialSignal_RTS;
2228         if (clear & TIOCM_DTR)
2229                 info->serial_signals &= ~SerialSignal_DTR;
2230
2231         spin_lock_irqsave(&info->lock,flags);
2232         set_signals(info);
2233         spin_unlock_irqrestore(&info->lock,flags);
2234
2235         return 0;
2236 }
2237
2238 /* Set or clear transmit break condition
2239  *
2240  * Arguments:           tty             pointer to tty instance data
2241  *                      break_state     -1=set break condition, 0=clear
2242  */
2243 static void mgslpc_break(struct tty_struct *tty, int break_state)
2244 {
2245         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2246         unsigned long flags;
2247
2248         if (debug_level >= DEBUG_LEVEL_INFO)
2249                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2250                          __FILE__,__LINE__, info->device_name, break_state);
2251
2252         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2253                 return;
2254
2255         spin_lock_irqsave(&info->lock,flags);
2256         if (break_state == -1)
2257                 set_reg_bits(info, CHA+DAFO, BIT6);
2258         else
2259                 clear_reg_bits(info, CHA+DAFO, BIT6);
2260         spin_unlock_irqrestore(&info->lock,flags);
2261 }
2262
2263 /* Service an IOCTL request
2264  *
2265  * Arguments:
2266  *
2267  *      tty     pointer to tty instance data
2268  *      file    pointer to associated file object for device
2269  *      cmd     IOCTL command code
2270  *      arg     command argument/context
2271  *
2272  * Return Value:        0 if success, otherwise error code
2273  */
2274 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2275                         unsigned int cmd, unsigned long arg)
2276 {
2277         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2278
2279         if (debug_level >= DEBUG_LEVEL_INFO)
2280                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2281                         info->device_name, cmd );
2282
2283         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2284                 return -ENODEV;
2285
2286         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2287             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2288                 if (tty->flags & (1 << TTY_IO_ERROR))
2289                     return -EIO;
2290         }
2291
2292         return ioctl_common(info, cmd, arg);
2293 }
2294
2295 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2296 {
2297         int error;
2298         struct mgsl_icount cnow;        /* kernel counter temps */
2299         struct serial_icounter_struct __user *p_cuser;  /* user space */
2300         void __user *argp = (void __user *)arg;
2301         unsigned long flags;
2302
2303         switch (cmd) {
2304         case MGSL_IOCGPARAMS:
2305                 return get_params(info, argp);
2306         case MGSL_IOCSPARAMS:
2307                 return set_params(info, argp);
2308         case MGSL_IOCGTXIDLE:
2309                 return get_txidle(info, argp);
2310         case MGSL_IOCSTXIDLE:
2311                 return set_txidle(info, (int)arg);
2312         case MGSL_IOCGIF:
2313                 return get_interface(info, argp);
2314         case MGSL_IOCSIF:
2315                 return set_interface(info,(int)arg);
2316         case MGSL_IOCTXENABLE:
2317                 return set_txenable(info,(int)arg);
2318         case MGSL_IOCRXENABLE:
2319                 return set_rxenable(info,(int)arg);
2320         case MGSL_IOCTXABORT:
2321                 return tx_abort(info);
2322         case MGSL_IOCGSTATS:
2323                 return get_stats(info, argp);
2324         case MGSL_IOCWAITEVENT:
2325                 return wait_events(info, argp);
2326         case TIOCMIWAIT:
2327                 return modem_input_wait(info,(int)arg);
2328         case TIOCGICOUNT:
2329                 spin_lock_irqsave(&info->lock,flags);
2330                 cnow = info->icount;
2331                 spin_unlock_irqrestore(&info->lock,flags);
2332                 p_cuser = argp;
2333                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2334                 if (error) return error;
2335                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2336                 if (error) return error;
2337                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2338                 if (error) return error;
2339                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2340                 if (error) return error;
2341                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2342                 if (error) return error;
2343                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2344                 if (error) return error;
2345                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2346                 if (error) return error;
2347                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2348                 if (error) return error;
2349                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2350                 if (error) return error;
2351                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2352                 if (error) return error;
2353                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2354                 if (error) return error;
2355                 return 0;
2356         default:
2357                 return -ENOIOCTLCMD;
2358         }
2359         return 0;
2360 }
2361
2362 /* Set new termios settings
2363  *
2364  * Arguments:
2365  *
2366  *      tty             pointer to tty structure
2367  *      termios         pointer to buffer to hold returned old termios
2368  */
2369 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2370 {
2371         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2372         unsigned long flags;
2373
2374         if (debug_level >= DEBUG_LEVEL_INFO)
2375                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2376                         tty->driver->name );
2377
2378         /* just return if nothing has changed */
2379         if ((tty->termios->c_cflag == old_termios->c_cflag)
2380             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2381                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2382           return;
2383
2384         mgslpc_change_params(info);
2385
2386         /* Handle transition to B0 status */
2387         if (old_termios->c_cflag & CBAUD &&
2388             !(tty->termios->c_cflag & CBAUD)) {
2389                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2390                 spin_lock_irqsave(&info->lock,flags);
2391                 set_signals(info);
2392                 spin_unlock_irqrestore(&info->lock,flags);
2393         }
2394
2395         /* Handle transition away from B0 status */
2396         if (!(old_termios->c_cflag & CBAUD) &&
2397             tty->termios->c_cflag & CBAUD) {
2398                 info->serial_signals |= SerialSignal_DTR;
2399                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2400                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2401                         info->serial_signals |= SerialSignal_RTS;
2402                 }
2403                 spin_lock_irqsave(&info->lock,flags);
2404                 set_signals(info);
2405                 spin_unlock_irqrestore(&info->lock,flags);
2406         }
2407
2408         /* Handle turning off CRTSCTS */
2409         if (old_termios->c_cflag & CRTSCTS &&
2410             !(tty->termios->c_cflag & CRTSCTS)) {
2411                 tty->hw_stopped = 0;
2412                 tx_release(tty);
2413         }
2414 }
2415
2416 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2417 {
2418         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2419
2420         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2421                 return;
2422
2423         if (debug_level >= DEBUG_LEVEL_INFO)
2424                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2425                          __FILE__,__LINE__, info->device_name, info->count);
2426
2427         if (!info->count)
2428                 return;
2429
2430         if (tty_hung_up_p(filp))
2431                 goto cleanup;
2432
2433         if ((tty->count == 1) && (info->count != 1)) {
2434                 /*
2435                  * tty->count is 1 and the tty structure will be freed.
2436                  * info->count should be one in this case.
2437                  * if it's not, correct it so that the port is shutdown.
2438                  */
2439                 printk("mgslpc_close: bad refcount; tty->count is 1, "
2440                        "info->count is %d\n", info->count);
2441                 info->count = 1;
2442         }
2443
2444         info->count--;
2445
2446         /* if at least one open remaining, leave hardware active */
2447         if (info->count)
2448                 goto cleanup;
2449
2450         info->flags |= ASYNC_CLOSING;
2451
2452         /* set tty->closing to notify line discipline to
2453          * only process XON/XOFF characters. Only the N_TTY
2454          * discipline appears to use this (ppp does not).
2455          */
2456         tty->closing = 1;
2457
2458         /* wait for transmit data to clear all layers */
2459
2460         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2461                 if (debug_level >= DEBUG_LEVEL_INFO)
2462                         printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2463                                  __FILE__,__LINE__, info->device_name );
2464                 tty_wait_until_sent(tty, info->closing_wait);
2465         }
2466
2467         if (info->flags & ASYNC_INITIALIZED)
2468                 mgslpc_wait_until_sent(tty, info->timeout);
2469
2470         if (tty->driver->flush_buffer)
2471                 tty->driver->flush_buffer(tty);
2472
2473         ldisc_flush_buffer(tty);
2474
2475         shutdown(info);
2476
2477         tty->closing = 0;
2478         info->tty = NULL;
2479
2480         if (info->blocked_open) {
2481                 if (info->close_delay) {
2482                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
2483                 }
2484                 wake_up_interruptible(&info->open_wait);
2485         }
2486
2487         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2488
2489         wake_up_interruptible(&info->close_wait);
2490
2491 cleanup:
2492         if (debug_level >= DEBUG_LEVEL_INFO)
2493                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2494                         tty->driver->name, info->count);
2495 }
2496
2497 /* Wait until the transmitter is empty.
2498  */
2499 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2500 {
2501         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2502         unsigned long orig_jiffies, char_time;
2503
2504         if (!info )
2505                 return;
2506
2507         if (debug_level >= DEBUG_LEVEL_INFO)
2508                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2509                          __FILE__,__LINE__, info->device_name );
2510
2511         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2512                 return;
2513
2514         if (!(info->flags & ASYNC_INITIALIZED))
2515                 goto exit;
2516
2517         orig_jiffies = jiffies;
2518
2519         /* Set check interval to 1/5 of estimated time to
2520          * send a character, and make it at least 1. The check
2521          * interval should also be less than the timeout.
2522          * Note: use tight timings here to satisfy the NIST-PCTS.
2523          */
2524
2525         if ( info->params.data_rate ) {
2526                 char_time = info->timeout/(32 * 5);
2527                 if (!char_time)
2528                         char_time++;
2529         } else
2530                 char_time = 1;
2531
2532         if (timeout)
2533                 char_time = min_t(unsigned long, char_time, timeout);
2534
2535         if (info->params.mode == MGSL_MODE_HDLC) {
2536                 while (info->tx_active) {
2537                         msleep_interruptible(jiffies_to_msecs(char_time));
2538                         if (signal_pending(current))
2539                                 break;
2540                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2541                                 break;
2542                 }
2543         } else {
2544                 while ((info->tx_count || info->tx_active) &&
2545                         info->tx_enabled) {
2546                         msleep_interruptible(jiffies_to_msecs(char_time));
2547                         if (signal_pending(current))
2548                                 break;
2549                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2550                                 break;
2551                 }
2552         }
2553
2554 exit:
2555         if (debug_level >= DEBUG_LEVEL_INFO)
2556                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2557                          __FILE__,__LINE__, info->device_name );
2558 }
2559
2560 /* Called by tty_hangup() when a hangup is signaled.
2561  * This is the same as closing all open files for the port.
2562  */
2563 static void mgslpc_hangup(struct tty_struct *tty)
2564 {
2565         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2566
2567         if (debug_level >= DEBUG_LEVEL_INFO)
2568                 printk("%s(%d):mgslpc_hangup(%s)\n",
2569                          __FILE__,__LINE__, info->device_name );
2570
2571         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2572                 return;
2573
2574         mgslpc_flush_buffer(tty);
2575         shutdown(info);
2576
2577         info->count = 0;
2578         info->flags &= ~ASYNC_NORMAL_ACTIVE;
2579         info->tty = NULL;
2580
2581         wake_up_interruptible(&info->open_wait);
2582 }
2583
2584 /* Block the current process until the specified port
2585  * is ready to be opened.
2586  */
2587 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2588                            MGSLPC_INFO *info)
2589 {
2590         DECLARE_WAITQUEUE(wait, current);
2591         int             retval;
2592         bool            do_clocal = false;
2593         bool            extra_count = false;
2594         unsigned long   flags;
2595
2596         if (debug_level >= DEBUG_LEVEL_INFO)
2597                 printk("%s(%d):block_til_ready on %s\n",
2598                          __FILE__,__LINE__, tty->driver->name );
2599
2600         if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2601                 /* nonblock mode is set or port is not enabled */
2602                 /* just verify that callout device is not active */
2603                 info->flags |= ASYNC_NORMAL_ACTIVE;
2604                 return 0;
2605         }
2606
2607         if (tty->termios->c_cflag & CLOCAL)
2608                 do_clocal = true;
2609
2610         /* Wait for carrier detect and the line to become
2611          * free (i.e., not in use by the callout).  While we are in
2612          * this loop, info->count is dropped by one, so that
2613          * mgslpc_close() knows when to free things.  We restore it upon
2614          * exit, either normal or abnormal.
2615          */
2616
2617         retval = 0;
2618         add_wait_queue(&info->open_wait, &wait);
2619
2620         if (debug_level >= DEBUG_LEVEL_INFO)
2621                 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2622                          __FILE__,__LINE__, tty->driver->name, info->count );
2623
2624         spin_lock_irqsave(&info->lock, flags);
2625         if (!tty_hung_up_p(filp)) {
2626                 extra_count = true;
2627                 info->count--;
2628         }
2629         spin_unlock_irqrestore(&info->lock, flags);
2630         info->blocked_open++;
2631
2632         while (1) {
2633                 if ((tty->termios->c_cflag & CBAUD)) {
2634                         spin_lock_irqsave(&info->lock,flags);
2635                         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2636                         set_signals(info);
2637                         spin_unlock_irqrestore(&info->lock,flags);
2638                 }
2639
2640                 set_current_state(TASK_INTERRUPTIBLE);
2641
2642                 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2643                         retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2644                                         -EAGAIN : -ERESTARTSYS;
2645                         break;
2646                 }
2647
2648                 spin_lock_irqsave(&info->lock,flags);
2649                 get_signals(info);
2650                 spin_unlock_irqrestore(&info->lock,flags);
2651
2652                 if (!(info->flags & ASYNC_CLOSING) &&
2653                     (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2654                         break;
2655                 }
2656
2657                 if (signal_pending(current)) {
2658                         retval = -ERESTARTSYS;
2659                         break;
2660                 }
2661
2662                 if (debug_level >= DEBUG_LEVEL_INFO)
2663                         printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2664                                  __FILE__,__LINE__, tty->driver->name, info->count );
2665
2666                 schedule();
2667         }
2668
2669         set_current_state(TASK_RUNNING);
2670         remove_wait_queue(&info->open_wait, &wait);
2671
2672         if (extra_count)
2673                 info->count++;
2674         info->blocked_open--;
2675
2676         if (debug_level >= DEBUG_LEVEL_INFO)
2677                 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2678                          __FILE__,__LINE__, tty->driver->name, info->count );
2679
2680         if (!retval)
2681                 info->flags |= ASYNC_NORMAL_ACTIVE;
2682
2683         return retval;
2684 }
2685
2686 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2687 {
2688         MGSLPC_INFO     *info;
2689         int                     retval, line;
2690         unsigned long flags;
2691
2692         /* verify range of specified line number */
2693         line = tty->index;
2694         if ((line < 0) || (line >= mgslpc_device_count)) {
2695                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2696                         __FILE__,__LINE__,line);
2697                 return -ENODEV;
2698         }
2699
2700         /* find the info structure for the specified line */
2701         info = mgslpc_device_list;
2702         while(info && info->line != line)
2703                 info = info->next_device;
2704         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2705                 return -ENODEV;
2706
2707         tty->driver_data = info;
2708         info->tty = tty;
2709
2710         if (debug_level >= DEBUG_LEVEL_INFO)
2711                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2712                          __FILE__,__LINE__,tty->driver->name, info->count);
2713
2714         /* If port is closing, signal caller to try again */
2715         if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2716                 if (info->flags & ASYNC_CLOSING)
2717                         interruptible_sleep_on(&info->close_wait);
2718                 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2719                         -EAGAIN : -ERESTARTSYS);
2720                 goto cleanup;
2721         }
2722
2723         info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2724
2725         spin_lock_irqsave(&info->netlock, flags);
2726         if (info->netcount) {
2727                 retval = -EBUSY;
2728                 spin_unlock_irqrestore(&info->netlock, flags);
2729                 goto cleanup;
2730         }
2731         info->count++;
2732         spin_unlock_irqrestore(&info->netlock, flags);
2733
2734         if (info->count == 1) {
2735                 /* 1st open on this device, init hardware */
2736                 retval = startup(info);
2737                 if (retval < 0)
2738                         goto cleanup;
2739         }
2740
2741         retval = block_til_ready(tty, filp, info);
2742         if (retval) {
2743                 if (debug_level >= DEBUG_LEVEL_INFO)
2744                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2745                                  __FILE__,__LINE__, info->device_name, retval);
2746                 goto cleanup;
2747         }
2748
2749         if (debug_level >= DEBUG_LEVEL_INFO)
2750                 printk("%s(%d):mgslpc_open(%s) success\n",
2751                          __FILE__,__LINE__, info->device_name);
2752         retval = 0;
2753
2754 cleanup:
2755         if (retval) {
2756                 if (tty->count == 1)
2757                         info->tty = NULL; /* tty layer will release tty struct */
2758                 if(info->count)
2759                         info->count--;
2760         }
2761
2762         return retval;
2763 }
2764
2765 /*
2766  * /proc fs routines....
2767  */
2768
2769 static inline int line_info(char *buf, MGSLPC_INFO *info)
2770 {
2771         char    stat_buf[30];
2772         int     ret;
2773         unsigned long flags;
2774
2775         ret = sprintf(buf, "%s:io:%04X irq:%d",
2776                       info->device_name, info->io_base, info->irq_level);
2777
2778         /* output current serial signal states */
2779         spin_lock_irqsave(&info->lock,flags);
2780         get_signals(info);
2781         spin_unlock_irqrestore(&info->lock,flags);
2782
2783         stat_buf[0] = 0;
2784         stat_buf[1] = 0;
2785         if (info->serial_signals & SerialSignal_RTS)
2786                 strcat(stat_buf, "|RTS");
2787         if (info->serial_signals & SerialSignal_CTS)
2788                 strcat(stat_buf, "|CTS");
2789         if (info->serial_signals & SerialSignal_DTR)
2790                 strcat(stat_buf, "|DTR");
2791         if (info->serial_signals & SerialSignal_DSR)
2792                 strcat(stat_buf, "|DSR");
2793         if (info->serial_signals & SerialSignal_DCD)
2794                 strcat(stat_buf, "|CD");
2795         if (info->serial_signals & SerialSignal_RI)
2796                 strcat(stat_buf, "|RI");
2797
2798         if (info->params.mode == MGSL_MODE_HDLC) {
2799                 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2800                               info->icount.txok, info->icount.rxok);
2801                 if (info->icount.txunder)
2802                         ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2803                 if (info->icount.txabort)
2804                         ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2805                 if (info->icount.rxshort)
2806                         ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2807                 if (info->icount.rxlong)
2808                         ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2809                 if (info->icount.rxover)
2810                         ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2811                 if (info->icount.rxcrc)
2812                         ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2813         } else {
2814                 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2815                               info->icount.tx, info->icount.rx);
2816                 if (info->icount.frame)
2817                         ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2818                 if (info->icount.parity)
2819                         ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2820                 if (info->icount.brk)
2821                         ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2822                 if (info->icount.overrun)
2823                         ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2824         }
2825
2826         /* Append serial signal status to end */
2827         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2828
2829         ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2830                        info->tx_active,info->bh_requested,info->bh_running,
2831                        info->pending_bh);
2832
2833         return ret;
2834 }
2835
2836 /* Called to print information about devices
2837  */
2838 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2839                  int *eof, void *data)
2840 {
2841         int len = 0, l;
2842         off_t   begin = 0;
2843         MGSLPC_INFO *info;
2844
2845         len += sprintf(page, "synclink driver:%s\n", driver_version);
2846
2847         info = mgslpc_device_list;
2848         while( info ) {
2849                 l = line_info(page + len, info);
2850                 len += l;
2851                 if (len+begin > off+count)
2852                         goto done;
2853                 if (len+begin < off) {
2854                         begin += len;
2855                         len = 0;
2856                 }
2857                 info = info->next_device;
2858         }
2859
2860         *eof = 1;
2861 done:
2862         if (off >= len+begin)
2863                 return 0;
2864         *start = page + (off-begin);
2865         return ((count < begin+len-off) ? count : begin+len-off);
2866 }
2867
2868 static int rx_alloc_buffers(MGSLPC_INFO *info)
2869 {
2870         /* each buffer has header and data */
2871         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2872
2873         /* calculate total allocation size for 8 buffers */
2874         info->rx_buf_total_size = info->rx_buf_size * 8;
2875
2876         /* limit total allocated memory */
2877         if (info->rx_buf_total_size > 0x10000)
2878                 info->rx_buf_total_size = 0x10000;
2879
2880         /* calculate number of buffers */
2881         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2882
2883         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2884         if (info->rx_buf == NULL)
2885                 return -ENOMEM;
2886
2887         rx_reset_buffers(info);
2888         return 0;
2889 }
2890
2891 static void rx_free_buffers(MGSLPC_INFO *info)
2892 {
2893         kfree(info->rx_buf);
2894         info->rx_buf = NULL;
2895 }
2896
2897 static int claim_resources(MGSLPC_INFO *info)
2898 {
2899         if (rx_alloc_buffers(info) < 0 ) {
2900                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2901                 release_resources(info);
2902                 return -ENODEV;
2903         }
2904         return 0;
2905 }
2906
2907 static void release_resources(MGSLPC_INFO *info)
2908 {
2909         if (debug_level >= DEBUG_LEVEL_INFO)
2910                 printk("release_resources(%s)\n", info->device_name);
2911         rx_free_buffers(info);
2912 }
2913
2914 /* Add the specified device instance data structure to the
2915  * global linked list of devices and increment the device count.
2916  *
2917  * Arguments:           info    pointer to device instance data
2918  */
2919 static void mgslpc_add_device(MGSLPC_INFO *info)
2920 {
2921         info->next_device = NULL;
2922         info->line = mgslpc_device_count;
2923         sprintf(info->device_name,"ttySLP%d",info->line);
2924
2925         if (info->line < MAX_DEVICE_COUNT) {
2926                 if (maxframe[info->line])
2927                         info->max_frame_size = maxframe[info->line];
2928                 info->dosyncppp = dosyncppp[info->line];
2929         }
2930
2931         mgslpc_device_count++;
2932
2933         if (!mgslpc_device_list)
2934                 mgslpc_device_list = info;
2935         else {
2936                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2937                 while( current_dev->next_device )
2938                         current_dev = current_dev->next_device;
2939                 current_dev->next_device = info;
2940         }
2941
2942         if (info->max_frame_size < 4096)
2943                 info->max_frame_size = 4096;
2944         else if (info->max_frame_size > 65535)
2945                 info->max_frame_size = 65535;
2946
2947         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2948                 info->device_name, info->io_base, info->irq_level);
2949
2950 #if SYNCLINK_GENERIC_HDLC
2951         hdlcdev_init(info);
2952 #endif
2953 }
2954
2955 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2956 {
2957         MGSLPC_INFO *info = mgslpc_device_list;
2958         MGSLPC_INFO *last = NULL;
2959
2960         while(info) {
2961                 if (info == remove_info) {
2962                         if (last)
2963                                 last->next_device = info->next_device;
2964                         else
2965                                 mgslpc_device_list = info->next_device;
2966 #if SYNCLINK_GENERIC_HDLC
2967                         hdlcdev_exit(info);
2968 #endif
2969                         release_resources(info);
2970                         kfree(info);
2971                         mgslpc_device_count--;
2972                         return;
2973                 }
2974                 last = info;
2975                 info = info->next_device;
2976         }
2977 }
2978
2979 static struct pcmcia_device_id mgslpc_ids[] = {
2980         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2981         PCMCIA_DEVICE_NULL
2982 };
2983 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2984
2985 static struct pcmcia_driver mgslpc_driver = {
2986         .owner          = THIS_MODULE,
2987         .drv            = {
2988                 .name   = "synclink_cs",
2989         },
2990         .probe          = mgslpc_probe,
2991         .remove         = mgslpc_detach,
2992         .id_table       = mgslpc_ids,
2993         .suspend        = mgslpc_suspend,
2994         .resume         = mgslpc_resume,
2995 };
2996
2997 static const struct tty_operations mgslpc_ops = {
2998         .open = mgslpc_open,
2999         .close = mgslpc_close,
3000         .write = mgslpc_write,
3001         .put_char = mgslpc_put_char,
3002         .flush_chars = mgslpc_flush_chars,
3003         .write_room = mgslpc_write_room,
3004         .chars_in_buffer = mgslpc_chars_in_buffer,
3005         .flush_buffer = mgslpc_flush_buffer,
3006         .ioctl = mgslpc_ioctl,
3007         .throttle = mgslpc_throttle,
3008         .unthrottle = mgslpc_unthrottle,
3009         .send_xchar = mgslpc_send_xchar,
3010         .break_ctl = mgslpc_break,
3011         .wait_until_sent = mgslpc_wait_until_sent,
3012         .read_proc = mgslpc_read_proc,
3013         .set_termios = mgslpc_set_termios,
3014         .stop = tx_pause,
3015         .start = tx_release,
3016         .hangup = mgslpc_hangup,
3017         .tiocmget = tiocmget,
3018         .tiocmset = tiocmset,
3019 };
3020
3021 static void synclink_cs_cleanup(void)
3022 {
3023         int rc;
3024
3025         printk("Unloading %s: version %s\n", driver_name, driver_version);
3026
3027         while(mgslpc_device_list)
3028                 mgslpc_remove_device(mgslpc_device_list);
3029
3030         if (serial_driver) {
3031                 if ((rc = tty_unregister_driver(serial_driver)))
3032                         printk("%s(%d) failed to unregister tty driver err=%d\n",
3033                                __FILE__,__LINE__,rc);
3034                 put_tty_driver(serial_driver);
3035         }
3036
3037         pcmcia_unregister_driver(&mgslpc_driver);
3038 }
3039
3040 static int __init synclink_cs_init(void)
3041 {
3042     int rc;
3043
3044     if (break_on_load) {
3045             mgslpc_get_text_ptr();
3046             BREAKPOINT();
3047     }
3048
3049     printk("%s %s\n", driver_name, driver_version);
3050
3051     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3052             return rc;
3053
3054     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3055     if (!serial_driver) {
3056             rc = -ENOMEM;
3057             goto error;
3058     }
3059
3060     /* Initialize the tty_driver structure */
3061
3062     serial_driver->owner = THIS_MODULE;
3063     serial_driver->driver_name = "synclink_cs";
3064     serial_driver->name = "ttySLP";
3065     serial_driver->major = ttymajor;
3066     serial_driver->minor_start = 64;
3067     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3068     serial_driver->subtype = SERIAL_TYPE_NORMAL;
3069     serial_driver->init_termios = tty_std_termios;
3070     serial_driver->init_termios.c_cflag =
3071             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3072     serial_driver->flags = TTY_DRIVER_REAL_RAW;
3073     tty_set_operations(serial_driver, &mgslpc_ops);
3074
3075     if ((rc = tty_register_driver(serial_driver)) < 0) {
3076             printk("%s(%d):Couldn't register serial driver\n",
3077                    __FILE__,__LINE__);
3078             put_tty_driver(serial_driver);
3079             serial_driver = NULL;
3080             goto error;
3081     }
3082
3083     printk("%s %s, tty major#%d\n",
3084            driver_name, driver_version,
3085            serial_driver->major);
3086
3087     return 0;
3088
3089 error:
3090     synclink_cs_cleanup();
3091     return rc;
3092 }
3093
3094 static void __exit synclink_cs_exit(void)
3095 {
3096         synclink_cs_cleanup();
3097 }
3098
3099 module_init(synclink_cs_init);
3100 module_exit(synclink_cs_exit);
3101
3102 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3103 {
3104         unsigned int M, N;
3105         unsigned char val;
3106
3107         /* note:standard BRG mode is broken in V3.2 chip
3108          * so enhanced mode is always used
3109          */
3110
3111         if (rate) {
3112                 N = 3686400 / rate;
3113                 if (!N)
3114                         N = 1;
3115                 N >>= 1;
3116                 for (M = 1; N > 64 && M < 16; M++)
3117                         N >>= 1;
3118                 N--;
3119
3120                 /* BGR[5..0] = N
3121                  * BGR[9..6] = M
3122                  * BGR[7..0] contained in BGR register
3123                  * BGR[9..8] contained in CCR2[7..6]
3124                  * divisor = (N+1)*2^M
3125                  *
3126                  * Note: M *must* not be zero (causes asymetric duty cycle)
3127                  */
3128                 write_reg(info, (unsigned char) (channel + BGR),
3129                                   (unsigned char) ((M << 6) + N));
3130                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3131                 val |= ((M << 4) & 0xc0);
3132                 write_reg(info, (unsigned char) (channel + CCR2), val);
3133         }
3134 }
3135
3136 /* Enabled the AUX clock output at the specified frequency.
3137  */
3138 static void enable_auxclk(MGSLPC_INFO *info)
3139 {
3140         unsigned char val;
3141
3142         /* MODE
3143          *
3144          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3145          * 05      ADM Address Mode, 0 = no addr recognition
3146          * 04      TMD Timer Mode, 0 = external
3147          * 03      RAC Receiver Active, 0 = inactive
3148          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3149          * 01      TRS Timer Resolution, 1=512
3150          * 00      TLP Test Loop, 0 = no loop
3151          *
3152          * 1000 0010
3153          */
3154         val = 0x82;
3155
3156         /* channel B RTS is used to enable AUXCLK driver on SP505 */
3157         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3158                 val |= BIT2;
3159         write_reg(info, CHB + MODE, val);
3160
3161         /* CCR0
3162          *
3163          * 07      PU Power Up, 1=active, 0=power down
3164          * 06      MCE Master Clock Enable, 1=enabled
3165          * 05      Reserved, 0
3166          * 04..02  SC[2..0] Encoding
3167          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3168          *
3169          * 11000000
3170          */
3171         write_reg(info, CHB + CCR0, 0xc0);
3172
3173         /* CCR1
3174          *
3175          * 07      SFLG Shared Flag, 0 = disable shared flags
3176          * 06      GALP Go Active On Loop, 0 = not used
3177          * 05      GLP Go On Loop, 0 = not used
3178          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3179          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3180          * 02..00  CM[2..0] Clock Mode
3181          *
3182          * 0001 0111
3183          */
3184         write_reg(info, CHB + CCR1, 0x17);
3185
3186         /* CCR2 (Channel B)
3187          *
3188          * 07..06  BGR[9..8] Baud rate bits 9..8
3189          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3190          * 04      SSEL Clock source select, 1=submode b
3191          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3192          * 02      RWX Read/Write Exchange 0=disabled
3193          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3194          * 00      DIV, data inversion 0=disabled, 1=enabled
3195          *
3196          * 0011 1000
3197          */
3198         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3199                 write_reg(info, CHB + CCR2, 0x38);
3200         else
3201                 write_reg(info, CHB + CCR2, 0x30);
3202
3203         /* CCR4
3204          *
3205          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3206          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3207          * 05      TST1 Test Pin, 0=normal operation
3208          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3209          * 03..02  Reserved, must be 0
3210          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3211          *
3212          * 0101 0000
3213          */
3214         write_reg(info, CHB + CCR4, 0x50);
3215
3216         /* if auxclk not enabled, set internal BRG so
3217          * CTS transitions can be detected (requires TxC)
3218          */
3219         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3220                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3221         else
3222                 mgslpc_set_rate(info, CHB, 921600);
3223 }
3224
3225 static void loopback_enable(MGSLPC_INFO *info)
3226 {
3227         unsigned char val;
3228
3229         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3230         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3231         write_reg(info, CHA + CCR1, val);
3232
3233         /* CCR2:04 SSEL Clock source select, 1=submode b */
3234         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3235         write_reg(info, CHA + CCR2, val);
3236
3237         /* set LinkSpeed if available, otherwise default to 2Mbps */
3238         if (info->params.clock_speed)
3239                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3240         else
3241                 mgslpc_set_rate(info, CHA, 1843200);
3242
3243         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3244         val = read_reg(info, CHA + MODE) | BIT0;
3245         write_reg(info, CHA + MODE, val);
3246 }
3247
3248 static void hdlc_mode(MGSLPC_INFO *info)
3249 {
3250         unsigned char val;
3251         unsigned char clkmode, clksubmode;
3252
3253         /* disable all interrupts */
3254         irq_disable(info, CHA, 0xffff);
3255         irq_disable(info, CHB, 0xffff);
3256         port_irq_disable(info, 0xff);
3257
3258         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3259         clkmode = clksubmode = 0;
3260         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3261             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3262                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3263                 clkmode = 7;
3264         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3265                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3266                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3267                 clkmode = 7;
3268                 clksubmode = 1;
3269         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3270                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3271                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3272                         clkmode = 6;
3273                         clksubmode = 1;
3274                 } else {
3275                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3276                         clkmode = 6;
3277                 }
3278         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3279                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3280                 clksubmode = 1;
3281         }
3282
3283         /* MODE
3284          *
3285          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3286          * 05      ADM Address Mode, 0 = no addr recognition
3287          * 04      TMD Timer Mode, 0 = external
3288          * 03      RAC Receiver Active, 0 = inactive
3289          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3290          * 01      TRS Timer Resolution, 1=512
3291          * 00      TLP Test Loop, 0 = no loop
3292          *
3293          * 1000 0010
3294          */
3295         val = 0x82;
3296         if (info->params.loopback)
3297                 val |= BIT0;
3298
3299         /* preserve RTS state */
3300         if (info->serial_signals & SerialSignal_RTS)
3301                 val |= BIT2;
3302         write_reg(info, CHA + MODE, val);
3303
3304         /* CCR0
3305          *
3306          * 07      PU Power Up, 1=active, 0=power down
3307          * 06      MCE Master Clock Enable, 1=enabled
3308          * 05      Reserved, 0
3309          * 04..02  SC[2..0] Encoding
3310          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3311          *
3312          * 11000000
3313          */
3314         val = 0xc0;
3315         switch (info->params.encoding)
3316         {
3317         case HDLC_ENCODING_NRZI:
3318                 val |= BIT3;
3319                 break;
3320         case HDLC_ENCODING_BIPHASE_SPACE:
3321                 val |= BIT4;
3322                 break;          // FM0
3323         case HDLC_ENCODING_BIPHASE_MARK:
3324                 val |= BIT4 + BIT2;
3325                 break;          // FM1
3326         case HDLC_ENCODING_BIPHASE_LEVEL:
3327                 val |= BIT4 + BIT3;
3328                 break;          // Manchester
3329         }
3330         write_reg(info, CHA + CCR0, val);
3331
3332         /* CCR1
3333          *
3334          * 07      SFLG Shared Flag, 0 = disable shared flags
3335          * 06      GALP Go Active On Loop, 0 = not used
3336          * 05      GLP Go On Loop, 0 = not used
3337          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3338          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3339          * 02..00  CM[2..0] Clock Mode
3340          *
3341          * 0001 0000
3342          */
3343         val = 0x10 + clkmode;
3344         write_reg(info, CHA + CCR1, val);
3345
3346         /* CCR2
3347          *
3348          * 07..06  BGR[9..8] Baud rate bits 9..8
3349          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3350          * 04      SSEL Clock source select, 1=submode b
3351          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3352          * 02      RWX Read/Write Exchange 0=disabled
3353          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3354          * 00      DIV, data inversion 0=disabled, 1=enabled
3355          *
3356          * 0000 0000
3357          */
3358         val = 0x00;
3359         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3360             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3361                 val |= BIT5;
3362         if (clksubmode)
3363                 val |= BIT4;
3364         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3365                 val |= BIT1;
3366         if (info->params.encoding == HDLC_ENCODING_NRZB)
3367                 val |= BIT0;
3368         write_reg(info, CHA + CCR2, val);
3369
3370         /* CCR3
3371          *
3372          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3373          * 05      EPT Enable preamble transmission, 1=enabled
3374          * 04      RADD Receive address pushed to FIFO, 0=disabled
3375          * 03      CRL CRC Reset Level, 0=FFFF
3376          * 02      RCRC Rx CRC 0=On 1=Off
3377          * 01      TCRC Tx CRC 0=On 1=Off
3378          * 00      PSD DPLL Phase Shift Disable
3379          *
3380          * 0000 0000
3381          */
3382         val = 0x00;
3383         if (info->params.crc_type == HDLC_CRC_NONE)
3384                 val |= BIT2 + BIT1;
3385         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3386                 val |= BIT5;
3387         switch (info->params.preamble_length)
3388         {
3389         case HDLC_PREAMBLE_LENGTH_16BITS:
3390                 val |= BIT6;
3391                 break;
3392         case HDLC_PREAMBLE_LENGTH_32BITS:
3393                 val |= BIT6;
3394                 break;
3395         case HDLC_PREAMBLE_LENGTH_64BITS:
3396                 val |= BIT7 + BIT6;
3397                 break;
3398         }
3399         write_reg(info, CHA + CCR3, val);
3400
3401         /* PRE - Preamble pattern */
3402         val = 0;
3403         switch (info->params.preamble)
3404         {
3405         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3406         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3407         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3408         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3409         }
3410         write_reg(info, CHA + PRE, val);
3411
3412         /* CCR4
3413          *
3414          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3415          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3416          * 05      TST1 Test Pin, 0=normal operation
3417          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3418          * 03..02  Reserved, must be 0
3419          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3420          *
3421          * 0101 0000
3422          */
3423         val = 0x50;
3424         write_reg(info, CHA + CCR4, val);
3425         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3426                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3427         else
3428                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3429
3430         /* RLCR Receive length check register
3431          *
3432          * 7     1=enable receive length check
3433          * 6..0  Max frame length = (RL + 1) * 32
3434          */
3435         write_reg(info, CHA + RLCR, 0);
3436
3437         /* XBCH Transmit Byte Count High
3438          *
3439          * 07      DMA mode, 0 = interrupt driven
3440          * 06      NRM, 0=ABM (ignored)
3441          * 05      CAS Carrier Auto Start
3442          * 04      XC Transmit Continuously (ignored)
3443          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3444          *
3445          * 0000 0000
3446          */
3447         val = 0x00;
3448         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3449                 val |= BIT5;
3450         write_reg(info, CHA + XBCH, val);
3451         enable_auxclk(info);
3452         if (info->params.loopback || info->testing_irq)
3453                 loopback_enable(info);
3454         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3455         {
3456                 irq_enable(info, CHB, IRQ_CTS);
3457                 /* PVR[3] 1=AUTO CTS active */
3458                 set_reg_bits(info, CHA + PVR, BIT3);
3459         } else
3460                 clear_reg_bits(info, CHA + PVR, BIT3);
3461
3462         irq_enable(info, CHA,
3463                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3464                          IRQ_UNDERRUN + IRQ_TXFIFO);
3465         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3466         wait_command_complete(info, CHA);
3467         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3468
3469         /* Master clock mode enabled above to allow reset commands
3470          * to complete even if no data clocks are present.
3471          *
3472          * Disable master clock mode for normal communications because
3473          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3474          * IRQ when in master clock mode.
3475          *
3476          * Leave master clock mode enabled for IRQ test because the
3477          * timer IRQ used by the test can only happen in master clock mode.
3478          */
3479         if (!info->testing_irq)
3480                 clear_reg_bits(info, CHA + CCR0, BIT6);
3481
3482         tx_set_idle(info);
3483
3484         tx_stop(info);
3485         rx_stop(info);
3486 }
3487
3488 static void rx_stop(MGSLPC_INFO *info)
3489 {
3490         if (debug_level >= DEBUG_LEVEL_ISR)
3491                 printk("%s(%d):rx_stop(%s)\n",
3492                          __FILE__,__LINE__, info->device_name );
3493
3494         /* MODE:03 RAC Receiver Active, 0=inactive */
3495         clear_reg_bits(info, CHA + MODE, BIT3);
3496
3497         info->rx_enabled = false;
3498         info->rx_overflow = false;
3499 }
3500
3501 static void rx_start(MGSLPC_INFO *info)
3502 {
3503         if (debug_level >= DEBUG_LEVEL_ISR)
3504                 printk("%s(%d):rx_start(%s)\n",
3505                          __FILE__,__LINE__, info->device_name );
3506
3507         rx_reset_buffers(info);
3508         info->rx_enabled = false;
3509         info->rx_overflow = false;
3510
3511         /* MODE:03 RAC Receiver Active, 1=active */
3512         set_reg_bits(info, CHA + MODE, BIT3);
3513
3514         info->rx_enabled = true;
3515 }
3516
3517 static void tx_start(MGSLPC_INFO *info)
3518 {
3519         if (debug_level >= DEBUG_LEVEL_ISR)
3520                 printk("%s(%d):tx_start(%s)\n",
3521                          __FILE__,__LINE__, info->device_name );
3522
3523         if (info->tx_count) {
3524                 /* If auto RTS enabled and RTS is inactive, then assert */
3525                 /* RTS and set a flag indicating that the driver should */
3526                 /* negate RTS when the transmission completes. */
3527                 info->drop_rts_on_tx_done = false;
3528
3529                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3530                         get_signals(info);
3531                         if (!(info->serial_signals & SerialSignal_RTS)) {
3532                                 info->serial_signals |= SerialSignal_RTS;
3533                                 set_signals(info);
3534                                 info->drop_rts_on_tx_done = true;
3535                         }
3536                 }
3537
3538                 if (info->params.mode == MGSL_MODE_ASYNC) {
3539                         if (!info->tx_active) {
3540                                 info->tx_active = true;
3541                                 tx_ready(info);
3542                         }
3543                 } else {
3544                         info->tx_active = true;
3545                         tx_ready(info);
3546                         mod_timer(&info->tx_timer, jiffies +
3547                                         msecs_to_jiffies(5000));
3548                 }
3549         }
3550
3551         if (!info->tx_enabled)
3552                 info->tx_enabled = true;
3553 }
3554
3555 static void tx_stop(MGSLPC_INFO *info)
3556 {
3557         if (debug_level >= DEBUG_LEVEL_ISR)
3558                 printk("%s(%d):tx_stop(%s)\n",
3559                          __FILE__,__LINE__, info->device_name );
3560
3561         del_timer(&info->tx_timer);
3562
3563         info->tx_enabled = false;
3564         info->tx_active = false;
3565 }
3566
3567 /* Reset the adapter to a known state and prepare it for further use.
3568  */
3569 static void reset_device(MGSLPC_INFO *info)
3570 {
3571         /* power up both channels (set BIT7) */
3572         write_reg(info, CHA + CCR0, 0x80);
3573         write_reg(info, CHB + CCR0, 0x80);
3574         write_reg(info, CHA + MODE, 0);
3575         write_reg(info, CHB + MODE, 0);
3576
3577         /* disable all interrupts */
3578         irq_disable(info, CHA, 0xffff);
3579         irq_disable(info, CHB, 0xffff);
3580         port_irq_disable(info, 0xff);
3581
3582         /* PCR Port Configuration Register
3583          *
3584          * 07..04  DEC[3..0] Serial I/F select outputs
3585          * 03      output, 1=AUTO CTS control enabled
3586          * 02      RI Ring Indicator input 0=active
3587          * 01      DSR input 0=active
3588          * 00      DTR output 0=active
3589          *
3590          * 0000 0110
3591          */
3592         write_reg(info, PCR, 0x06);
3593
3594         /* PVR Port Value Register
3595          *
3596          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3597          * 03      AUTO CTS output 1=enabled
3598          * 02      RI Ring Indicator input
3599          * 01      DSR input
3600          * 00      DTR output (1=inactive)
3601          *
3602          * 0000 0001
3603          */
3604 //      write_reg(info, PVR, PVR_DTR);
3605
3606         /* IPC Interrupt Port Configuration
3607          *
3608          * 07      VIS 1=Masked interrupts visible
3609          * 06..05  Reserved, 0
3610          * 04..03  SLA Slave address, 00 ignored
3611          * 02      CASM Cascading Mode, 1=daisy chain
3612          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3613          *
3614          * 0000 0101
3615          */
3616         write_reg(info, IPC, 0x05);
3617 }
3618
3619 static void async_mode(MGSLPC_INFO *info)
3620 {
3621         unsigned char val;
3622
3623         /* disable all interrupts */
3624         irq_disable(info, CHA, 0xffff);
3625         irq_disable(info, CHB, 0xffff);
3626         port_irq_disable(info, 0xff);
3627
3628         /* MODE
3629          *
3630          * 07      Reserved, 0
3631          * 06      FRTS RTS State, 0=active
3632          * 05      FCTS Flow Control on CTS
3633          * 04      FLON Flow Control Enable
3634          * 03      RAC Receiver Active, 0 = inactive
3635          * 02      RTS 0=Auto RTS, 1=manual RTS
3636          * 01      TRS Timer Resolution, 1=512
3637          * 00      TLP Test Loop, 0 = no loop
3638          *
3639          * 0000 0110
3640          */
3641         val = 0x06;
3642         if (info->params.loopback)
3643                 val |= BIT0;
3644
3645         /* preserve RTS state */
3646         if (!(info->serial_signals & SerialSignal_RTS))
3647                 val |= BIT6;
3648         write_reg(info, CHA + MODE, val);
3649
3650         /* CCR0
3651          *
3652          * 07      PU Power Up, 1=active, 0=power down
3653          * 06      MCE Master Clock Enable, 1=enabled
3654          * 05      Reserved, 0
3655          * 04..02  SC[2..0] Encoding, 000=NRZ
3656          * 01..00  SM[1..0] Serial Mode, 11=Async
3657          *
3658          * 1000 0011
3659          */
3660         write_reg(info, CHA + CCR0, 0x83);
3661
3662         /* CCR1
3663          *
3664          * 07..05  Reserved, 0
3665          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3666          * 03      BCR Bit Clock Rate, 1=16x
3667          * 02..00  CM[2..0] Clock Mode, 111=BRG
3668          *
3669          * 0001 1111
3670          */
3671         write_reg(info, CHA + CCR1, 0x1f);
3672
3673         /* CCR2 (channel A)
3674          *
3675          * 07..06  BGR[9..8] Baud rate bits 9..8
3676          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3677          * 04      SSEL Clock source select, 1=submode b
3678          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3679          * 02      RWX Read/Write Exchange 0=disabled
3680          * 01      Reserved, 0
3681          * 00      DIV, data inversion 0=disabled, 1=enabled
3682          *
3683          * 0001 0000
3684          */
3685         write_reg(info, CHA + CCR2, 0x10);
3686
3687         /* CCR3
3688          *
3689          * 07..01  Reserved, 0
3690          * 00      PSD DPLL Phase Shift Disable
3691          *
3692          * 0000 0000
3693          */
3694         write_reg(info, CHA + CCR3, 0);
3695
3696         /* CCR4
3697          *
3698          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3699          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3700          * 05      TST1 Test Pin, 0=normal operation
3701          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3702          * 03..00  Reserved, must be 0
3703          *
3704          * 0101 0000
3705          */
3706         write_reg(info, CHA + CCR4, 0x50);
3707         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3708
3709         /* DAFO Data Format
3710          *
3711          * 07      Reserved, 0
3712          * 06      XBRK transmit break, 0=normal operation
3713          * 05      Stop bits (0=1, 1=2)
3714          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3715          * 02      PAREN Parity Enable
3716          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3717          *
3718          */
3719         val = 0x00;
3720         if (info->params.data_bits != 8)
3721                 val |= BIT0;    /* 7 bits */
3722         if (info->params.stop_bits != 1)
3723                 val |= BIT5;
3724         if (info->params.parity != ASYNC_PARITY_NONE)
3725         {
3726                 val |= BIT2;    /* Parity enable */
3727                 if (info->params.parity == ASYNC_PARITY_ODD)
3728                         val |= BIT3;
3729                 else
3730                         val |= BIT4;
3731         }
3732         write_reg(info, CHA + DAFO, val);
3733
3734         /* RFC Rx FIFO Control
3735          *
3736          * 07      Reserved, 0
3737          * 06      DPS, 1=parity bit not stored in data byte
3738          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3739          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3740          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3741          * 01      Reserved, 0
3742          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3743          *
3744          * 0101 1100
3745          */
3746         write_reg(info, CHA + RFC, 0x5c);
3747
3748         /* RLCR Receive length check register
3749          *
3750          * Max frame length = (RL + 1) * 32
3751          */
3752         write_reg(info, CHA + RLCR, 0);
3753
3754         /* XBCH Transmit Byte Count High
3755          *
3756          * 07      DMA mode, 0 = interrupt driven
3757          * 06      NRM, 0=ABM (ignored)
3758          * 05      CAS Carrier Auto Start
3759          * 04      XC Transmit Continuously (ignored)
3760          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3761          *
3762          * 0000 0000
3763          */
3764         val = 0x00;
3765         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3766                 val |= BIT5;
3767         write_reg(info, CHA + XBCH, val);
3768         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3769                 irq_enable(info, CHA, IRQ_CTS);
3770
3771         /* MODE:03 RAC Receiver Active, 1=active */
3772         set_reg_bits(info, CHA + MODE, BIT3);
3773         enable_auxclk(info);
3774         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3775                 irq_enable(info, CHB, IRQ_CTS);
3776                 /* PVR[3] 1=AUTO CTS active */
3777                 set_reg_bits(info, CHA + PVR, BIT3);
3778         } else
3779                 clear_reg_bits(info, CHA + PVR, BIT3);
3780         irq_enable(info, CHA,
3781                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3782                           IRQ_ALLSENT + IRQ_TXFIFO);
3783         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3784         wait_command_complete(info, CHA);
3785         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3786 }
3787
3788 /* Set the HDLC idle mode for the transmitter.
3789  */
3790 static void tx_set_idle(MGSLPC_INFO *info)
3791 {
3792         /* Note: ESCC2 only supports flags and one idle modes */
3793         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3794                 set_reg_bits(info, CHA + CCR1, BIT3);
3795         else
3796                 clear_reg_bits(info, CHA + CCR1, BIT3);
3797 }
3798
3799 /* get state of the V24 status (input) signals.
3800  */
3801 static void get_signals(MGSLPC_INFO *info)
3802 {
3803         unsigned char status = 0;
3804
3805         /* preserve DTR and RTS */
3806         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3807
3808         if (read_reg(info, CHB + VSTR) & BIT7)
3809                 info->serial_signals |= SerialSignal_DCD;
3810         if (read_reg(info, CHB + STAR) & BIT1)
3811                 info->serial_signals |= SerialSignal_CTS;
3812
3813         status = read_reg(info, CHA + PVR);
3814         if (!(status & PVR_RI))
3815                 info->serial_signals |= SerialSignal_RI;
3816         if (!(status & PVR_DSR))
3817                 info->serial_signals |= SerialSignal_DSR;
3818 }
3819
3820 /* Set the state of DTR and RTS based on contents of
3821  * serial_signals member of device extension.
3822  */
3823 static void set_signals(MGSLPC_INFO *info)
3824 {
3825         unsigned char val;
3826
3827         val = read_reg(info, CHA + MODE);
3828         if (info->params.mode == MGSL_MODE_ASYNC) {
3829                 if (info->serial_signals & SerialSignal_RTS)
3830                         val &= ~BIT6;
3831                 else
3832                         val |= BIT6;
3833         } else {
3834                 if (info->serial_signals & SerialSignal_RTS)
3835                         val |= BIT2;
3836                 else
3837                         val &= ~BIT2;
3838         }
3839         write_reg(info, CHA + MODE, val);
3840
3841         if (info->serial_signals & SerialSignal_DTR)
3842                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3843         else
3844                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3845 }
3846
3847 static void rx_reset_buffers(MGSLPC_INFO *info)
3848 {
3849         RXBUF *buf;
3850         int i;
3851
3852         info->rx_put = 0;
3853         info->rx_get = 0;
3854         info->rx_frame_count = 0;
3855         for (i=0 ; i < info->rx_buf_count ; i++) {
3856                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3857                 buf->status = buf->count = 0;
3858         }
3859 }
3860
3861 /* Attempt to return a received HDLC frame
3862  * Only frames received without errors are returned.
3863  *
3864  * Returns true if frame returned, otherwise false
3865  */
3866 static bool rx_get_frame(MGSLPC_INFO *info)
3867 {
3868         unsigned short status;
3869         RXBUF *buf;
3870         unsigned int framesize = 0;
3871         unsigned long flags;
3872         struct tty_struct *tty = info->tty;
3873         bool return_frame = false;
3874
3875         if (info->rx_frame_count == 0)
3876                 return false;
3877
3878         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3879
3880         status = buf->status;
3881
3882         /* 07  VFR  1=valid frame
3883          * 06  RDO  1=data overrun
3884          * 05  CRC  1=OK, 0=error
3885          * 04  RAB  1=frame aborted
3886          */
3887         if ((status & 0xf0) != 0xA0) {
3888                 if (!(status & BIT7) || (status & BIT4))
3889                         info->icount.rxabort++;
3890                 else if (status & BIT6)
3891                         info->icount.rxover++;
3892                 else if (!(status & BIT5)) {
3893                         info->icount.rxcrc++;
3894                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3895                                 return_frame = true;
3896                 }
3897                 framesize = 0;
3898 #if SYNCLINK_GENERIC_HDLC
3899                 {
3900                         struct net_device_stats *stats = hdlc_stats(info->netdev);
3901                         stats->rx_errors++;
3902                         stats->rx_frame_errors++;
3903                 }
3904 #endif
3905         } else
3906                 return_frame = true;
3907
3908         if (return_frame)
3909                 framesize = buf->count;
3910
3911         if (debug_level >= DEBUG_LEVEL_BH)
3912                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3913                         __FILE__,__LINE__,info->device_name,status,framesize);
3914
3915         if (debug_level >= DEBUG_LEVEL_DATA)
3916                 trace_block(info, buf->data, framesize, 0);
3917
3918         if (framesize) {
3919                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3920                       framesize+1 > info->max_frame_size) ||
3921                     framesize > info->max_frame_size)
3922                         info->icount.rxlong++;
3923                 else {
3924                         if (status & BIT5)
3925                                 info->icount.rxok++;
3926
3927                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3928                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3929                                 ++framesize;
3930                         }
3931
3932 #if SYNCLINK_GENERIC_HDLC
3933                         if (info->netcount)
3934                                 hdlcdev_rx(info, buf->data, framesize);
3935                         else
3936 #endif
3937                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3938                 }
3939         }
3940
3941         spin_lock_irqsave(&info->lock,flags);
3942         buf->status = buf->count = 0;
3943         info->rx_frame_count--;
3944         info->rx_get++;
3945         if (info->rx_get >= info->rx_buf_count)
3946                 info->rx_get = 0;
3947         spin_unlock_irqrestore(&info->lock,flags);
3948
3949         return true;
3950 }
3951
3952 static bool register_test(MGSLPC_INFO *info)
3953 {
3954         static unsigned char patterns[] =
3955             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3956         static unsigned int count = ARRAY_SIZE(patterns);
3957         unsigned int i;
3958         bool rc = true;
3959         unsigned long flags;
3960
3961         spin_lock_irqsave(&info->lock,flags);
3962         reset_device(info);
3963
3964         for (i = 0; i < count; i++) {
3965                 write_reg(info, XAD1, patterns[i]);
3966                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3967                 if ((read_reg(info, XAD1) != patterns[i]) ||
3968                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3969                         rc = false;
3970                         break;
3971                 }
3972         }
3973
3974         spin_unlock_irqrestore(&info->lock,flags);
3975         return rc;
3976 }
3977
3978 static bool irq_test(MGSLPC_INFO *info)
3979 {
3980         unsigned long end_time;
3981         unsigned long flags;
3982
3983         spin_lock_irqsave(&info->lock,flags);
3984         reset_device(info);
3985
3986         info->testing_irq = true;
3987         hdlc_mode(info);
3988
3989         info->irq_occurred = false;
3990
3991         /* init hdlc mode */
3992
3993         irq_enable(info, CHA, IRQ_TIMER);
3994         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3995         issue_command(info, CHA, CMD_START_TIMER);
3996
3997         spin_unlock_irqrestore(&info->lock,flags);
3998
3999         end_time=100;
4000         while(end_time-- && !info->irq_occurred) {
4001                 msleep_interruptible(10);
4002         }
4003
4004         info->testing_irq = false;
4005
4006         spin_lock_irqsave(&info->lock,flags);
4007         reset_device(info);
4008         spin_unlock_irqrestore(&info->lock,flags);
4009
4010         return info->irq_occurred;
4011 }
4012
4013 static int adapter_test(MGSLPC_INFO *info)
4014 {
4015         if (!register_test(info)) {
4016                 info->init_error = DiagStatus_AddressFailure;
4017                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4018                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4019                 return -ENODEV;
4020         }
4021
4022         if (!irq_test(info)) {
4023                 info->init_error = DiagStatus_IrqFailure;
4024                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4025                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4026                 return -ENODEV;
4027         }
4028
4029         if (debug_level >= DEBUG_LEVEL_INFO)
4030                 printk("%s(%d):device %s passed diagnostics\n",
4031                         __FILE__,__LINE__,info->device_name);
4032         return 0;
4033 }
4034
4035 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4036 {
4037         int i;
4038         int linecount;
4039         if (xmit)
4040                 printk("%s tx data:\n",info->device_name);
4041         else
4042                 printk("%s rx data:\n",info->device_name);
4043
4044         while(count) {
4045                 if (count > 16)
4046                         linecount = 16;
4047                 else
4048                         linecount = count;
4049
4050                 for(i=0;i<linecount;i++)
4051                         printk("%02X ",(unsigned char)data[i]);
4052                 for(;i<17;i++)
4053                         printk("   ");
4054                 for(i=0;i<linecount;i++) {
4055                         if (data[i]>=040 && data[i]<=0176)
4056                                 printk("%c",data[i]);
4057                         else
4058                                 printk(".");
4059                 }
4060                 printk("\n");
4061
4062                 data  += linecount;
4063                 count -= linecount;
4064         }
4065 }
4066
4067 /* HDLC frame time out
4068  * update stats and do tx completion processing
4069  */
4070 static void tx_timeout(unsigned long context)
4071 {
4072         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4073         unsigned long flags;
4074
4075         if ( debug_level >= DEBUG_LEVEL_INFO )
4076                 printk( "%s(%d):tx_timeout(%s)\n",
4077                         __FILE__,__LINE__,info->device_name);
4078         if(info->tx_active &&
4079            info->params.mode == MGSL_MODE_HDLC) {
4080                 info->icount.txtimeout++;
4081         }
4082         spin_lock_irqsave(&info->lock,flags);
4083         info->tx_active = false;
4084         info->tx_count = info->tx_put = info->tx_get = 0;
4085
4086         spin_unlock_irqrestore(&info->lock,flags);
4087
4088 #if SYNCLINK_GENERIC_HDLC
4089         if (info->netcount)
4090                 hdlcdev_tx_done(info);
4091         else
4092 #endif
4093                 bh_transmit(info);
4094 }
4095
4096 #if SYNCLINK_GENERIC_HDLC
4097
4098 /**
4099  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4100  * set encoding and frame check sequence (FCS) options
4101  *
4102  * dev       pointer to network device structure
4103  * encoding  serial encoding setting
4104  * parity    FCS setting
4105  *
4106  * returns 0 if success, otherwise error code
4107  */
4108 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4109                           unsigned short parity)
4110 {
4111         MGSLPC_INFO *info = dev_to_port(dev);
4112         unsigned char  new_encoding;
4113         unsigned short new_crctype;
4114
4115         /* return error if TTY interface open */
4116         if (info->count)
4117                 return -EBUSY;
4118
4119         switch (encoding)
4120         {
4121         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
4122         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4123         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4124         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4125         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4126         default: return -EINVAL;
4127         }
4128
4129         switch (parity)
4130         {
4131         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
4132         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4133         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4134         default: return -EINVAL;
4135         }
4136
4137         info->params.encoding = new_encoding;
4138         info->params.crc_type = new_crctype;
4139
4140         /* if network interface up, reprogram hardware */
4141         if (info->netcount)
4142                 mgslpc_program_hw(info);
4143
4144         return 0;
4145 }
4146
4147 /**
4148  * called by generic HDLC layer to send frame
4149  *
4150  * skb  socket buffer containing HDLC frame
4151  * dev  pointer to network device structure
4152  *
4153  * returns 0 if success, otherwise error code
4154  */
4155 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4156 {
4157         MGSLPC_INFO *info = dev_to_port(dev);
4158         struct net_device_stats *stats = hdlc_stats(dev);
4159         unsigned long flags;
4160
4161         if (debug_level >= DEBUG_LEVEL_INFO)
4162                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4163
4164         /* stop sending until this frame completes */
4165         netif_stop_queue(dev);
4166
4167         /* copy data to device buffers */
4168         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4169         info->tx_get = 0;
4170         info->tx_put = info->tx_count = skb->len;
4171
4172         /* update network statistics */
4173         stats->tx_packets++;
4174         stats->tx_bytes += skb->len;
4175
4176         /* done with socket buffer, so free it */
4177         dev_kfree_skb(skb);
4178
4179         /* save start time for transmit timeout detection */
4180         dev->trans_start = jiffies;
4181
4182         /* start hardware transmitter if necessary */
4183         spin_lock_irqsave(&info->lock,flags);
4184         if (!info->tx_active)
4185                 tx_start(info);
4186         spin_unlock_irqrestore(&info->lock,flags);
4187
4188         return 0;
4189 }
4190
4191 /**
4192  * called by network layer when interface enabled
4193  * claim resources and initialize hardware
4194  *
4195  * dev  pointer to network device structure
4196  *
4197  * returns 0 if success, otherwise error code
4198  */
4199 static int hdlcdev_open(struct net_device *dev)
4200 {
4201         MGSLPC_INFO *info = dev_to_port(dev);
4202         int rc;
4203         unsigned long flags;
4204
4205         if (debug_level >= DEBUG_LEVEL_INFO)
4206                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4207
4208         /* generic HDLC layer open processing */
4209         if ((rc = hdlc_open(dev)))
4210                 return rc;
4211
4212         /* arbitrate between network and tty opens */
4213         spin_lock_irqsave(&info->netlock, flags);
4214         if (info->count != 0 || info->netcount != 0) {
4215                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4216                 spin_unlock_irqrestore(&info->netlock, flags);
4217                 return -EBUSY;
4218         }
4219         info->netcount=1;
4220         spin_unlock_irqrestore(&info->netlock, flags);
4221
4222         /* claim resources and init adapter */
4223         if ((rc = startup(info)) != 0) {
4224                 spin_lock_irqsave(&info->netlock, flags);
4225                 info->netcount=0;
4226                 spin_unlock_irqrestore(&info->netlock, flags);
4227                 return rc;
4228         }
4229
4230         /* assert DTR and RTS, apply hardware settings */
4231         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4232         mgslpc_program_hw(info);
4233
4234         /* enable network layer transmit */
4235         dev->trans_start = jiffies;
4236         netif_start_queue(dev);
4237
4238         /* inform generic HDLC layer of current DCD status */
4239         spin_lock_irqsave(&info->lock, flags);
4240         get_signals(info);
4241         spin_unlock_irqrestore(&info->lock, flags);
4242         if (info->serial_signals & SerialSignal_DCD)
4243                 netif_carrier_on(dev);
4244         else
4245                 netif_carrier_off(dev);
4246         return 0;
4247 }
4248
4249 /**
4250  * called by network layer when interface is disabled
4251  * shutdown hardware and release resources
4252  *
4253  * dev  pointer to network device structure
4254  *
4255  * returns 0 if success, otherwise error code
4256  */
4257 static int hdlcdev_close(struct net_device *dev)
4258 {
4259         MGSLPC_INFO *info = dev_to_port(dev);
4260         unsigned long flags;
4261
4262         if (debug_level >= DEBUG_LEVEL_INFO)
4263                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4264
4265         netif_stop_queue(dev);
4266
4267         /* shutdown adapter and release resources */
4268         shutdown(info);
4269
4270         hdlc_close(dev);
4271
4272         spin_lock_irqsave(&info->netlock, flags);
4273         info->netcount=0;
4274         spin_unlock_irqrestore(&info->netlock, flags);
4275
4276         return 0;
4277 }
4278
4279 /**
4280  * called by network layer to process IOCTL call to network device
4281  *
4282  * dev  pointer to network device structure
4283  * ifr  pointer to network interface request structure
4284  * cmd  IOCTL command code
4285  *
4286  * returns 0 if success, otherwise error code
4287  */
4288 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4289 {
4290         const size_t size = sizeof(sync_serial_settings);
4291         sync_serial_settings new_line;
4292         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4293         MGSLPC_INFO *info = dev_to_port(dev);
4294         unsigned int flags;
4295
4296         if (debug_level >= DEBUG_LEVEL_INFO)
4297                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4298
4299         /* return error if TTY interface open */
4300         if (info->count)
4301                 return -EBUSY;
4302
4303         if (cmd != SIOCWANDEV)
4304                 return hdlc_ioctl(dev, ifr, cmd);
4305
4306         switch(ifr->ifr_settings.type) {
4307         case IF_GET_IFACE: /* return current sync_serial_settings */
4308
4309                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4310                 if (ifr->ifr_settings.size < size) {
4311                         ifr->ifr_settings.size = size; /* data size wanted */
4312                         return -ENOBUFS;
4313                 }
4314
4315                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4316                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4317                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4318                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4319
4320                 switch (flags){
4321                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4322                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4323                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4324                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4325                 default: new_line.clock_type = CLOCK_DEFAULT;
4326                 }
4327
4328                 new_line.clock_rate = info->params.clock_speed;
4329                 new_line.loopback   = info->params.loopback ? 1:0;
4330
4331                 if (copy_to_user(line, &new_line, size))
4332                         return -EFAULT;
4333                 return 0;
4334
4335         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4336
4337                 if(!capable(CAP_NET_ADMIN))
4338                         return -EPERM;
4339                 if (copy_from_user(&new_line, line, size))
4340                         return -EFAULT;
4341
4342                 switch (new_line.clock_type)
4343                 {
4344                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4345                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4346                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4347                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4348                 case CLOCK_DEFAULT:  flags = info->params.flags &
4349                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4350                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4351                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4352                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4353                 default: return -EINVAL;
4354                 }
4355
4356                 if (new_line.loopback != 0 && new_line.loopback != 1)
4357                         return -EINVAL;
4358
4359                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4360                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4361                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4362                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4363                 info->params.flags |= flags;
4364
4365                 info->params.loopback = new_line.loopback;
4366
4367                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4368                         info->params.clock_speed = new_line.clock_rate;
4369                 else
4370                         info->params.clock_speed = 0;
4371
4372                 /* if network interface up, reprogram hardware */
4373                 if (info->netcount)
4374                         mgslpc_program_hw(info);
4375                 return 0;
4376
4377         default:
4378                 return hdlc_ioctl(dev, ifr, cmd);
4379         }
4380 }
4381
4382 /**
4383  * called by network layer when transmit timeout is detected
4384  *
4385  * dev  pointer to network device structure
4386  */
4387 static void hdlcdev_tx_timeout(struct net_device *dev)
4388 {
4389         MGSLPC_INFO *info = dev_to_port(dev);
4390         struct net_device_stats *stats = hdlc_stats(dev);
4391         unsigned long flags;
4392
4393         if (debug_level >= DEBUG_LEVEL_INFO)
4394                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4395
4396         stats->tx_errors++;
4397         stats->tx_aborted_errors++;
4398
4399         spin_lock_irqsave(&info->lock,flags);
4400         tx_stop(info);
4401         spin_unlock_irqrestore(&info->lock,flags);
4402
4403         netif_wake_queue(dev);
4404 }
4405
4406 /**
4407  * called by device driver when transmit completes
4408  * reenable network layer transmit if stopped
4409  *
4410  * info  pointer to device instance information
4411  */
4412 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4413 {
4414         if (netif_queue_stopped(info->netdev))
4415                 netif_wake_queue(info->netdev);
4416 }
4417
4418 /**
4419  * called by device driver when frame received
4420  * pass frame to network layer
4421  *
4422  * info  pointer to device instance information
4423  * buf   pointer to buffer contianing frame data
4424  * size  count of data bytes in buf
4425  */
4426 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4427 {
4428         struct sk_buff *skb = dev_alloc_skb(size);
4429         struct net_device *dev = info->netdev;
4430         struct net_device_stats *stats = hdlc_stats(dev);
4431
4432         if (debug_level >= DEBUG_LEVEL_INFO)
4433                 printk("hdlcdev_rx(%s)\n",dev->name);
4434
4435         if (skb == NULL) {
4436                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4437                 stats->rx_dropped++;
4438                 return;
4439         }
4440
4441         memcpy(skb_put(skb, size),buf,size);
4442
4443         skb->protocol = hdlc_type_trans(skb, info->netdev);
4444
4445         stats->rx_packets++;
4446         stats->rx_bytes += size;
4447
4448         netif_rx(skb);
4449
4450         info->netdev->last_rx = jiffies;
4451 }
4452
4453 /**
4454  * called by device driver when adding device instance
4455  * do generic HDLC initialization
4456  *
4457  * info  pointer to device instance information
4458  *
4459  * returns 0 if success, otherwise error code
4460  */
4461 static int hdlcdev_init(MGSLPC_INFO *info)
4462 {
4463         int rc;
4464         struct net_device *dev;
4465         hdlc_device *hdlc;
4466
4467         /* allocate and initialize network and HDLC layer objects */
4468
4469         if (!(dev = alloc_hdlcdev(info))) {
4470                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4471                 return -ENOMEM;
4472         }
4473
4474         /* for network layer reporting purposes only */
4475         dev->base_addr = info->io_base;
4476         dev->irq       = info->irq_level;
4477
4478         /* network layer callbacks and settings */
4479         dev->do_ioctl       = hdlcdev_ioctl;
4480         dev->open           = hdlcdev_open;
4481         dev->stop           = hdlcdev_close;
4482         dev->tx_timeout     = hdlcdev_tx_timeout;
4483         dev->watchdog_timeo = 10*HZ;
4484         dev->tx_queue_len   = 50;
4485
4486         /* generic HDLC layer callbacks and settings */
4487         hdlc         = dev_to_hdlc(dev);
4488         hdlc->attach = hdlcdev_attach;
4489         hdlc->xmit   = hdlcdev_xmit;
4490
4491         /* register objects with HDLC layer */
4492         if ((rc = register_hdlc_device(dev))) {
4493                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4494                 free_netdev(dev);
4495                 return rc;
4496         }
4497
4498         info->netdev = dev;
4499         return 0;
4500 }
4501
4502 /**
4503  * called by device driver when removing device instance
4504  * do generic HDLC cleanup
4505  *
4506  * info  pointer to device instance information
4507  */
4508 static void hdlcdev_exit(MGSLPC_INFO *info)
4509 {
4510         unregister_hdlc_device(info->netdev);
4511         free_netdev(info->netdev);
4512         info->netdev = NULL;
4513 }
4514
4515 #endif /* CONFIG_HDLC */
4516