drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/seq_file.h>
  55 #include <linux/slab.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/vmalloc.h>
  58 #include <linux/init.h>
  59 #include <linux/delay.h>
  60 #include <linux/ioctl.h>
  61 #include <linux/synclink.h>
  62
  63 #include <asm/system.h>
  64 #include <asm/io.h>
  65 #include <asm/irq.h>
  66 #include <asm/dma.h>
  67 #include <linux/bitops.h>
  68 #include <asm/types.h>
  69 #include <linux/termios.h>
  70 #include <linux/workqueue.h>
  71 #include <linux/hdlc.h>
  72
  73 #include <pcmcia/cs_types.h>
  74 #include <pcmcia/cs.h>
  75 #include <pcmcia/cistpl.h>
  76 #include <pcmcia/cisreg.h>
  77 #include <pcmcia/ds.h>
  78
  79 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  80 #define SYNCLINK_GENERIC_HDLC 1
  81 #else
  82 #define SYNCLINK_GENERIC_HDLC 0
  83 #endif
  84
  85 #define GET_USER(error,value,addr) error = get_user(value,addr)
  86 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  87 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  88 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  89
  90 #include <asm/uaccess.h>
  91
  92 static MGSL_PARAMS default_params = {
  93         MGSL_MODE_HDLC,                 /* unsigned long mode */
  94         0,                              /* unsigned char loopback; */
  95         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  96         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  97         0,                              /* unsigned long clock_speed; */
  98         0xff,                           /* unsigned char addr_filter; */
  99         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
 100         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
 101         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 102         9600,                           /* unsigned long data_rate; */
 103         8,                              /* unsigned char data_bits; */
 104         1,                              /* unsigned char stop_bits; */
 105         ASYNC_PARITY_NONE               /* unsigned char parity; */
 106 };
 107
 108 typedef struct
 109 {
 110         int count;
 111         unsigned char status;
 112         char data[1];
 113 } RXBUF;
 114
 115 /* The queue of BH actions to be performed */
 116
 117 #define BH_RECEIVE  1
 118 #define BH_TRANSMIT 2
 119 #define BH_STATUS   4
 120
 121 #define IO_PIN_SHUTDOWN_LIMIT 100
 122
 123 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 124
 125 struct _input_signal_events {
 126         int     ri_up;
 127         int     ri_down;
 128         int     dsr_up;
 129         int     dsr_down;
 130         int     dcd_up;
 131         int     dcd_down;
 132         int     cts_up;
 133         int     cts_down;
 134 };
 135
 136
 137 /*
 138  * Device instance data structure
 139  */
 140
 141 typedef struct _mgslpc_info {
 142         struct tty_port         port;
 143         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 144         int                     magic;
 145         int                     line;
 146
 147         struct mgsl_icount      icount;
 148
 149         int                     timeout;
 150         int                     x_char;         /* xon/xoff character */
 151         unsigned char           read_status_mask;
 152         unsigned char           ignore_status_mask;
 153
 154         unsigned char *tx_buf;
 155         int            tx_put;
 156         int            tx_get;
 157         int            tx_count;
 158
 159         /* circular list of fixed length rx buffers */
 160
 161         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 162         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 163         int            rx_put;         /* index of next empty rx buffer */
 164         int            rx_get;         /* index of next full rx buffer */
 165         int            rx_buf_size;    /* size in bytes of single rx buffer */
 166         int            rx_buf_count;   /* total number of rx buffers */
 167         int            rx_frame_count; /* number of full rx buffers */
 168
 169         wait_queue_head_t       status_event_wait_q;
 170         wait_queue_head_t       event_wait_q;
 171         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 172         struct _mgslpc_info     *next_device;   /* device list link */
 173
 174         unsigned short imra_value;
 175         unsigned short imrb_value;
 176         unsigned char  pim_value;
 177
 178         spinlock_t lock;
 179         struct work_struct task;                /* task structure for scheduling bh */
 180
 181         u32 max_frame_size;
 182
 183         u32 pending_bh;
 184
 185         bool bh_running;
 186         bool bh_requested;
 187
 188         int dcd_chkcount; /* check counts to prevent */
 189         int cts_chkcount; /* too many IRQs if a signal */
 190         int dsr_chkcount; /* is floating */
 191         int ri_chkcount;
 192
 193         bool rx_enabled;
 194         bool rx_overflow;
 195
 196         bool tx_enabled;
 197         bool tx_active;
 198         bool tx_aborting;
 199         u32 idle_mode;
 200
 201         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 202
 203         char device_name[25];           /* device instance name */
 204
 205         unsigned int io_base;   /* base I/O address of adapter */
 206         unsigned int irq_level;
 207
 208         MGSL_PARAMS params;             /* communications parameters */
 209
 210         unsigned char serial_signals;   /* current serial signal states */
 211
 212         bool irq_occurred;              /* for diagnostics use */
 213         char testing_irq;
 214         unsigned int init_error;        /* startup error (DIAGS)        */
 215
 216         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 217         bool drop_rts_on_tx_done;
 218
 219         struct  _input_signal_events    input_signal_events;
 220
 221         /* PCMCIA support */
 222         struct pcmcia_device    *p_dev;
 223         dev_node_t            node;
 224         int                   stop;
 225
 226         /* SPPP/Cisco HDLC device parts */
 227         int netcount;
 228         spinlock_t netlock;
 229
 230 #if SYNCLINK_GENERIC_HDLC
 231         struct net_device *netdev;
 232 #endif
 233
 234 } MGSLPC_INFO;
 235
 236 #define MGSLPC_MAGIC 0x5402
 237
 238 /*
 239  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 240  */
 241 #define TXBUFSIZE 4096
 242
 243
 244 #define CHA     0x00   /* channel A offset */
 245 #define CHB     0x40   /* channel B offset */
 246
 247 /*
 248  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 249  */
 250 #undef PVR
 251
 252 #define RXFIFO  0
 253 #define TXFIFO  0
 254 #define STAR    0x20
 255 #define CMDR    0x20
 256 #define RSTA    0x21
 257 #define PRE     0x21
 258 #define MODE    0x22
 259 #define TIMR    0x23
 260 #define XAD1    0x24
 261 #define XAD2    0x25
 262 #define RAH1    0x26
 263 #define RAH2    0x27
 264 #define DAFO    0x27
 265 #define RAL1    0x28
 266 #define RFC     0x28
 267 #define RHCR    0x29
 268 #define RAL2    0x29
 269 #define RBCL    0x2a
 270 #define XBCL    0x2a
 271 #define RBCH    0x2b
 272 #define XBCH    0x2b
 273 #define CCR0    0x2c
 274 #define CCR1    0x2d
 275 #define CCR2    0x2e
 276 #define CCR3    0x2f
 277 #define VSTR    0x34
 278 #define BGR     0x34
 279 #define RLCR    0x35
 280 #define AML     0x36
 281 #define AMH     0x37
 282 #define GIS     0x38
 283 #define IVA     0x38
 284 #define IPC     0x39
 285 #define ISR     0x3a
 286 #define IMR     0x3a
 287 #define PVR     0x3c
 288 #define PIS     0x3d
 289 #define PIM     0x3d
 290 #define PCR     0x3e
 291 #define CCR4    0x3f
 292
 293 // IMR/ISR
 294
 295 #define IRQ_BREAK_ON    BIT15   // rx break detected
 296 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 297 #define IRQ_ALLSENT     BIT13   // all sent
 298 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 299 #define IRQ_TIMER       BIT11   // timer interrupt
 300 #define IRQ_CTS         BIT10   // CTS status change
 301 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 302 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 303 #define IRQ_RXEOM       BIT7    // receive message end
 304 #define IRQ_EXITHUNT    BIT6    // receive frame start
 305 #define IRQ_RXTIME      BIT6    // rx char timeout
 306 #define IRQ_DCD         BIT2    // carrier detect status change
 307 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 308 #define IRQ_RXFIFO      BIT0    // receive pool full
 309
 310 // STAR
 311
 312 #define XFW   BIT6              // transmit FIFO write enable
 313 #define CEC   BIT2              // command executing
 314 #define CTS   BIT1              // CTS state
 315
 316 #define PVR_DTR      BIT0
 317 #define PVR_DSR      BIT1
 318 #define PVR_RI       BIT2
 319 #define PVR_AUTOCTS  BIT3
 320 #define PVR_RS232    0x20   /* 0010b */
 321 #define PVR_V35      0xe0   /* 1110b */
 322 #define PVR_RS422    0x40   /* 0100b */
 323
 324 /* Register access functions */
 325
 326 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 327 #define read_reg(info, reg) inb((info)->io_base + (reg))
 328
 329 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 330 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 331
 332 #define set_reg_bits(info, reg, mask) \
 333     write_reg(info, (reg), \
 334                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 335 #define clear_reg_bits(info, reg, mask) \
 336     write_reg(info, (reg), \
 337                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 338 /*
 339  * interrupt enable/disable routines
 340  */
 341 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 342 {
 343         if (channel == CHA) {
 344                 info->imra_value |= mask;
 345                 write_reg16(info, CHA + IMR, info->imra_value);
 346         } else {
 347                 info->imrb_value |= mask;
 348                 write_reg16(info, CHB + IMR, info->imrb_value);
 349         }
 350 }
 351 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 352 {
 353         if (channel == CHA) {
 354                 info->imra_value &= ~mask;
 355                 write_reg16(info, CHA + IMR, info->imra_value);
 356         } else {
 357                 info->imrb_value &= ~mask;
 358                 write_reg16(info, CHB + IMR, info->imrb_value);
 359         }
 360 }
 361
 362 #define port_irq_disable(info, mask) \
 363   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 364
 365 #define port_irq_enable(info, mask) \
 366   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 367
 368 static void rx_start(MGSLPC_INFO *info);
 369 static void rx_stop(MGSLPC_INFO *info);
 370
 371 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 372 static void tx_stop(MGSLPC_INFO *info);
 373 static void tx_set_idle(MGSLPC_INFO *info);
 374
 375 static void get_signals(MGSLPC_INFO *info);
 376 static void set_signals(MGSLPC_INFO *info);
 377
 378 static void reset_device(MGSLPC_INFO *info);
 379
 380 static void hdlc_mode(MGSLPC_INFO *info);
 381 static void async_mode(MGSLPC_INFO *info);
 382
 383 static void tx_timeout(unsigned long context);
 384
 385 static int carrier_raised(struct tty_port *port);
 386 static void dtr_rts(struct tty_port *port, int onoff);
 387
 388 #if SYNCLINK_GENERIC_HDLC
 389 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 390 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 391 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 392 static int  hdlcdev_init(MGSLPC_INFO *info);
 393 static void hdlcdev_exit(MGSLPC_INFO *info);
 394 #endif
 395
 396 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 397
 398 static bool register_test(MGSLPC_INFO *info);
 399 static bool irq_test(MGSLPC_INFO *info);
 400 static int adapter_test(MGSLPC_INFO *info);
 401
 402 static int claim_resources(MGSLPC_INFO *info);
 403 static void release_resources(MGSLPC_INFO *info);
 404 static void mgslpc_add_device(MGSLPC_INFO *info);
 405 static void mgslpc_remove_device(MGSLPC_INFO *info);
 406
 407 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 408 static void rx_reset_buffers(MGSLPC_INFO *info);
 409 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 410 static void rx_free_buffers(MGSLPC_INFO *info);
 411
 412 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 413
 414 /*
 415  * Bottom half interrupt handlers
 416  */
 417 static void bh_handler(struct work_struct *work);
 418 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 419 static void bh_status(MGSLPC_INFO *info);
 420
 421 /*
 422  * ioctl handlers
 423  */
 424 static int tiocmget(struct tty_struct *tty, struct file *file);
 425 static int tiocmset(struct tty_struct *tty, struct file *file,
 426                     unsigned int set, unsigned int clear);
 427 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 428 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 429 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 430 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 431 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 432 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 433 static int tx_abort(MGSLPC_INFO *info);
 434 static int set_rxenable(MGSLPC_INFO *info, int enable);
 435 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 436
 437 static MGSLPC_INFO *mgslpc_device_list = NULL;
 438 static int mgslpc_device_count = 0;
 439
 440 /*
 441  * Set this param to non-zero to load eax with the
 442  * .text section address and breakpoint on module load.
 443  * This is useful for use with gdb and add-symbol-file command.
 444  */
 445 static int break_on_load=0;
 446
 447 /*
 448  * Driver major number, defaults to zero to get auto
 449  * assigned major number. May be forced as module parameter.
 450  */
 451 static int ttymajor=0;
 452
 453 static int debug_level = 0;
 454 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 455
 456 module_param(break_on_load, bool, 0);
 457 module_param(ttymajor, int, 0);
 458 module_param(debug_level, int, 0);
 459 module_param_array(maxframe, int, NULL, 0);
 460
 461 MODULE_LICENSE("GPL");
 462
 463 static char *driver_name = "SyncLink PC Card driver";
 464 static char *driver_version = "$Revision: 4.34 $";
 465
 466 static struct tty_driver *serial_driver;
 467
 468 /* number of characters left in xmit buffer before we ask for more */
 469 #define WAKEUP_CHARS 256
 470
 471 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 472 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 473
 474 /* PCMCIA prototypes */
 475
 476 static int mgslpc_config(struct pcmcia_device *link);
 477 static void mgslpc_release(u_long arg);
 478 static void mgslpc_detach(struct pcmcia_device *p_dev);
 479
 480 /*
 481  * 1st function defined in .text section. Calling this function in
 482  * init_module() followed by a breakpoint allows a remote debugger
 483  * (gdb) to get the .text address for the add-symbol-file command.
 484  * This allows remote debugging of dynamically loadable modules.
 485  */
 486 static void* mgslpc_get_text_ptr(void)
 487 {
 488         return mgslpc_get_text_ptr;
 489 }
 490
 491 /**
 492  * line discipline callback wrappers
 493  *
 494  * The wrappers maintain line discipline references
 495  * while calling into the line discipline.
 496  *
 497  * ldisc_receive_buf  - pass receive data to line discipline
 498  */
 499
 500 static void ldisc_receive_buf(struct tty_struct *tty,
 501                               const __u8 *data, char *flags, int count)
 502 {
 503         struct tty_ldisc *ld;
 504         if (!tty)
 505                 return;
 506         ld = tty_ldisc_ref(tty);
 507         if (ld) {
 508                 if (ld->ops->receive_buf)
 509                         ld->ops->receive_buf(tty, data, flags, count);
 510                 tty_ldisc_deref(ld);
 511         }
 512 }
 513
 514 static const struct tty_port_operations mgslpc_port_ops = {
 515         .carrier_raised = carrier_raised,
 516         .dtr_rts = dtr_rts
 517 };
 518
 519 static int mgslpc_probe(struct pcmcia_device *link)
 520 {
 521     MGSLPC_INFO *info;
 522     int ret;
 523
 524     if (debug_level >= DEBUG_LEVEL_INFO)
 525             printk("mgslpc_attach\n");
 526
 527     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 528     if (!info) {
 529             printk("Error can't allocate device instance data\n");
 530             return -ENOMEM;
 531     }
 532
 533     info->magic = MGSLPC_MAGIC;
 534     tty_port_init(&info->port);
 535     info->port.ops = &mgslpc_port_ops;
 536     INIT_WORK(&info->task, bh_handler);
 537     info->max_frame_size = 4096;
 538     info->port.close_delay = 5*HZ/10;
 539     info->port.closing_wait = 30*HZ;
 540     init_waitqueue_head(&info->status_event_wait_q);
 541     init_waitqueue_head(&info->event_wait_q);
 542     spin_lock_init(&info->lock);
 543     spin_lock_init(&info->netlock);
 544     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 545     info->idle_mode = HDLC_TXIDLE_FLAGS;
 546     info->imra_value = 0xffff;
 547     info->imrb_value = 0xffff;
 548     info->pim_value = 0xff;
 549
 550     info->p_dev = link;
 551     link->priv = info;
 552
 553     /* Initialize the struct pcmcia_device structure */
 554
 555     link->conf.Attributes = 0;
 556     link->conf.IntType = INT_MEMORY_AND_IO;
 557
 558     ret = mgslpc_config(link);
 559     if (ret)
 560             return ret;
 561
 562     mgslpc_add_device(info);
 563
 564     return 0;
 565 }
 566
 567 /* Card has been inserted.
 568  */
 569
 570 static int mgslpc_ioprobe(struct pcmcia_device *p_dev,
 571                           cistpl_cftable_entry_t *cfg,
 572                           cistpl_cftable_entry_t *dflt,
 573                           unsigned int vcc,
 574                           void *priv_data)
 575 {
 576         if (cfg->io.nwin > 0) {
 577                 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
 578                 if (!(cfg->io.flags & CISTPL_IO_8BIT))
 579                         p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
 580                 if (!(cfg->io.flags & CISTPL_IO_16BIT))
 581                         p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
 582                 p_dev->io.IOAddrLines = cfg->io.flags & CISTPL_IO_LINES_MASK;
 583                 p_dev->io.BasePort1 = cfg->io.win[0].base;
 584                 p_dev->io.NumPorts1 = cfg->io.win[0].len;
 585                 return pcmcia_request_io(p_dev, &p_dev->io);
 586         }
 587         return -ENODEV;
 588 }
 589
 590 static int mgslpc_config(struct pcmcia_device *link)
 591 {
 592     MGSLPC_INFO *info = link->priv;
 593     int ret;
 594
 595     if (debug_level >= DEBUG_LEVEL_INFO)
 596             printk("mgslpc_config(0x%p)\n", link);
 597
 598     ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
 599     if (ret != 0)
 600             goto failed;
 601
 602     link->conf.Attributes = CONF_ENABLE_IRQ;
 603     link->conf.IntType = INT_MEMORY_AND_IO;
 604     link->conf.ConfigIndex = 8;
 605     link->conf.Present = PRESENT_OPTION;
 606
 607     ret = pcmcia_request_irq(link, mgslpc_isr);
 608     if (ret)
 609             goto failed;
 610     ret = pcmcia_request_configuration(link, &link->conf);
 611     if (ret)
 612             goto failed;
 613
 614     info->io_base = link->io.BasePort1;
 615     info->irq_level = link->irq;
 616
 617     /* add to linked list of devices */
 618     sprintf(info->node.dev_name, "mgslpc0");
 619     info->node.major = info->node.minor = 0;
 620     link->dev_node = &info->node;
 621
 622     printk(KERN_INFO "%s: index 0x%02x:",
 623            info->node.dev_name, link->conf.ConfigIndex);
 624     if (link->conf.Attributes & CONF_ENABLE_IRQ)
 625             printk(", irq %d", link->irq);
 626     if (link->io.NumPorts1)
 627             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
 628                    link->io.BasePort1+link->io.NumPorts1-1);
 629     printk("\n");
 630     return 0;
 631
 632 failed:
 633     mgslpc_release((u_long)link);
 634     return -ENODEV;
 635 }
 636
 637 /* Card has been removed.
 638  * Unregister device and release PCMCIA configuration.
 639  * If device is open, postpone until it is closed.
 640  */
 641 static void mgslpc_release(u_long arg)
 642 {
 643         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 644
 645         if (debug_level >= DEBUG_LEVEL_INFO)
 646                 printk("mgslpc_release(0x%p)\n", link);
 647
 648         pcmcia_disable_device(link);
 649 }
 650
 651 static void mgslpc_detach(struct pcmcia_device *link)
 652 {
 653         if (debug_level >= DEBUG_LEVEL_INFO)
 654                 printk("mgslpc_detach(0x%p)\n", link);
 655
 656         ((MGSLPC_INFO *)link->priv)->stop = 1;
 657         mgslpc_release((u_long)link);
 658
 659         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 660 }
 661
 662 static int mgslpc_suspend(struct pcmcia_device *link)
 663 {
 664         MGSLPC_INFO *info = link->priv;
 665
 666         info->stop = 1;
 667
 668         return 0;
 669 }
 670
 671 static int mgslpc_resume(struct pcmcia_device *link)
 672 {
 673         MGSLPC_INFO *info = link->priv;
 674
 675         info->stop = 0;
 676
 677         return 0;
 678 }
 679
 680
 681 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 682                                         char *name, const char *routine)
 683 {
 684 #ifdef MGSLPC_PARANOIA_CHECK
 685         static const char *badmagic =
 686                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 687         static const char *badinfo =
 688                 "Warning: null mgslpc_info for (%s) in %s\n";
 689
 690         if (!info) {
 691                 printk(badinfo, name, routine);
 692                 return true;
 693         }
 694         if (info->magic != MGSLPC_MAGIC) {
 695                 printk(badmagic, name, routine);
 696                 return true;
 697         }
 698 #else
 699         if (!info)
 700                 return true;
 701 #endif
 702         return false;
 703 }
 704
 705
 706 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 707 #define CMD_RXRESET     BIT6    // receiver reset
 708 #define CMD_RXFIFO_READ BIT5
 709 #define CMD_START_TIMER BIT4
 710 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 711 #define CMD_TXEOM       BIT1    // transmit end message
 712 #define CMD_TXRESET     BIT0    // transmit reset
 713
 714 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 715 {
 716         int i = 0;
 717         /* wait for command completion */
 718         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 719                 udelay(1);
 720                 if (i++ == 1000)
 721                         return false;
 722         }
 723         return true;
 724 }
 725
 726 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 727 {
 728         wait_command_complete(info, channel);
 729         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 730 }
 731
 732 static void tx_pause(struct tty_struct *tty)
 733 {
 734         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 735         unsigned long flags;
 736
 737         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 738                 return;
 739         if (debug_level >= DEBUG_LEVEL_INFO)
 740                 printk("tx_pause(%s)\n",info->device_name);
 741
 742         spin_lock_irqsave(&info->lock,flags);
 743         if (info->tx_enabled)
 744                 tx_stop(info);
 745         spin_unlock_irqrestore(&info->lock,flags);
 746 }
 747
 748 static void tx_release(struct tty_struct *tty)
 749 {
 750         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 751         unsigned long flags;
 752
 753         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 754                 return;
 755         if (debug_level >= DEBUG_LEVEL_INFO)
 756                 printk("tx_release(%s)\n",info->device_name);
 757
 758         spin_lock_irqsave(&info->lock,flags);
 759         if (!info->tx_enabled)
 760                 tx_start(info, tty);
 761         spin_unlock_irqrestore(&info->lock,flags);
 762 }
 763
 764 /* Return next bottom half action to perform.
 765  * or 0 if nothing to do.
 766  */
 767 static int bh_action(MGSLPC_INFO *info)
 768 {
 769         unsigned long flags;
 770         int rc = 0;
 771
 772         spin_lock_irqsave(&info->lock,flags);
 773
 774         if (info->pending_bh & BH_RECEIVE) {
 775                 info->pending_bh &= ~BH_RECEIVE;
 776                 rc = BH_RECEIVE;
 777         } else if (info->pending_bh & BH_TRANSMIT) {
 778                 info->pending_bh &= ~BH_TRANSMIT;
 779                 rc = BH_TRANSMIT;
 780         } else if (info->pending_bh & BH_STATUS) {
 781                 info->pending_bh &= ~BH_STATUS;
 782                 rc = BH_STATUS;
 783         }
 784
 785         if (!rc) {
 786                 /* Mark BH routine as complete */
 787                 info->bh_running = false;
 788                 info->bh_requested = false;
 789         }
 790
 791         spin_unlock_irqrestore(&info->lock,flags);
 792
 793         return rc;
 794 }
 795
 796 static void bh_handler(struct work_struct *work)
 797 {
 798         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 799         struct tty_struct *tty;
 800         int action;
 801
 802         if (!info)
 803                 return;
 804
 805         if (debug_level >= DEBUG_LEVEL_BH)
 806                 printk( "%s(%d):bh_handler(%s) entry\n",
 807                         __FILE__,__LINE__,info->device_name);
 808
 809         info->bh_running = true;
 810         tty = tty_port_tty_get(&info->port);
 811
 812         while((action = bh_action(info)) != 0) {
 813
 814                 /* Process work item */
 815                 if ( debug_level >= DEBUG_LEVEL_BH )
 816                         printk( "%s(%d):bh_handler() work item action=%d\n",
 817                                 __FILE__,__LINE__,action);
 818
 819                 switch (action) {
 820
 821                 case BH_RECEIVE:
 822                         while(rx_get_frame(info, tty));
 823                         break;
 824                 case BH_TRANSMIT:
 825                         bh_transmit(info, tty);
 826                         break;
 827                 case BH_STATUS:
 828                         bh_status(info);
 829                         break;
 830                 default:
 831                         /* unknown work item ID */
 832                         printk("Unknown work item ID=%08X!\n", action);
 833                         break;
 834                 }
 835         }
 836
 837         tty_kref_put(tty);
 838         if (debug_level >= DEBUG_LEVEL_BH)
 839                 printk( "%s(%d):bh_handler(%s) exit\n",
 840                         __FILE__,__LINE__,info->device_name);
 841 }
 842
 843 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 844 {
 845         if (debug_level >= DEBUG_LEVEL_BH)
 846                 printk("bh_transmit() entry on %s\n", info->device_name);
 847
 848         if (tty)
 849                 tty_wakeup(tty);
 850 }
 851
 852 static void bh_status(MGSLPC_INFO *info)
 853 {
 854         info->ri_chkcount = 0;
 855         info->dsr_chkcount = 0;
 856         info->dcd_chkcount = 0;
 857         info->cts_chkcount = 0;
 858 }
 859
 860 /* eom: non-zero = end of frame */
 861 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 862 {
 863         unsigned char data[2];
 864         unsigned char fifo_count, read_count, i;
 865         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 866
 867         if (debug_level >= DEBUG_LEVEL_ISR)
 868                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 869
 870         if (!info->rx_enabled)
 871                 return;
 872
 873         if (info->rx_frame_count >= info->rx_buf_count) {
 874                 /* no more free buffers */
 875                 issue_command(info, CHA, CMD_RXRESET);
 876                 info->pending_bh |= BH_RECEIVE;
 877                 info->rx_overflow = true;
 878                 info->icount.buf_overrun++;
 879                 return;
 880         }
 881
 882         if (eom) {
 883                 /* end of frame, get FIFO count from RBCL register */
 884                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 885                         fifo_count = 32;
 886         } else
 887                 fifo_count = 32;
 888
 889         do {
 890                 if (fifo_count == 1) {
 891                         read_count = 1;
 892                         data[0] = read_reg(info, CHA + RXFIFO);
 893                 } else {
 894                         read_count = 2;
 895                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 896                 }
 897                 fifo_count -= read_count;
 898                 if (!fifo_count && eom)
 899                         buf->status = data[--read_count];
 900
 901                 for (i = 0; i < read_count; i++) {
 902                         if (buf->count >= info->max_frame_size) {
 903                                 /* frame too large, reset receiver and reset current buffer */
 904                                 issue_command(info, CHA, CMD_RXRESET);
 905                                 buf->count = 0;
 906                                 return;
 907                         }
 908                         *(buf->data + buf->count) = data[i];
 909                         buf->count++;
 910                 }
 911         } while (fifo_count);
 912
 913         if (eom) {
 914                 info->pending_bh |= BH_RECEIVE;
 915                 info->rx_frame_count++;
 916                 info->rx_put++;
 917                 if (info->rx_put >= info->rx_buf_count)
 918                         info->rx_put = 0;
 919         }
 920         issue_command(info, CHA, CMD_RXFIFO);
 921 }
 922
 923 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
 924 {
 925         unsigned char data, status, flag;
 926         int fifo_count;
 927         int work = 0;
 928         struct mgsl_icount *icount = &info->icount;
 929
 930         if (tcd) {
 931                 /* early termination, get FIFO count from RBCL register */
 932                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 933
 934                 /* Zero fifo count could mean 0 or 32 bytes available.
 935                  * If BIT5 of STAR is set then at least 1 byte is available.
 936                  */
 937                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 938                         fifo_count = 32;
 939         } else
 940                 fifo_count = 32;
 941
 942         tty_buffer_request_room(tty, fifo_count);
 943         /* Flush received async data to receive data buffer. */
 944         while (fifo_count) {
 945                 data   = read_reg(info, CHA + RXFIFO);
 946                 status = read_reg(info, CHA + RXFIFO);
 947                 fifo_count -= 2;
 948
 949                 icount->rx++;
 950                 flag = TTY_NORMAL;
 951
 952                 // if no frameing/crc error then save data
 953                 // BIT7:parity error
 954                 // BIT6:framing error
 955
 956                 if (status & (BIT7 + BIT6)) {
 957                         if (status & BIT7)
 958                                 icount->parity++;
 959                         else
 960                                 icount->frame++;
 961
 962                         /* discard char if tty control flags say so */
 963                         if (status & info->ignore_status_mask)
 964                                 continue;
 965
 966                         status &= info->read_status_mask;
 967
 968                         if (status & BIT7)
 969                                 flag = TTY_PARITY;
 970                         else if (status & BIT6)
 971                                 flag = TTY_FRAME;
 972                 }
 973                 work += tty_insert_flip_char(tty, data, flag);
 974         }
 975         issue_command(info, CHA, CMD_RXFIFO);
 976
 977         if (debug_level >= DEBUG_LEVEL_ISR) {
 978                 printk("%s(%d):rx_ready_async",
 979                         __FILE__,__LINE__);
 980                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
 981                         __FILE__,__LINE__,icount->rx,icount->brk,
 982                         icount->parity,icount->frame,icount->overrun);
 983         }
 984
 985         if (work)
 986                 tty_flip_buffer_push(tty);
 987 }
 988
 989
 990 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
 991 {
 992         if (!info->tx_active)
 993                 return;
 994
 995         info->tx_active = false;
 996         info->tx_aborting = false;
 997
 998         if (info->params.mode == MGSL_MODE_ASYNC)
 999                 return;
1000
1001         info->tx_count = info->tx_put = info->tx_get = 0;
1002         del_timer(&info->tx_timer);
1003
1004         if (info->drop_rts_on_tx_done) {
1005                 get_signals(info);
1006                 if (info->serial_signals & SerialSignal_RTS) {
1007                         info->serial_signals &= ~SerialSignal_RTS;
1008                         set_signals(info);
1009                 }
1010                 info->drop_rts_on_tx_done = false;
1011         }
1012
1013 #if SYNCLINK_GENERIC_HDLC
1014         if (info->netcount)
1015                 hdlcdev_tx_done(info);
1016         else
1017 #endif
1018         {
1019                 if (tty->stopped || tty->hw_stopped) {
1020                         tx_stop(info);
1021                         return;
1022                 }
1023                 info->pending_bh |= BH_TRANSMIT;
1024         }
1025 }
1026
1027 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1028 {
1029         unsigned char fifo_count = 32;
1030         int c;
1031
1032         if (debug_level >= DEBUG_LEVEL_ISR)
1033                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1034
1035         if (info->params.mode == MGSL_MODE_HDLC) {
1036                 if (!info->tx_active)
1037                         return;
1038         } else {
1039                 if (tty->stopped || tty->hw_stopped) {
1040                         tx_stop(info);
1041                         return;
1042                 }
1043                 if (!info->tx_count)
1044                         info->tx_active = false;
1045         }
1046
1047         if (!info->tx_count)
1048                 return;
1049
1050         while (info->tx_count && fifo_count) {
1051                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1052
1053                 if (c == 1) {
1054                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1055                 } else {
1056                         write_reg16(info, CHA + TXFIFO,
1057                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1058                 }
1059                 info->tx_count -= c;
1060                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1061                 fifo_count -= c;
1062         }
1063
1064         if (info->params.mode == MGSL_MODE_ASYNC) {
1065                 if (info->tx_count < WAKEUP_CHARS)
1066                         info->pending_bh |= BH_TRANSMIT;
1067                 issue_command(info, CHA, CMD_TXFIFO);
1068         } else {
1069                 if (info->tx_count)
1070                         issue_command(info, CHA, CMD_TXFIFO);
1071                 else
1072                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1073         }
1074 }
1075
1076 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1077 {
1078         get_signals(info);
1079         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1080                 irq_disable(info, CHB, IRQ_CTS);
1081         info->icount.cts++;
1082         if (info->serial_signals & SerialSignal_CTS)
1083                 info->input_signal_events.cts_up++;
1084         else
1085                 info->input_signal_events.cts_down++;
1086         wake_up_interruptible(&info->status_event_wait_q);
1087         wake_up_interruptible(&info->event_wait_q);
1088
1089         if (info->port.flags & ASYNC_CTS_FLOW) {
1090                 if (tty->hw_stopped) {
1091                         if (info->serial_signals & SerialSignal_CTS) {
1092                                 if (debug_level >= DEBUG_LEVEL_ISR)
1093                                         printk("CTS tx start...");
1094                                 if (tty)
1095                                         tty->hw_stopped = 0;
1096                                 tx_start(info, tty);
1097                                 info->pending_bh |= BH_TRANSMIT;
1098                                 return;
1099                         }
1100                 } else {
1101                         if (!(info->serial_signals & SerialSignal_CTS)) {
1102                                 if (debug_level >= DEBUG_LEVEL_ISR)
1103                                         printk("CTS tx stop...");
1104                                 if (tty)
1105                                         tty->hw_stopped = 1;
1106                                 tx_stop(info);
1107                         }
1108                 }
1109         }
1110         info->pending_bh |= BH_STATUS;
1111 }
1112
1113 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1114 {
1115         get_signals(info);
1116         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1117                 irq_disable(info, CHB, IRQ_DCD);
1118         info->icount.dcd++;
1119         if (info->serial_signals & SerialSignal_DCD) {
1120                 info->input_signal_events.dcd_up++;
1121         }
1122         else
1123                 info->input_signal_events.dcd_down++;
1124 #if SYNCLINK_GENERIC_HDLC
1125         if (info->netcount) {
1126                 if (info->serial_signals & SerialSignal_DCD)
1127                         netif_carrier_on(info->netdev);
1128                 else
1129                         netif_carrier_off(info->netdev);
1130         }
1131 #endif
1132         wake_up_interruptible(&info->status_event_wait_q);
1133         wake_up_interruptible(&info->event_wait_q);
1134
1135         if (info->port.flags & ASYNC_CHECK_CD) {
1136                 if (debug_level >= DEBUG_LEVEL_ISR)
1137                         printk("%s CD now %s...", info->device_name,
1138                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1139                 if (info->serial_signals & SerialSignal_DCD)
1140                         wake_up_interruptible(&info->port.open_wait);
1141                 else {
1142                         if (debug_level >= DEBUG_LEVEL_ISR)
1143                                 printk("doing serial hangup...");
1144                         if (tty)
1145                                 tty_hangup(tty);
1146                 }
1147         }
1148         info->pending_bh |= BH_STATUS;
1149 }
1150
1151 static void dsr_change(MGSLPC_INFO *info)
1152 {
1153         get_signals(info);
1154         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1155                 port_irq_disable(info, PVR_DSR);
1156         info->icount.dsr++;
1157         if (info->serial_signals & SerialSignal_DSR)
1158                 info->input_signal_events.dsr_up++;
1159         else
1160                 info->input_signal_events.dsr_down++;
1161         wake_up_interruptible(&info->status_event_wait_q);
1162         wake_up_interruptible(&info->event_wait_q);
1163         info->pending_bh |= BH_STATUS;
1164 }
1165
1166 static void ri_change(MGSLPC_INFO *info)
1167 {
1168         get_signals(info);
1169         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1170                 port_irq_disable(info, PVR_RI);
1171         info->icount.rng++;
1172         if (info->serial_signals & SerialSignal_RI)
1173                 info->input_signal_events.ri_up++;
1174         else
1175                 info->input_signal_events.ri_down++;
1176         wake_up_interruptible(&info->status_event_wait_q);
1177         wake_up_interruptible(&info->event_wait_q);
1178         info->pending_bh |= BH_STATUS;
1179 }
1180
1181 /* Interrupt service routine entry point.
1182  *
1183  * Arguments:
1184  *
1185  * irq     interrupt number that caused interrupt
1186  * dev_id  device ID supplied during interrupt registration
1187  */
1188 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1189 {
1190         MGSLPC_INFO *info = dev_id;
1191         struct tty_struct *tty;
1192         unsigned short isr;
1193         unsigned char gis, pis;
1194         int count=0;
1195
1196         if (debug_level >= DEBUG_LEVEL_ISR)
1197                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1198
1199         if (!(info->p_dev->_locked))
1200                 return IRQ_HANDLED;
1201
1202         tty = tty_port_tty_get(&info->port);
1203
1204         spin_lock(&info->lock);
1205
1206         while ((gis = read_reg(info, CHA + GIS))) {
1207                 if (debug_level >= DEBUG_LEVEL_ISR)
1208                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1209
1210                 if ((gis & 0x70) || count > 1000) {
1211                         printk("synclink_cs:hardware failed or ejected\n");
1212                         break;
1213                 }
1214                 count++;
1215
1216                 if (gis & (BIT1 + BIT0)) {
1217                         isr = read_reg16(info, CHB + ISR);
1218                         if (isr & IRQ_DCD)
1219                                 dcd_change(info, tty);
1220                         if (isr & IRQ_CTS)
1221                                 cts_change(info, tty);
1222                 }
1223                 if (gis & (BIT3 + BIT2))
1224                 {
1225                         isr = read_reg16(info, CHA + ISR);
1226                         if (isr & IRQ_TIMER) {
1227                                 info->irq_occurred = true;
1228                                 irq_disable(info, CHA, IRQ_TIMER);
1229                         }
1230
1231                         /* receive IRQs */
1232                         if (isr & IRQ_EXITHUNT) {
1233                                 info->icount.exithunt++;
1234                                 wake_up_interruptible(&info->event_wait_q);
1235                         }
1236                         if (isr & IRQ_BREAK_ON) {
1237                                 info->icount.brk++;
1238                                 if (info->port.flags & ASYNC_SAK)
1239                                         do_SAK(tty);
1240                         }
1241                         if (isr & IRQ_RXTIME) {
1242                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1243                         }
1244                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1245                                 if (info->params.mode == MGSL_MODE_HDLC)
1246                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1247                                 else
1248                                         rx_ready_async(info, isr & IRQ_RXEOM, tty);
1249                         }
1250
1251                         /* transmit IRQs */
1252                         if (isr & IRQ_UNDERRUN) {
1253                                 if (info->tx_aborting)
1254                                         info->icount.txabort++;
1255                                 else
1256                                         info->icount.txunder++;
1257                                 tx_done(info, tty);
1258                         }
1259                         else if (isr & IRQ_ALLSENT) {
1260                                 info->icount.txok++;
1261                                 tx_done(info, tty);
1262                         }
1263                         else if (isr & IRQ_TXFIFO)
1264                                 tx_ready(info, tty);
1265                 }
1266                 if (gis & BIT7) {
1267                         pis = read_reg(info, CHA + PIS);
1268                         if (pis & BIT1)
1269                                 dsr_change(info);
1270                         if (pis & BIT2)
1271                                 ri_change(info);
1272                 }
1273         }
1274
1275         /* Request bottom half processing if there's something
1276          * for it to do and the bh is not already running
1277          */
1278
1279         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1280                 if ( debug_level >= DEBUG_LEVEL_ISR )
1281                         printk("%s(%d):%s queueing bh task.\n",
1282                                 __FILE__,__LINE__,info->device_name);
1283                 schedule_work(&info->task);
1284                 info->bh_requested = true;
1285         }
1286
1287         spin_unlock(&info->lock);
1288         tty_kref_put(tty);
1289
1290         if (debug_level >= DEBUG_LEVEL_ISR)
1291                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1292                        __FILE__, __LINE__, info->irq_level);
1293
1294         return IRQ_HANDLED;
1295 }
1296
1297 /* Initialize and start device.
1298  */
1299 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1300 {
1301         int retval = 0;
1302
1303         if (debug_level >= DEBUG_LEVEL_INFO)
1304                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1305
1306         if (info->port.flags & ASYNC_INITIALIZED)
1307                 return 0;
1308
1309         if (!info->tx_buf) {
1310                 /* allocate a page of memory for a transmit buffer */
1311                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1312                 if (!info->tx_buf) {
1313                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1314                                 __FILE__,__LINE__,info->device_name);
1315                         return -ENOMEM;
1316                 }
1317         }
1318
1319         info->pending_bh = 0;
1320
1321         memset(&info->icount, 0, sizeof(info->icount));
1322
1323         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1324
1325         /* Allocate and claim adapter resources */
1326         retval = claim_resources(info);
1327
1328         /* perform existance check and diagnostics */
1329         if ( !retval )
1330                 retval = adapter_test(info);
1331
1332         if ( retval ) {
1333                 if (capable(CAP_SYS_ADMIN) && tty)
1334                         set_bit(TTY_IO_ERROR, &tty->flags);
1335                 release_resources(info);
1336                 return retval;
1337         }
1338
1339         /* program hardware for current parameters */
1340         mgslpc_change_params(info, tty);
1341
1342         if (tty)
1343                 clear_bit(TTY_IO_ERROR, &tty->flags);
1344
1345         info->port.flags |= ASYNC_INITIALIZED;
1346
1347         return 0;
1348 }
1349
1350 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1351  */
1352 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1353 {
1354         unsigned long flags;
1355
1356         if (!(info->port.flags & ASYNC_INITIALIZED))
1357                 return;
1358
1359         if (debug_level >= DEBUG_LEVEL_INFO)
1360                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1361                          __FILE__,__LINE__, info->device_name );
1362
1363         /* clear status wait queue because status changes */
1364         /* can't happen after shutting down the hardware */
1365         wake_up_interruptible(&info->status_event_wait_q);
1366         wake_up_interruptible(&info->event_wait_q);
1367
1368         del_timer_sync(&info->tx_timer);
1369
1370         if (info->tx_buf) {
1371                 free_page((unsigned long) info->tx_buf);
1372                 info->tx_buf = NULL;
1373         }
1374
1375         spin_lock_irqsave(&info->lock,flags);
1376
1377         rx_stop(info);
1378         tx_stop(info);
1379
1380         /* TODO:disable interrupts instead of reset to preserve signal states */
1381         reset_device(info);
1382
1383         if (!tty || tty->termios->c_cflag & HUPCL) {
1384                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1385                 set_signals(info);
1386         }
1387
1388         spin_unlock_irqrestore(&info->lock,flags);
1389
1390         release_resources(info);
1391
1392         if (tty)
1393                 set_bit(TTY_IO_ERROR, &tty->flags);
1394
1395         info->port.flags &= ~ASYNC_INITIALIZED;
1396 }
1397
1398 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1399 {
1400         unsigned long flags;
1401
1402         spin_lock_irqsave(&info->lock,flags);
1403
1404         rx_stop(info);
1405         tx_stop(info);
1406         info->tx_count = info->tx_put = info->tx_get = 0;
1407
1408         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1409                 hdlc_mode(info);
1410         else
1411                 async_mode(info);
1412
1413         set_signals(info);
1414
1415         info->dcd_chkcount = 0;
1416         info->cts_chkcount = 0;
1417         info->ri_chkcount = 0;
1418         info->dsr_chkcount = 0;
1419
1420         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1421         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1422         get_signals(info);
1423
1424         if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
1425                 rx_start(info);
1426
1427         spin_unlock_irqrestore(&info->lock,flags);
1428 }
1429
1430 /* Reconfigure adapter based on new parameters
1431  */
1432 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1433 {
1434         unsigned cflag;
1435         int bits_per_char;
1436
1437         if (!tty || !tty->termios)
1438                 return;
1439
1440         if (debug_level >= DEBUG_LEVEL_INFO)
1441                 printk("%s(%d):mgslpc_change_params(%s)\n",
1442                          __FILE__,__LINE__, info->device_name );
1443
1444         cflag = tty->termios->c_cflag;
1445
1446         /* if B0 rate (hangup) specified then negate DTR and RTS */
1447         /* otherwise assert DTR and RTS */
1448         if (cflag & CBAUD)
1449                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1450         else
1451                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1452
1453         /* byte size and parity */
1454
1455         switch (cflag & CSIZE) {
1456         case CS5: info->params.data_bits = 5; break;
1457         case CS6: info->params.data_bits = 6; break;
1458         case CS7: info->params.data_bits = 7; break;
1459         case CS8: info->params.data_bits = 8; break;
1460         default:  info->params.data_bits = 7; break;
1461         }
1462
1463         if (cflag & CSTOPB)
1464                 info->params.stop_bits = 2;
1465         else
1466                 info->params.stop_bits = 1;
1467
1468         info->params.parity = ASYNC_PARITY_NONE;
1469         if (cflag & PARENB) {
1470                 if (cflag & PARODD)
1471                         info->params.parity = ASYNC_PARITY_ODD;
1472                 else
1473                         info->params.parity = ASYNC_PARITY_EVEN;
1474 #ifdef CMSPAR
1475                 if (cflag & CMSPAR)
1476                         info->params.parity = ASYNC_PARITY_SPACE;
1477 #endif
1478         }
1479
1480         /* calculate number of jiffies to transmit a full
1481          * FIFO (32 bytes) at specified data rate
1482          */
1483         bits_per_char = info->params.data_bits +
1484                         info->params.stop_bits + 1;
1485
1486         /* if port data rate is set to 460800 or less then
1487          * allow tty settings to override, otherwise keep the
1488          * current data rate.
1489          */
1490         if (info->params.data_rate <= 460800) {
1491                 info->params.data_rate = tty_get_baud_rate(tty);
1492         }
1493
1494         if ( info->params.data_rate ) {
1495                 info->timeout = (32*HZ*bits_per_char) /
1496                                 info->params.data_rate;
1497         }
1498         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1499
1500         if (cflag & CRTSCTS)
1501                 info->port.flags |= ASYNC_CTS_FLOW;
1502         else
1503                 info->port.flags &= ~ASYNC_CTS_FLOW;
1504
1505         if (cflag & CLOCAL)
1506                 info->port.flags &= ~ASYNC_CHECK_CD;
1507         else
1508                 info->port.flags |= ASYNC_CHECK_CD;
1509
1510         /* process tty input control flags */
1511
1512         info->read_status_mask = 0;
1513         if (I_INPCK(tty))
1514                 info->read_status_mask |= BIT7 | BIT6;
1515         if (I_IGNPAR(tty))
1516                 info->ignore_status_mask |= BIT7 | BIT6;
1517
1518         mgslpc_program_hw(info, tty);
1519 }
1520
1521 /* Add a character to the transmit buffer
1522  */
1523 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1524 {
1525         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1526         unsigned long flags;
1527
1528         if (debug_level >= DEBUG_LEVEL_INFO) {
1529                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1530                         __FILE__,__LINE__,ch,info->device_name);
1531         }
1532
1533         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1534                 return 0;
1535
1536         if (!info->tx_buf)
1537                 return 0;
1538
1539         spin_lock_irqsave(&info->lock,flags);
1540
1541         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1542                 if (info->tx_count < TXBUFSIZE - 1) {
1543                         info->tx_buf[info->tx_put++] = ch;
1544                         info->tx_put &= TXBUFSIZE-1;
1545                         info->tx_count++;
1546                 }
1547         }
1548
1549         spin_unlock_irqrestore(&info->lock,flags);
1550         return 1;
1551 }
1552
1553 /* Enable transmitter so remaining characters in the
1554  * transmit buffer are sent.
1555  */
1556 static void mgslpc_flush_chars(struct tty_struct *tty)
1557 {
1558         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1559         unsigned long flags;
1560
1561         if (debug_level >= DEBUG_LEVEL_INFO)
1562                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1563                         __FILE__,__LINE__,info->device_name,info->tx_count);
1564
1565         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1566                 return;
1567
1568         if (info->tx_count <= 0 || tty->stopped ||
1569             tty->hw_stopped || !info->tx_buf)
1570                 return;
1571
1572         if (debug_level >= DEBUG_LEVEL_INFO)
1573                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1574                         __FILE__,__LINE__,info->device_name);
1575
1576         spin_lock_irqsave(&info->lock,flags);
1577         if (!info->tx_active)
1578                 tx_start(info, tty);
1579         spin_unlock_irqrestore(&info->lock,flags);
1580 }
1581
1582 /* Send a block of data
1583  *
1584  * Arguments:
1585  *
1586  * tty        pointer to tty information structure
1587  * buf        pointer to buffer containing send data
1588  * count      size of send data in bytes
1589  *
1590  * Returns: number of characters written
1591  */
1592 static int mgslpc_write(struct tty_struct * tty,
1593                         const unsigned char *buf, int count)
1594 {
1595         int c, ret = 0;
1596         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1597         unsigned long flags;
1598
1599         if (debug_level >= DEBUG_LEVEL_INFO)
1600                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1601                         __FILE__,__LINE__,info->device_name,count);
1602
1603         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1604                 !info->tx_buf)
1605                 goto cleanup;
1606
1607         if (info->params.mode == MGSL_MODE_HDLC) {
1608                 if (count > TXBUFSIZE) {
1609                         ret = -EIO;
1610                         goto cleanup;
1611                 }
1612                 if (info->tx_active)
1613                         goto cleanup;
1614                 else if (info->tx_count)
1615                         goto start;
1616         }
1617
1618         for (;;) {
1619                 c = min(count,
1620                         min(TXBUFSIZE - info->tx_count - 1,
1621                             TXBUFSIZE - info->tx_put));
1622                 if (c <= 0)
1623                         break;
1624
1625                 memcpy(info->tx_buf + info->tx_put, buf, c);
1626
1627                 spin_lock_irqsave(&info->lock,flags);
1628                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1629                 info->tx_count += c;
1630                 spin_unlock_irqrestore(&info->lock,flags);
1631
1632                 buf += c;
1633                 count -= c;
1634                 ret += c;
1635         }
1636 start:
1637         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1638                 spin_lock_irqsave(&info->lock,flags);
1639                 if (!info->tx_active)
1640                         tx_start(info, tty);
1641                 spin_unlock_irqrestore(&info->lock,flags);
1642         }
1643 cleanup:
1644         if (debug_level >= DEBUG_LEVEL_INFO)
1645                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1646                         __FILE__,__LINE__,info->device_name,ret);
1647         return ret;
1648 }
1649
1650 /* Return the count of free bytes in transmit buffer
1651  */
1652 static int mgslpc_write_room(struct tty_struct *tty)
1653 {
1654         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1655         int ret;
1656
1657         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1658                 return 0;
1659
1660         if (info->params.mode == MGSL_MODE_HDLC) {
1661                 /* HDLC (frame oriented) mode */
1662                 if (info->tx_active)
1663                         return 0;
1664                 else
1665                         return HDLC_MAX_FRAME_SIZE;
1666         } else {
1667                 ret = TXBUFSIZE - info->tx_count - 1;
1668                 if (ret < 0)
1669                         ret = 0;
1670         }
1671
1672         if (debug_level >= DEBUG_LEVEL_INFO)
1673                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1674                          __FILE__,__LINE__, info->device_name, ret);
1675         return ret;
1676 }
1677
1678 /* Return the count of bytes in transmit buffer
1679  */
1680 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1681 {
1682         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1683         int rc;
1684
1685         if (debug_level >= DEBUG_LEVEL_INFO)
1686                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1687                          __FILE__,__LINE__, info->device_name );
1688
1689         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1690                 return 0;
1691
1692         if (info->params.mode == MGSL_MODE_HDLC)
1693                 rc = info->tx_active ? info->max_frame_size : 0;
1694         else
1695                 rc = info->tx_count;
1696
1697         if (debug_level >= DEBUG_LEVEL_INFO)
1698                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1699                          __FILE__,__LINE__, info->device_name, rc);
1700
1701         return rc;
1702 }
1703
1704 /* Discard all data in the send buffer
1705  */
1706 static void mgslpc_flush_buffer(struct tty_struct *tty)
1707 {
1708         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1709         unsigned long flags;
1710
1711         if (debug_level >= DEBUG_LEVEL_INFO)
1712                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1713                          __FILE__,__LINE__, info->device_name );
1714
1715         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1716                 return;
1717
1718         spin_lock_irqsave(&info->lock,flags);
1719         info->tx_count = info->tx_put = info->tx_get = 0;
1720         del_timer(&info->tx_timer);
1721         spin_unlock_irqrestore(&info->lock,flags);
1722
1723         wake_up_interruptible(&tty->write_wait);
1724         tty_wakeup(tty);
1725 }
1726
1727 /* Send a high-priority XON/XOFF character
1728  */
1729 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1730 {
1731         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1732         unsigned long flags;
1733
1734         if (debug_level >= DEBUG_LEVEL_INFO)
1735                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1736                          __FILE__,__LINE__, info->device_name, ch );
1737
1738         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1739                 return;
1740
1741         info->x_char = ch;
1742         if (ch) {
1743                 spin_lock_irqsave(&info->lock,flags);
1744                 if (!info->tx_enabled)
1745                         tx_start(info, tty);
1746                 spin_unlock_irqrestore(&info->lock,flags);
1747         }
1748 }
1749
1750 /* Signal remote device to throttle send data (our receive data)
1751  */
1752 static void mgslpc_throttle(struct tty_struct * tty)
1753 {
1754         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1755         unsigned long flags;
1756
1757         if (debug_level >= DEBUG_LEVEL_INFO)
1758                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1759                          __FILE__,__LINE__, info->device_name );
1760
1761         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1762                 return;
1763
1764         if (I_IXOFF(tty))
1765                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1766
1767         if (tty->termios->c_cflag & CRTSCTS) {
1768                 spin_lock_irqsave(&info->lock,flags);
1769                 info->serial_signals &= ~SerialSignal_RTS;
1770                 set_signals(info);
1771                 spin_unlock_irqrestore(&info->lock,flags);
1772         }
1773 }
1774
1775 /* Signal remote device to stop throttling send data (our receive data)
1776  */
1777 static void mgslpc_unthrottle(struct tty_struct * tty)
1778 {
1779         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1780         unsigned long flags;
1781
1782         if (debug_level >= DEBUG_LEVEL_INFO)
1783                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1784                          __FILE__,__LINE__, info->device_name );
1785
1786         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1787                 return;
1788
1789         if (I_IXOFF(tty)) {
1790                 if (info->x_char)
1791                         info->x_char = 0;
1792                 else
1793                         mgslpc_send_xchar(tty, START_CHAR(tty));
1794         }
1795
1796         if (tty->termios->c_cflag & CRTSCTS) {
1797                 spin_lock_irqsave(&info->lock,flags);
1798                 info->serial_signals |= SerialSignal_RTS;
1799                 set_signals(info);
1800                 spin_unlock_irqrestore(&info->lock,flags);
1801         }
1802 }
1803
1804 /* get the current serial statistics
1805  */
1806 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1807 {
1808         int err;
1809         if (debug_level >= DEBUG_LEVEL_INFO)
1810                 printk("get_params(%s)\n", info->device_name);
1811         if (!user_icount) {
1812                 memset(&info->icount, 0, sizeof(info->icount));
1813         } else {
1814                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1815                 if (err)
1816                         return -EFAULT;
1817         }
1818         return 0;
1819 }
1820
1821 /* get the current serial parameters
1822  */
1823 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1824 {
1825         int err;
1826         if (debug_level >= DEBUG_LEVEL_INFO)
1827                 printk("get_params(%s)\n", info->device_name);
1828         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1829         if (err)
1830                 return -EFAULT;
1831         return 0;
1832 }
1833
1834 /* set the serial parameters
1835  *
1836  * Arguments:
1837  *
1838  *      info            pointer to device instance data
1839  *      new_params      user buffer containing new serial params
1840  *
1841  * Returns:     0 if success, otherwise error code
1842  */
1843 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1844 {
1845         unsigned long flags;
1846         MGSL_PARAMS tmp_params;
1847         int err;
1848
1849         if (debug_level >= DEBUG_LEVEL_INFO)
1850                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1851                         info->device_name );
1852         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1853         if (err) {
1854                 if ( debug_level >= DEBUG_LEVEL_INFO )
1855                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1856                                 __FILE__,__LINE__,info->device_name);
1857                 return -EFAULT;
1858         }
1859
1860         spin_lock_irqsave(&info->lock,flags);
1861         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1862         spin_unlock_irqrestore(&info->lock,flags);
1863
1864         mgslpc_change_params(info, tty);
1865
1866         return 0;
1867 }
1868
1869 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1870 {
1871         int err;
1872         if (debug_level >= DEBUG_LEVEL_INFO)
1873                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1874         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1875         if (err)
1876                 return -EFAULT;
1877         return 0;
1878 }
1879
1880 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1881 {
1882         unsigned long flags;
1883         if (debug_level >= DEBUG_LEVEL_INFO)
1884                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1885         spin_lock_irqsave(&info->lock,flags);
1886         info->idle_mode = idle_mode;
1887         tx_set_idle(info);
1888         spin_unlock_irqrestore(&info->lock,flags);
1889         return 0;
1890 }
1891
1892 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1893 {
1894         int err;
1895         if (debug_level >= DEBUG_LEVEL_INFO)
1896                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1897         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1898         if (err)
1899                 return -EFAULT;
1900         return 0;
1901 }
1902
1903 static int set_interface(MGSLPC_INFO * info, int if_mode)
1904 {
1905         unsigned long flags;
1906         unsigned char val;
1907         if (debug_level >= DEBUG_LEVEL_INFO)
1908                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1909         spin_lock_irqsave(&info->lock,flags);
1910         info->if_mode = if_mode;
1911
1912         val = read_reg(info, PVR) & 0x0f;
1913         switch (info->if_mode)
1914         {
1915         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1916         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1917         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1918         }
1919         write_reg(info, PVR, val);
1920
1921         spin_unlock_irqrestore(&info->lock,flags);
1922         return 0;
1923 }
1924
1925 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1926 {
1927         unsigned long flags;
1928
1929         if (debug_level >= DEBUG_LEVEL_INFO)
1930                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1931
1932         spin_lock_irqsave(&info->lock,flags);
1933         if (enable) {
1934                 if (!info->tx_enabled)
1935                         tx_start(info, tty);
1936         } else {
1937                 if (info->tx_enabled)
1938                         tx_stop(info);
1939         }
1940         spin_unlock_irqrestore(&info->lock,flags);
1941         return 0;
1942 }
1943
1944 static int tx_abort(MGSLPC_INFO * info)
1945 {
1946         unsigned long flags;
1947
1948         if (debug_level >= DEBUG_LEVEL_INFO)
1949                 printk("tx_abort(%s)\n", info->device_name);
1950
1951         spin_lock_irqsave(&info->lock,flags);
1952         if (info->tx_active && info->tx_count &&
1953             info->params.mode == MGSL_MODE_HDLC) {
1954                 /* clear data count so FIFO is not filled on next IRQ.
1955                  * This results in underrun and abort transmission.
1956                  */
1957                 info->tx_count = info->tx_put = info->tx_get = 0;
1958                 info->tx_aborting = true;
1959         }
1960         spin_unlock_irqrestore(&info->lock,flags);
1961         return 0;
1962 }
1963
1964 static int set_rxenable(MGSLPC_INFO * info, int enable)
1965 {
1966         unsigned long flags;
1967
1968         if (debug_level >= DEBUG_LEVEL_INFO)
1969                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1970
1971         spin_lock_irqsave(&info->lock,flags);
1972         if (enable) {
1973                 if (!info->rx_enabled)
1974                         rx_start(info);
1975         } else {
1976                 if (info->rx_enabled)
1977                         rx_stop(info);
1978         }
1979         spin_unlock_irqrestore(&info->lock,flags);
1980         return 0;
1981 }
1982
1983 /* wait for specified event to occur
1984  *
1985  * Arguments:           info    pointer to device instance data
1986  *                      mask    pointer to bitmask of events to wait for
1987  * Return Value:        0       if successful and bit mask updated with
1988  *                              of events triggerred,
1989  *                      otherwise error code
1990  */
1991 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1992 {
1993         unsigned long flags;
1994         int s;
1995         int rc=0;
1996         struct mgsl_icount cprev, cnow;
1997         int events;
1998         int mask;
1999         struct  _input_signal_events oldsigs, newsigs;
2000         DECLARE_WAITQUEUE(wait, current);
2001
2002         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2003         if (rc)
2004                 return  -EFAULT;
2005
2006         if (debug_level >= DEBUG_LEVEL_INFO)
2007                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2008
2009         spin_lock_irqsave(&info->lock,flags);
2010
2011         /* return immediately if state matches requested events */
2012         get_signals(info);
2013         s = info->serial_signals;
2014         events = mask &
2015                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2016                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2017                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2018                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2019         if (events) {
2020                 spin_unlock_irqrestore(&info->lock,flags);
2021                 goto exit;
2022         }
2023
2024         /* save current irq counts */
2025         cprev = info->icount;
2026         oldsigs = info->input_signal_events;
2027
2028         if ((info->params.mode == MGSL_MODE_HDLC) &&
2029             (mask & MgslEvent_ExitHuntMode))
2030                 irq_enable(info, CHA, IRQ_EXITHUNT);
2031
2032         set_current_state(TASK_INTERRUPTIBLE);
2033         add_wait_queue(&info->event_wait_q, &wait);
2034
2035         spin_unlock_irqrestore(&info->lock,flags);
2036
2037
2038         for(;;) {
2039                 schedule();
2040                 if (signal_pending(current)) {
2041                         rc = -ERESTARTSYS;
2042                         break;
2043                 }
2044
2045                 /* get current irq counts */
2046                 spin_lock_irqsave(&info->lock,flags);
2047                 cnow = info->icount;
2048                 newsigs = info->input_signal_events;
2049                 set_current_state(TASK_INTERRUPTIBLE);
2050                 spin_unlock_irqrestore(&info->lock,flags);
2051
2052                 /* if no change, wait aborted for some reason */
2053                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2054                     newsigs.dsr_down == oldsigs.dsr_down &&
2055                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2056                     newsigs.dcd_down == oldsigs.dcd_down &&
2057                     newsigs.cts_up   == oldsigs.cts_up   &&
2058                     newsigs.cts_down == oldsigs.cts_down &&
2059                     newsigs.ri_up    == oldsigs.ri_up    &&
2060                     newsigs.ri_down  == oldsigs.ri_down  &&
2061                     cnow.exithunt    == cprev.exithunt   &&
2062                     cnow.rxidle      == cprev.rxidle) {
2063                         rc = -EIO;
2064                         break;
2065                 }
2066
2067                 events = mask &
2068                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2069                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2070                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2071                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2072                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2073                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2074                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2075                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2076                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2077                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2078                 if (events)
2079                         break;
2080
2081                 cprev = cnow;
2082                 oldsigs = newsigs;
2083         }
2084
2085         remove_wait_queue(&info->event_wait_q, &wait);
2086         set_current_state(TASK_RUNNING);
2087
2088         if (mask & MgslEvent_ExitHuntMode) {
2089                 spin_lock_irqsave(&info->lock,flags);
2090                 if (!waitqueue_active(&info->event_wait_q))
2091                         irq_disable(info, CHA, IRQ_EXITHUNT);
2092                 spin_unlock_irqrestore(&info->lock,flags);
2093         }
2094 exit:
2095         if (rc == 0)
2096                 PUT_USER(rc, events, mask_ptr);
2097         return rc;
2098 }
2099
2100 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2101 {
2102         unsigned long flags;
2103         int rc;
2104         struct mgsl_icount cprev, cnow;
2105         DECLARE_WAITQUEUE(wait, current);
2106
2107         /* save current irq counts */
2108         spin_lock_irqsave(&info->lock,flags);
2109         cprev = info->icount;
2110         add_wait_queue(&info->status_event_wait_q, &wait);
2111         set_current_state(TASK_INTERRUPTIBLE);
2112         spin_unlock_irqrestore(&info->lock,flags);
2113
2114         for(;;) {
2115                 schedule();
2116                 if (signal_pending(current)) {
2117                         rc = -ERESTARTSYS;
2118                         break;
2119                 }
2120
2121                 /* get new irq counts */
2122                 spin_lock_irqsave(&info->lock,flags);
2123                 cnow = info->icount;
2124                 set_current_state(TASK_INTERRUPTIBLE);
2125                 spin_unlock_irqrestore(&info->lock,flags);
2126
2127                 /* if no change, wait aborted for some reason */
2128                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2129                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2130                         rc = -EIO;
2131                         break;
2132                 }
2133
2134                 /* check for change in caller specified modem input */
2135                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2136                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2137                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2138                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2139                         rc = 0;
2140                         break;
2141                 }
2142
2143                 cprev = cnow;
2144         }
2145         remove_wait_queue(&info->status_event_wait_q, &wait);
2146         set_current_state(TASK_RUNNING);
2147         return rc;
2148 }
2149
2150 /* return the state of the serial control and status signals
2151  */
2152 static int tiocmget(struct tty_struct *tty, struct file *file)
2153 {
2154         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2155         unsigned int result;
2156         unsigned long flags;
2157
2158         spin_lock_irqsave(&info->lock,flags);
2159         get_signals(info);
2160         spin_unlock_irqrestore(&info->lock,flags);
2161
2162         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2163                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2164                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2165                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2166                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2167                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2168
2169         if (debug_level >= DEBUG_LEVEL_INFO)
2170                 printk("%s(%d):%s tiocmget() value=%08X\n",
2171                          __FILE__,__LINE__, info->device_name, result );
2172         return result;
2173 }
2174
2175 /* set modem control signals (DTR/RTS)
2176  */
2177 static int tiocmset(struct tty_struct *tty, struct file *file,
2178                     unsigned int set, unsigned int clear)
2179 {
2180         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2181         unsigned long flags;
2182
2183         if (debug_level >= DEBUG_LEVEL_INFO)
2184                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2185                         __FILE__,__LINE__,info->device_name, set, clear);
2186
2187         if (set & TIOCM_RTS)
2188                 info->serial_signals |= SerialSignal_RTS;
2189         if (set & TIOCM_DTR)
2190                 info->serial_signals |= SerialSignal_DTR;
2191         if (clear & TIOCM_RTS)
2192                 info->serial_signals &= ~SerialSignal_RTS;
2193         if (clear & TIOCM_DTR)
2194                 info->serial_signals &= ~SerialSignal_DTR;
2195
2196         spin_lock_irqsave(&info->lock,flags);
2197         set_signals(info);
2198         spin_unlock_irqrestore(&info->lock,flags);
2199
2200         return 0;
2201 }
2202
2203 /* Set or clear transmit break condition
2204  *
2205  * Arguments:           tty             pointer to tty instance data
2206  *                      break_state     -1=set break condition, 0=clear
2207  */
2208 static int mgslpc_break(struct tty_struct *tty, int break_state)
2209 {
2210         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2211         unsigned long flags;
2212
2213         if (debug_level >= DEBUG_LEVEL_INFO)
2214                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2215                          __FILE__,__LINE__, info->device_name, break_state);
2216
2217         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2218                 return -EINVAL;
2219
2220         spin_lock_irqsave(&info->lock,flags);
2221         if (break_state == -1)
2222                 set_reg_bits(info, CHA+DAFO, BIT6);
2223         else
2224                 clear_reg_bits(info, CHA+DAFO, BIT6);
2225         spin_unlock_irqrestore(&info->lock,flags);
2226         return 0;
2227 }
2228
2229 /* Service an IOCTL request
2230  *
2231  * Arguments:
2232  *
2233  *      tty     pointer to tty instance data
2234  *      file    pointer to associated file object for device
2235  *      cmd     IOCTL command code
2236  *      arg     command argument/context
2237  *
2238  * Return Value:        0 if success, otherwise error code
2239  */
2240 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2241                         unsigned int cmd, unsigned long arg)
2242 {
2243         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2244         int error;
2245         struct mgsl_icount cnow;        /* kernel counter temps */
2246         struct serial_icounter_struct __user *p_cuser;  /* user space */
2247         void __user *argp = (void __user *)arg;
2248         unsigned long flags;
2249
2250         if (debug_level >= DEBUG_LEVEL_INFO)
2251                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2252                         info->device_name, cmd );
2253
2254         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2255                 return -ENODEV;
2256
2257         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2258             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2259                 if (tty->flags & (1 << TTY_IO_ERROR))
2260                     return -EIO;
2261         }
2262
2263         switch (cmd) {
2264         case MGSL_IOCGPARAMS:
2265                 return get_params(info, argp);
2266         case MGSL_IOCSPARAMS:
2267                 return set_params(info, argp, tty);
2268         case MGSL_IOCGTXIDLE:
2269                 return get_txidle(info, argp);
2270         case MGSL_IOCSTXIDLE:
2271                 return set_txidle(info, (int)arg);
2272         case MGSL_IOCGIF:
2273                 return get_interface(info, argp);
2274         case MGSL_IOCSIF:
2275                 return set_interface(info,(int)arg);
2276         case MGSL_IOCTXENABLE:
2277                 return set_txenable(info,(int)arg, tty);
2278         case MGSL_IOCRXENABLE:
2279                 return set_rxenable(info,(int)arg);
2280         case MGSL_IOCTXABORT:
2281                 return tx_abort(info);
2282         case MGSL_IOCGSTATS:
2283                 return get_stats(info, argp);
2284         case MGSL_IOCWAITEVENT:
2285                 return wait_events(info, argp);
2286         case TIOCMIWAIT:
2287                 return modem_input_wait(info,(int)arg);
2288         case TIOCGICOUNT:
2289                 spin_lock_irqsave(&info->lock,flags);
2290                 cnow = info->icount;
2291                 spin_unlock_irqrestore(&info->lock,flags);
2292                 p_cuser = argp;
2293                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2294                 if (error) return error;
2295                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2296                 if (error) return error;
2297                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2298                 if (error) return error;
2299                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2300                 if (error) return error;
2301                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2302                 if (error) return error;
2303                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2304                 if (error) return error;
2305                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2306                 if (error) return error;
2307                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2308                 if (error) return error;
2309                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2310                 if (error) return error;
2311                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2312                 if (error) return error;
2313                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2314                 if (error) return error;
2315                 return 0;
2316         default:
2317                 return -ENOIOCTLCMD;
2318         }
2319         return 0;
2320 }
2321
2322 /* Set new termios settings
2323  *
2324  * Arguments:
2325  *
2326  *      tty             pointer to tty structure
2327  *      termios         pointer to buffer to hold returned old termios
2328  */
2329 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2330 {
2331         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2332         unsigned long flags;
2333
2334         if (debug_level >= DEBUG_LEVEL_INFO)
2335                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2336                         tty->driver->name );
2337
2338         /* just return if nothing has changed */
2339         if ((tty->termios->c_cflag == old_termios->c_cflag)
2340             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2341                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2342           return;
2343
2344         mgslpc_change_params(info, tty);
2345
2346         /* Handle transition to B0 status */
2347         if (old_termios->c_cflag & CBAUD &&
2348             !(tty->termios->c_cflag & CBAUD)) {
2349                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2350                 spin_lock_irqsave(&info->lock,flags);
2351                 set_signals(info);
2352                 spin_unlock_irqrestore(&info->lock,flags);
2353         }
2354
2355         /* Handle transition away from B0 status */
2356         if (!(old_termios->c_cflag & CBAUD) &&
2357             tty->termios->c_cflag & CBAUD) {
2358                 info->serial_signals |= SerialSignal_DTR;
2359                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2360                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2361                         info->serial_signals |= SerialSignal_RTS;
2362                 }
2363                 spin_lock_irqsave(&info->lock,flags);
2364                 set_signals(info);
2365                 spin_unlock_irqrestore(&info->lock,flags);
2366         }
2367
2368         /* Handle turning off CRTSCTS */
2369         if (old_termios->c_cflag & CRTSCTS &&
2370             !(tty->termios->c_cflag & CRTSCTS)) {
2371                 tty->hw_stopped = 0;
2372                 tx_release(tty);
2373         }
2374 }
2375
2376 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2377 {
2378         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2379         struct tty_port *port = &info->port;
2380
2381         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2382                 return;
2383
2384         if (debug_level >= DEBUG_LEVEL_INFO)
2385                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2386                          __FILE__,__LINE__, info->device_name, port->count);
2387
2388         WARN_ON(!port->count);
2389
2390         if (tty_port_close_start(port, tty, filp) == 0)
2391                 goto cleanup;
2392
2393         if (port->flags & ASYNC_INITIALIZED)
2394                 mgslpc_wait_until_sent(tty, info->timeout);
2395
2396         mgslpc_flush_buffer(tty);
2397
2398         tty_ldisc_flush(tty);
2399         shutdown(info, tty);
2400
2401         tty_port_close_end(port, tty);
2402         tty_port_tty_set(port, NULL);
2403 cleanup:
2404         if (debug_level >= DEBUG_LEVEL_INFO)
2405                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2406                         tty->driver->name, port->count);
2407 }
2408
2409 /* Wait until the transmitter is empty.
2410  */
2411 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2412 {
2413         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2414         unsigned long orig_jiffies, char_time;
2415
2416         if (!info )
2417                 return;
2418
2419         if (debug_level >= DEBUG_LEVEL_INFO)
2420                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2421                          __FILE__,__LINE__, info->device_name );
2422
2423         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2424                 return;
2425
2426         if (!(info->port.flags & ASYNC_INITIALIZED))
2427                 goto exit;
2428
2429         orig_jiffies = jiffies;
2430
2431         /* Set check interval to 1/5 of estimated time to
2432          * send a character, and make it at least 1. The check
2433          * interval should also be less than the timeout.
2434          * Note: use tight timings here to satisfy the NIST-PCTS.
2435          */
2436
2437         if ( info->params.data_rate ) {
2438                 char_time = info->timeout/(32 * 5);
2439                 if (!char_time)
2440                         char_time++;
2441         } else
2442                 char_time = 1;
2443
2444         if (timeout)
2445                 char_time = min_t(unsigned long, char_time, timeout);
2446
2447         if (info->params.mode == MGSL_MODE_HDLC) {
2448                 while (info->tx_active) {
2449                         msleep_interruptible(jiffies_to_msecs(char_time));
2450                         if (signal_pending(current))
2451                                 break;
2452                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2453                                 break;
2454                 }
2455         } else {
2456                 while ((info->tx_count || info->tx_active) &&
2457                         info->tx_enabled) {
2458                         msleep_interruptible(jiffies_to_msecs(char_time));
2459                         if (signal_pending(current))
2460                                 break;
2461                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2462                                 break;
2463                 }
2464         }
2465
2466 exit:
2467         if (debug_level >= DEBUG_LEVEL_INFO)
2468                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2469                          __FILE__,__LINE__, info->device_name );
2470 }
2471
2472 /* Called by tty_hangup() when a hangup is signaled.
2473  * This is the same as closing all open files for the port.
2474  */
2475 static void mgslpc_hangup(struct tty_struct *tty)
2476 {
2477         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2478
2479         if (debug_level >= DEBUG_LEVEL_INFO)
2480                 printk("%s(%d):mgslpc_hangup(%s)\n",
2481                          __FILE__,__LINE__, info->device_name );
2482
2483         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2484                 return;
2485
2486         mgslpc_flush_buffer(tty);
2487         shutdown(info, tty);
2488         tty_port_hangup(&info->port);
2489 }
2490
2491 static int carrier_raised(struct tty_port *port)
2492 {
2493         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2494         unsigned long flags;
2495
2496         spin_lock_irqsave(&info->lock,flags);
2497         get_signals(info);
2498         spin_unlock_irqrestore(&info->lock,flags);
2499
2500         if (info->serial_signals & SerialSignal_DCD)
2501                 return 1;
2502         return 0;
2503 }
2504
2505 static void dtr_rts(struct tty_port *port, int onoff)
2506 {
2507         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2508         unsigned long flags;
2509
2510         spin_lock_irqsave(&info->lock,flags);
2511         if (onoff)
2512                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2513         else
2514                 info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2515         set_signals(info);
2516         spin_unlock_irqrestore(&info->lock,flags);
2517 }
2518
2519
2520 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2521 {
2522         MGSLPC_INFO     *info;
2523         struct tty_port *port;
2524         int                     retval, line;
2525         unsigned long flags;
2526
2527         /* verify range of specified line number */
2528         line = tty->index;
2529         if ((line < 0) || (line >= mgslpc_device_count)) {
2530                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2531                         __FILE__,__LINE__,line);
2532                 return -ENODEV;
2533         }
2534
2535         /* find the info structure for the specified line */
2536         info = mgslpc_device_list;
2537         while(info && info->line != line)
2538                 info = info->next_device;
2539         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2540                 return -ENODEV;
2541
2542         port = &info->port;
2543         tty->driver_data = info;
2544         tty_port_tty_set(port, tty);
2545
2546         if (debug_level >= DEBUG_LEVEL_INFO)
2547                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2548                          __FILE__,__LINE__,tty->driver->name, port->count);
2549
2550         /* If port is closing, signal caller to try again */
2551         if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2552                 if (port->flags & ASYNC_CLOSING)
2553                         interruptible_sleep_on(&port->close_wait);
2554                 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2555                         -EAGAIN : -ERESTARTSYS);
2556                 goto cleanup;
2557         }
2558
2559         tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2560
2561         spin_lock_irqsave(&info->netlock, flags);
2562         if (info->netcount) {
2563                 retval = -EBUSY;
2564                 spin_unlock_irqrestore(&info->netlock, flags);
2565                 goto cleanup;
2566         }
2567         spin_lock(&port->lock);
2568         port->count++;
2569         spin_unlock(&port->lock);
2570         spin_unlock_irqrestore(&info->netlock, flags);
2571
2572         if (port->count == 1) {
2573                 /* 1st open on this device, init hardware */
2574                 retval = startup(info, tty);
2575                 if (retval < 0)
2576                         goto cleanup;
2577         }
2578
2579         retval = tty_port_block_til_ready(&info->port, tty, filp);
2580         if (retval) {
2581                 if (debug_level >= DEBUG_LEVEL_INFO)
2582                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2583                                  __FILE__,__LINE__, info->device_name, retval);
2584                 goto cleanup;
2585         }
2586
2587         if (debug_level >= DEBUG_LEVEL_INFO)
2588                 printk("%s(%d):mgslpc_open(%s) success\n",
2589                          __FILE__,__LINE__, info->device_name);
2590         retval = 0;
2591
2592 cleanup:
2593         return retval;
2594 }
2595
2596 /*
2597  * /proc fs routines....
2598  */
2599
2600 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2601 {
2602         char    stat_buf[30];
2603         unsigned long flags;
2604
2605         seq_printf(m, "%s:io:%04X irq:%d",
2606                       info->device_name, info->io_base, info->irq_level);
2607
2608         /* output current serial signal states */
2609         spin_lock_irqsave(&info->lock,flags);
2610         get_signals(info);
2611         spin_unlock_irqrestore(&info->lock,flags);
2612
2613         stat_buf[0] = 0;
2614         stat_buf[1] = 0;
2615         if (info->serial_signals & SerialSignal_RTS)
2616                 strcat(stat_buf, "|RTS");
2617         if (info->serial_signals & SerialSignal_CTS)
2618                 strcat(stat_buf, "|CTS");
2619         if (info->serial_signals & SerialSignal_DTR)
2620                 strcat(stat_buf, "|DTR");
2621         if (info->serial_signals & SerialSignal_DSR)
2622                 strcat(stat_buf, "|DSR");
2623         if (info->serial_signals & SerialSignal_DCD)
2624                 strcat(stat_buf, "|CD");
2625         if (info->serial_signals & SerialSignal_RI)
2626                 strcat(stat_buf, "|RI");
2627
2628         if (info->params.mode == MGSL_MODE_HDLC) {
2629                 seq_printf(m, " HDLC txok:%d rxok:%d",
2630                               info->icount.txok, info->icount.rxok);
2631                 if (info->icount.txunder)
2632                         seq_printf(m, " txunder:%d", info->icount.txunder);
2633                 if (info->icount.txabort)
2634                         seq_printf(m, " txabort:%d", info->icount.txabort);
2635                 if (info->icount.rxshort)
2636                         seq_printf(m, " rxshort:%d", info->icount.rxshort);
2637                 if (info->icount.rxlong)
2638                         seq_printf(m, " rxlong:%d", info->icount.rxlong);
2639                 if (info->icount.rxover)
2640                         seq_printf(m, " rxover:%d", info->icount.rxover);
2641                 if (info->icount.rxcrc)
2642                         seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2643         } else {
2644                 seq_printf(m, " ASYNC tx:%d rx:%d",
2645                               info->icount.tx, info->icount.rx);
2646                 if (info->icount.frame)
2647                         seq_printf(m, " fe:%d", info->icount.frame);
2648                 if (info->icount.parity)
2649                         seq_printf(m, " pe:%d", info->icount.parity);
2650                 if (info->icount.brk)
2651                         seq_printf(m, " brk:%d", info->icount.brk);
2652                 if (info->icount.overrun)
2653                         seq_printf(m, " oe:%d", info->icount.overrun);
2654         }
2655
2656         /* Append serial signal status to end */
2657         seq_printf(m, " %s\n", stat_buf+1);
2658
2659         seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2660                        info->tx_active,info->bh_requested,info->bh_running,
2661                        info->pending_bh);
2662 }
2663
2664 /* Called to print information about devices
2665  */
2666 static int mgslpc_proc_show(struct seq_file *m, void *v)
2667 {
2668         MGSLPC_INFO *info;
2669
2670         seq_printf(m, "synclink driver:%s\n", driver_version);
2671
2672         info = mgslpc_device_list;
2673         while( info ) {
2674                 line_info(m, info);
2675                 info = info->next_device;
2676         }
2677         return 0;
2678 }
2679
2680 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2681 {
2682         return single_open(file, mgslpc_proc_show, NULL);
2683 }
2684
2685 static const struct file_operations mgslpc_proc_fops = {
2686         .owner          = THIS_MODULE,
2687         .open           = mgslpc_proc_open,
2688         .read           = seq_read,
2689         .llseek         = seq_lseek,
2690         .release        = single_release,
2691 };
2692
2693 static int rx_alloc_buffers(MGSLPC_INFO *info)
2694 {
2695         /* each buffer has header and data */
2696         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2697
2698         /* calculate total allocation size for 8 buffers */
2699         info->rx_buf_total_size = info->rx_buf_size * 8;
2700
2701         /* limit total allocated memory */
2702         if (info->rx_buf_total_size > 0x10000)
2703                 info->rx_buf_total_size = 0x10000;
2704
2705         /* calculate number of buffers */
2706         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2707
2708         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2709         if (info->rx_buf == NULL)
2710                 return -ENOMEM;
2711
2712         rx_reset_buffers(info);
2713         return 0;
2714 }
2715
2716 static void rx_free_buffers(MGSLPC_INFO *info)
2717 {
2718         kfree(info->rx_buf);
2719         info->rx_buf = NULL;
2720 }
2721
2722 static int claim_resources(MGSLPC_INFO *info)
2723 {
2724         if (rx_alloc_buffers(info) < 0 ) {
2725                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2726                 release_resources(info);
2727                 return -ENODEV;
2728         }
2729         return 0;
2730 }
2731
2732 static void release_resources(MGSLPC_INFO *info)
2733 {
2734         if (debug_level >= DEBUG_LEVEL_INFO)
2735                 printk("release_resources(%s)\n", info->device_name);
2736         rx_free_buffers(info);
2737 }
2738
2739 /* Add the specified device instance data structure to the
2740  * global linked list of devices and increment the device count.
2741  *
2742  * Arguments:           info    pointer to device instance data
2743  */
2744 static void mgslpc_add_device(MGSLPC_INFO *info)
2745 {
2746         info->next_device = NULL;
2747         info->line = mgslpc_device_count;
2748         sprintf(info->device_name,"ttySLP%d",info->line);
2749
2750         if (info->line < MAX_DEVICE_COUNT) {
2751                 if (maxframe[info->line])
2752                         info->max_frame_size = maxframe[info->line];
2753         }
2754
2755         mgslpc_device_count++;
2756
2757         if (!mgslpc_device_list)
2758                 mgslpc_device_list = info;
2759         else {
2760                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2761                 while( current_dev->next_device )
2762                         current_dev = current_dev->next_device;
2763                 current_dev->next_device = info;
2764         }
2765
2766         if (info->max_frame_size < 4096)
2767                 info->max_frame_size = 4096;
2768         else if (info->max_frame_size > 65535)
2769                 info->max_frame_size = 65535;
2770
2771         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2772                 info->device_name, info->io_base, info->irq_level);
2773
2774 #if SYNCLINK_GENERIC_HDLC
2775         hdlcdev_init(info);
2776 #endif
2777 }
2778
2779 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2780 {
2781         MGSLPC_INFO *info = mgslpc_device_list;
2782         MGSLPC_INFO *last = NULL;
2783
2784         while(info) {
2785                 if (info == remove_info) {
2786                         if (last)
2787                                 last->next_device = info->next_device;
2788                         else
2789                                 mgslpc_device_list = info->next_device;
2790 #if SYNCLINK_GENERIC_HDLC
2791                         hdlcdev_exit(info);
2792 #endif
2793                         release_resources(info);
2794                         kfree(info);
2795                         mgslpc_device_count--;
2796                         return;
2797                 }
2798                 last = info;
2799                 info = info->next_device;
2800         }
2801 }
2802
2803 static struct pcmcia_device_id mgslpc_ids[] = {
2804         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2805         PCMCIA_DEVICE_NULL
2806 };
2807 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2808
2809 static struct pcmcia_driver mgslpc_driver = {
2810         .owner          = THIS_MODULE,
2811         .drv            = {
2812                 .name   = "synclink_cs",
2813         },
2814         .probe          = mgslpc_probe,
2815         .remove         = mgslpc_detach,
2816         .id_table       = mgslpc_ids,
2817         .suspend        = mgslpc_suspend,
2818         .resume         = mgslpc_resume,
2819 };
2820
2821 static const struct tty_operations mgslpc_ops = {
2822         .open = mgslpc_open,
2823         .close = mgslpc_close,
2824         .write = mgslpc_write,
2825         .put_char = mgslpc_put_char,
2826         .flush_chars = mgslpc_flush_chars,
2827         .write_room = mgslpc_write_room,
2828         .chars_in_buffer = mgslpc_chars_in_buffer,
2829         .flush_buffer = mgslpc_flush_buffer,
2830         .ioctl = mgslpc_ioctl,
2831         .throttle = mgslpc_throttle,
2832         .unthrottle = mgslpc_unthrottle,
2833         .send_xchar = mgslpc_send_xchar,
2834         .break_ctl = mgslpc_break,
2835         .wait_until_sent = mgslpc_wait_until_sent,
2836         .set_termios = mgslpc_set_termios,
2837         .stop = tx_pause,
2838         .start = tx_release,
2839         .hangup = mgslpc_hangup,
2840         .tiocmget = tiocmget,
2841         .tiocmset = tiocmset,
2842         .proc_fops = &mgslpc_proc_fops,
2843 };
2844
2845 static void synclink_cs_cleanup(void)
2846 {
2847         int rc;
2848
2849         printk("Unloading %s: version %s\n", driver_name, driver_version);
2850
2851         while(mgslpc_device_list)
2852                 mgslpc_remove_device(mgslpc_device_list);
2853
2854         if (serial_driver) {
2855                 if ((rc = tty_unregister_driver(serial_driver)))
2856                         printk("%s(%d) failed to unregister tty driver err=%d\n",
2857                                __FILE__,__LINE__,rc);
2858                 put_tty_driver(serial_driver);
2859         }
2860
2861         pcmcia_unregister_driver(&mgslpc_driver);
2862 }
2863
2864 static int __init synclink_cs_init(void)
2865 {
2866     int rc;
2867
2868     if (break_on_load) {
2869             mgslpc_get_text_ptr();
2870             BREAKPOINT();
2871     }
2872
2873     printk("%s %s\n", driver_name, driver_version);
2874
2875     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
2876             return rc;
2877
2878     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
2879     if (!serial_driver) {
2880             rc = -ENOMEM;
2881             goto error;
2882     }
2883
2884     /* Initialize the tty_driver structure */
2885
2886     serial_driver->owner = THIS_MODULE;
2887     serial_driver->driver_name = "synclink_cs";
2888     serial_driver->name = "ttySLP";
2889     serial_driver->major = ttymajor;
2890     serial_driver->minor_start = 64;
2891     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2892     serial_driver->subtype = SERIAL_TYPE_NORMAL;
2893     serial_driver->init_termios = tty_std_termios;
2894     serial_driver->init_termios.c_cflag =
2895             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2896     serial_driver->flags = TTY_DRIVER_REAL_RAW;
2897     tty_set_operations(serial_driver, &mgslpc_ops);
2898
2899     if ((rc = tty_register_driver(serial_driver)) < 0) {
2900             printk("%s(%d):Couldn't register serial driver\n",
2901                    __FILE__,__LINE__);
2902             put_tty_driver(serial_driver);
2903             serial_driver = NULL;
2904             goto error;
2905     }
2906
2907     printk("%s %s, tty major#%d\n",
2908            driver_name, driver_version,
2909            serial_driver->major);
2910
2911     return 0;
2912
2913 error:
2914     synclink_cs_cleanup();
2915     return rc;
2916 }
2917
2918 static void __exit synclink_cs_exit(void)
2919 {
2920         synclink_cs_cleanup();
2921 }
2922
2923 module_init(synclink_cs_init);
2924 module_exit(synclink_cs_exit);
2925
2926 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2927 {
2928         unsigned int M, N;
2929         unsigned char val;
2930
2931         /* note:standard BRG mode is broken in V3.2 chip
2932          * so enhanced mode is always used
2933          */
2934
2935         if (rate) {
2936                 N = 3686400 / rate;
2937                 if (!N)
2938                         N = 1;
2939                 N >>= 1;
2940                 for (M = 1; N > 64 && M < 16; M++)
2941                         N >>= 1;
2942                 N--;
2943
2944                 /* BGR[5..0] = N
2945                  * BGR[9..6] = M
2946                  * BGR[7..0] contained in BGR register
2947                  * BGR[9..8] contained in CCR2[7..6]
2948                  * divisor = (N+1)*2^M
2949                  *
2950                  * Note: M *must* not be zero (causes asymetric duty cycle)
2951                  */
2952                 write_reg(info, (unsigned char) (channel + BGR),
2953                                   (unsigned char) ((M << 6) + N));
2954                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2955                 val |= ((M << 4) & 0xc0);
2956                 write_reg(info, (unsigned char) (channel + CCR2), val);
2957         }
2958 }
2959
2960 /* Enabled the AUX clock output at the specified frequency.
2961  */
2962 static void enable_auxclk(MGSLPC_INFO *info)
2963 {
2964         unsigned char val;
2965
2966         /* MODE
2967          *
2968          * 07..06  MDS[1..0] 10 = transparent HDLC mode
2969          * 05      ADM Address Mode, 0 = no addr recognition
2970          * 04      TMD Timer Mode, 0 = external
2971          * 03      RAC Receiver Active, 0 = inactive
2972          * 02      RTS 0=RTS active during xmit, 1=RTS always active
2973          * 01      TRS Timer Resolution, 1=512
2974          * 00      TLP Test Loop, 0 = no loop
2975          *
2976          * 1000 0010
2977          */
2978         val = 0x82;
2979
2980         /* channel B RTS is used to enable AUXCLK driver on SP505 */
2981         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2982                 val |= BIT2;
2983         write_reg(info, CHB + MODE, val);
2984
2985         /* CCR0
2986          *
2987          * 07      PU Power Up, 1=active, 0=power down
2988          * 06      MCE Master Clock Enable, 1=enabled
2989          * 05      Reserved, 0
2990          * 04..02  SC[2..0] Encoding
2991          * 01..00  SM[1..0] Serial Mode, 00=HDLC
2992          *
2993          * 11000000
2994          */
2995         write_reg(info, CHB + CCR0, 0xc0);
2996
2997         /* CCR1
2998          *
2999          * 07      SFLG Shared Flag, 0 = disable shared flags
3000          * 06      GALP Go Active On Loop, 0 = not used
3001          * 05      GLP Go On Loop, 0 = not used
3002          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3003          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3004          * 02..00  CM[2..0] Clock Mode
3005          *
3006          * 0001 0111
3007          */
3008         write_reg(info, CHB + CCR1, 0x17);
3009
3010         /* CCR2 (Channel B)
3011          *
3012          * 07..06  BGR[9..8] Baud rate bits 9..8
3013          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3014          * 04      SSEL Clock source select, 1=submode b
3015          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3016          * 02      RWX Read/Write Exchange 0=disabled
3017          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3018          * 00      DIV, data inversion 0=disabled, 1=enabled
3019          *
3020          * 0011 1000
3021          */
3022         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3023                 write_reg(info, CHB + CCR2, 0x38);
3024         else
3025                 write_reg(info, CHB + CCR2, 0x30);
3026
3027         /* CCR4
3028          *
3029          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3030          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3031          * 05      TST1 Test Pin, 0=normal operation
3032          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3033          * 03..02  Reserved, must be 0
3034          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3035          *
3036          * 0101 0000
3037          */
3038         write_reg(info, CHB + CCR4, 0x50);
3039
3040         /* if auxclk not enabled, set internal BRG so
3041          * CTS transitions can be detected (requires TxC)
3042          */
3043         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3044                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3045         else
3046                 mgslpc_set_rate(info, CHB, 921600);
3047 }
3048
3049 static void loopback_enable(MGSLPC_INFO *info)
3050 {
3051         unsigned char val;
3052
3053         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3054         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3055         write_reg(info, CHA + CCR1, val);
3056
3057         /* CCR2:04 SSEL Clock source select, 1=submode b */
3058         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3059         write_reg(info, CHA + CCR2, val);
3060
3061         /* set LinkSpeed if available, otherwise default to 2Mbps */
3062         if (info->params.clock_speed)
3063                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3064         else
3065                 mgslpc_set_rate(info, CHA, 1843200);
3066
3067         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3068         val = read_reg(info, CHA + MODE) | BIT0;
3069         write_reg(info, CHA + MODE, val);
3070 }
3071
3072 static void hdlc_mode(MGSLPC_INFO *info)
3073 {
3074         unsigned char val;
3075         unsigned char clkmode, clksubmode;
3076
3077         /* disable all interrupts */
3078         irq_disable(info, CHA, 0xffff);
3079         irq_disable(info, CHB, 0xffff);
3080         port_irq_disable(info, 0xff);
3081
3082         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3083         clkmode = clksubmode = 0;
3084         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3085             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3086                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3087                 clkmode = 7;
3088         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3089                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3090                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3091                 clkmode = 7;
3092                 clksubmode = 1;
3093         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3094                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3095                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3096                         clkmode = 6;
3097                         clksubmode = 1;
3098                 } else {
3099                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3100                         clkmode = 6;
3101                 }
3102         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3103                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3104                 clksubmode = 1;
3105         }
3106
3107         /* MODE
3108          *
3109          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3110          * 05      ADM Address Mode, 0 = no addr recognition
3111          * 04      TMD Timer Mode, 0 = external
3112          * 03      RAC Receiver Active, 0 = inactive
3113          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3114          * 01      TRS Timer Resolution, 1=512
3115          * 00      TLP Test Loop, 0 = no loop
3116          *
3117          * 1000 0010
3118          */
3119         val = 0x82;
3120         if (info->params.loopback)
3121                 val |= BIT0;
3122
3123         /* preserve RTS state */
3124         if (info->serial_signals & SerialSignal_RTS)
3125                 val |= BIT2;
3126         write_reg(info, CHA + MODE, val);
3127
3128         /* CCR0
3129          *
3130          * 07      PU Power Up, 1=active, 0=power down
3131          * 06      MCE Master Clock Enable, 1=enabled
3132          * 05      Reserved, 0
3133          * 04..02  SC[2..0] Encoding
3134          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3135          *
3136          * 11000000
3137          */
3138         val = 0xc0;
3139         switch (info->params.encoding)
3140         {
3141         case HDLC_ENCODING_NRZI:
3142                 val |= BIT3;
3143                 break;
3144         case HDLC_ENCODING_BIPHASE_SPACE:
3145                 val |= BIT4;
3146                 break;          // FM0
3147         case HDLC_ENCODING_BIPHASE_MARK:
3148                 val |= BIT4 + BIT2;
3149                 break;          // FM1
3150         case HDLC_ENCODING_BIPHASE_LEVEL:
3151                 val |= BIT4 + BIT3;
3152                 break;          // Manchester
3153         }
3154         write_reg(info, CHA + CCR0, val);
3155
3156         /* CCR1
3157          *
3158          * 07      SFLG Shared Flag, 0 = disable shared flags
3159          * 06      GALP Go Active On Loop, 0 = not used
3160          * 05      GLP Go On Loop, 0 = not used
3161          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3162          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3163          * 02..00  CM[2..0] Clock Mode
3164          *
3165          * 0001 0000
3166          */
3167         val = 0x10 + clkmode;
3168         write_reg(info, CHA + CCR1, val);
3169
3170         /* CCR2
3171          *
3172          * 07..06  BGR[9..8] Baud rate bits 9..8
3173          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3174          * 04      SSEL Clock source select, 1=submode b
3175          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3176          * 02      RWX Read/Write Exchange 0=disabled
3177          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3178          * 00      DIV, data inversion 0=disabled, 1=enabled
3179          *
3180          * 0000 0000
3181          */
3182         val = 0x00;
3183         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3184             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3185                 val |= BIT5;
3186         if (clksubmode)
3187                 val |= BIT4;
3188         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3189                 val |= BIT1;
3190         if (info->params.encoding == HDLC_ENCODING_NRZB)
3191                 val |= BIT0;
3192         write_reg(info, CHA + CCR2, val);
3193
3194         /* CCR3
3195          *
3196          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3197          * 05      EPT Enable preamble transmission, 1=enabled
3198          * 04      RADD Receive address pushed to FIFO, 0=disabled
3199          * 03      CRL CRC Reset Level, 0=FFFF
3200          * 02      RCRC Rx CRC 0=On 1=Off
3201          * 01      TCRC Tx CRC 0=On 1=Off
3202          * 00      PSD DPLL Phase Shift Disable
3203          *
3204          * 0000 0000
3205          */
3206         val = 0x00;
3207         if (info->params.crc_type == HDLC_CRC_NONE)
3208                 val |= BIT2 + BIT1;
3209         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3210                 val |= BIT5;
3211         switch (info->params.preamble_length)
3212         {
3213         case HDLC_PREAMBLE_LENGTH_16BITS:
3214                 val |= BIT6;
3215                 break;
3216         case HDLC_PREAMBLE_LENGTH_32BITS:
3217                 val |= BIT6;
3218                 break;
3219         case HDLC_PREAMBLE_LENGTH_64BITS:
3220                 val |= BIT7 + BIT6;
3221                 break;
3222         }
3223         write_reg(info, CHA + CCR3, val);
3224
3225         /* PRE - Preamble pattern */
3226         val = 0;
3227         switch (info->params.preamble)
3228         {
3229         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3230         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3231         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3232         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3233         }
3234         write_reg(info, CHA + PRE, val);
3235
3236         /* CCR4
3237          *
3238          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3239          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3240          * 05      TST1 Test Pin, 0=normal operation
3241          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3242          * 03..02  Reserved, must be 0
3243          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3244          *
3245          * 0101 0000
3246          */
3247         val = 0x50;
3248         write_reg(info, CHA + CCR4, val);
3249         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3250                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3251         else
3252                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3253
3254         /* RLCR Receive length check register
3255          *
3256          * 7     1=enable receive length check
3257          * 6..0  Max frame length = (RL + 1) * 32
3258          */
3259         write_reg(info, CHA + RLCR, 0);
3260
3261         /* XBCH Transmit Byte Count High
3262          *
3263          * 07      DMA mode, 0 = interrupt driven
3264          * 06      NRM, 0=ABM (ignored)
3265          * 05      CAS Carrier Auto Start
3266          * 04      XC Transmit Continuously (ignored)
3267          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3268          *
3269          * 0000 0000
3270          */
3271         val = 0x00;
3272         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3273                 val |= BIT5;
3274         write_reg(info, CHA + XBCH, val);
3275         enable_auxclk(info);
3276         if (info->params.loopback || info->testing_irq)
3277                 loopback_enable(info);
3278         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3279         {
3280                 irq_enable(info, CHB, IRQ_CTS);
3281                 /* PVR[3] 1=AUTO CTS active */
3282                 set_reg_bits(info, CHA + PVR, BIT3);
3283         } else
3284                 clear_reg_bits(info, CHA + PVR, BIT3);
3285
3286         irq_enable(info, CHA,
3287                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3288                          IRQ_UNDERRUN + IRQ_TXFIFO);
3289         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3290         wait_command_complete(info, CHA);
3291         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3292
3293         /* Master clock mode enabled above to allow reset commands
3294          * to complete even if no data clocks are present.
3295          *
3296          * Disable master clock mode for normal communications because
3297          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3298          * IRQ when in master clock mode.
3299          *
3300          * Leave master clock mode enabled for IRQ test because the
3301          * timer IRQ used by the test can only happen in master clock mode.
3302          */
3303         if (!info->testing_irq)
3304                 clear_reg_bits(info, CHA + CCR0, BIT6);
3305
3306         tx_set_idle(info);
3307
3308         tx_stop(info);
3309         rx_stop(info);
3310 }
3311
3312 static void rx_stop(MGSLPC_INFO *info)
3313 {
3314         if (debug_level >= DEBUG_LEVEL_ISR)
3315                 printk("%s(%d):rx_stop(%s)\n",
3316                          __FILE__,__LINE__, info->device_name );
3317
3318         /* MODE:03 RAC Receiver Active, 0=inactive */
3319         clear_reg_bits(info, CHA + MODE, BIT3);
3320
3321         info->rx_enabled = false;
3322         info->rx_overflow = false;
3323 }
3324
3325 static void rx_start(MGSLPC_INFO *info)
3326 {
3327         if (debug_level >= DEBUG_LEVEL_ISR)
3328                 printk("%s(%d):rx_start(%s)\n",
3329                          __FILE__,__LINE__, info->device_name );
3330
3331         rx_reset_buffers(info);
3332         info->rx_enabled = false;
3333         info->rx_overflow = false;
3334
3335         /* MODE:03 RAC Receiver Active, 1=active */
3336         set_reg_bits(info, CHA + MODE, BIT3);
3337
3338         info->rx_enabled = true;
3339 }
3340
3341 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3342 {
3343         if (debug_level >= DEBUG_LEVEL_ISR)
3344                 printk("%s(%d):tx_start(%s)\n",
3345                          __FILE__,__LINE__, info->device_name );
3346
3347         if (info->tx_count) {
3348                 /* If auto RTS enabled and RTS is inactive, then assert */
3349                 /* RTS and set a flag indicating that the driver should */
3350                 /* negate RTS when the transmission completes. */
3351                 info->drop_rts_on_tx_done = false;
3352
3353                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3354                         get_signals(info);
3355                         if (!(info->serial_signals & SerialSignal_RTS)) {
3356                                 info->serial_signals |= SerialSignal_RTS;
3357                                 set_signals(info);
3358                                 info->drop_rts_on_tx_done = true;
3359                         }
3360                 }
3361
3362                 if (info->params.mode == MGSL_MODE_ASYNC) {
3363                         if (!info->tx_active) {
3364                                 info->tx_active = true;
3365                                 tx_ready(info, tty);
3366                         }
3367                 } else {
3368                         info->tx_active = true;
3369                         tx_ready(info, tty);
3370                         mod_timer(&info->tx_timer, jiffies +
3371                                         msecs_to_jiffies(5000));
3372                 }
3373         }
3374
3375         if (!info->tx_enabled)
3376                 info->tx_enabled = true;
3377 }
3378
3379 static void tx_stop(MGSLPC_INFO *info)
3380 {
3381         if (debug_level >= DEBUG_LEVEL_ISR)
3382                 printk("%s(%d):tx_stop(%s)\n",
3383                          __FILE__,__LINE__, info->device_name );
3384
3385         del_timer(&info->tx_timer);
3386
3387         info->tx_enabled = false;
3388         info->tx_active = false;
3389 }
3390
3391 /* Reset the adapter to a known state and prepare it for further use.
3392  */
3393 static void reset_device(MGSLPC_INFO *info)
3394 {
3395         /* power up both channels (set BIT7) */
3396         write_reg(info, CHA + CCR0, 0x80);
3397         write_reg(info, CHB + CCR0, 0x80);
3398         write_reg(info, CHA + MODE, 0);
3399         write_reg(info, CHB + MODE, 0);
3400
3401         /* disable all interrupts */
3402         irq_disable(info, CHA, 0xffff);
3403         irq_disable(info, CHB, 0xffff);
3404         port_irq_disable(info, 0xff);
3405
3406         /* PCR Port Configuration Register
3407          *
3408          * 07..04  DEC[3..0] Serial I/F select outputs
3409          * 03      output, 1=AUTO CTS control enabled
3410          * 02      RI Ring Indicator input 0=active
3411          * 01      DSR input 0=active
3412          * 00      DTR output 0=active
3413          *
3414          * 0000 0110
3415          */
3416         write_reg(info, PCR, 0x06);
3417
3418         /* PVR Port Value Register
3419          *
3420          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3421          * 03      AUTO CTS output 1=enabled
3422          * 02      RI Ring Indicator input
3423          * 01      DSR input
3424          * 00      DTR output (1=inactive)
3425          *
3426          * 0000 0001
3427          */
3428 //      write_reg(info, PVR, PVR_DTR);
3429
3430         /* IPC Interrupt Port Configuration
3431          *
3432          * 07      VIS 1=Masked interrupts visible
3433          * 06..05  Reserved, 0
3434          * 04..03  SLA Slave address, 00 ignored
3435          * 02      CASM Cascading Mode, 1=daisy chain
3436          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3437          *
3438          * 0000 0101
3439          */
3440         write_reg(info, IPC, 0x05);
3441 }
3442
3443 static void async_mode(MGSLPC_INFO *info)
3444 {
3445         unsigned char val;
3446
3447         /* disable all interrupts */
3448         irq_disable(info, CHA, 0xffff);
3449         irq_disable(info, CHB, 0xffff);
3450         port_irq_disable(info, 0xff);
3451
3452         /* MODE
3453          *
3454          * 07      Reserved, 0
3455          * 06      FRTS RTS State, 0=active
3456          * 05      FCTS Flow Control on CTS
3457          * 04      FLON Flow Control Enable
3458          * 03      RAC Receiver Active, 0 = inactive
3459          * 02      RTS 0=Auto RTS, 1=manual RTS
3460          * 01      TRS Timer Resolution, 1=512
3461          * 00      TLP Test Loop, 0 = no loop
3462          *
3463          * 0000 0110
3464          */
3465         val = 0x06;
3466         if (info->params.loopback)
3467                 val |= BIT0;
3468
3469         /* preserve RTS state */
3470         if (!(info->serial_signals & SerialSignal_RTS))
3471                 val |= BIT6;
3472         write_reg(info, CHA + MODE, val);
3473
3474         /* CCR0
3475          *
3476          * 07      PU Power Up, 1=active, 0=power down
3477          * 06      MCE Master Clock Enable, 1=enabled
3478          * 05      Reserved, 0
3479          * 04..02  SC[2..0] Encoding, 000=NRZ
3480          * 01..00  SM[1..0] Serial Mode, 11=Async
3481          *
3482          * 1000 0011
3483          */
3484         write_reg(info, CHA + CCR0, 0x83);
3485
3486         /* CCR1
3487          *
3488          * 07..05  Reserved, 0
3489          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3490          * 03      BCR Bit Clock Rate, 1=16x
3491          * 02..00  CM[2..0] Clock Mode, 111=BRG
3492          *
3493          * 0001 1111
3494          */
3495         write_reg(info, CHA + CCR1, 0x1f);
3496
3497         /* CCR2 (channel A)
3498          *
3499          * 07..06  BGR[9..8] Baud rate bits 9..8
3500          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3501          * 04      SSEL Clock source select, 1=submode b
3502          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3503          * 02      RWX Read/Write Exchange 0=disabled
3504          * 01      Reserved, 0
3505          * 00      DIV, data inversion 0=disabled, 1=enabled
3506          *
3507          * 0001 0000
3508          */
3509         write_reg(info, CHA + CCR2, 0x10);
3510
3511         /* CCR3
3512          *
3513          * 07..01  Reserved, 0
3514          * 00      PSD DPLL Phase Shift Disable
3515          *
3516          * 0000 0000
3517          */
3518         write_reg(info, CHA + CCR3, 0);
3519
3520         /* CCR4
3521          *
3522          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3523          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3524          * 05      TST1 Test Pin, 0=normal operation
3525          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3526          * 03..00  Reserved, must be 0
3527          *
3528          * 0101 0000
3529          */
3530         write_reg(info, CHA + CCR4, 0x50);
3531         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3532
3533         /* DAFO Data Format
3534          *
3535          * 07      Reserved, 0
3536          * 06      XBRK transmit break, 0=normal operation
3537          * 05      Stop bits (0=1, 1=2)
3538          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3539          * 02      PAREN Parity Enable
3540          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3541          *
3542          */
3543         val = 0x00;
3544         if (info->params.data_bits != 8)
3545                 val |= BIT0;    /* 7 bits */
3546         if (info->params.stop_bits != 1)
3547                 val |= BIT5;
3548         if (info->params.parity != ASYNC_PARITY_NONE)
3549         {
3550                 val |= BIT2;    /* Parity enable */
3551                 if (info->params.parity == ASYNC_PARITY_ODD)
3552                         val |= BIT3;
3553                 else
3554                         val |= BIT4;
3555         }
3556         write_reg(info, CHA + DAFO, val);
3557
3558         /* RFC Rx FIFO Control
3559          *
3560          * 07      Reserved, 0
3561          * 06      DPS, 1=parity bit not stored in data byte
3562          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3563          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3564          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3565          * 01      Reserved, 0
3566          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3567          *
3568          * 0101 1100
3569          */
3570         write_reg(info, CHA + RFC, 0x5c);
3571
3572         /* RLCR Receive length check register
3573          *
3574          * Max frame length = (RL + 1) * 32
3575          */
3576         write_reg(info, CHA + RLCR, 0);
3577
3578         /* XBCH Transmit Byte Count High
3579          *
3580          * 07      DMA mode, 0 = interrupt driven
3581          * 06      NRM, 0=ABM (ignored)
3582          * 05      CAS Carrier Auto Start
3583          * 04      XC Transmit Continuously (ignored)
3584          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3585          *
3586          * 0000 0000
3587          */
3588         val = 0x00;
3589         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3590                 val |= BIT5;
3591         write_reg(info, CHA + XBCH, val);
3592         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3593                 irq_enable(info, CHA, IRQ_CTS);
3594
3595         /* MODE:03 RAC Receiver Active, 1=active */
3596         set_reg_bits(info, CHA + MODE, BIT3);
3597         enable_auxclk(info);
3598         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3599                 irq_enable(info, CHB, IRQ_CTS);
3600                 /* PVR[3] 1=AUTO CTS active */
3601                 set_reg_bits(info, CHA + PVR, BIT3);
3602         } else
3603                 clear_reg_bits(info, CHA + PVR, BIT3);
3604         irq_enable(info, CHA,
3605                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3606                           IRQ_ALLSENT + IRQ_TXFIFO);
3607         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3608         wait_command_complete(info, CHA);
3609         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3610 }
3611
3612 /* Set the HDLC idle mode for the transmitter.
3613  */
3614 static void tx_set_idle(MGSLPC_INFO *info)
3615 {
3616         /* Note: ESCC2 only supports flags and one idle modes */
3617         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3618                 set_reg_bits(info, CHA + CCR1, BIT3);
3619         else
3620                 clear_reg_bits(info, CHA + CCR1, BIT3);
3621 }
3622
3623 /* get state of the V24 status (input) signals.
3624  */
3625 static void get_signals(MGSLPC_INFO *info)
3626 {
3627         unsigned char status = 0;
3628
3629         /* preserve DTR and RTS */
3630         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3631
3632         if (read_reg(info, CHB + VSTR) & BIT7)
3633                 info->serial_signals |= SerialSignal_DCD;
3634         if (read_reg(info, CHB + STAR) & BIT1)
3635                 info->serial_signals |= SerialSignal_CTS;
3636
3637         status = read_reg(info, CHA + PVR);
3638         if (!(status & PVR_RI))
3639                 info->serial_signals |= SerialSignal_RI;
3640         if (!(status & PVR_DSR))
3641                 info->serial_signals |= SerialSignal_DSR;
3642 }
3643
3644 /* Set the state of DTR and RTS based on contents of
3645  * serial_signals member of device extension.
3646  */
3647 static void set_signals(MGSLPC_INFO *info)
3648 {
3649         unsigned char val;
3650
3651         val = read_reg(info, CHA + MODE);
3652         if (info->params.mode == MGSL_MODE_ASYNC) {
3653                 if (info->serial_signals & SerialSignal_RTS)
3654                         val &= ~BIT6;
3655                 else
3656                         val |= BIT6;
3657         } else {
3658                 if (info->serial_signals & SerialSignal_RTS)
3659                         val |= BIT2;
3660                 else
3661                         val &= ~BIT2;
3662         }
3663         write_reg(info, CHA + MODE, val);
3664
3665         if (info->serial_signals & SerialSignal_DTR)
3666                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3667         else
3668                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3669 }
3670
3671 static void rx_reset_buffers(MGSLPC_INFO *info)
3672 {
3673         RXBUF *buf;
3674         int i;
3675
3676         info->rx_put = 0;
3677         info->rx_get = 0;
3678         info->rx_frame_count = 0;
3679         for (i=0 ; i < info->rx_buf_count ; i++) {
3680                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3681                 buf->status = buf->count = 0;
3682         }
3683 }
3684
3685 /* Attempt to return a received HDLC frame
3686  * Only frames received without errors are returned.
3687  *
3688  * Returns true if frame returned, otherwise false
3689  */
3690 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3691 {
3692         unsigned short status;
3693         RXBUF *buf;
3694         unsigned int framesize = 0;
3695         unsigned long flags;
3696         bool return_frame = false;
3697
3698         if (info->rx_frame_count == 0)
3699                 return false;
3700
3701         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3702
3703         status = buf->status;
3704
3705         /* 07  VFR  1=valid frame
3706          * 06  RDO  1=data overrun
3707          * 05  CRC  1=OK, 0=error
3708          * 04  RAB  1=frame aborted
3709          */
3710         if ((status & 0xf0) != 0xA0) {
3711                 if (!(status & BIT7) || (status & BIT4))
3712                         info->icount.rxabort++;
3713                 else if (status & BIT6)
3714                         info->icount.rxover++;
3715                 else if (!(status & BIT5)) {
3716                         info->icount.rxcrc++;
3717                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3718                                 return_frame = true;
3719                 }
3720                 framesize = 0;
3721 #if SYNCLINK_GENERIC_HDLC
3722                 {
3723                         info->netdev->stats.rx_errors++;
3724                         info->netdev->stats.rx_frame_errors++;
3725                 }
3726 #endif
3727         } else
3728                 return_frame = true;
3729
3730         if (return_frame)
3731                 framesize = buf->count;
3732
3733         if (debug_level >= DEBUG_LEVEL_BH)
3734                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3735                         __FILE__,__LINE__,info->device_name,status,framesize);
3736
3737         if (debug_level >= DEBUG_LEVEL_DATA)
3738                 trace_block(info, buf->data, framesize, 0);
3739
3740         if (framesize) {
3741                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3742                       framesize+1 > info->max_frame_size) ||
3743                     framesize > info->max_frame_size)
3744                         info->icount.rxlong++;
3745                 else {
3746                         if (status & BIT5)
3747                                 info->icount.rxok++;
3748
3749                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3750                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3751                                 ++framesize;
3752                         }
3753
3754 #if SYNCLINK_GENERIC_HDLC
3755                         if (info->netcount)
3756                                 hdlcdev_rx(info, buf->data, framesize);
3757                         else
3758 #endif
3759                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3760                 }
3761         }
3762
3763         spin_lock_irqsave(&info->lock,flags);
3764         buf->status = buf->count = 0;
3765         info->rx_frame_count--;
3766         info->rx_get++;
3767         if (info->rx_get >= info->rx_buf_count)
3768                 info->rx_get = 0;
3769         spin_unlock_irqrestore(&info->lock,flags);
3770
3771         return true;
3772 }
3773
3774 static bool register_test(MGSLPC_INFO *info)
3775 {
3776         static unsigned char patterns[] =
3777             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3778         static unsigned int count = ARRAY_SIZE(patterns);
3779         unsigned int i;
3780         bool rc = true;
3781         unsigned long flags;
3782
3783         spin_lock_irqsave(&info->lock,flags);
3784         reset_device(info);
3785
3786         for (i = 0; i < count; i++) {
3787                 write_reg(info, XAD1, patterns[i]);
3788                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3789                 if ((read_reg(info, XAD1) != patterns[i]) ||
3790                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3791                         rc = false;
3792                         break;
3793                 }
3794         }
3795
3796         spin_unlock_irqrestore(&info->lock,flags);
3797         return rc;
3798 }
3799
3800 static bool irq_test(MGSLPC_INFO *info)
3801 {
3802         unsigned long end_time;
3803         unsigned long flags;
3804
3805         spin_lock_irqsave(&info->lock,flags);
3806         reset_device(info);
3807
3808         info->testing_irq = true;
3809         hdlc_mode(info);
3810
3811         info->irq_occurred = false;
3812
3813         /* init hdlc mode */
3814
3815         irq_enable(info, CHA, IRQ_TIMER);
3816         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3817         issue_command(info, CHA, CMD_START_TIMER);
3818
3819         spin_unlock_irqrestore(&info->lock,flags);
3820
3821         end_time=100;
3822         while(end_time-- && !info->irq_occurred) {
3823                 msleep_interruptible(10);
3824         }
3825
3826         info->testing_irq = false;
3827
3828         spin_lock_irqsave(&info->lock,flags);
3829         reset_device(info);
3830         spin_unlock_irqrestore(&info->lock,flags);
3831
3832         return info->irq_occurred;
3833 }
3834
3835 static int adapter_test(MGSLPC_INFO *info)
3836 {
3837         if (!register_test(info)) {
3838                 info->init_error = DiagStatus_AddressFailure;
3839                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3840                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3841                 return -ENODEV;
3842         }
3843
3844         if (!irq_test(info)) {
3845                 info->init_error = DiagStatus_IrqFailure;
3846                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3847                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3848                 return -ENODEV;
3849         }
3850
3851         if (debug_level >= DEBUG_LEVEL_INFO)
3852                 printk("%s(%d):device %s passed diagnostics\n",
3853                         __FILE__,__LINE__,info->device_name);
3854         return 0;
3855 }
3856
3857 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3858 {
3859         int i;
3860         int linecount;
3861         if (xmit)
3862                 printk("%s tx data:\n",info->device_name);
3863         else
3864                 printk("%s rx data:\n",info->device_name);
3865
3866         while(count) {
3867                 if (count > 16)
3868                         linecount = 16;
3869                 else
3870                         linecount = count;
3871
3872                 for(i=0;i<linecount;i++)
3873                         printk("%02X ",(unsigned char)data[i]);
3874                 for(;i<17;i++)
3875                         printk("   ");
3876                 for(i=0;i<linecount;i++) {
3877                         if (data[i]>=040 && data[i]<=0176)
3878                                 printk("%c",data[i]);
3879                         else
3880                                 printk(".");
3881                 }
3882                 printk("\n");
3883
3884                 data  += linecount;
3885                 count -= linecount;
3886         }
3887 }
3888
3889 /* HDLC frame time out
3890  * update stats and do tx completion processing
3891  */
3892 static void tx_timeout(unsigned long context)
3893 {
3894         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3895         unsigned long flags;
3896
3897         if ( debug_level >= DEBUG_LEVEL_INFO )
3898                 printk( "%s(%d):tx_timeout(%s)\n",
3899                         __FILE__,__LINE__,info->device_name);
3900         if(info->tx_active &&
3901            info->params.mode == MGSL_MODE_HDLC) {
3902                 info->icount.txtimeout++;
3903         }
3904         spin_lock_irqsave(&info->lock,flags);
3905         info->tx_active = false;
3906         info->tx_count = info->tx_put = info->tx_get = 0;
3907
3908         spin_unlock_irqrestore(&info->lock,flags);
3909
3910 #if SYNCLINK_GENERIC_HDLC
3911         if (info->netcount)
3912                 hdlcdev_tx_done(info);
3913         else
3914 #endif
3915         {
3916                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3917                 bh_transmit(info, tty);
3918                 tty_kref_put(tty);
3919         }
3920 }
3921
3922 #if SYNCLINK_GENERIC_HDLC
3923
3924 /**
3925  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3926  * set encoding and frame check sequence (FCS) options
3927  *
3928  * dev       pointer to network device structure
3929  * encoding  serial encoding setting
3930  * parity    FCS setting
3931  *
3932  * returns 0 if success, otherwise error code
3933  */
3934 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3935                           unsigned short parity)
3936 {
3937         MGSLPC_INFO *info = dev_to_port(dev);
3938         struct tty_struct *tty;
3939         unsigned char  new_encoding;
3940         unsigned short new_crctype;
3941
3942         /* return error if TTY interface open */
3943         if (info->port.count)
3944                 return -EBUSY;
3945
3946         switch (encoding)
3947         {
3948         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3949         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3950         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3951         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3952         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3953         default: return -EINVAL;
3954         }
3955
3956         switch (parity)
3957         {
3958         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3959         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3960         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3961         default: return -EINVAL;
3962         }
3963
3964         info->params.encoding = new_encoding;
3965         info->params.crc_type = new_crctype;
3966
3967         /* if network interface up, reprogram hardware */
3968         if (info->netcount) {
3969                 tty = tty_port_tty_get(&info->port);
3970                 mgslpc_program_hw(info, tty);
3971                 tty_kref_put(tty);
3972         }
3973
3974         return 0;
3975 }
3976
3977 /**
3978  * called by generic HDLC layer to send frame
3979  *
3980  * skb  socket buffer containing HDLC frame
3981  * dev  pointer to network device structure
3982  */
3983 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3984                                       struct net_device *dev)
3985 {
3986         MGSLPC_INFO *info = dev_to_port(dev);
3987         unsigned long flags;
3988
3989         if (debug_level >= DEBUG_LEVEL_INFO)
3990                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
3991
3992         /* stop sending until this frame completes */
3993         netif_stop_queue(dev);
3994
3995         /* copy data to device buffers */
3996         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3997         info->tx_get = 0;
3998         info->tx_put = info->tx_count = skb->len;
3999
4000         /* update network statistics */
4001         dev->stats.tx_packets++;
4002         dev->stats.tx_bytes += skb->len;
4003
4004         /* done with socket buffer, so free it */
4005         dev_kfree_skb(skb);
4006
4007         /* save start time for transmit timeout detection */
4008         dev->trans_start = jiffies;
4009
4010         /* start hardware transmitter if necessary */
4011         spin_lock_irqsave(&info->lock,flags);
4012         if (!info->tx_active) {
4013                 struct tty_struct *tty = tty_port_tty_get(&info->port);
4014                 tx_start(info, tty);
4015                 tty_kref_put(tty);
4016         }
4017         spin_unlock_irqrestore(&info->lock,flags);
4018
4019         return NETDEV_TX_OK;
4020 }
4021
4022 /**
4023  * called by network layer when interface enabled
4024  * claim resources and initialize hardware
4025  *
4026  * dev  pointer to network device structure
4027  *
4028  * returns 0 if success, otherwise error code
4029  */
4030 static int hdlcdev_open(struct net_device *dev)
4031 {
4032         MGSLPC_INFO *info = dev_to_port(dev);
4033         struct tty_struct *tty;
4034         int rc;
4035         unsigned long flags;
4036
4037         if (debug_level >= DEBUG_LEVEL_INFO)
4038                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4039
4040         /* generic HDLC layer open processing */
4041         if ((rc = hdlc_open(dev)))
4042                 return rc;
4043
4044         /* arbitrate between network and tty opens */
4045         spin_lock_irqsave(&info->netlock, flags);
4046         if (info->port.count != 0 || info->netcount != 0) {
4047                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4048                 spin_unlock_irqrestore(&info->netlock, flags);
4049                 return -EBUSY;
4050         }
4051         info->netcount=1;
4052         spin_unlock_irqrestore(&info->netlock, flags);
4053
4054         tty = tty_port_tty_get(&info->port);
4055         /* claim resources and init adapter */
4056         if ((rc = startup(info, tty)) != 0) {
4057                 tty_kref_put(tty);
4058                 spin_lock_irqsave(&info->netlock, flags);
4059                 info->netcount=0;
4060                 spin_unlock_irqrestore(&info->netlock, flags);
4061                 return rc;
4062         }
4063         /* assert DTR and RTS, apply hardware settings */
4064         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4065         mgslpc_program_hw(info, tty);
4066         tty_kref_put(tty);
4067
4068         /* enable network layer transmit */
4069         dev->trans_start = jiffies;
4070         netif_start_queue(dev);
4071
4072         /* inform generic HDLC layer of current DCD status */
4073         spin_lock_irqsave(&info->lock, flags);
4074         get_signals(info);
4075         spin_unlock_irqrestore(&info->lock, flags);
4076         if (info->serial_signals & SerialSignal_DCD)
4077                 netif_carrier_on(dev);
4078         else
4079                 netif_carrier_off(dev);
4080         return 0;
4081 }
4082
4083 /**
4084  * called by network layer when interface is disabled
4085  * shutdown hardware and release resources
4086  *
4087  * dev  pointer to network device structure
4088  *
4089  * returns 0 if success, otherwise error code
4090  */
4091 static int hdlcdev_close(struct net_device *dev)
4092 {
4093         MGSLPC_INFO *info = dev_to_port(dev);
4094         struct tty_struct *tty = tty_port_tty_get(&info->port);
4095         unsigned long flags;
4096
4097         if (debug_level >= DEBUG_LEVEL_INFO)
4098                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4099
4100         netif_stop_queue(dev);
4101
4102         /* shutdown adapter and release resources */
4103         shutdown(info, tty);
4104         tty_kref_put(tty);
4105         hdlc_close(dev);
4106
4107         spin_lock_irqsave(&info->netlock, flags);
4108         info->netcount=0;
4109         spin_unlock_irqrestore(&info->netlock, flags);
4110
4111         return 0;
4112 }
4113
4114 /**
4115  * called by network layer to process IOCTL call to network device
4116  *
4117  * dev  pointer to network device structure
4118  * ifr  pointer to network interface request structure
4119  * cmd  IOCTL command code
4120  *
4121  * returns 0 if success, otherwise error code
4122  */
4123 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4124 {
4125         const size_t size = sizeof(sync_serial_settings);
4126         sync_serial_settings new_line;
4127         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4128         MGSLPC_INFO *info = dev_to_port(dev);
4129         unsigned int flags;
4130
4131         if (debug_level >= DEBUG_LEVEL_INFO)
4132                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4133
4134         /* return error if TTY interface open */
4135         if (info->port.count)
4136                 return -EBUSY;
4137
4138         if (cmd != SIOCWANDEV)
4139                 return hdlc_ioctl(dev, ifr, cmd);
4140
4141         switch(ifr->ifr_settings.type) {
4142         case IF_GET_IFACE: /* return current sync_serial_settings */
4143
4144                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4145                 if (ifr->ifr_settings.size < size) {
4146                         ifr->ifr_settings.size = size; /* data size wanted */
4147                         return -ENOBUFS;
4148                 }
4149
4150                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4151                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4152                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4153                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4154
4155                 switch (flags){
4156                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4157                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4158                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4159                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4160                 default: new_line.clock_type = CLOCK_DEFAULT;
4161                 }
4162
4163                 new_line.clock_rate = info->params.clock_speed;
4164                 new_line.loopback   = info->params.loopback ? 1:0;
4165
4166                 if (copy_to_user(line, &new_line, size))
4167                         return -EFAULT;
4168                 return 0;
4169
4170         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4171
4172                 if(!capable(CAP_NET_ADMIN))
4173                         return -EPERM;
4174                 if (copy_from_user(&new_line, line, size))
4175                         return -EFAULT;
4176
4177                 switch (new_line.clock_type)
4178                 {
4179                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4180                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4181                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4182                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4183                 case CLOCK_DEFAULT:  flags = info->params.flags &
4184                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4185                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4186                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4187                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4188                 default: return -EINVAL;
4189                 }
4190
4191                 if (new_line.loopback != 0 && new_line.loopback != 1)
4192                         return -EINVAL;
4193
4194                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4195                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4196                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4197                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4198                 info->params.flags |= flags;
4199
4200                 info->params.loopback = new_line.loopback;
4201
4202                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4203                         info->params.clock_speed = new_line.clock_rate;
4204                 else
4205                         info->params.clock_speed = 0;
4206
4207                 /* if network interface up, reprogram hardware */
4208                 if (info->netcount) {
4209                         struct tty_struct *tty = tty_port_tty_get(&info->port);
4210                         mgslpc_program_hw(info, tty);
4211                         tty_kref_put(tty);
4212                 }
4213                 return 0;
4214
4215         default:
4216                 return hdlc_ioctl(dev, ifr, cmd);
4217         }
4218 }
4219
4220 /**
4221  * called by network layer when transmit timeout is detected
4222  *
4223  * dev  pointer to network device structure
4224  */
4225 static void hdlcdev_tx_timeout(struct net_device *dev)
4226 {
4227         MGSLPC_INFO *info = dev_to_port(dev);
4228         unsigned long flags;
4229
4230         if (debug_level >= DEBUG_LEVEL_INFO)
4231                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4232
4233         dev->stats.tx_errors++;
4234         dev->stats.tx_aborted_errors++;
4235
4236         spin_lock_irqsave(&info->lock,flags);
4237         tx_stop(info);
4238         spin_unlock_irqrestore(&info->lock,flags);
4239
4240         netif_wake_queue(dev);
4241 }
4242
4243 /**
4244  * called by device driver when transmit completes
4245  * reenable network layer transmit if stopped
4246  *
4247  * info  pointer to device instance information
4248  */
4249 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4250 {
4251         if (netif_queue_stopped(info->netdev))
4252                 netif_wake_queue(info->netdev);
4253 }
4254
4255 /**
4256  * called by device driver when frame received
4257  * pass frame to network layer
4258  *
4259  * info  pointer to device instance information
4260  * buf   pointer to buffer contianing frame data
4261  * size  count of data bytes in buf
4262  */
4263 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4264 {
4265         struct sk_buff *skb = dev_alloc_skb(size);
4266         struct net_device *dev = info->netdev;
4267
4268         if (debug_level >= DEBUG_LEVEL_INFO)
4269                 printk("hdlcdev_rx(%s)\n",dev->name);
4270
4271         if (skb == NULL) {
4272                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4273                 dev->stats.rx_dropped++;
4274                 return;
4275         }
4276
4277         memcpy(skb_put(skb, size), buf, size);
4278
4279         skb->protocol = hdlc_type_trans(skb, dev);
4280
4281         dev->stats.rx_packets++;
4282         dev->stats.rx_bytes += size;
4283
4284         netif_rx(skb);
4285 }
4286
4287 static const struct net_device_ops hdlcdev_ops = {
4288         .ndo_open       = hdlcdev_open,
4289         .ndo_stop       = hdlcdev_close,
4290         .ndo_change_mtu = hdlc_change_mtu,
4291         .ndo_start_xmit = hdlc_start_xmit,
4292         .ndo_do_ioctl   = hdlcdev_ioctl,
4293         .ndo_tx_timeout = hdlcdev_tx_timeout,
4294 };
4295
4296 /**
4297  * called by device driver when adding device instance
4298  * do generic HDLC initialization
4299  *
4300  * info  pointer to device instance information
4301  *
4302  * returns 0 if success, otherwise error code
4303  */
4304 static int hdlcdev_init(MGSLPC_INFO *info)
4305 {
4306         int rc;
4307         struct net_device *dev;
4308         hdlc_device *hdlc;
4309
4310         /* allocate and initialize network and HDLC layer objects */
4311
4312         if (!(dev = alloc_hdlcdev(info))) {
4313                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4314                 return -ENOMEM;
4315         }
4316
4317         /* for network layer reporting purposes only */
4318         dev->base_addr = info->io_base;
4319         dev->irq       = info->irq_level;
4320
4321         /* network layer callbacks and settings */
4322         dev->netdev_ops     = &hdlcdev_ops;
4323         dev->watchdog_timeo = 10 * HZ;
4324         dev->tx_queue_len   = 50;
4325
4326         /* generic HDLC layer callbacks and settings */
4327         hdlc         = dev_to_hdlc(dev);
4328         hdlc->attach = hdlcdev_attach;
4329         hdlc->xmit   = hdlcdev_xmit;
4330
4331         /* register objects with HDLC layer */
4332         if ((rc = register_hdlc_device(dev))) {
4333                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4334                 free_netdev(dev);
4335                 return rc;
4336         }
4337
4338         info->netdev = dev;
4339         return 0;
4340 }
4341
4342 /**
4343  * called by device driver when removing device instance
4344  * do generic HDLC cleanup
4345  *
4346  * info  pointer to device instance information
4347  */
4348 static void hdlcdev_exit(MGSLPC_INFO *info)
4349 {
4350         unregister_hdlc_device(info->netdev);
4351         free_netdev(info->netdev);
4352         info->netdev = NULL;
4353 }
4354
4355 #endif /* CONFIG_HDLC */
4356