drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003, 2006 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  *
  32  */
  33
  34 /* The DEBUG define must be before common to enable debugging */
  35 /* #define DEBUG        */
  36
  37 #include <common.h>
  38
  39 #ifdef  CFG_FLASH_CFI_DRIVER
  40
  41 #include <watchdog.h>
  42 #include <asm/processor.h>
  43 #include <asm/byteorder.h>
  44 #include <environment.h>
  45
  46 /*
  47  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  48  * The width of the port and the width of the chips are determined at initialization.
  49  * These widths are used to calculate the address for access CFI data structures.
  50  *
  51  * References
  52  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  53  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  54  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  55  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  56  * AMD CFI Specification, Release 2.0 December 1, 2001
  57  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  58  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  59  *
  60  */
  61
  62 #if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
  63 #define CFG_FLASH_CFI_SWAP
  64 #endif
  65
  66 #ifndef CFG_FLASH_BANKS_LIST
  67 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  68 #endif
  69
  70 #define FLASH_CMD_CFI                   0x98
  71 #define FLASH_CMD_READ_ID               0x90
  72 #define FLASH_CMD_RESET                 0xff
  73 #define FLASH_CMD_BLOCK_ERASE           0x20
  74 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  75 #define FLASH_CMD_WRITE                 0x40
  76 #define FLASH_CMD_PROTECT               0x60
  77 #define FLASH_CMD_PROTECT_SET           0x01
  78 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  79 #define FLASH_CMD_CLEAR_STATUS          0x50
  80 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  82
  83 #define FLASH_STATUS_DONE               0x80
  84 #define FLASH_STATUS_ESS                0x40
  85 #define FLASH_STATUS_ECLBS              0x20
  86 #define FLASH_STATUS_PSLBS              0x10
  87 #define FLASH_STATUS_VPENS              0x08
  88 #define FLASH_STATUS_PSS                0x04
  89 #define FLASH_STATUS_DPS                0x02
  90 #define FLASH_STATUS_R                  0x01
  91 #define FLASH_STATUS_PROTECT            0x01
  92
  93 #define AMD_CMD_RESET                   0xF0
  94 #define AMD_CMD_WRITE                   0xA0
  95 #define AMD_CMD_ERASE_START             0x80
  96 #define AMD_CMD_ERASE_SECTOR            0x30
  97 #define AMD_CMD_UNLOCK_START            0xAA
  98 #define AMD_CMD_UNLOCK_ACK              0x55
  99 #define AMD_CMD_WRITE_TO_BUFFER         0x25
 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 101
 102 #define AMD_STATUS_TOGGLE               0x40
 103 #define AMD_STATUS_ERROR                0x20
 104
 105 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 106 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 107 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 108
 109 #define FLASH_OFFSET_MANUFACTURER_ID    0x00
 110 #define FLASH_OFFSET_DEVICE_ID          0x01
 111 #define FLASH_OFFSET_DEVICE_ID2         0x0E
 112 #define FLASH_OFFSET_DEVICE_ID3         0x0F
 113 #define FLASH_OFFSET_CFI                0x55
 114 #define FLASH_OFFSET_CFI_RESP           0x10
 115 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 116 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15    /* extended query table primary addr */
 117 #define FLASH_OFFSET_WTOUT              0x1F
 118 #define FLASH_OFFSET_WBTOUT             0x20
 119 #define FLASH_OFFSET_ETOUT              0x21
 120 #define FLASH_OFFSET_CETOUT             0x22
 121 #define FLASH_OFFSET_WMAX_TOUT          0x23
 122 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 123 #define FLASH_OFFSET_EMAX_TOUT          0x25
 124 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 125 #define FLASH_OFFSET_SIZE               0x27
 126 #define FLASH_OFFSET_INTERFACE          0x28
 127 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 128 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 129 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 130 #define FLASH_OFFSET_PROTECT            0x02
 131 #define FLASH_OFFSET_USER_PROTECTION    0x85
 132 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 133
 134 #define CFI_CMDSET_NONE                 0
 135 #define CFI_CMDSET_INTEL_EXTENDED       1
 136 #define CFI_CMDSET_AMD_STANDARD         2
 137 #define CFI_CMDSET_INTEL_STANDARD       3
 138 #define CFI_CMDSET_AMD_EXTENDED         4
 139 #define CFI_CMDSET_MITSU_STANDARD       256
 140 #define CFI_CMDSET_MITSU_EXTENDED       257
 141 #define CFI_CMDSET_SST                  258
 142
 143 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 144 # undef  FLASH_CMD_RESET
 145 # define FLASH_CMD_RESET        AMD_CMD_RESET /* use AMD-Reset instead */
 146 #endif
 147
 148 typedef union {
 149         unsigned char c;
 150         unsigned short w;
 151         unsigned long l;
 152         unsigned long long ll;
 153 } cfiword_t;
 154
 155 typedef union {
 156         volatile unsigned char *cp;
 157         volatile unsigned short *wp;
 158         volatile unsigned long *lp;
 159         volatile unsigned long long *llp;
 160 } cfiptr_t;
 161
 162 #define NUM_ERASE_REGIONS       4 /* max. number of erase regions */
 163
 164 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 165 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 166 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 167 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 168 #else
 169 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 170 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 171 #endif
 172
 173 /*
 174  * Check if chip width is defined. If not, start detecting with 8bit.
 175  */
 176 #ifndef CFG_FLASH_CFI_WIDTH
 177 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 178 #endif
 179
 180
 181 /*-----------------------------------------------------------------------
 182  * Functions
 183  */
 184
 185 typedef unsigned long flash_sect_t;
 186
 187 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 188 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 189 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 190 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 191 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 192 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 193 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 194 static void flash_read_jedec_ids (flash_info_t * info);
 195 static int flash_detect_cfi (flash_info_t * info);
 196 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 197 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 198                                     ulong tout, char *prompt);
 199 ulong flash_get_size (ulong base, int banknum);
 200 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 201 static flash_info_t *flash_get_info(ulong base);
 202 #endif
 203 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 204 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 205 #endif
 206
 207 /*-----------------------------------------------------------------------
 208  * create an address based on the offset and the port width
 209  */
 210 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 211 {
 212         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 213 }
 214
 215 #ifdef DEBUG
 216 /*-----------------------------------------------------------------------
 217  * Debug support
 218  */
 219 void print_longlong (char *str, unsigned long long data)
 220 {
 221         int i;
 222         char *cp;
 223
 224         cp = (unsigned char *) &data;
 225         for (i = 0; i < 8; i++)
 226                 sprintf (&str[i * 2], "%2.2x", *cp++);
 227 }
 228 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 229 {
 230         cfiptr_t cptr;
 231         int x, y;
 232
 233         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 234                 cptr.cp =
 235                         flash_make_addr (info, sect,
 236                                          x + FLASH_OFFSET_CFI_RESP);
 237                 debug ("%p : ", cptr.cp);
 238                 for (y = 0; y < 16; y++) {
 239                         debug ("%2.2x ", cptr.cp[y]);
 240                 }
 241                 debug (" ");
 242                 for (y = 0; y < 16; y++) {
 243                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 244                                 debug ("%c", cptr.cp[y]);
 245                         } else {
 246                                 debug (".");
 247                         }
 248                 }
 249                 debug ("\n");
 250         }
 251 }
 252 #endif
 253
 254
 255 /*-----------------------------------------------------------------------
 256  * read a character at a port width address
 257  */
 258 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 259 {
 260         uchar *cp;
 261
 262         cp = flash_make_addr (info, 0, offset);
 263 #if defined(CFG_FLASH_CFI_SWAP)
 264         return (cp[0]);
 265 #else
 266         return (cp[info->portwidth - 1]);
 267 #endif
 268 }
 269
 270 /*-----------------------------------------------------------------------
 271  * read a short word by swapping for ppc format.
 272  */
 273 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 274 {
 275         uchar *addr;
 276         ushort retval;
 277
 278 #ifdef DEBUG
 279         int x;
 280 #endif
 281         addr = flash_make_addr (info, sect, offset);
 282
 283 #ifdef DEBUG
 284         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 285                info->portwidth);
 286         for (x = 0; x < 2 * info->portwidth; x++) {
 287                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 288         }
 289 #endif
 290 #if defined(CFG_FLASH_CFI_SWAP)
 291         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 292 #else
 293         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 294                   addr[info->portwidth - 1]);
 295 #endif
 296
 297         debug ("retval = 0x%x\n", retval);
 298         return retval;
 299 }
 300
 301 /*-----------------------------------------------------------------------
 302  * read a long word by picking the least significant byte of each maximum
 303  * port size word. Swap for ppc format.
 304  */
 305 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 306 {
 307         uchar *addr;
 308         ulong retval;
 309
 310 #ifdef DEBUG
 311         int x;
 312 #endif
 313         addr = flash_make_addr (info, sect, offset);
 314
 315 #ifdef DEBUG
 316         debug ("long addr is at %p info->portwidth = %d\n", addr,
 317                info->portwidth);
 318         for (x = 0; x < 4 * info->portwidth; x++) {
 319                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 320         }
 321 #endif
 322 #if defined(CFG_FLASH_CFI_SWAP)
 323         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 324                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 325 #else
 326         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 327                 (addr[(info->portwidth) - 1] << 16) |
 328                 (addr[(4 * info->portwidth) - 1] << 8) |
 329                 addr[(3 * info->portwidth) - 1];
 330 #endif
 331         return retval;
 332 }
 333
 334
 335 /*-----------------------------------------------------------------------
 336  */
 337 unsigned long flash_init (void)
 338 {
 339         unsigned long size = 0;
 340         int i;
 341
 342 #ifdef CFG_FLASH_PROTECTION
 343         char *s = getenv("unlock");
 344 #endif
 345
 346         /* Init: no FLASHes known */
 347         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 348                 flash_info[i].flash_id = FLASH_UNKNOWN;
 349                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 350                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 351 #ifndef CFG_FLASH_QUIET_TEST
 352                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 353                                 i, flash_info[i].size, flash_info[i].size << 20);
 354 #endif /* CFG_FLASH_QUIET_TEST */
 355                 }
 356 #ifdef CFG_FLASH_PROTECTION
 357                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 358                         /*
 359                          * Only the U-Boot image and it's environment is protected,
 360                          * all other sectors are unprotected (unlocked) if flash
 361                          * hardware protection is used (CFG_FLASH_PROTECTION) and
 362                          * the environment variable "unlock" is set to "yes".
 363                          */
 364                         if (flash_info[i].legacy_unlock) {
 365                                 int k;
 366
 367                                 /*
 368                                  * Disable legacy_unlock temporarily, since
 369                                  * flash_real_protect would relock all other sectors
 370                                  * again otherwise.
 371                                  */
 372                                 flash_info[i].legacy_unlock = 0;
 373
 374                                 /*
 375                                  * Legacy unlocking (e.g. Intel J3) -> unlock only one
 376                                  * sector. This will unlock all sectors.
 377                                  */
 378                                 flash_real_protect (&flash_info[i], 0, 0);
 379
 380                                 flash_info[i].legacy_unlock = 1;
 381
 382                                 /*
 383                                  * Manually mark other sectors as unlocked (unprotected)
 384                                  */
 385                                 for (k = 1; k < flash_info[i].sector_count; k++)
 386                                         flash_info[i].protect[k] = 0;
 387                         } else {
 388                                 /*
 389                                  * No legancy unlocking -> unlock all sectors
 390                                  */
 391                                 flash_protect (FLAG_PROTECT_CLEAR,
 392                                                flash_info[i].start[0],
 393                                                flash_info[i].start[0] + flash_info[i].size - 1,
 394                                                &flash_info[i]);
 395                         }
 396                 }
 397 #endif /* CFG_FLASH_PROTECTION */
 398         }
 399
 400         /* Monitor protection ON by default */
 401 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 402         flash_protect (FLAG_PROTECT_SET,
 403                        CFG_MONITOR_BASE,
 404                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 405                        flash_get_info(CFG_MONITOR_BASE));
 406 #endif
 407
 408         /* Environment protection ON by default */
 409 #ifdef CFG_ENV_IS_IN_FLASH
 410         flash_protect (FLAG_PROTECT_SET,
 411                        CFG_ENV_ADDR,
 412                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 413                        flash_get_info(CFG_ENV_ADDR));
 414 #endif
 415
 416         /* Redundant environment protection ON by default */
 417 #ifdef CFG_ENV_ADDR_REDUND
 418         flash_protect (FLAG_PROTECT_SET,
 419                        CFG_ENV_ADDR_REDUND,
 420                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 421                        flash_get_info(CFG_ENV_ADDR_REDUND));
 422 #endif
 423         return (size);
 424 }
 425
 426 /*-----------------------------------------------------------------------
 427  */
 428 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 429 static flash_info_t *flash_get_info(ulong base)
 430 {
 431         int i;
 432         flash_info_t * info = 0;
 433
 434         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 435                 info = & flash_info[i];
 436                 if (info->size && info->start[0] <= base &&
 437                     base <= info->start[0] + info->size - 1)
 438                         break;
 439         }
 440
 441         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 442 }
 443 #endif
 444
 445 /*-----------------------------------------------------------------------
 446  */
 447 int flash_erase (flash_info_t * info, int s_first, int s_last)
 448 {
 449         int rcode = 0;
 450         int prot;
 451         flash_sect_t sect;
 452
 453         if (info->flash_id != FLASH_MAN_CFI) {
 454                 puts ("Can't erase unknown flash type - aborted\n");
 455                 return 1;
 456         }
 457         if ((s_first < 0) || (s_first > s_last)) {
 458                 puts ("- no sectors to erase\n");
 459                 return 1;
 460         }
 461
 462         prot = 0;
 463         for (sect = s_first; sect <= s_last; ++sect) {
 464                 if (info->protect[sect]) {
 465                         prot++;
 466                 }
 467         }
 468         if (prot) {
 469                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 470         } else {
 471                 putc ('\n');
 472         }
 473
 474
 475         for (sect = s_first; sect <= s_last; sect++) {
 476                 if (info->protect[sect] == 0) { /* not protected */
 477                         switch (info->vendor) {
 478                         case CFI_CMDSET_INTEL_STANDARD:
 479                         case CFI_CMDSET_INTEL_EXTENDED:
 480                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 481                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 482                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 483                                 break;
 484                         case CFI_CMDSET_AMD_STANDARD:
 485                         case CFI_CMDSET_AMD_EXTENDED:
 486                                 flash_unlock_seq (info, sect);
 487                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 488                                                         AMD_CMD_ERASE_START);
 489                                 flash_unlock_seq (info, sect);
 490                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 491                                 break;
 492                         default:
 493                                 debug ("Unkown flash vendor %d\n",
 494                                        info->vendor);
 495                                 break;
 496                         }
 497
 498                         if (flash_full_status_check
 499                             (info, sect, info->erase_blk_tout, "erase")) {
 500                                 rcode = 1;
 501                         } else
 502                                 putc ('.');
 503                 }
 504         }
 505         puts (" done\n");
 506         return rcode;
 507 }
 508
 509 /*-----------------------------------------------------------------------
 510  */
 511 void flash_print_info (flash_info_t * info)
 512 {
 513         int i;
 514
 515         if (info->flash_id != FLASH_MAN_CFI) {
 516                 puts ("missing or unknown FLASH type\n");
 517                 return;
 518         }
 519
 520         printf ("CFI conformant FLASH (%d x %d)",
 521                 (info->portwidth << 3), (info->chipwidth << 3));
 522         printf ("  Size: %ld MB in %d Sectors\n",
 523                 info->size >> 20, info->sector_count);
 524         printf ("  ");
 525         switch (info->vendor) {
 526                 case CFI_CMDSET_INTEL_STANDARD:
 527                         printf ("Intel Standard");
 528                         break;
 529                 case CFI_CMDSET_INTEL_EXTENDED:
 530                         printf ("Intel Extended");
 531                         break;
 532                 case CFI_CMDSET_AMD_STANDARD:
 533                         printf ("AMD Standard");
 534                         break;
 535                 case CFI_CMDSET_AMD_EXTENDED:
 536                         printf ("AMD Extended");
 537                         break;
 538                 default:
 539                         printf ("Unknown (%d)", info->vendor);
 540                         break;
 541         }
 542         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
 543                 info->manufacturer_id, info->device_id);
 544         if (info->device_id == 0x7E) {
 545                 printf("%04X", info->device_id2);
 546         }
 547         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 548                 info->erase_blk_tout,
 549                 info->write_tout);
 550         if (info->buffer_size > 1) {
 551                 printf ("  Buffer write timeout: %ld ms, buffer size: %d bytes\n",
 552                 info->buffer_write_tout,
 553                 info->buffer_size);
 554         }
 555
 556         puts ("\n  Sector Start Addresses:");
 557         for (i = 0; i < info->sector_count; ++i) {
 558                 if ((i % 5) == 0)
 559                         printf ("\n");
 560 #ifdef CFG_FLASH_EMPTY_INFO
 561                 int k;
 562                 int size;
 563                 int erased;
 564                 volatile unsigned long *flash;
 565
 566                 /*
 567                  * Check if whole sector is erased
 568                  */
 569                 if (i != (info->sector_count - 1))
 570                         size = info->start[i + 1] - info->start[i];
 571                 else
 572                         size = info->start[0] + info->size - info->start[i];
 573                 erased = 1;
 574                 flash = (volatile unsigned long *) info->start[i];
 575                 size = size >> 2;       /* divide by 4 for longword access */
 576                 for (k = 0; k < size; k++) {
 577                         if (*flash++ != 0xffffffff) {
 578                                 erased = 0;
 579                                 break;
 580                         }
 581                 }
 582
 583                 /* print empty and read-only info */
 584                 printf ("  %08lX %c %s ",
 585                         info->start[i],
 586                         erased ? 'E' : ' ',
 587                         info->protect[i] ? "RO" : "  ");
 588 #else   /* ! CFG_FLASH_EMPTY_INFO */
 589                 printf ("  %08lX   %s ",
 590                         info->start[i],
 591                         info->protect[i] ? "RO" : "  ");
 592 #endif
 593         }
 594         putc ('\n');
 595         return;
 596 }
 597
 598 /*-----------------------------------------------------------------------
 599  * Copy memory to flash, returns:
 600  * 0 - OK
 601  * 1 - write timeout
 602  * 2 - Flash not erased
 603  */
 604 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 605 {
 606         ulong wp;
 607         ulong cp;
 608         int aln;
 609         cfiword_t cword;
 610         int i, rc;
 611
 612 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 613         int buffered_size;
 614 #endif
 615         /* get lower aligned address */
 616         /* get lower aligned address */
 617         wp = (addr & ~(info->portwidth - 1));
 618
 619         /* handle unaligned start */
 620         if ((aln = addr - wp) != 0) {
 621                 cword.l = 0;
 622                 cp = wp;
 623                 for (i = 0; i < aln; ++i, ++cp)
 624                         flash_add_byte (info, &cword, (*(uchar *) cp));
 625
 626                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 627                         flash_add_byte (info, &cword, *src++);
 628                         cnt--;
 629                         cp++;
 630                 }
 631                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 632                         flash_add_byte (info, &cword, (*(uchar *) cp));
 633                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 634                         return rc;
 635                 wp = cp;
 636         }
 637
 638         /* handle the aligned part */
 639 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 640         buffered_size = (info->portwidth / info->chipwidth);
 641         buffered_size *= info->buffer_size;
 642         while (cnt >= info->portwidth) {
 643                 /* prohibit buffer write when buffer_size is 1 */
 644                 if (info->buffer_size == 1) {
 645                         cword.l = 0;
 646                         for (i = 0; i < info->portwidth; i++)
 647                                 flash_add_byte (info, &cword, *src++);
 648                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 649                                 return rc;
 650                         wp += info->portwidth;
 651                         cnt -= info->portwidth;
 652                         continue;
 653                 }
 654
 655                 /* write buffer until next buffered_size aligned boundary */
 656                 i = buffered_size - (wp % buffered_size);
 657                 if (i > cnt)
 658                         i = cnt;
 659                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 660                         return rc;
 661                 i -= i & (info->portwidth - 1);
 662                 wp += i;
 663                 src += i;
 664                 cnt -= i;
 665         }
 666 #else
 667         while (cnt >= info->portwidth) {
 668                 cword.l = 0;
 669                 for (i = 0; i < info->portwidth; i++) {
 670                         flash_add_byte (info, &cword, *src++);
 671                 }
 672                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 673                         return rc;
 674                 wp += info->portwidth;
 675                 cnt -= info->portwidth;
 676         }
 677 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 678         if (cnt == 0) {
 679                 return (0);
 680         }
 681
 682         /*
 683          * handle unaligned tail bytes
 684          */
 685         cword.l = 0;
 686         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 687                 flash_add_byte (info, &cword, *src++);
 688                 --cnt;
 689         }
 690         for (; i < info->portwidth; ++i, ++cp) {
 691                 flash_add_byte (info, &cword, (*(uchar *) cp));
 692         }
 693
 694         return flash_write_cfiword (info, wp, cword);
 695 }
 696
 697 /*-----------------------------------------------------------------------
 698  */
 699 #ifdef CFG_FLASH_PROTECTION
 700
 701 int flash_real_protect (flash_info_t * info, long sector, int prot)
 702 {
 703         int retcode = 0;
 704
 705         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 706         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 707         if (prot)
 708                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 709         else
 710                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 711
 712         if ((retcode =
 713              flash_full_status_check (info, sector, info->erase_blk_tout,
 714                                       prot ? "protect" : "unprotect")) == 0) {
 715
 716                 info->protect[sector] = prot;
 717
 718                 /*
 719                  * On some of Intel's flash chips (marked via legacy_unlock)
 720                  * unprotect unprotects all locking.
 721                  */
 722                 if ((prot == 0) && (info->legacy_unlock)) {
 723                         flash_sect_t i;
 724
 725                         for (i = 0; i < info->sector_count; i++) {
 726                                 if (info->protect[i])
 727                                         flash_real_protect (info, i, 1);
 728                         }
 729                 }
 730         }
 731         return retcode;
 732 }
 733
 734 /*-----------------------------------------------------------------------
 735  * flash_read_user_serial - read the OneTimeProgramming cells
 736  */
 737 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 738                              int len)
 739 {
 740         uchar *src;
 741         uchar *dst;
 742
 743         dst = buffer;
 744         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 745         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 746         memcpy (dst, src + offset, len);
 747         flash_write_cmd (info, 0, 0, info->cmd_reset);
 748 }
 749
 750 /*
 751  * flash_read_factory_serial - read the device Id from the protection area
 752  */
 753 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 754                                 int len)
 755 {
 756         uchar *src;
 757
 758         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 759         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 760         memcpy (buffer, src + offset, len);
 761         flash_write_cmd (info, 0, 0, info->cmd_reset);
 762 }
 763
 764 #endif /* CFG_FLASH_PROTECTION */
 765
 766 /*
 767  * flash_is_busy - check to see if the flash is busy
 768  * This routine checks the status of the chip and returns true if the chip is busy
 769  */
 770 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 771 {
 772         int retval;
 773
 774         switch (info->vendor) {
 775         case CFI_CMDSET_INTEL_STANDARD:
 776         case CFI_CMDSET_INTEL_EXTENDED:
 777                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 778                 break;
 779         case CFI_CMDSET_AMD_STANDARD:
 780         case CFI_CMDSET_AMD_EXTENDED:
 781                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 782                 break;
 783         default:
 784                 retval = 0;
 785         }
 786         debug ("flash_is_busy: %d\n", retval);
 787         return retval;
 788 }
 789
 790 /*-----------------------------------------------------------------------
 791  *  wait for XSR.7 to be set. Time out with an error if it does not.
 792  *  This routine does not set the flash to read-array mode.
 793  */
 794 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 795                                ulong tout, char *prompt)
 796 {
 797         ulong start;
 798
 799 #if CFG_HZ != 1000
 800         tout *= CFG_HZ/1000;
 801 #endif
 802
 803         /* Wait for command completion */
 804         start = get_timer (0);
 805         while (flash_is_busy (info, sector)) {
 806                 if (get_timer (start) > tout) {
 807                         printf ("Flash %s timeout at address %lx data %lx\n",
 808                                 prompt, info->start[sector],
 809                                 flash_read_long (info, sector, 0));
 810                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 811                         return ERR_TIMOUT;
 812                 }
 813                 udelay (1);             /* also triggers watchdog */
 814         }
 815         return ERR_OK;
 816 }
 817
 818 /*-----------------------------------------------------------------------
 819  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 820  * This routine sets the flash to read-array mode.
 821  */
 822 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 823                                     ulong tout, char *prompt)
 824 {
 825         int retcode;
 826
 827         retcode = flash_status_check (info, sector, tout, prompt);
 828         switch (info->vendor) {
 829         case CFI_CMDSET_INTEL_EXTENDED:
 830         case CFI_CMDSET_INTEL_STANDARD:
 831                 if ((retcode == ERR_OK)
 832                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 833                         retcode = ERR_INVAL;
 834                         printf ("Flash %s error at address %lx\n", prompt,
 835                                 info->start[sector]);
 836                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 837                                 puts ("Command Sequence Error.\n");
 838                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 839                                 puts ("Block Erase Error.\n");
 840                                 retcode = ERR_NOT_ERASED;
 841                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 842                                 puts ("Locking Error\n");
 843                         }
 844                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 845                                 puts ("Block locked.\n");
 846                                 retcode = ERR_PROTECTED;
 847                         }
 848                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 849                                 puts ("Vpp Low Error.\n");
 850                 }
 851                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 852                 break;
 853         default:
 854                 break;
 855         }
 856         return retcode;
 857 }
 858
 859 /*-----------------------------------------------------------------------
 860  */
 861 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 862 {
 863 #if defined(__LITTLE_ENDIAN)
 864         unsigned short  w;
 865         unsigned int    l;
 866         unsigned long long ll;
 867 #endif
 868
 869         switch (info->portwidth) {
 870         case FLASH_CFI_8BIT:
 871                 cword->c = c;
 872                 break;
 873         case FLASH_CFI_16BIT:
 874 #if defined(__LITTLE_ENDIAN)
 875                 w = c;
 876                 w <<= 8;
 877                 cword->w = (cword->w >> 8) | w;
 878 #else
 879                 cword->w = (cword->w << 8) | c;
 880 #endif
 881                 break;
 882         case FLASH_CFI_32BIT:
 883 #if defined(__LITTLE_ENDIAN)
 884                 l = c;
 885                 l <<= 24;
 886                 cword->l = (cword->l >> 8) | l;
 887 #else
 888                 cword->l = (cword->l << 8) | c;
 889 #endif
 890                 break;
 891         case FLASH_CFI_64BIT:
 892 #if defined(__LITTLE_ENDIAN)
 893                 ll = c;
 894                 ll <<= 56;
 895                 cword->ll = (cword->ll >> 8) | ll;
 896 #else
 897                 cword->ll = (cword->ll << 8) | c;
 898 #endif
 899                 break;
 900         }
 901 }
 902
 903
 904 /*-----------------------------------------------------------------------
 905  * make a proper sized command based on the port and chip widths
 906  */
 907 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 908 {
 909         int i;
 910         uchar *cp = (uchar *) cmdbuf;
 911
 912 #if defined(CFG_FLASH_CFI_SWAP)
 913         for (i = info->portwidth; i > 0; i--)
 914 #else
 915         for (i = 1; i <= info->portwidth; i++)
 916 #endif
 917                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 918 #ifdef CFG_FLASH_CFI_2x16
 919         if ((info->portwidth == FLASH_CFI_32BIT) && (info->chipwidth == FLASH_CFI_BY16))
 920         {
 921            uchar tmp;
 922            cp = (uchar *) cmdbuf;
 923            tmp = cp[1];
 924            cp[1] = cp[2];
 925            cp[2] = tmp;
 926         }
 927 #endif /* CFG_FLASH_CFI_2x16 */
 928 }
 929
 930 /*
 931  * Write a proper sized command to the correct address
 932  */
 933 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 934 {
 935
 936         volatile cfiptr_t addr;
 937         cfiword_t cword;
 938
 939         addr.cp = flash_make_addr (info, sect, offset);
 940         flash_make_cmd (info, cmd, &cword);
 941         switch (info->portwidth) {
 942         case FLASH_CFI_8BIT:
 943                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 944                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 945                 *addr.cp = cword.c;
 946 #ifdef CONFIG_BLACKFIN
 947                 asm("ssync;");
 948 #endif
 949                 break;
 950         case FLASH_CFI_16BIT:
 951                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 952                        cmd, cword.w,
 953                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 954                 *addr.wp = cword.w;
 955 #ifdef CONFIG_BLACKFIN
 956                 asm("ssync;");
 957 #endif
 958                 break;
 959         case FLASH_CFI_32BIT:
 960                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 961                        cmd, cword.l,
 962                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 963                 *addr.lp = cword.l;
 964 #ifdef CONFIG_BLACKFIN
 965                 asm("ssync;");
 966 #endif
 967                 break;
 968         case FLASH_CFI_64BIT:
 969 #ifdef DEBUG
 970                 {
 971                         char str[20];
 972
 973                         print_longlong (str, cword.ll);
 974
 975                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 976                                addr.llp, cmd, str,
 977                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 978                 }
 979 #endif
 980                 *addr.llp = cword.ll;
 981 #ifdef CONFIG_BLACKFIN
 982                 asm("ssync;");
 983 #endif
 984                 break;
 985         }
 986 }
 987
 988 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 989 {
 990         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 991         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 992 }
 993
 994 /*-----------------------------------------------------------------------
 995  */
 996 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 997 {
 998         cfiptr_t cptr;
 999         cfiword_t cword;
1000         int retval;
1001
1002         cptr.cp = flash_make_addr (info, sect, offset);
1003         flash_make_cmd (info, cmd, &cword);
1004
1005         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
1006         switch (info->portwidth) {
1007         case FLASH_CFI_8BIT:
1008                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
1009                 retval = (cptr.cp[0] == cword.c);
1010                 break;
1011         case FLASH_CFI_16BIT:
1012                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1013                 retval = (cptr.wp[0] == cword.w);
1014                 break;
1015         case FLASH_CFI_32BIT:
1016                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1017                 retval = (cptr.lp[0] == cword.l);
1018                 break;
1019         case FLASH_CFI_64BIT:
1020 #ifdef DEBUG
1021                 {
1022                         char str1[20];
1023                         char str2[20];
1024
1025                         print_longlong (str1, cptr.llp[0]);
1026                         print_longlong (str2, cword.ll);
1027                         debug ("is= %s %s\n", str1, str2);
1028                 }
1029 #endif
1030                 retval = (cptr.llp[0] == cword.ll);
1031                 break;
1032         default:
1033                 retval = 0;
1034                 break;
1035         }
1036         return retval;
1037 }
1038
1039 /*-----------------------------------------------------------------------
1040  */
1041 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1042 {
1043         cfiptr_t cptr;
1044         cfiword_t cword;
1045         int retval;
1046
1047         cptr.cp = flash_make_addr (info, sect, offset);
1048         flash_make_cmd (info, cmd, &cword);
1049         switch (info->portwidth) {
1050         case FLASH_CFI_8BIT:
1051                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1052                 break;
1053         case FLASH_CFI_16BIT:
1054                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1055                 break;
1056         case FLASH_CFI_32BIT:
1057                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1058                 break;
1059         case FLASH_CFI_64BIT:
1060                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1061                 break;
1062         default:
1063                 retval = 0;
1064                 break;
1065         }
1066         return retval;
1067 }
1068
1069 /*-----------------------------------------------------------------------
1070  */
1071 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1072 {
1073         cfiptr_t cptr;
1074         cfiword_t cword;
1075         int retval;
1076
1077         cptr.cp = flash_make_addr (info, sect, offset);
1078         flash_make_cmd (info, cmd, &cword);
1079         switch (info->portwidth) {
1080         case FLASH_CFI_8BIT:
1081                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1082                 break;
1083         case FLASH_CFI_16BIT:
1084                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1085                 break;
1086         case FLASH_CFI_32BIT:
1087                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1088                 break;
1089         case FLASH_CFI_64BIT:
1090                 retval = ((cptr.llp[0] & cword.ll) !=
1091                           (cptr.llp[0] & cword.ll));
1092                 break;
1093         default:
1094                 retval = 0;
1095                 break;
1096         }
1097         return retval;
1098 }
1099
1100 /*-----------------------------------------------------------------------
1101  * read jedec ids from device and set corresponding fields in info struct
1102  *
1103  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1104  *
1105 */
1106 static void flash_read_jedec_ids (flash_info_t * info)
1107 {
1108         info->manufacturer_id = 0;
1109         info->device_id       = 0;
1110         info->device_id2      = 0;
1111
1112         switch (info->vendor) {
1113         case CFI_CMDSET_INTEL_STANDARD:
1114         case CFI_CMDSET_INTEL_EXTENDED:
1115                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1116                 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1117                 udelay(1000); /* some flash are slow to respond */
1118                 info->manufacturer_id = flash_read_uchar (info,
1119                                                 FLASH_OFFSET_MANUFACTURER_ID);
1120                 info->device_id = flash_read_uchar (info,
1121                                                 FLASH_OFFSET_DEVICE_ID);
1122                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1123                 break;
1124         case CFI_CMDSET_AMD_STANDARD:
1125         case CFI_CMDSET_AMD_EXTENDED:
1126                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1127                 flash_unlock_seq(info, 0);
1128                 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1129                 udelay(1000); /* some flash are slow to respond */
1130                 info->manufacturer_id = flash_read_uchar (info,
1131                                                 FLASH_OFFSET_MANUFACTURER_ID);
1132                 info->device_id = flash_read_uchar (info,
1133                                                 FLASH_OFFSET_DEVICE_ID);
1134                 if (info->device_id == 0x7E) {
1135                         /* AMD 3-byte (expanded) device ids */
1136                         info->device_id2 = flash_read_uchar (info,
1137                                                 FLASH_OFFSET_DEVICE_ID2);
1138                         info->device_id2 <<= 8;
1139                         info->device_id2 |= flash_read_uchar (info,
1140                                                 FLASH_OFFSET_DEVICE_ID3);
1141                 }
1142                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1143                 break;
1144         default:
1145                 break;
1146         }
1147 }
1148
1149 /*-----------------------------------------------------------------------
1150  * detect if flash is compatible with the Common Flash Interface (CFI)
1151  * http://www.jedec.org/download/search/jesd68.pdf
1152  *
1153 */
1154 static int flash_detect_cfi (flash_info_t * info)
1155 {
1156         debug ("flash detect cfi\n");
1157
1158         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1159              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1160                 for (info->chipwidth = FLASH_CFI_BY8;
1161                      info->chipwidth <= info->portwidth;
1162                      info->chipwidth <<= 1) {
1163                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1164                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1165                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1166                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1167                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1168                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1169                                 debug ("device interface is %d\n",
1170                                        info->interface);
1171                                 debug ("found port %d chip %d ",
1172                                        info->portwidth, info->chipwidth);
1173                                 debug ("port %d bits chip %d bits\n",
1174                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1175                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1176                                 return 1;
1177                         }
1178                 }
1179         }
1180         debug ("not found\n");
1181         return 0;
1182 }
1183
1184 /*
1185  * The following code cannot be run from FLASH!
1186  *
1187  */
1188 ulong flash_get_size (ulong base, int banknum)
1189 {
1190         flash_info_t *info = &flash_info[banknum];
1191         int i, j;
1192         flash_sect_t sect_cnt;
1193         unsigned long sector;
1194         unsigned long tmp;
1195         int size_ratio;
1196         uchar num_erase_regions;
1197         int erase_region_size;
1198         int erase_region_count;
1199         int geometry_reversed = 0;
1200
1201         info->ext_addr = 0;
1202         info->cfi_version = 0;
1203 #ifdef CFG_FLASH_PROTECTION
1204         info->legacy_unlock = 0;
1205 #endif
1206
1207         info->start[0] = base;
1208
1209         if (flash_detect_cfi (info)) {
1210                 info->vendor = flash_read_ushort (info, 0,
1211                                         FLASH_OFFSET_PRIMARY_VENDOR);
1212                 flash_read_jedec_ids (info);
1213                 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1214                 num_erase_regions = flash_read_uchar (info,
1215                                         FLASH_OFFSET_NUM_ERASE_REGIONS);
1216                 info->ext_addr = flash_read_ushort (info, 0,
1217                                         FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1218                 if (info->ext_addr) {
1219                         info->cfi_version = (ushort) flash_read_uchar (info,
1220                                                 info->ext_addr + 3) << 8;
1221                         info->cfi_version |= (ushort) flash_read_uchar (info,
1222                                                 info->ext_addr + 4);
1223                 }
1224 #ifdef DEBUG
1225                 flash_printqry (info, 0);
1226 #endif
1227                 switch (info->vendor) {
1228                 case CFI_CMDSET_INTEL_STANDARD:
1229                 case CFI_CMDSET_INTEL_EXTENDED:
1230                 default:
1231                         info->cmd_reset = FLASH_CMD_RESET;
1232 #ifdef CFG_FLASH_PROTECTION
1233                         /* read legacy lock/unlock bit from intel flash */
1234                         if (info->ext_addr) {
1235                                 info->legacy_unlock = flash_read_uchar (info,
1236                                                 info->ext_addr + 5) & 0x08;
1237                         }
1238 #endif
1239                         break;
1240                 case CFI_CMDSET_AMD_STANDARD:
1241                 case CFI_CMDSET_AMD_EXTENDED:
1242                         info->cmd_reset = AMD_CMD_RESET;
1243                         /* check if flash geometry needs reversal */
1244                         if (num_erase_regions <= 1)
1245                                 break;
1246                         /* reverse geometry if top boot part */
1247                         if (info->cfi_version < 0x3131) {
1248                                 /* CFI < 1.1, try to guess from device id */
1249                                 if ((info->device_id & 0x80) != 0) {
1250                                         geometry_reversed = 1;
1251                                 }
1252                                 break;
1253                         }
1254                         /* CFI >= 1.1, deduct from top/bottom flag */
1255                         /* note: ext_addr is valid since cfi_version > 0 */
1256                         if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1257                                 geometry_reversed = 1;
1258                         }
1259                         break;
1260                 }
1261
1262                 debug ("manufacturer is %d\n", info->vendor);
1263                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1264                 debug ("device id is 0x%x\n", info->device_id);
1265                 debug ("device id2 is 0x%x\n", info->device_id2);
1266                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1267
1268                 size_ratio = info->portwidth / info->chipwidth;
1269                 /* if the chip is x8/x16 reduce the ratio by half */
1270                 if ((info->interface == FLASH_CFI_X8X16)
1271                     && (info->chipwidth == FLASH_CFI_BY8)) {
1272                         size_ratio >>= 1;
1273                 }
1274                 debug ("size_ratio %d port %d bits chip %d bits\n",
1275                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1276                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1277                 debug ("found %d erase regions\n", num_erase_regions);
1278                 sect_cnt = 0;
1279                 sector = base;
1280                 for (i = 0; i < num_erase_regions; i++) {
1281                         if (i > NUM_ERASE_REGIONS) {
1282                                 printf ("%d erase regions found, only %d used\n",
1283                                         num_erase_regions, NUM_ERASE_REGIONS);
1284                                 break;
1285                         }
1286                         if (geometry_reversed)
1287                                 tmp = flash_read_long (info, 0,
1288                                                FLASH_OFFSET_ERASE_REGIONS +
1289                                                (num_erase_regions - 1 - i) * 4);
1290                         else
1291                                 tmp = flash_read_long (info, 0,
1292                                                FLASH_OFFSET_ERASE_REGIONS +
1293                                                i * 4);
1294                         erase_region_size =
1295                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1296                         tmp >>= 16;
1297                         erase_region_count = (tmp & 0xffff) + 1;
1298                         debug ("erase_region_count = %d erase_region_size = %d\n",
1299                                 erase_region_count, erase_region_size);
1300                         for (j = 0; j < erase_region_count; j++) {
1301                                 info->start[sect_cnt] = sector;
1302                                 sector += (erase_region_size * size_ratio);
1303
1304                                 /*
1305                                  * Only read protection status from supported devices (intel...)
1306                                  */
1307                                 switch (info->vendor) {
1308                                 case CFI_CMDSET_INTEL_EXTENDED:
1309                                 case CFI_CMDSET_INTEL_STANDARD:
1310                                         info->protect[sect_cnt] =
1311                                                 flash_isset (info, sect_cnt,
1312                                                              FLASH_OFFSET_PROTECT,
1313                                                              FLASH_STATUS_PROTECT);
1314                                         break;
1315                                 default:
1316                                         info->protect[sect_cnt] = 0; /* default: not protected */
1317                                 }
1318
1319                                 sect_cnt++;
1320                         }
1321                 }
1322
1323                 info->sector_count = sect_cnt;
1324                 /* multiply the size by the number of chips */
1325                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1326                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1327                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1328                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1329                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1330                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1331                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1332                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1333                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1334                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1335                 info->flash_id = FLASH_MAN_CFI;
1336                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1337                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1338                 }
1339         }
1340
1341         flash_write_cmd (info, 0, 0, info->cmd_reset);
1342         return (info->size);
1343 }
1344
1345 /* loop through the sectors from the highest address
1346  * when the passed address is greater or equal to the sector address
1347  * we have a match
1348  */
1349 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1350 {
1351         flash_sect_t sector;
1352
1353         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1354                 if (addr >= info->start[sector])
1355                         break;
1356         }
1357         return sector;
1358 }
1359
1360 /*-----------------------------------------------------------------------
1361  */
1362 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1363                                 cfiword_t cword)
1364 {
1365         cfiptr_t ctladdr;
1366         cfiptr_t cptr;
1367         int flag;
1368
1369         ctladdr.cp = flash_make_addr (info, 0, 0);
1370         cptr.cp = (uchar *) dest;
1371
1372
1373         /* Check if Flash is (sufficiently) erased */
1374         switch (info->portwidth) {
1375         case FLASH_CFI_8BIT:
1376                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1377                 break;
1378         case FLASH_CFI_16BIT:
1379                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1380                 break;
1381         case FLASH_CFI_32BIT:
1382                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1383                 break;
1384         case FLASH_CFI_64BIT:
1385                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1386                 break;
1387         default:
1388                 return 2;
1389         }
1390         if (!flag)
1391                 return 2;
1392
1393         /* Disable interrupts which might cause a timeout here */
1394         flag = disable_interrupts ();
1395
1396         switch (info->vendor) {
1397         case CFI_CMDSET_INTEL_EXTENDED:
1398         case CFI_CMDSET_INTEL_STANDARD:
1399                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1400                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1401                 break;
1402         case CFI_CMDSET_AMD_EXTENDED:
1403         case CFI_CMDSET_AMD_STANDARD:
1404                 flash_unlock_seq (info, 0);
1405                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1406                 break;
1407         }
1408
1409         switch (info->portwidth) {
1410         case FLASH_CFI_8BIT:
1411                 cptr.cp[0] = cword.c;
1412                 break;
1413         case FLASH_CFI_16BIT:
1414                 cptr.wp[0] = cword.w;
1415                 break;
1416         case FLASH_CFI_32BIT:
1417                 cptr.lp[0] = cword.l;
1418                 break;
1419         case FLASH_CFI_64BIT:
1420                 cptr.llp[0] = cword.ll;
1421                 break;
1422         }
1423
1424         /* re-enable interrupts if necessary */
1425         if (flag)
1426                 enable_interrupts ();
1427
1428         return flash_full_status_check (info, find_sector (info, dest),
1429                                         info->write_tout, "write");
1430 }
1431
1432 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1433
1434 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1435                                   int len)
1436 {
1437         flash_sect_t sector;
1438         int cnt;
1439         int retcode;
1440         volatile cfiptr_t src;
1441         volatile cfiptr_t dst;
1442
1443         switch (info->vendor) {
1444         case CFI_CMDSET_INTEL_STANDARD:
1445         case CFI_CMDSET_INTEL_EXTENDED:
1446                 src.cp = cp;
1447                 dst.cp = (uchar *) dest;
1448                 sector = find_sector (info, dest);
1449                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1450                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1451                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1452                                                    "write to buffer")) == ERR_OK) {
1453                         /* reduce the number of loops by the width of the port  */
1454                         switch (info->portwidth) {
1455                         case FLASH_CFI_8BIT:
1456                                 cnt = len;
1457                                 break;
1458                         case FLASH_CFI_16BIT:
1459                                 cnt = len >> 1;
1460                                 break;
1461                         case FLASH_CFI_32BIT:
1462                                 cnt = len >> 2;
1463                                 break;
1464                         case FLASH_CFI_64BIT:
1465                                 cnt = len >> 3;
1466                                 break;
1467                         default:
1468                                 return ERR_INVAL;
1469                                 break;
1470                         }
1471                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1472                         while (cnt-- > 0) {
1473                                 switch (info->portwidth) {
1474                                 case FLASH_CFI_8BIT:
1475                                         *dst.cp++ = *src.cp++;
1476                                         break;
1477                                 case FLASH_CFI_16BIT:
1478                                         *dst.wp++ = *src.wp++;
1479                                         break;
1480                                 case FLASH_CFI_32BIT:
1481                                         *dst.lp++ = *src.lp++;
1482                                         break;
1483                                 case FLASH_CFI_64BIT:
1484                                         *dst.llp++ = *src.llp++;
1485                                         break;
1486                                 default:
1487                                         return ERR_INVAL;
1488                                         break;
1489                                 }
1490                         }
1491                         flash_write_cmd (info, sector, 0,
1492                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1493                         retcode = flash_full_status_check (info, sector,
1494                                                            info->buffer_write_tout,
1495                                                            "buffer write");
1496                 }
1497                 return retcode;
1498
1499         case CFI_CMDSET_AMD_STANDARD:
1500         case CFI_CMDSET_AMD_EXTENDED:
1501                 src.cp = cp;
1502                 dst.cp = (uchar *) dest;
1503                 sector = find_sector (info, dest);
1504
1505                 flash_unlock_seq(info,0);
1506                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1507
1508                 switch (info->portwidth) {
1509                 case FLASH_CFI_8BIT:
1510                         cnt = len;
1511                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1512                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1513                         break;
1514                 case FLASH_CFI_16BIT:
1515                         cnt = len >> 1;
1516                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1517                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1518                         break;
1519                 case FLASH_CFI_32BIT:
1520                         cnt = len >> 2;
1521                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1522                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1523                         break;
1524                 case FLASH_CFI_64BIT:
1525                         cnt = len >> 3;
1526                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1527                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1528                         break;
1529                 default:
1530                         return ERR_INVAL;
1531                 }
1532
1533                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1534                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1535                                                    "buffer write");
1536                 return retcode;
1537
1538         default:
1539                 debug ("Unknown Command Set\n");
1540                 return ERR_INVAL;
1541         }
1542 }
1543 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1544 #endif /* CFG_FLASH_CFI */