2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
25 #include <asm/types.h>
27 #include <linux/blkdev.h>
30 /* for the Smart Array 42XX cards */
31 #define S42XX_REQUEST_PORT_OFFSET 0x40
32 #define S42XX_REPLY_INTR_MASK_OFFSET 0x34
33 #define S42XX_REPLY_PORT_OFFSET 0x44
34 #define S42XX_INTR_STATUS 0x30
36 #define S42XX_INTR_OFF 0x08
37 #define S42XX_INTR_PENDING 0x08
39 #define COMMAND_FIFO 0x04
40 #define COMMAND_COMPLETE_FIFO 0x08
41 #define INTR_MASK 0x0C
42 #define INTR_STATUS 0x10
43 #define INTR_PENDING 0x14
45 #define FIFO_NOT_EMPTY 0x01
46 #define FIFO_NOT_FULL 0x02
48 #define BIG_PROBLEM 0x40
49 #define LOG_NOT_CONF 2
57 #define RCODE_NONFATAL 0x02
58 #define RCODE_FATAL 0x04
59 #define RCODE_INVREQ 0x10
83 #define CMD_RWREQ 0x00
84 #define CMD_IOCTL_PEND 0x01
85 #define CMD_IOCTL_DONE 0x02
87 typedef struct cmdlist {
108 __u32 drv_present_map;
123 __u32 max_req_blocks;
126 __u16 big_drv_present_map[8];
127 __u16 big_ext_drv_map[8];
128 __u16 big_non_disk_map[8];
134 __u8 red_fail_reason;
153 #define ID_LOG_DRV 0x10
163 #define ID_LOG_DRV_EXT 0x18
166 __u8 log_drv_label[64];
170 #define SENSE_LOG_DRV_STAT 0x12
176 __u8 drv_err_data[256];
177 __u8 drq_timeout[32];
178 __u32 blks_to_recover;
181 __u32 replace_drv_map;
184 __u8 spare_repl_map[32];
190 __u16 big_fail_map[8];
191 __u16 big_remap_map[128];
192 __u16 big_repl_map[8];
193 __u16 big_act_spare_map[8];
194 __u8 big_spar_repl_map[128];
195 __u16 big_repl_ok_map[8];
196 __u8 big_drv_rebuild;
198 } sense_log_drv_stat_t;
200 #define START_RECOVER 0x13
202 #define ID_PHYS_DRV 0x15
213 __u8 compaq_drv_stmp;
216 __u8 phys_drv_flags1;
218 __u8 phys_drv_flags2;
220 __u32 spi_speed_rules;
221 __u8 phys_connector[2];
222 __u8 phys_box_on_bus;
223 __u8 phys_bay_in_box;
226 #define BLINK_DRV_LEDS 0x16
228 __u32 blink_duration;
234 #define SENSE_BLINK_LEDS 0x17
236 __u32 blink_duration;
240 } sense_blink_leds_t;
242 #define IDA_READ 0x20
243 #define IDA_WRITE 0x30
244 #define IDA_WRITE_MEDIA 0x31
245 #define RESET_TO_DIAG 0x40
246 #define DIAG_PASS_THRU 0x41
248 #define SENSE_CONFIG 0x50
249 #define SET_CONFIG 0x51
256 __u16 log_unit_phys_drv;
257 __u16 fault_tol_mode;
258 __u8 phys_drv_param[16];
262 __u32 spare_asgn_map;
268 __u8 parity_backedout_write_drvs;
269 __u8 parity_dist_mode;
270 __u8 parity_shift_fact;
271 __u8 bios_disable_flag;
275 __u16 big_drv_map[8];
276 __u16 big_spare_map[8];
278 __u8 mix_drv_cap_range;
280 __u16 big_drv_map[8];
282 __u16 fault_tol_mode;
288 #define BYPASS_VOL_STATE 0x52
289 #define SS_CREATE_VOL 0x53
290 #define CHANGE_CONFIG 0x54
291 #define SENSE_ORIG_CONF 0x55
292 #define REORDER_LOG_DRV 0x56
297 #define LABEL_LOG_DRV 0x57
299 __u8 log_drv_label[64];
302 #define SS_TO_VOL 0x58
304 #define SET_SURF_DELAY 0x60
310 #define SET_OVERHEAT_DELAY 0x61
321 #define PASSTHRU_A 0x91
341 #define RESUME_BACKGROUND_ACTIVITY 0x99
342 #define SENSE_CONTROLLER_PERFORMANCE 0xa8
343 #define FLUSH_CACHE 0xc2
344 #define COLLECT_BUFFER 0xd2
345 #define READ_FLASH_ROM 0xf6
346 #define WRITE_FLASH_ROM 0xf7
349 #endif /* ARRAYCMD_H */