4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
6 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
7 * It was taken from the frle-0.22 device driver.
8 * As the file doesn't have a copyright notice, in the file
9 * nicstarmac.copyright I put the copyright notice from the
10 * frle-0.22 device driver.
11 * Some code is based on the nicstar driver by M. Welsh.
13 * Author: Rui Prior (rprior@inescn.pt)
14 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
21 * IMPORTANT INFORMATION
23 * There are currently three types of spinlocks:
25 * 1 - Per card interrupt spinlock (to protect structures and such)
26 * 2 - Per SCQ scq spinlock
27 * 3 - Per card resource spinlock (to access registers, etc.)
29 * These must NEVER be grabbed in reverse order.
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/skbuff.h>
38 #include <linux/atmdev.h>
39 #include <linux/atm.h>
40 #include <linux/pci.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/types.h>
43 #include <linux/string.h>
44 #include <linux/delay.h>
45 #include <linux/init.h>
46 #include <linux/sched.h>
47 #include <linux/timer.h>
48 #include <linux/interrupt.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <linux/idr.h>
53 #include <asm/uaccess.h>
54 #include <linux/atomic.h>
56 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
58 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
59 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
61 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
65 #include "nicstarmac.c"
67 /* Configurable parameters */
75 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
76 you're going to use only raw ATM */
78 /* Do not touch these */
81 #define TXPRINTK(args...) printk(args)
83 #define TXPRINTK(args...)
87 #define RXPRINTK(args...) printk(args)
89 #define RXPRINTK(args...)
93 #define PRINTK(args...) printk(args)
95 #define PRINTK(args...)
96 #endif /* GENERAL_DEBUG */
99 #define XPRINTK(args...) printk(args)
101 #define XPRINTK(args...)
102 #endif /* EXTRA_DEBUG */
106 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
108 #define NS_DELAY mdelay(1)
110 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
113 #define ATM_SKB(s) (&(s)->atm)
116 #define scq_virt_to_bus(scq, p) \
117 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
119 /* Function declarations */
121 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
122 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
124 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
125 static void __devinit ns_init_card_error(ns_dev * card, int error);
126 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
127 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
128 static void push_rxbufs(ns_dev *, struct sk_buff *);
129 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
130 static int ns_open(struct atm_vcc *vcc);
131 static void ns_close(struct atm_vcc *vcc);
132 static void fill_tst(ns_dev * card, int n, vc_map * vc);
133 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
134 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
135 struct sk_buff *skb);
136 static void process_tsq(ns_dev * card);
137 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
138 static void process_rsq(ns_dev * card);
139 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
140 #ifdef NS_USE_DESTRUCTORS
141 static void ns_sb_destructor(struct sk_buff *sb);
142 static void ns_lb_destructor(struct sk_buff *lb);
143 static void ns_hb_destructor(struct sk_buff *hb);
144 #endif /* NS_USE_DESTRUCTORS */
145 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
146 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
147 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
148 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
149 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
150 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
151 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
153 static void which_list(ns_dev * card, struct sk_buff *skb);
155 static void ns_poll(unsigned long arg);
156 static int ns_parse_mac(char *mac, unsigned char *esi);
157 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
159 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
161 /* Global variables */
163 static struct ns_dev *cards[NS_MAX_CARDS];
164 static unsigned num_cards;
165 static struct atmdev_ops atm_ops = {
170 .phy_put = ns_phy_put,
171 .phy_get = ns_phy_get,
172 .proc_read = ns_proc_read,
173 .owner = THIS_MODULE,
176 static struct timer_list ns_timer;
177 static char *mac[NS_MAX_CARDS];
178 module_param_array(mac, charp, NULL, 0);
179 MODULE_LICENSE("GPL");
183 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
184 const struct pci_device_id *ent)
186 static int index = -1;
192 error = ns_init_card(index, pcidev);
194 cards[index--] = NULL; /* don't increment index */
203 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
206 ns_dev *card = pci_get_drvdata(pcidev);
208 struct sk_buff *iovb;
214 if (cards[i] == NULL)
217 if (card->atmdev->phy && card->atmdev->phy->stop)
218 card->atmdev->phy->stop(card->atmdev);
220 /* Stop everything */
221 writel(0x00000000, card->membase + CFG);
223 /* De-register device */
224 atm_dev_deregister(card->atmdev);
226 /* Disable PCI device */
227 pci_disable_device(pcidev);
229 /* Free up resources */
231 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
232 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
233 dev_kfree_skb_any(hb);
236 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
238 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
239 card->iovpool.count);
240 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
241 dev_kfree_skb_any(iovb);
244 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
245 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
246 dev_kfree_skb_any(lb);
247 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
248 dev_kfree_skb_any(sb);
249 free_scq(card, card->scq0, NULL);
250 for (j = 0; j < NS_FRSCD_NUM; j++) {
251 if (card->scd2vc[j] != NULL)
252 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
254 idr_remove_all(&card->idr);
255 idr_destroy(&card->idr);
256 pci_free_consistent(card->pcidev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
257 card->rsq.org, card->rsq.dma);
258 pci_free_consistent(card->pcidev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
259 card->tsq.org, card->tsq.dma);
260 free_irq(card->pcidev->irq, card);
261 iounmap(card->membase);
265 static struct pci_device_id nicstar_pci_tbl[] __devinitdata = {
266 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
267 {0,} /* terminate list */
270 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
272 static struct pci_driver nicstar_driver = {
274 .id_table = nicstar_pci_tbl,
275 .probe = nicstar_init_one,
276 .remove = __devexit_p(nicstar_remove_one),
279 static int __init nicstar_init(void)
281 unsigned error = 0; /* Initialized to remove compile warning */
283 XPRINTK("nicstar: nicstar_init() called.\n");
285 error = pci_register_driver(&nicstar_driver);
287 TXPRINTK("nicstar: TX debug enabled.\n");
288 RXPRINTK("nicstar: RX debug enabled.\n");
289 PRINTK("nicstar: General debug enabled.\n");
291 printk("nicstar: using PHY loopback.\n");
292 #endif /* PHY_LOOPBACK */
293 XPRINTK("nicstar: nicstar_init() returned.\n");
296 init_timer(&ns_timer);
297 ns_timer.expires = jiffies + NS_POLL_PERIOD;
299 ns_timer.function = ns_poll;
300 add_timer(&ns_timer);
306 static void __exit nicstar_cleanup(void)
308 XPRINTK("nicstar: nicstar_cleanup() called.\n");
310 del_timer(&ns_timer);
312 pci_unregister_driver(&nicstar_driver);
314 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
317 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
322 sram_address &= 0x0007FFFC; /* address must be dword aligned */
323 sram_address |= 0x50000000; /* SRAM read command */
324 spin_lock_irqsave(&card->res_lock, flags);
325 while (CMD_BUSY(card)) ;
326 writel(sram_address, card->membase + CMD);
327 while (CMD_BUSY(card)) ;
328 data = readl(card->membase + DR0);
329 spin_unlock_irqrestore(&card->res_lock, flags);
333 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
338 count--; /* count range now is 0..3 instead of 1..4 */
340 c <<= 2; /* to use increments of 4 */
341 spin_lock_irqsave(&card->res_lock, flags);
342 while (CMD_BUSY(card)) ;
343 for (i = 0; i <= c; i += 4)
344 writel(*(value++), card->membase + i);
345 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
346 so card->membase + DR0 == card->membase */
348 sram_address &= 0x0007FFFC;
349 sram_address |= (0x40000000 | count);
350 writel(sram_address, card->membase + CMD);
351 spin_unlock_irqrestore(&card->res_lock, flags);
354 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
357 struct ns_dev *card = NULL;
358 unsigned char pci_latency;
364 unsigned long membase;
368 if (pci_enable_device(pcidev)) {
369 printk("nicstar%d: can't enable PCI device\n", i);
371 ns_init_card_error(card, error);
374 if ((pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0) ||
375 (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0)) {
377 "nicstar%d: No suitable DMA available.\n", i);
379 ns_init_card_error(card, error);
383 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
385 ("nicstar%d: can't allocate memory for device structure.\n",
388 ns_init_card_error(card, error);
392 spin_lock_init(&card->int_lock);
393 spin_lock_init(&card->res_lock);
395 pci_set_drvdata(pcidev, card);
399 card->pcidev = pcidev;
400 membase = pci_resource_start(pcidev, 1);
401 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
402 if (!card->membase) {
403 printk("nicstar%d: can't ioremap() membase.\n", i);
405 ns_init_card_error(card, error);
408 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
410 pci_set_master(pcidev);
412 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
413 printk("nicstar%d: can't read PCI latency timer.\n", i);
415 ns_init_card_error(card, error);
418 #ifdef NS_PCI_LATENCY
419 if (pci_latency < NS_PCI_LATENCY) {
420 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
422 for (j = 1; j < 4; j++) {
423 if (pci_write_config_byte
424 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
429 ("nicstar%d: can't set PCI latency timer to %d.\n",
432 ns_init_card_error(card, error);
436 #endif /* NS_PCI_LATENCY */
438 /* Clear timer overflow */
439 data = readl(card->membase + STAT);
440 if (data & NS_STAT_TMROF)
441 writel(NS_STAT_TMROF, card->membase + STAT);
444 writel(NS_CFG_SWRST, card->membase + CFG);
446 writel(0x00000000, card->membase + CFG);
449 writel(0x00000008, card->membase + GP);
451 writel(0x00000001, card->membase + GP);
453 while (CMD_BUSY(card)) ;
454 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
457 /* Detect PHY type */
458 while (CMD_BUSY(card)) ;
459 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
460 while (CMD_BUSY(card)) ;
461 data = readl(card->membase + DR0);
464 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
465 card->max_pcr = ATM_25_PCR;
466 while (CMD_BUSY(card)) ;
467 writel(0x00000008, card->membase + DR0);
468 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
469 /* Clear an eventual pending interrupt */
470 writel(NS_STAT_SFBQF, card->membase + STAT);
472 while (CMD_BUSY(card)) ;
473 writel(0x00000022, card->membase + DR0);
474 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
475 #endif /* PHY_LOOPBACK */
479 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
480 card->max_pcr = ATM_OC3_PCR;
482 while (CMD_BUSY(card)) ;
483 writel(0x00000002, card->membase + DR0);
484 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
485 #endif /* PHY_LOOPBACK */
488 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
490 ns_init_card_error(card, error);
493 writel(0x00000000, card->membase + GP);
495 /* Determine SRAM size */
497 ns_write_sram(card, 0x1C003, &data, 1);
499 ns_write_sram(card, 0x14003, &data, 1);
500 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
501 ns_read_sram(card, 0x1C003) == 0x76543210)
502 card->sram_size = 128;
504 card->sram_size = 32;
505 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
507 card->rct_size = NS_MAX_RCTSIZE;
509 #if (NS_MAX_RCTSIZE == 4096)
510 if (card->sram_size == 128)
512 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
514 #elif (NS_MAX_RCTSIZE == 16384)
515 if (card->sram_size == 32) {
517 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
519 card->rct_size = 4096;
522 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
525 card->vpibits = NS_VPIBITS;
526 if (card->rct_size == 4096)
527 card->vcibits = 12 - NS_VPIBITS;
528 else /* card->rct_size == 16384 */
529 card->vcibits = 14 - NS_VPIBITS;
531 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
533 nicstar_init_eprom(card->membase);
535 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
536 writel(0x00000000, card->membase + VPM);
539 card->tsq.org = pci_alloc_consistent(card->pcidev,
540 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
542 if (card->tsq.org == NULL) {
543 printk("nicstar%d: can't allocate TSQ.\n", i);
545 ns_init_card_error(card, error);
548 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
549 card->tsq.next = card->tsq.base;
550 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
551 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
552 ns_tsi_init(card->tsq.base + j);
553 writel(0x00000000, card->membase + TSQH);
554 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
555 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
558 card->rsq.org = pci_alloc_consistent(card->pcidev,
559 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
561 if (card->rsq.org == NULL) {
562 printk("nicstar%d: can't allocate RSQ.\n", i);
564 ns_init_card_error(card, error);
567 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
568 card->rsq.next = card->rsq.base;
569 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
570 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
571 ns_rsqe_init(card->rsq.base + j);
572 writel(0x00000000, card->membase + RSQH);
573 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
574 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
576 /* Initialize SCQ0, the only VBR SCQ used */
579 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
580 if (card->scq0 == NULL) {
581 printk("nicstar%d: can't get SCQ0.\n", i);
583 ns_init_card_error(card, error);
586 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
587 u32d[1] = (u32) 0x00000000;
588 u32d[2] = (u32) 0xffffffff;
589 u32d[3] = (u32) 0x00000000;
590 ns_write_sram(card, NS_VRSCD0, u32d, 4);
591 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
592 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
593 card->scq0->scd = NS_VRSCD0;
594 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
596 /* Initialize TSTs */
597 card->tst_addr = NS_TST0;
598 card->tst_free_entries = NS_TST_NUM_ENTRIES;
599 data = NS_TST_OPCODE_VARIABLE;
600 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
601 ns_write_sram(card, NS_TST0 + j, &data, 1);
602 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
603 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
604 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
605 ns_write_sram(card, NS_TST1 + j, &data, 1);
606 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
607 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
608 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
609 card->tste2vc[j] = NULL;
610 writel(NS_TST0 << 2, card->membase + TSTB);
612 /* Initialize RCT. AAL type is set on opening the VC. */
614 u32d[0] = NS_RCTE_RAWCELLINTEN;
616 u32d[0] = 0x00000000;
617 #endif /* RCQ_SUPPORT */
618 u32d[1] = 0x00000000;
619 u32d[2] = 0x00000000;
620 u32d[3] = 0xFFFFFFFF;
621 for (j = 0; j < card->rct_size; j++)
622 ns_write_sram(card, j * 4, u32d, 4);
624 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
626 for (j = 0; j < NS_FRSCD_NUM; j++)
627 card->scd2vc[j] = NULL;
629 /* Initialize buffer levels */
630 card->sbnr.min = MIN_SB;
631 card->sbnr.init = NUM_SB;
632 card->sbnr.max = MAX_SB;
633 card->lbnr.min = MIN_LB;
634 card->lbnr.init = NUM_LB;
635 card->lbnr.max = MAX_LB;
636 card->iovnr.min = MIN_IOVB;
637 card->iovnr.init = NUM_IOVB;
638 card->iovnr.max = MAX_IOVB;
639 card->hbnr.min = MIN_HB;
640 card->hbnr.init = NUM_HB;
641 card->hbnr.max = MAX_HB;
643 card->sm_handle = 0x00000000;
644 card->sm_addr = 0x00000000;
645 card->lg_handle = 0x00000000;
646 card->lg_addr = 0x00000000;
648 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
650 idr_init(&card->idr);
652 /* Pre-allocate some huge buffers */
653 skb_queue_head_init(&card->hbpool.queue);
654 card->hbpool.count = 0;
655 for (j = 0; j < NUM_HB; j++) {
657 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
660 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
663 ns_init_card_error(card, error);
666 NS_PRV_BUFTYPE(hb) = BUF_NONE;
667 skb_queue_tail(&card->hbpool.queue, hb);
668 card->hbpool.count++;
671 /* Allocate large buffers */
672 skb_queue_head_init(&card->lbpool.queue);
673 card->lbpool.count = 0; /* Not used */
674 for (j = 0; j < NUM_LB; j++) {
676 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
679 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
682 ns_init_card_error(card, error);
685 NS_PRV_BUFTYPE(lb) = BUF_LG;
686 skb_queue_tail(&card->lbpool.queue, lb);
687 skb_reserve(lb, NS_SMBUFSIZE);
688 push_rxbufs(card, lb);
689 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
692 card->rawcell = (struct ns_rcqe *) lb->data;
693 card->rawch = NS_PRV_DMA(lb);
696 /* Test for strange behaviour which leads to crashes */
698 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
700 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
703 ns_init_card_error(card, error);
707 /* Allocate small buffers */
708 skb_queue_head_init(&card->sbpool.queue);
709 card->sbpool.count = 0; /* Not used */
710 for (j = 0; j < NUM_SB; j++) {
712 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
715 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
718 ns_init_card_error(card, error);
721 NS_PRV_BUFTYPE(sb) = BUF_SM;
722 skb_queue_tail(&card->sbpool.queue, sb);
723 skb_reserve(sb, NS_AAL0_HEADER);
724 push_rxbufs(card, sb);
726 /* Test for strange behaviour which leads to crashes */
728 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
730 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
733 ns_init_card_error(card, error);
737 /* Allocate iovec buffers */
738 skb_queue_head_init(&card->iovpool.queue);
739 card->iovpool.count = 0;
740 for (j = 0; j < NUM_IOVB; j++) {
741 struct sk_buff *iovb;
742 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
745 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
748 ns_init_card_error(card, error);
751 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
752 skb_queue_tail(&card->iovpool.queue, iovb);
753 card->iovpool.count++;
756 /* Configure NICStAR */
757 if (card->rct_size == 4096)
758 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
759 else /* (card->rct_size == 16384) */
760 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
766 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
767 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
769 ns_init_card_error(card, error);
773 /* Register device */
774 card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
776 if (card->atmdev == NULL) {
777 printk("nicstar%d: can't register device.\n", i);
779 ns_init_card_error(card, error);
783 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
784 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
785 card->atmdev->esi, 6);
786 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) ==
788 nicstar_read_eprom(card->membase,
789 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
790 card->atmdev->esi, 6);
794 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
796 card->atmdev->dev_data = card;
797 card->atmdev->ci_range.vpi_bits = card->vpibits;
798 card->atmdev->ci_range.vci_bits = card->vcibits;
799 card->atmdev->link_rate = card->max_pcr;
800 card->atmdev->phy = NULL;
802 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
803 if (card->max_pcr == ATM_OC3_PCR)
804 suni_init(card->atmdev);
805 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
807 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
808 if (card->max_pcr == ATM_25_PCR)
809 idt77105_init(card->atmdev);
810 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
812 if (card->atmdev->phy && card->atmdev->phy->start)
813 card->atmdev->phy->start(card->atmdev);
815 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
816 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
817 NS_CFG_PHYIE, card->membase + CFG);
824 static void __devinit ns_init_card_error(ns_dev * card, int error)
827 writel(0x00000000, card->membase + CFG);
830 struct sk_buff *iovb;
831 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
832 dev_kfree_skb_any(iovb);
836 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
837 dev_kfree_skb_any(sb);
838 free_scq(card, card->scq0, NULL);
842 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
843 dev_kfree_skb_any(lb);
847 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
848 dev_kfree_skb_any(hb);
851 kfree(card->rsq.org);
854 kfree(card->tsq.org);
857 free_irq(card->pcidev->irq, card);
860 iounmap(card->membase);
863 pci_disable_device(card->pcidev);
868 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
873 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
876 scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
879 scq->org = pci_alloc_consistent(card->pcidev, 2 * size, &scq->dma);
884 scq->skb = kmalloc(sizeof(struct sk_buff *) *
885 (size / NS_SCQE_SIZE), GFP_KERNEL);
891 scq->num_entries = size / NS_SCQE_SIZE;
892 scq->base = PTR_ALIGN(scq->org, size);
893 scq->next = scq->base;
894 scq->last = scq->base + (scq->num_entries - 1);
895 scq->tail = scq->last;
897 scq->num_entries = size / NS_SCQE_SIZE;
899 init_waitqueue_head(&scq->scqfull_waitq);
901 spin_lock_init(&scq->lock);
903 for (i = 0; i < scq->num_entries; i++)
909 /* For variable rate SCQ vcc must be NULL */
910 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
914 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
915 for (i = 0; i < scq->num_entries; i++) {
916 if (scq->skb[i] != NULL) {
917 vcc = ATM_SKB(scq->skb[i])->vcc;
918 if (vcc->pop != NULL)
919 vcc->pop(vcc, scq->skb[i]);
921 dev_kfree_skb_any(scq->skb[i]);
923 } else { /* vcc must be != NULL */
927 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
928 for (i = 0; i < scq->num_entries; i++)
929 dev_kfree_skb_any(scq->skb[i]);
931 for (i = 0; i < scq->num_entries; i++) {
932 if (scq->skb[i] != NULL) {
933 if (vcc->pop != NULL)
934 vcc->pop(vcc, scq->skb[i]);
936 dev_kfree_skb_any(scq->skb[i]);
941 pci_free_consistent(card->pcidev,
942 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
943 VBR_SCQSIZE : CBR_SCQSIZE),
948 /* The handles passed must be pointers to the sk_buff containing the small
949 or large buffer(s) cast to u32. */
950 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
952 struct sk_buff *handle1, *handle2;
953 u32 id1 = 0, id2 = 0;
963 addr1 = pci_map_single(card->pcidev,
965 (NS_PRV_BUFTYPE(skb) == BUF_SM
966 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
968 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
972 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
974 #endif /* GENERAL_DEBUG */
976 stat = readl(card->membase + STAT);
977 card->sbfqc = ns_stat_sfbqc_get(stat);
978 card->lbfqc = ns_stat_lfbqc_get(stat);
979 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
982 addr2 = card->sm_addr;
983 handle2 = card->sm_handle;
984 card->sm_addr = 0x00000000;
985 card->sm_handle = 0x00000000;
986 } else { /* (!sm_addr) */
988 card->sm_addr = addr1;
989 card->sm_handle = handle1;
992 } else { /* buf_type == BUF_LG */
996 addr2 = card->lg_addr;
997 handle2 = card->lg_handle;
998 card->lg_addr = 0x00000000;
999 card->lg_handle = 0x00000000;
1000 } else { /* (!lg_addr) */
1002 card->lg_addr = addr1;
1003 card->lg_handle = handle1;
1009 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1010 if (card->sbfqc >= card->sbnr.max) {
1011 skb_unlink(handle1, &card->sbpool.queue);
1012 dev_kfree_skb_any(handle1);
1013 skb_unlink(handle2, &card->sbpool.queue);
1014 dev_kfree_skb_any(handle2);
1018 } else { /* (buf_type == BUF_LG) */
1020 if (card->lbfqc >= card->lbnr.max) {
1021 skb_unlink(handle1, &card->lbpool.queue);
1022 dev_kfree_skb_any(handle1);
1023 skb_unlink(handle2, &card->lbpool.queue);
1024 dev_kfree_skb_any(handle2);
1031 if (!idr_pre_get(&card->idr, GFP_ATOMIC)) {
1033 "nicstar%d: no free memory for idr\n",
1039 err = idr_get_new_above(&card->idr, handle1, 0, &id1);
1041 if (!id2 && err == 0)
1042 err = idr_get_new_above(&card->idr, handle2, 0, &id2);
1044 } while (err == -EAGAIN);
1049 spin_lock_irqsave(&card->res_lock, flags);
1050 while (CMD_BUSY(card)) ;
1051 writel(addr2, card->membase + DR3);
1052 writel(id2, card->membase + DR2);
1053 writel(addr1, card->membase + DR1);
1054 writel(id1, card->membase + DR0);
1055 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1056 card->membase + CMD);
1057 spin_unlock_irqrestore(&card->res_lock, flags);
1059 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1061 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1065 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1066 card->lbfqc >= card->lbnr.min) {
1068 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1069 card->membase + CFG);
1076 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1080 struct atm_dev *dev;
1081 unsigned long flags;
1083 card = (ns_dev *) dev_id;
1087 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1089 spin_lock_irqsave(&card->int_lock, flags);
1091 stat_r = readl(card->membase + STAT);
1093 /* Transmit Status Indicator has been written to T. S. Queue */
1094 if (stat_r & NS_STAT_TSIF) {
1095 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1097 writel(NS_STAT_TSIF, card->membase + STAT);
1100 /* Incomplete CS-PDU has been transmitted */
1101 if (stat_r & NS_STAT_TXICP) {
1102 writel(NS_STAT_TXICP, card->membase + STAT);
1103 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1107 /* Transmit Status Queue 7/8 full */
1108 if (stat_r & NS_STAT_TSQF) {
1109 writel(NS_STAT_TSQF, card->membase + STAT);
1110 PRINTK("nicstar%d: TSQ full.\n", card->index);
1114 /* Timer overflow */
1115 if (stat_r & NS_STAT_TMROF) {
1116 writel(NS_STAT_TMROF, card->membase + STAT);
1117 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1120 /* PHY device interrupt signal active */
1121 if (stat_r & NS_STAT_PHYI) {
1122 writel(NS_STAT_PHYI, card->membase + STAT);
1123 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1124 if (dev->phy && dev->phy->interrupt) {
1125 dev->phy->interrupt(dev);
1129 /* Small Buffer Queue is full */
1130 if (stat_r & NS_STAT_SFBQF) {
1131 writel(NS_STAT_SFBQF, card->membase + STAT);
1132 printk("nicstar%d: Small free buffer queue is full.\n",
1136 /* Large Buffer Queue is full */
1137 if (stat_r & NS_STAT_LFBQF) {
1138 writel(NS_STAT_LFBQF, card->membase + STAT);
1139 printk("nicstar%d: Large free buffer queue is full.\n",
1143 /* Receive Status Queue is full */
1144 if (stat_r & NS_STAT_RSQF) {
1145 writel(NS_STAT_RSQF, card->membase + STAT);
1146 printk("nicstar%d: RSQ full.\n", card->index);
1150 /* Complete CS-PDU received */
1151 if (stat_r & NS_STAT_EOPDU) {
1152 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1154 writel(NS_STAT_EOPDU, card->membase + STAT);
1157 /* Raw cell received */
1158 if (stat_r & NS_STAT_RAWCF) {
1159 writel(NS_STAT_RAWCF, card->membase + STAT);
1161 printk("nicstar%d: Raw cell received and no support yet...\n",
1163 #endif /* RCQ_SUPPORT */
1164 /* NOTE: the following procedure may keep a raw cell pending until the
1165 next interrupt. As this preliminary support is only meant to
1166 avoid buffer leakage, this is not an issue. */
1167 while (readl(card->membase + RAWCT) != card->rawch) {
1169 if (ns_rcqe_islast(card->rawcell)) {
1170 struct sk_buff *oldbuf;
1172 oldbuf = card->rcbuf;
1173 card->rcbuf = idr_find(&card->idr,
1174 ns_rcqe_nextbufhandle(card->rawcell));
1175 card->rawch = NS_PRV_DMA(card->rcbuf);
1176 card->rawcell = (struct ns_rcqe *)
1178 recycle_rx_buf(card, oldbuf);
1180 card->rawch += NS_RCQE_SIZE;
1186 /* Small buffer queue is empty */
1187 if (stat_r & NS_STAT_SFBQE) {
1191 writel(NS_STAT_SFBQE, card->membase + STAT);
1192 printk("nicstar%d: Small free buffer queue empty.\n",
1194 for (i = 0; i < card->sbnr.min; i++) {
1195 sb = dev_alloc_skb(NS_SMSKBSIZE);
1197 writel(readl(card->membase + CFG) &
1198 ~NS_CFG_EFBIE, card->membase + CFG);
1202 NS_PRV_BUFTYPE(sb) = BUF_SM;
1203 skb_queue_tail(&card->sbpool.queue, sb);
1204 skb_reserve(sb, NS_AAL0_HEADER);
1205 push_rxbufs(card, sb);
1211 /* Large buffer queue empty */
1212 if (stat_r & NS_STAT_LFBQE) {
1216 writel(NS_STAT_LFBQE, card->membase + STAT);
1217 printk("nicstar%d: Large free buffer queue empty.\n",
1219 for (i = 0; i < card->lbnr.min; i++) {
1220 lb = dev_alloc_skb(NS_LGSKBSIZE);
1222 writel(readl(card->membase + CFG) &
1223 ~NS_CFG_EFBIE, card->membase + CFG);
1227 NS_PRV_BUFTYPE(lb) = BUF_LG;
1228 skb_queue_tail(&card->lbpool.queue, lb);
1229 skb_reserve(lb, NS_SMBUFSIZE);
1230 push_rxbufs(card, lb);
1236 /* Receive Status Queue is 7/8 full */
1237 if (stat_r & NS_STAT_RSQAF) {
1238 writel(NS_STAT_RSQAF, card->membase + STAT);
1239 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1243 spin_unlock_irqrestore(&card->int_lock, flags);
1244 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1248 static int ns_open(struct atm_vcc *vcc)
1252 unsigned long tmpl, modl;
1253 int tcr, tcra; /* target cell rate, and absolute value */
1254 int n = 0; /* Number of entries in the TST. Initialized to remove
1255 the compiler warning. */
1257 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1258 warning. How I wish compilers were clever enough to
1259 tell which variables can truly be used
1261 int inuse; /* tx or rx vc already in use by another vcc */
1262 short vpi = vcc->vpi;
1265 card = (ns_dev *) vcc->dev->dev_data;
1266 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1268 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1269 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1273 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1277 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1279 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1282 printk("nicstar%d: %s vci already in use.\n", card->index,
1283 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1287 set_bit(ATM_VF_ADDR, &vcc->flags);
1289 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1290 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1291 needed to do that. */
1292 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1295 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1296 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1297 /* Check requested cell rate and availability of SCD */
1298 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1299 && vcc->qos.txtp.min_pcr == 0) {
1301 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1303 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1304 clear_bit(ATM_VF_ADDR, &vcc->flags);
1308 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1309 tcra = tcr >= 0 ? tcr : -tcr;
1311 PRINTK("nicstar%d: target cell rate = %d.\n",
1312 card->index, vcc->qos.txtp.max_pcr);
1315 (unsigned long)tcra *(unsigned long)
1317 modl = tmpl % card->max_pcr;
1319 n = (int)(tmpl / card->max_pcr);
1323 } else if (tcr == 0) {
1325 (card->tst_free_entries -
1326 NS_TST_RESERVED)) <= 0) {
1328 ("nicstar%d: no CBR bandwidth free.\n",
1330 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1331 clear_bit(ATM_VF_ADDR, &vcc->flags);
1338 ("nicstar%d: selected bandwidth < granularity.\n",
1340 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1341 clear_bit(ATM_VF_ADDR, &vcc->flags);
1345 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1347 ("nicstar%d: not enough free CBR bandwidth.\n",
1349 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1350 clear_bit(ATM_VF_ADDR, &vcc->flags);
1353 card->tst_free_entries -= n;
1355 XPRINTK("nicstar%d: writing %d tst entries.\n",
1357 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1358 if (card->scd2vc[frscdi] == NULL) {
1359 card->scd2vc[frscdi] = vc;
1363 if (frscdi == NS_FRSCD_NUM) {
1365 ("nicstar%d: no SCD available for CBR channel.\n",
1367 card->tst_free_entries += n;
1368 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1369 clear_bit(ATM_VF_ADDR, &vcc->flags);
1373 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1375 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1377 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1379 card->scd2vc[frscdi] = NULL;
1380 card->tst_free_entries += n;
1381 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1382 clear_bit(ATM_VF_ADDR, &vcc->flags);
1386 u32d[0] = scq_virt_to_bus(scq, scq->base);
1387 u32d[1] = (u32) 0x00000000;
1388 u32d[2] = (u32) 0xffffffff;
1389 u32d[3] = (u32) 0x00000000;
1390 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1392 fill_tst(card, n, vc);
1393 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1394 vc->cbr_scd = 0x00000000;
1395 vc->scq = card->scq0;
1398 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1403 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1410 /* Open the connection in hardware */
1411 if (vcc->qos.aal == ATM_AAL5)
1412 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1413 else /* vcc->qos.aal == ATM_AAL0 */
1414 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1416 status |= NS_RCTE_RAWCELLINTEN;
1417 #endif /* RCQ_SUPPORT */
1420 (vpi << card->vcibits | vci) *
1421 NS_RCT_ENTRY_SIZE, &status, 1);
1426 set_bit(ATM_VF_READY, &vcc->flags);
1430 static void ns_close(struct atm_vcc *vcc)
1438 card = vcc->dev->dev_data;
1439 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1440 (int)vcc->vpi, vcc->vci);
1442 clear_bit(ATM_VF_READY, &vcc->flags);
1444 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1446 unsigned long flags;
1450 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1451 spin_lock_irqsave(&card->res_lock, flags);
1452 while (CMD_BUSY(card)) ;
1453 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1454 card->membase + CMD);
1455 spin_unlock_irqrestore(&card->res_lock, flags);
1458 if (vc->rx_iov != NULL) {
1459 struct sk_buff *iovb;
1462 stat = readl(card->membase + STAT);
1463 card->sbfqc = ns_stat_sfbqc_get(stat);
1464 card->lbfqc = ns_stat_lfbqc_get(stat);
1467 ("nicstar%d: closing a VC with pending rx buffers.\n",
1470 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1471 NS_PRV_IOVCNT(iovb));
1472 NS_PRV_IOVCNT(iovb) = 0;
1473 spin_lock_irqsave(&card->int_lock, flags);
1474 recycle_iov_buf(card, iovb);
1475 spin_unlock_irqrestore(&card->int_lock, flags);
1480 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1484 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1485 unsigned long flags;
1492 spin_lock_irqsave(&scq->lock, flags);
1494 if (scqep == scq->base)
1498 if (scqep == scq->tail) {
1499 spin_unlock_irqrestore(&scq->lock, flags);
1502 /* If the last entry is not a TSR, place one in the SCQ in order to
1503 be able to completely drain it and then close. */
1504 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1510 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1511 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1512 scqi = scq->next - scq->base;
1513 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1514 tsr.word_3 = 0x00000000;
1515 tsr.word_4 = 0x00000000;
1518 scq->skb[index] = NULL;
1519 if (scq->next == scq->last)
1520 scq->next = scq->base;
1523 data = scq_virt_to_bus(scq, scq->next);
1524 ns_write_sram(card, scq->scd, &data, 1);
1526 spin_unlock_irqrestore(&scq->lock, flags);
1530 /* Free all TST entries */
1531 data = NS_TST_OPCODE_VARIABLE;
1532 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1533 if (card->tste2vc[i] == vc) {
1534 ns_write_sram(card, card->tst_addr + i, &data,
1536 card->tste2vc[i] = NULL;
1537 card->tst_free_entries++;
1541 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1542 free_scq(card, vc->scq, vcc);
1545 /* remove all references to vcc before deleting it */
1546 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1547 unsigned long flags;
1548 scq_info *scq = card->scq0;
1550 spin_lock_irqsave(&scq->lock, flags);
1552 for (i = 0; i < scq->num_entries; i++) {
1553 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1554 ATM_SKB(scq->skb[i])->vcc = NULL;
1555 atm_return(vcc, scq->skb[i]->truesize);
1557 ("nicstar: deleted pending vcc mapping\n");
1561 spin_unlock_irqrestore(&scq->lock, flags);
1564 vcc->dev_data = NULL;
1565 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1566 clear_bit(ATM_VF_ADDR, &vcc->flags);
1571 stat = readl(card->membase + STAT);
1572 cfg = readl(card->membase + CFG);
1573 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1575 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1576 card->tsq.base, card->tsq.next,
1577 card->tsq.last, readl(card->membase + TSQT));
1579 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1580 card->rsq.base, card->rsq.next,
1581 card->rsq.last, readl(card->membase + RSQT));
1582 printk("Empty free buffer queue interrupt %s \n",
1583 card->efbie ? "enabled" : "disabled");
1584 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1585 ns_stat_sfbqc_get(stat), card->sbpool.count,
1586 ns_stat_lfbqc_get(stat), card->lbpool.count);
1587 printk("hbpool.count = %d iovpool.count = %d \n",
1588 card->hbpool.count, card->iovpool.count);
1590 #endif /* RX_DEBUG */
1593 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1600 /* It would be very complicated to keep the two TSTs synchronized while
1601 assuring that writes are only made to the inactive TST. So, for now I
1602 will use only one TST. If problems occur, I will change this again */
1604 new_tst = card->tst_addr;
1606 /* Fill procedure */
1608 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1609 if (card->tste2vc[e] == NULL)
1612 if (e == NS_TST_NUM_ENTRIES) {
1613 printk("nicstar%d: No free TST entries found. \n", card->index);
1618 cl = NS_TST_NUM_ENTRIES;
1619 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1622 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1623 card->tste2vc[e] = vc;
1624 ns_write_sram(card, new_tst + e, &data, 1);
1625 cl -= NS_TST_NUM_ENTRIES;
1629 if (++e == NS_TST_NUM_ENTRIES) {
1635 /* End of fill procedure */
1637 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1638 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1639 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1640 card->tst_addr = new_tst;
1643 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1648 unsigned long buflen;
1650 u32 flags; /* TBD flags, not CPU flags */
1652 card = vcc->dev->dev_data;
1653 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1654 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1655 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1657 atomic_inc(&vcc->stats->tx_err);
1658 dev_kfree_skb_any(skb);
1663 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1665 atomic_inc(&vcc->stats->tx_err);
1666 dev_kfree_skb_any(skb);
1670 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1671 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1673 atomic_inc(&vcc->stats->tx_err);
1674 dev_kfree_skb_any(skb);
1678 if (skb_shinfo(skb)->nr_frags != 0) {
1679 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1680 atomic_inc(&vcc->stats->tx_err);
1681 dev_kfree_skb_any(skb);
1685 ATM_SKB(skb)->vcc = vcc;
1687 NS_PRV_DMA(skb) = pci_map_single(card->pcidev, skb->data,
1688 skb->len, PCI_DMA_TODEVICE);
1690 if (vcc->qos.aal == ATM_AAL5) {
1691 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1692 flags = NS_TBD_AAL5;
1693 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1694 scqe.word_3 = cpu_to_le32(skb->len);
1696 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1698 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1699 flags |= NS_TBD_EOPDU;
1700 } else { /* (vcc->qos.aal == ATM_AAL0) */
1702 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1703 flags = NS_TBD_AAL0;
1704 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1705 scqe.word_3 = cpu_to_le32(0x00000000);
1706 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1707 flags |= NS_TBD_EOPDU;
1709 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1710 /* Force the VPI/VCI to be the same as in VCC struct */
1712 cpu_to_le32((((u32) vcc->
1713 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1715 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1718 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1719 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1720 scq = ((vc_map *) vcc->dev_data)->scq;
1723 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1727 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1728 atomic_inc(&vcc->stats->tx_err);
1729 dev_kfree_skb_any(skb);
1732 atomic_inc(&vcc->stats->tx);
1737 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1738 struct sk_buff *skb)
1740 unsigned long flags;
1747 spin_lock_irqsave(&scq->lock, flags);
1748 while (scq->tail == scq->next) {
1749 if (in_interrupt()) {
1750 spin_unlock_irqrestore(&scq->lock, flags);
1751 printk("nicstar%d: Error pushing TBD.\n", card->index);
1756 spin_unlock_irqrestore(&scq->lock, flags);
1757 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1759 spin_lock_irqsave(&scq->lock, flags);
1762 spin_unlock_irqrestore(&scq->lock, flags);
1763 printk("nicstar%d: Timeout pushing TBD.\n",
1769 index = (int)(scq->next - scq->base);
1770 scq->skb[index] = skb;
1771 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1772 card->index, skb, index);
1773 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1774 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1775 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1777 if (scq->next == scq->last)
1778 scq->next = scq->base;
1783 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1789 if (vc->tbd_count >= MAX_TBD_PER_VC
1790 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1793 while (scq->tail == scq->next) {
1794 if (in_interrupt()) {
1795 data = scq_virt_to_bus(scq, scq->next);
1796 ns_write_sram(card, scq->scd, &data, 1);
1797 spin_unlock_irqrestore(&scq->lock, flags);
1798 printk("nicstar%d: Error pushing TSR.\n",
1806 spin_unlock_irqrestore(&scq->lock, flags);
1807 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1809 spin_lock_irqsave(&scq->lock, flags);
1813 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1815 scdi = NS_TSR_SCDISVBR;
1817 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1818 scqi = scq->next - scq->base;
1819 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1820 tsr.word_3 = 0x00000000;
1821 tsr.word_4 = 0x00000000;
1825 scq->skb[index] = NULL;
1827 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1828 card->index, le32_to_cpu(tsr.word_1),
1829 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1830 le32_to_cpu(tsr.word_4), scq->next);
1831 if (scq->next == scq->last)
1832 scq->next = scq->base;
1838 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1841 data = scq_virt_to_bus(scq, scq->next);
1842 ns_write_sram(card, scq->scd, &data, 1);
1844 spin_unlock_irqrestore(&scq->lock, flags);
1849 static void process_tsq(ns_dev * card)
1853 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1854 int serviced_entries; /* flag indicating at least on entry was serviced */
1856 serviced_entries = 0;
1858 if (card->tsq.next == card->tsq.last)
1859 one_ahead = card->tsq.base;
1861 one_ahead = card->tsq.next + 1;
1863 if (one_ahead == card->tsq.last)
1864 two_ahead = card->tsq.base;
1866 two_ahead = one_ahead + 1;
1868 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1869 !ns_tsi_isempty(two_ahead))
1870 /* At most two empty, as stated in the 77201 errata */
1872 serviced_entries = 1;
1874 /* Skip the one or two possible empty entries */
1875 while (ns_tsi_isempty(card->tsq.next)) {
1876 if (card->tsq.next == card->tsq.last)
1877 card->tsq.next = card->tsq.base;
1882 if (!ns_tsi_tmrof(card->tsq.next)) {
1883 scdi = ns_tsi_getscdindex(card->tsq.next);
1884 if (scdi == NS_TSI_SCDISVBR)
1887 if (card->scd2vc[scdi] == NULL) {
1889 ("nicstar%d: could not find VC from SCD index.\n",
1891 ns_tsi_init(card->tsq.next);
1894 scq = card->scd2vc[scdi]->scq;
1896 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1898 wake_up_interruptible(&(scq->scqfull_waitq));
1901 ns_tsi_init(card->tsq.next);
1902 previous = card->tsq.next;
1903 if (card->tsq.next == card->tsq.last)
1904 card->tsq.next = card->tsq.base;
1908 if (card->tsq.next == card->tsq.last)
1909 one_ahead = card->tsq.base;
1911 one_ahead = card->tsq.next + 1;
1913 if (one_ahead == card->tsq.last)
1914 two_ahead = card->tsq.base;
1916 two_ahead = one_ahead + 1;
1919 if (serviced_entries)
1920 writel(PTR_DIFF(previous, card->tsq.base),
1921 card->membase + TSQH);
1924 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1926 struct atm_vcc *vcc;
1927 struct sk_buff *skb;
1929 unsigned long flags;
1931 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1932 card->index, scq, pos);
1933 if (pos >= scq->num_entries) {
1934 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1938 spin_lock_irqsave(&scq->lock, flags);
1939 i = (int)(scq->tail - scq->base);
1940 if (++i == scq->num_entries)
1944 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1945 card->index, skb, i);
1947 pci_unmap_single(card->pcidev,
1951 vcc = ATM_SKB(skb)->vcc;
1952 if (vcc && vcc->pop != NULL) {
1955 dev_kfree_skb_irq(skb);
1959 if (++i == scq->num_entries)
1962 scq->tail = scq->base + pos;
1963 spin_unlock_irqrestore(&scq->lock, flags);
1966 static void process_rsq(ns_dev * card)
1970 if (!ns_rsqe_valid(card->rsq.next))
1973 dequeue_rx(card, card->rsq.next);
1974 ns_rsqe_init(card->rsq.next);
1975 previous = card->rsq.next;
1976 if (card->rsq.next == card->rsq.last)
1977 card->rsq.next = card->rsq.base;
1980 } while (ns_rsqe_valid(card->rsq.next));
1981 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1984 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1988 struct sk_buff *iovb;
1990 struct atm_vcc *vcc;
1991 struct sk_buff *skb;
1992 unsigned short aal5_len;
1997 stat = readl(card->membase + STAT);
1998 card->sbfqc = ns_stat_sfbqc_get(stat);
1999 card->lbfqc = ns_stat_lfbqc_get(stat);
2001 id = le32_to_cpu(rsqe->buffer_handle);
2002 skb = idr_find(&card->idr, id);
2005 "nicstar%d: idr_find() failed!\n", card->index);
2008 idr_remove(&card->idr, id);
2009 pci_dma_sync_single_for_cpu(card->pcidev,
2011 (NS_PRV_BUFTYPE(skb) == BUF_SM
2012 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2013 PCI_DMA_FROMDEVICE);
2014 pci_unmap_single(card->pcidev,
2016 (NS_PRV_BUFTYPE(skb) == BUF_SM
2017 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2018 PCI_DMA_FROMDEVICE);
2019 vpi = ns_rsqe_vpi(rsqe);
2020 vci = ns_rsqe_vci(rsqe);
2021 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2022 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2023 card->index, vpi, vci);
2024 recycle_rx_buf(card, skb);
2028 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2030 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2031 card->index, vpi, vci);
2032 recycle_rx_buf(card, skb);
2038 if (vcc->qos.aal == ATM_AAL0) {
2040 unsigned char *cell;
2044 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2045 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
2047 ("nicstar%d: Can't allocate buffers for aal0.\n",
2049 atomic_add(i, &vcc->stats->rx_drop);
2052 if (!atm_charge(vcc, sb->truesize)) {
2054 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2056 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2057 dev_kfree_skb_any(sb);
2060 /* Rebuild the header */
2061 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2062 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2063 if (i == 1 && ns_rsqe_eopdu(rsqe))
2064 *((u32 *) sb->data) |= 0x00000002;
2065 skb_put(sb, NS_AAL0_HEADER);
2066 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2067 skb_put(sb, ATM_CELL_PAYLOAD);
2068 ATM_SKB(sb)->vcc = vcc;
2069 __net_timestamp(sb);
2071 atomic_inc(&vcc->stats->rx);
2072 cell += ATM_CELL_PAYLOAD;
2075 recycle_rx_buf(card, skb);
2079 /* To reach this point, the AAL layer can only be AAL5 */
2081 if ((iovb = vc->rx_iov) == NULL) {
2082 iovb = skb_dequeue(&(card->iovpool.queue));
2083 if (iovb == NULL) { /* No buffers in the queue */
2084 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2086 printk("nicstar%d: Out of iovec buffers.\n",
2088 atomic_inc(&vcc->stats->rx_drop);
2089 recycle_rx_buf(card, skb);
2092 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2093 } else if (--card->iovpool.count < card->iovnr.min) {
2094 struct sk_buff *new_iovb;
2096 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2097 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2098 skb_queue_tail(&card->iovpool.queue, new_iovb);
2099 card->iovpool.count++;
2103 NS_PRV_IOVCNT(iovb) = 0;
2105 iovb->data = iovb->head;
2106 skb_reset_tail_pointer(iovb);
2107 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2108 buffer is stored as iovec base, NOT a pointer to the
2109 small or large buffer itself. */
2110 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2111 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2112 atomic_inc(&vcc->stats->rx_err);
2113 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2115 NS_PRV_IOVCNT(iovb) = 0;
2117 iovb->data = iovb->head;
2118 skb_reset_tail_pointer(iovb);
2120 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2121 iov->iov_base = (void *)skb;
2122 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2123 iovb->len += iov->iov_len;
2126 if (NS_PRV_IOVCNT(iovb) == 1) {
2127 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2129 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2131 which_list(card, skb);
2132 atomic_inc(&vcc->stats->rx_err);
2133 recycle_rx_buf(card, skb);
2135 recycle_iov_buf(card, iovb);
2138 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2140 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2142 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2144 which_list(card, skb);
2145 atomic_inc(&vcc->stats->rx_err);
2146 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2147 NS_PRV_IOVCNT(iovb));
2149 recycle_iov_buf(card, iovb);
2153 #endif /* EXTRA_DEBUG */
2155 if (ns_rsqe_eopdu(rsqe)) {
2156 /* This works correctly regardless of the endianness of the host */
2157 unsigned char *L1L2 = (unsigned char *)
2158 (skb->data + iov->iov_len - 6);
2159 aal5_len = L1L2[0] << 8 | L1L2[1];
2160 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2161 if (ns_rsqe_crcerr(rsqe) ||
2162 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2163 printk("nicstar%d: AAL5 CRC error", card->index);
2164 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2165 printk(" - PDU size mismatch.\n");
2168 atomic_inc(&vcc->stats->rx_err);
2169 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2170 NS_PRV_IOVCNT(iovb));
2172 recycle_iov_buf(card, iovb);
2176 /* By this point we (hopefully) have a complete SDU without errors. */
2178 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2179 /* skb points to a small buffer */
2180 if (!atm_charge(vcc, skb->truesize)) {
2181 push_rxbufs(card, skb);
2182 atomic_inc(&vcc->stats->rx_drop);
2185 dequeue_sm_buf(card, skb);
2186 #ifdef NS_USE_DESTRUCTORS
2187 skb->destructor = ns_sb_destructor;
2188 #endif /* NS_USE_DESTRUCTORS */
2189 ATM_SKB(skb)->vcc = vcc;
2190 __net_timestamp(skb);
2191 vcc->push(vcc, skb);
2192 atomic_inc(&vcc->stats->rx);
2194 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2197 sb = (struct sk_buff *)(iov - 1)->iov_base;
2198 /* skb points to a large buffer */
2200 if (len <= NS_SMBUFSIZE) {
2201 if (!atm_charge(vcc, sb->truesize)) {
2202 push_rxbufs(card, sb);
2203 atomic_inc(&vcc->stats->rx_drop);
2206 dequeue_sm_buf(card, sb);
2207 #ifdef NS_USE_DESTRUCTORS
2208 sb->destructor = ns_sb_destructor;
2209 #endif /* NS_USE_DESTRUCTORS */
2210 ATM_SKB(sb)->vcc = vcc;
2211 __net_timestamp(sb);
2213 atomic_inc(&vcc->stats->rx);
2216 push_rxbufs(card, skb);
2218 } else { /* len > NS_SMBUFSIZE, the usual case */
2220 if (!atm_charge(vcc, skb->truesize)) {
2221 push_rxbufs(card, skb);
2222 atomic_inc(&vcc->stats->rx_drop);
2224 dequeue_lg_buf(card, skb);
2225 #ifdef NS_USE_DESTRUCTORS
2226 skb->destructor = ns_lb_destructor;
2227 #endif /* NS_USE_DESTRUCTORS */
2228 skb_push(skb, NS_SMBUFSIZE);
2229 skb_copy_from_linear_data(sb, skb->data,
2231 skb_put(skb, len - NS_SMBUFSIZE);
2232 ATM_SKB(skb)->vcc = vcc;
2233 __net_timestamp(skb);
2234 vcc->push(vcc, skb);
2235 atomic_inc(&vcc->stats->rx);
2238 push_rxbufs(card, sb);
2242 } else { /* Must push a huge buffer */
2244 struct sk_buff *hb, *sb, *lb;
2245 int remaining, tocopy;
2248 hb = skb_dequeue(&(card->hbpool.queue));
2249 if (hb == NULL) { /* No buffers in the queue */
2251 hb = dev_alloc_skb(NS_HBUFSIZE);
2254 ("nicstar%d: Out of huge buffers.\n",
2256 atomic_inc(&vcc->stats->rx_drop);
2257 recycle_iovec_rx_bufs(card,
2260 NS_PRV_IOVCNT(iovb));
2262 recycle_iov_buf(card, iovb);
2264 } else if (card->hbpool.count < card->hbnr.min) {
2265 struct sk_buff *new_hb;
2267 dev_alloc_skb(NS_HBUFSIZE)) !=
2269 skb_queue_tail(&card->hbpool.
2271 card->hbpool.count++;
2274 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2275 } else if (--card->hbpool.count < card->hbnr.min) {
2276 struct sk_buff *new_hb;
2278 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2279 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2280 skb_queue_tail(&card->hbpool.queue,
2282 card->hbpool.count++;
2284 if (card->hbpool.count < card->hbnr.min) {
2286 dev_alloc_skb(NS_HBUFSIZE)) !=
2288 NS_PRV_BUFTYPE(new_hb) =
2290 skb_queue_tail(&card->hbpool.
2292 card->hbpool.count++;
2297 iov = (struct iovec *)iovb->data;
2299 if (!atm_charge(vcc, hb->truesize)) {
2300 recycle_iovec_rx_bufs(card, iov,
2301 NS_PRV_IOVCNT(iovb));
2302 if (card->hbpool.count < card->hbnr.max) {
2303 skb_queue_tail(&card->hbpool.queue, hb);
2304 card->hbpool.count++;
2306 dev_kfree_skb_any(hb);
2307 atomic_inc(&vcc->stats->rx_drop);
2309 /* Copy the small buffer to the huge buffer */
2310 sb = (struct sk_buff *)iov->iov_base;
2311 skb_copy_from_linear_data(sb, hb->data,
2313 skb_put(hb, iov->iov_len);
2314 remaining = len - iov->iov_len;
2316 /* Free the small buffer */
2317 push_rxbufs(card, sb);
2319 /* Copy all large buffers to the huge buffer and free them */
2320 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2321 lb = (struct sk_buff *)iov->iov_base;
2323 min_t(int, remaining, iov->iov_len);
2324 skb_copy_from_linear_data(lb,
2327 skb_put(hb, tocopy);
2329 remaining -= tocopy;
2330 push_rxbufs(card, lb);
2333 if (remaining != 0 || hb->len != len)
2335 ("nicstar%d: Huge buffer len mismatch.\n",
2337 #endif /* EXTRA_DEBUG */
2338 ATM_SKB(hb)->vcc = vcc;
2339 #ifdef NS_USE_DESTRUCTORS
2340 hb->destructor = ns_hb_destructor;
2341 #endif /* NS_USE_DESTRUCTORS */
2342 __net_timestamp(hb);
2344 atomic_inc(&vcc->stats->rx);
2349 recycle_iov_buf(card, iovb);
2354 #ifdef NS_USE_DESTRUCTORS
2356 static void ns_sb_destructor(struct sk_buff *sb)
2361 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2362 stat = readl(card->membase + STAT);
2363 card->sbfqc = ns_stat_sfbqc_get(stat);
2364 card->lbfqc = ns_stat_lfbqc_get(stat);
2367 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2370 NS_PRV_BUFTYPE(sb) = BUF_SM;
2371 skb_queue_tail(&card->sbpool.queue, sb);
2372 skb_reserve(sb, NS_AAL0_HEADER);
2373 push_rxbufs(card, sb);
2374 } while (card->sbfqc < card->sbnr.min);
2377 static void ns_lb_destructor(struct sk_buff *lb)
2382 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2383 stat = readl(card->membase + STAT);
2384 card->sbfqc = ns_stat_sfbqc_get(stat);
2385 card->lbfqc = ns_stat_lfbqc_get(stat);
2388 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2391 NS_PRV_BUFTYPE(lb) = BUF_LG;
2392 skb_queue_tail(&card->lbpool.queue, lb);
2393 skb_reserve(lb, NS_SMBUFSIZE);
2394 push_rxbufs(card, lb);
2395 } while (card->lbfqc < card->lbnr.min);
2398 static void ns_hb_destructor(struct sk_buff *hb)
2402 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2404 while (card->hbpool.count < card->hbnr.init) {
2405 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2408 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2409 skb_queue_tail(&card->hbpool.queue, hb);
2410 card->hbpool.count++;
2414 #endif /* NS_USE_DESTRUCTORS */
2416 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2418 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2419 printk("nicstar%d: What kind of rx buffer is this?\n",
2421 dev_kfree_skb_any(skb);
2423 push_rxbufs(card, skb);
2426 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2429 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2432 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2434 if (card->iovpool.count < card->iovnr.max) {
2435 skb_queue_tail(&card->iovpool.queue, iovb);
2436 card->iovpool.count++;
2438 dev_kfree_skb_any(iovb);
2441 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2443 skb_unlink(sb, &card->sbpool.queue);
2444 #ifdef NS_USE_DESTRUCTORS
2445 if (card->sbfqc < card->sbnr.min)
2447 if (card->sbfqc < card->sbnr.init) {
2448 struct sk_buff *new_sb;
2449 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2450 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2451 skb_queue_tail(&card->sbpool.queue, new_sb);
2452 skb_reserve(new_sb, NS_AAL0_HEADER);
2453 push_rxbufs(card, new_sb);
2456 if (card->sbfqc < card->sbnr.init)
2457 #endif /* NS_USE_DESTRUCTORS */
2459 struct sk_buff *new_sb;
2460 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2461 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2462 skb_queue_tail(&card->sbpool.queue, new_sb);
2463 skb_reserve(new_sb, NS_AAL0_HEADER);
2464 push_rxbufs(card, new_sb);
2469 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2471 skb_unlink(lb, &card->lbpool.queue);
2472 #ifdef NS_USE_DESTRUCTORS
2473 if (card->lbfqc < card->lbnr.min)
2475 if (card->lbfqc < card->lbnr.init) {
2476 struct sk_buff *new_lb;
2477 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2478 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2479 skb_queue_tail(&card->lbpool.queue, new_lb);
2480 skb_reserve(new_lb, NS_SMBUFSIZE);
2481 push_rxbufs(card, new_lb);
2484 if (card->lbfqc < card->lbnr.init)
2485 #endif /* NS_USE_DESTRUCTORS */
2487 struct sk_buff *new_lb;
2488 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2489 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2490 skb_queue_tail(&card->lbpool.queue, new_lb);
2491 skb_reserve(new_lb, NS_SMBUFSIZE);
2492 push_rxbufs(card, new_lb);
2497 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2504 card = (ns_dev *) dev->dev_data;
2505 stat = readl(card->membase + STAT);
2507 return sprintf(page, "Pool count min init max \n");
2509 return sprintf(page, "Small %5d %5d %5d %5d \n",
2510 ns_stat_sfbqc_get(stat), card->sbnr.min,
2511 card->sbnr.init, card->sbnr.max);
2513 return sprintf(page, "Large %5d %5d %5d %5d \n",
2514 ns_stat_lfbqc_get(stat), card->lbnr.min,
2515 card->lbnr.init, card->lbnr.max);
2517 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2518 card->hbpool.count, card->hbnr.min,
2519 card->hbnr.init, card->hbnr.max);
2521 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2522 card->iovpool.count, card->iovnr.min,
2523 card->iovnr.init, card->iovnr.max);
2527 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2532 /* Dump 25.6 Mbps PHY registers */
2533 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2534 here just in case it's needed for debugging. */
2535 if (card->max_pcr == ATM_25_PCR && !left--) {
2539 for (i = 0; i < 4; i++) {
2540 while (CMD_BUSY(card)) ;
2541 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2542 card->membase + CMD);
2543 while (CMD_BUSY(card)) ;
2544 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2547 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2548 phy_regs[0], phy_regs[1], phy_regs[2],
2551 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2554 if (left-- < NS_TST_NUM_ENTRIES) {
2555 if (card->tste2vc[left + 1] == NULL)
2556 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2558 return sprintf(page, "%5d - %d %d \n", left + 1,
2559 card->tste2vc[left + 1]->tx_vcc->vpi,
2560 card->tste2vc[left + 1]->tx_vcc->vci);
2566 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2571 unsigned long flags;
2573 card = dev->dev_data;
2577 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2579 switch (pl.buftype) {
2580 case NS_BUFTYPE_SMALL:
2582 ns_stat_sfbqc_get(readl(card->membase + STAT));
2583 pl.level.min = card->sbnr.min;
2584 pl.level.init = card->sbnr.init;
2585 pl.level.max = card->sbnr.max;
2588 case NS_BUFTYPE_LARGE:
2590 ns_stat_lfbqc_get(readl(card->membase + STAT));
2591 pl.level.min = card->lbnr.min;
2592 pl.level.init = card->lbnr.init;
2593 pl.level.max = card->lbnr.max;
2596 case NS_BUFTYPE_HUGE:
2597 pl.count = card->hbpool.count;
2598 pl.level.min = card->hbnr.min;
2599 pl.level.init = card->hbnr.init;
2600 pl.level.max = card->hbnr.max;
2603 case NS_BUFTYPE_IOVEC:
2604 pl.count = card->iovpool.count;
2605 pl.level.min = card->iovnr.min;
2606 pl.level.init = card->iovnr.init;
2607 pl.level.max = card->iovnr.max;
2611 return -ENOIOCTLCMD;
2614 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2615 return (sizeof(pl));
2620 if (!capable(CAP_NET_ADMIN))
2622 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2624 if (pl.level.min >= pl.level.init
2625 || pl.level.init >= pl.level.max)
2627 if (pl.level.min == 0)
2629 switch (pl.buftype) {
2630 case NS_BUFTYPE_SMALL:
2631 if (pl.level.max > TOP_SB)
2633 card->sbnr.min = pl.level.min;
2634 card->sbnr.init = pl.level.init;
2635 card->sbnr.max = pl.level.max;
2638 case NS_BUFTYPE_LARGE:
2639 if (pl.level.max > TOP_LB)
2641 card->lbnr.min = pl.level.min;
2642 card->lbnr.init = pl.level.init;
2643 card->lbnr.max = pl.level.max;
2646 case NS_BUFTYPE_HUGE:
2647 if (pl.level.max > TOP_HB)
2649 card->hbnr.min = pl.level.min;
2650 card->hbnr.init = pl.level.init;
2651 card->hbnr.max = pl.level.max;
2654 case NS_BUFTYPE_IOVEC:
2655 if (pl.level.max > TOP_IOVB)
2657 card->iovnr.min = pl.level.min;
2658 card->iovnr.init = pl.level.init;
2659 card->iovnr.max = pl.level.max;
2669 if (!capable(CAP_NET_ADMIN))
2671 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2673 case NS_BUFTYPE_SMALL:
2674 while (card->sbfqc < card->sbnr.init) {
2677 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2680 NS_PRV_BUFTYPE(sb) = BUF_SM;
2681 skb_queue_tail(&card->sbpool.queue, sb);
2682 skb_reserve(sb, NS_AAL0_HEADER);
2683 push_rxbufs(card, sb);
2687 case NS_BUFTYPE_LARGE:
2688 while (card->lbfqc < card->lbnr.init) {
2691 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2694 NS_PRV_BUFTYPE(lb) = BUF_LG;
2695 skb_queue_tail(&card->lbpool.queue, lb);
2696 skb_reserve(lb, NS_SMBUFSIZE);
2697 push_rxbufs(card, lb);
2701 case NS_BUFTYPE_HUGE:
2702 while (card->hbpool.count > card->hbnr.init) {
2705 spin_lock_irqsave(&card->int_lock, flags);
2706 hb = skb_dequeue(&card->hbpool.queue);
2707 card->hbpool.count--;
2708 spin_unlock_irqrestore(&card->int_lock, flags);
2711 ("nicstar%d: huge buffer count inconsistent.\n",
2714 dev_kfree_skb_any(hb);
2717 while (card->hbpool.count < card->hbnr.init) {
2720 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2723 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2724 spin_lock_irqsave(&card->int_lock, flags);
2725 skb_queue_tail(&card->hbpool.queue, hb);
2726 card->hbpool.count++;
2727 spin_unlock_irqrestore(&card->int_lock, flags);
2731 case NS_BUFTYPE_IOVEC:
2732 while (card->iovpool.count > card->iovnr.init) {
2733 struct sk_buff *iovb;
2735 spin_lock_irqsave(&card->int_lock, flags);
2736 iovb = skb_dequeue(&card->iovpool.queue);
2737 card->iovpool.count--;
2738 spin_unlock_irqrestore(&card->int_lock, flags);
2741 ("nicstar%d: iovec buffer count inconsistent.\n",
2744 dev_kfree_skb_any(iovb);
2747 while (card->iovpool.count < card->iovnr.init) {
2748 struct sk_buff *iovb;
2750 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2753 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2754 spin_lock_irqsave(&card->int_lock, flags);
2755 skb_queue_tail(&card->iovpool.queue, iovb);
2756 card->iovpool.count++;
2757 spin_unlock_irqrestore(&card->int_lock, flags);
2768 if (dev->phy && dev->phy->ioctl) {
2769 return dev->phy->ioctl(dev, cmd, arg);
2771 printk("nicstar%d: %s == NULL \n", card->index,
2772 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2773 return -ENOIOCTLCMD;
2779 static void which_list(ns_dev * card, struct sk_buff *skb)
2781 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2783 #endif /* EXTRA_DEBUG */
2785 static void ns_poll(unsigned long arg)
2789 unsigned long flags;
2792 PRINTK("nicstar: Entering ns_poll().\n");
2793 for (i = 0; i < num_cards; i++) {
2795 if (spin_is_locked(&card->int_lock)) {
2796 /* Probably it isn't worth spinning */
2799 spin_lock_irqsave(&card->int_lock, flags);
2802 stat_r = readl(card->membase + STAT);
2803 if (stat_r & NS_STAT_TSIF)
2804 stat_w |= NS_STAT_TSIF;
2805 if (stat_r & NS_STAT_EOPDU)
2806 stat_w |= NS_STAT_EOPDU;
2811 writel(stat_w, card->membase + STAT);
2812 spin_unlock_irqrestore(&card->int_lock, flags);
2814 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2815 PRINTK("nicstar: Leaving ns_poll().\n");
2818 static int ns_parse_mac(char *mac, unsigned char *esi)
2823 if (mac == NULL || esi == NULL)
2826 for (i = 0; i < 6; i++) {
2827 if ((byte1 = hex_to_bin(mac[j++])) < 0)
2829 if ((byte0 = hex_to_bin(mac[j++])) < 0)
2831 esi[i] = (unsigned char)(byte1 * 16 + byte0);
2833 if (mac[j++] != ':')
2841 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2845 unsigned long flags;
2847 card = dev->dev_data;
2848 spin_lock_irqsave(&card->res_lock, flags);
2849 while (CMD_BUSY(card)) ;
2850 writel((u32) value, card->membase + DR0);
2851 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2852 card->membase + CMD);
2853 spin_unlock_irqrestore(&card->res_lock, flags);
2856 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2859 unsigned long flags;
2862 card = dev->dev_data;
2863 spin_lock_irqsave(&card->res_lock, flags);
2864 while (CMD_BUSY(card)) ;
2865 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2866 card->membase + CMD);
2867 while (CMD_BUSY(card)) ;
2868 data = readl(card->membase + DR0) & 0x000000FF;
2869 spin_unlock_irqrestore(&card->res_lock, flags);
2870 return (unsigned char)data;
2873 module_init(nicstar_init);
2874 module_exit(nicstar_cleanup);