drivers/atm/idt77252.c

   1 /*******************************************************************
   2  *
   3  * Copyright (c) 2000 ATecoM GmbH
   4  *
   5  * The author may be reached at ecd@atecom.com.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  *
  12  * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
  13  * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  14  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  15  * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
  16  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17  * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  18  * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  19  * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  20  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  21  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22  *
  23  * You should have received a copy of the  GNU General Public License along
  24  * with this program; if not, write  to the Free Software Foundation, Inc.,
  25  * 675 Mass Ave, Cambridge, MA 02139, USA.
  26  *
  27  *******************************************************************/
  28
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/poison.h>
  32 #include <linux/skbuff.h>
  33 #include <linux/kernel.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/atmdev.h>
  37 #include <linux/atm.h>
  38 #include <linux/delay.h>
  39 #include <linux/init.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/bitops.h>
  42 #include <linux/wait.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/mutex.h>
  45 #include <linux/slab.h>
  46
  47 #include <asm/io.h>
  48 #include <asm/uaccess.h>
  49 #include <linux/atomic.h>
  50 #include <asm/byteorder.h>
  51
  52 #ifdef CONFIG_ATM_IDT77252_USE_SUNI
  53 #include "suni.h"
  54 #endif /* CONFIG_ATM_IDT77252_USE_SUNI */
  55
  56
  57 #include "idt77252.h"
  58 #include "idt77252_tables.h"
  59
  60 static unsigned int vpibits = 1;
  61
  62
  63 #define ATM_IDT77252_SEND_IDLE 1
  64
  65
  66 /*
  67  * Debug HACKs.
  68  */
  69 #define DEBUG_MODULE 1
  70 #undef HAVE_EEPROM      /* does not work, yet. */
  71
  72 #ifdef CONFIG_ATM_IDT77252_DEBUG
  73 static unsigned long debug = DBG_GENERAL;
  74 #endif
  75
  76
  77 #define SAR_RX_DELAY    (SAR_CFG_RXINT_NODELAY)
  78
  79
  80 /*
  81  * SCQ Handling.
  82  */
  83 static struct scq_info *alloc_scq(struct idt77252_dev *, int);
  84 static void free_scq(struct idt77252_dev *, struct scq_info *);
  85 static int queue_skb(struct idt77252_dev *, struct vc_map *,
  86                      struct sk_buff *, int oam);
  87 static void drain_scq(struct idt77252_dev *, struct vc_map *);
  88 static unsigned long get_free_scd(struct idt77252_dev *, struct vc_map *);
  89 static void fill_scd(struct idt77252_dev *, struct scq_info *, int);
  90
  91 /*
  92  * FBQ Handling.
  93  */
  94 static int push_rx_skb(struct idt77252_dev *,
  95                        struct sk_buff *, int queue);
  96 static void recycle_rx_skb(struct idt77252_dev *, struct sk_buff *);
  97 static void flush_rx_pool(struct idt77252_dev *, struct rx_pool *);
  98 static void recycle_rx_pool_skb(struct idt77252_dev *,
  99                                 struct rx_pool *);
 100 static void add_rx_skb(struct idt77252_dev *, int queue,
 101                        unsigned int size, unsigned int count);
 102
 103 /*
 104  * RSQ Handling.
 105  */
 106 static int init_rsq(struct idt77252_dev *);
 107 static void deinit_rsq(struct idt77252_dev *);
 108 static void idt77252_rx(struct idt77252_dev *);
 109
 110 /*
 111  * TSQ handling.
 112  */
 113 static int init_tsq(struct idt77252_dev *);
 114 static void deinit_tsq(struct idt77252_dev *);
 115 static void idt77252_tx(struct idt77252_dev *);
 116
 117
 118 /*
 119  * ATM Interface.
 120  */
 121 static void idt77252_dev_close(struct atm_dev *dev);
 122 static int idt77252_open(struct atm_vcc *vcc);
 123 static void idt77252_close(struct atm_vcc *vcc);
 124 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb);
 125 static int idt77252_send_oam(struct atm_vcc *vcc, void *cell,
 126                              int flags);
 127 static void idt77252_phy_put(struct atm_dev *dev, unsigned char value,
 128                              unsigned long addr);
 129 static unsigned char idt77252_phy_get(struct atm_dev *dev, unsigned long addr);
 130 static int idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos,
 131                                int flags);
 132 static int idt77252_proc_read(struct atm_dev *dev, loff_t * pos,
 133                               char *page);
 134 static void idt77252_softint(struct work_struct *work);
 135
 136
 137 static struct atmdev_ops idt77252_ops =
 138 {
 139         .dev_close      = idt77252_dev_close,
 140         .open           = idt77252_open,
 141         .close          = idt77252_close,
 142         .send           = idt77252_send,
 143         .send_oam       = idt77252_send_oam,
 144         .phy_put        = idt77252_phy_put,
 145         .phy_get        = idt77252_phy_get,
 146         .change_qos     = idt77252_change_qos,
 147         .proc_read      = idt77252_proc_read,
 148         .owner          = THIS_MODULE
 149 };
 150
 151 static struct idt77252_dev *idt77252_chain = NULL;
 152 static unsigned int idt77252_sram_write_errors = 0;
 153
 154 /*****************************************************************************/
 155 /*                                                                           */
 156 /* I/O and Utility Bus                                                       */
 157 /*                                                                           */
 158 /*****************************************************************************/
 159
 160 static void
 161 waitfor_idle(struct idt77252_dev *card)
 162 {
 163         u32 stat;
 164
 165         stat = readl(SAR_REG_STAT);
 166         while (stat & SAR_STAT_CMDBZ)
 167                 stat = readl(SAR_REG_STAT);
 168 }
 169
 170 static u32
 171 read_sram(struct idt77252_dev *card, unsigned long addr)
 172 {
 173         unsigned long flags;
 174         u32 value;
 175
 176         spin_lock_irqsave(&card->cmd_lock, flags);
 177         writel(SAR_CMD_READ_SRAM | (addr << 2), SAR_REG_CMD);
 178         waitfor_idle(card);
 179         value = readl(SAR_REG_DR0);
 180         spin_unlock_irqrestore(&card->cmd_lock, flags);
 181         return value;
 182 }
 183
 184 static void
 185 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
 186 {
 187         unsigned long flags;
 188
 189         if ((idt77252_sram_write_errors == 0) &&
 190             (((addr > card->tst[0] + card->tst_size - 2) &&
 191               (addr < card->tst[0] + card->tst_size)) ||
 192              ((addr > card->tst[1] + card->tst_size - 2) &&
 193               (addr < card->tst[1] + card->tst_size)))) {
 194                 printk("%s: ERROR: TST JMP section at %08lx written: %08x\n",
 195                        card->name, addr, value);
 196         }
 197
 198         spin_lock_irqsave(&card->cmd_lock, flags);
 199         writel(value, SAR_REG_DR0);
 200         writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
 201         waitfor_idle(card);
 202         spin_unlock_irqrestore(&card->cmd_lock, flags);
 203 }
 204
 205 static u8
 206 read_utility(void *dev, unsigned long ubus_addr)
 207 {
 208         struct idt77252_dev *card = dev;
 209         unsigned long flags;
 210         u8 value;
 211
 212         if (!card) {
 213                 printk("Error: No such device.\n");
 214                 return -1;
 215         }
 216
 217         spin_lock_irqsave(&card->cmd_lock, flags);
 218         writel(SAR_CMD_READ_UTILITY + ubus_addr, SAR_REG_CMD);
 219         waitfor_idle(card);
 220         value = readl(SAR_REG_DR0);
 221         spin_unlock_irqrestore(&card->cmd_lock, flags);
 222         return value;
 223 }
 224
 225 static void
 226 write_utility(void *dev, unsigned long ubus_addr, u8 value)
 227 {
 228         struct idt77252_dev *card = dev;
 229         unsigned long flags;
 230
 231         if (!card) {
 232                 printk("Error: No such device.\n");
 233                 return;
 234         }
 235
 236         spin_lock_irqsave(&card->cmd_lock, flags);
 237         writel((u32) value, SAR_REG_DR0);
 238         writel(SAR_CMD_WRITE_UTILITY + ubus_addr, SAR_REG_CMD);
 239         waitfor_idle(card);
 240         spin_unlock_irqrestore(&card->cmd_lock, flags);
 241 }
 242
 243 #ifdef HAVE_EEPROM
 244 static u32 rdsrtab[] =
 245 {
 246         SAR_GP_EECS | SAR_GP_EESCLK,
 247         0,
 248         SAR_GP_EESCLK,                  /* 0 */
 249         0,
 250         SAR_GP_EESCLK,                  /* 0 */
 251         0,
 252         SAR_GP_EESCLK,                  /* 0 */
 253         0,
 254         SAR_GP_EESCLK,                  /* 0 */
 255         0,
 256         SAR_GP_EESCLK,                  /* 0 */
 257         SAR_GP_EEDO,
 258         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 259         0,
 260         SAR_GP_EESCLK,                  /* 0 */
 261         SAR_GP_EEDO,
 262         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 263 };
 264
 265 static u32 wrentab[] =
 266 {
 267         SAR_GP_EECS | SAR_GP_EESCLK,
 268         0,
 269         SAR_GP_EESCLK,                  /* 0 */
 270         0,
 271         SAR_GP_EESCLK,                  /* 0 */
 272         0,
 273         SAR_GP_EESCLK,                  /* 0 */
 274         0,
 275         SAR_GP_EESCLK,                  /* 0 */
 276         SAR_GP_EEDO,
 277         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 278         SAR_GP_EEDO,
 279         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 280         0,
 281         SAR_GP_EESCLK,                  /* 0 */
 282         0,
 283         SAR_GP_EESCLK                   /* 0 */
 284 };
 285
 286 static u32 rdtab[] =
 287 {
 288         SAR_GP_EECS | SAR_GP_EESCLK,
 289         0,
 290         SAR_GP_EESCLK,                  /* 0 */
 291         0,
 292         SAR_GP_EESCLK,                  /* 0 */
 293         0,
 294         SAR_GP_EESCLK,                  /* 0 */
 295         0,
 296         SAR_GP_EESCLK,                  /* 0 */
 297         0,
 298         SAR_GP_EESCLK,                  /* 0 */
 299         0,
 300         SAR_GP_EESCLK,                  /* 0 */
 301         SAR_GP_EEDO,
 302         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 303         SAR_GP_EEDO,
 304         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 305 };
 306
 307 static u32 wrtab[] =
 308 {
 309         SAR_GP_EECS | SAR_GP_EESCLK,
 310         0,
 311         SAR_GP_EESCLK,                  /* 0 */
 312         0,
 313         SAR_GP_EESCLK,                  /* 0 */
 314         0,
 315         SAR_GP_EESCLK,                  /* 0 */
 316         0,
 317         SAR_GP_EESCLK,                  /* 0 */
 318         0,
 319         SAR_GP_EESCLK,                  /* 0 */
 320         0,
 321         SAR_GP_EESCLK,                  /* 0 */
 322         SAR_GP_EEDO,
 323         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 324         0,
 325         SAR_GP_EESCLK                   /* 0 */
 326 };
 327
 328 static u32 clktab[] =
 329 {
 330         0,
 331         SAR_GP_EESCLK,
 332         0,
 333         SAR_GP_EESCLK,
 334         0,
 335         SAR_GP_EESCLK,
 336         0,
 337         SAR_GP_EESCLK,
 338         0,
 339         SAR_GP_EESCLK,
 340         0,
 341         SAR_GP_EESCLK,
 342         0,
 343         SAR_GP_EESCLK,
 344         0,
 345         SAR_GP_EESCLK,
 346         0
 347 };
 348
 349 static u32
 350 idt77252_read_gp(struct idt77252_dev *card)
 351 {
 352         u32 gp;
 353
 354         gp = readl(SAR_REG_GP);
 355 #if 0
 356         printk("RD: %s\n", gp & SAR_GP_EEDI ? "1" : "0");
 357 #endif
 358         return gp;
 359 }
 360
 361 static void
 362 idt77252_write_gp(struct idt77252_dev *card, u32 value)
 363 {
 364         unsigned long flags;
 365
 366 #if 0
 367         printk("WR: %s %s %s\n", value & SAR_GP_EECS ? "   " : "/CS",
 368                value & SAR_GP_EESCLK ? "HIGH" : "LOW ",
 369                value & SAR_GP_EEDO   ? "1" : "0");
 370 #endif
 371
 372         spin_lock_irqsave(&card->cmd_lock, flags);
 373         waitfor_idle(card);
 374         writel(value, SAR_REG_GP);
 375         spin_unlock_irqrestore(&card->cmd_lock, flags);
 376 }
 377
 378 static u8
 379 idt77252_eeprom_read_status(struct idt77252_dev *card)
 380 {
 381         u8 byte;
 382         u32 gp;
 383         int i, j;
 384
 385         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 386
 387         for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
 388                 idt77252_write_gp(card, gp | rdsrtab[i]);
 389                 udelay(5);
 390         }
 391         idt77252_write_gp(card, gp | SAR_GP_EECS);
 392         udelay(5);
 393
 394         byte = 0;
 395         for (i = 0, j = 0; i < 8; i++) {
 396                 byte <<= 1;
 397
 398                 idt77252_write_gp(card, gp | clktab[j++]);
 399                 udelay(5);
 400
 401                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 402
 403                 idt77252_write_gp(card, gp | clktab[j++]);
 404                 udelay(5);
 405         }
 406         idt77252_write_gp(card, gp | SAR_GP_EECS);
 407         udelay(5);
 408
 409         return byte;
 410 }
 411
 412 static u8
 413 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
 414 {
 415         u8 byte;
 416         u32 gp;
 417         int i, j;
 418
 419         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 420
 421         for (i = 0; i < ARRAY_SIZE(rdtab); i++) {
 422                 idt77252_write_gp(card, gp | rdtab[i]);
 423                 udelay(5);
 424         }
 425         idt77252_write_gp(card, gp | SAR_GP_EECS);
 426         udelay(5);
 427
 428         for (i = 0, j = 0; i < 8; i++) {
 429                 idt77252_write_gp(card, gp | clktab[j++] |
 430                                         (offset & 1 ? SAR_GP_EEDO : 0));
 431                 udelay(5);
 432
 433                 idt77252_write_gp(card, gp | clktab[j++] |
 434                                         (offset & 1 ? SAR_GP_EEDO : 0));
 435                 udelay(5);
 436
 437                 offset >>= 1;
 438         }
 439         idt77252_write_gp(card, gp | SAR_GP_EECS);
 440         udelay(5);
 441
 442         byte = 0;
 443         for (i = 0, j = 0; i < 8; i++) {
 444                 byte <<= 1;
 445
 446                 idt77252_write_gp(card, gp | clktab[j++]);
 447                 udelay(5);
 448
 449                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 450
 451                 idt77252_write_gp(card, gp | clktab[j++]);
 452                 udelay(5);
 453         }
 454         idt77252_write_gp(card, gp | SAR_GP_EECS);
 455         udelay(5);
 456
 457         return byte;
 458 }
 459
 460 static void
 461 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
 462 {
 463         u32 gp;
 464         int i, j;
 465
 466         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 467
 468         for (i = 0; i < ARRAY_SIZE(wrentab); i++) {
 469                 idt77252_write_gp(card, gp | wrentab[i]);
 470                 udelay(5);
 471         }
 472         idt77252_write_gp(card, gp | SAR_GP_EECS);
 473         udelay(5);
 474
 475         for (i = 0; i < ARRAY_SIZE(wrtab); i++) {
 476                 idt77252_write_gp(card, gp | wrtab[i]);
 477                 udelay(5);
 478         }
 479         idt77252_write_gp(card, gp | SAR_GP_EECS);
 480         udelay(5);
 481
 482         for (i = 0, j = 0; i < 8; i++) {
 483                 idt77252_write_gp(card, gp | clktab[j++] |
 484                                         (offset & 1 ? SAR_GP_EEDO : 0));
 485                 udelay(5);
 486
 487                 idt77252_write_gp(card, gp | clktab[j++] |
 488                                         (offset & 1 ? SAR_GP_EEDO : 0));
 489                 udelay(5);
 490
 491                 offset >>= 1;
 492         }
 493         idt77252_write_gp(card, gp | SAR_GP_EECS);
 494         udelay(5);
 495
 496         for (i = 0, j = 0; i < 8; i++) {
 497                 idt77252_write_gp(card, gp | clktab[j++] |
 498                                         (data & 1 ? SAR_GP_EEDO : 0));
 499                 udelay(5);
 500
 501                 idt77252_write_gp(card, gp | clktab[j++] |
 502                                         (data & 1 ? SAR_GP_EEDO : 0));
 503                 udelay(5);
 504
 505                 data >>= 1;
 506         }
 507         idt77252_write_gp(card, gp | SAR_GP_EECS);
 508         udelay(5);
 509 }
 510
 511 static void
 512 idt77252_eeprom_init(struct idt77252_dev *card)
 513 {
 514         u32 gp;
 515
 516         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 517
 518         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 519         udelay(5);
 520         idt77252_write_gp(card, gp | SAR_GP_EECS);
 521         udelay(5);
 522         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 523         udelay(5);
 524         idt77252_write_gp(card, gp | SAR_GP_EECS);
 525         udelay(5);
 526 }
 527 #endif /* HAVE_EEPROM */
 528
 529
 530 #ifdef CONFIG_ATM_IDT77252_DEBUG
 531 static void
 532 dump_tct(struct idt77252_dev *card, int index)
 533 {
 534         unsigned long tct;
 535         int i;
 536
 537         tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
 538
 539         printk("%s: TCT %x:", card->name, index);
 540         for (i = 0; i < 8; i++) {
 541                 printk(" %08x", read_sram(card, tct + i));
 542         }
 543         printk("\n");
 544 }
 545
 546 static void
 547 idt77252_tx_dump(struct idt77252_dev *card)
 548 {
 549         struct atm_vcc *vcc;
 550         struct vc_map *vc;
 551         int i;
 552
 553         printk("%s\n", __func__);
 554         for (i = 0; i < card->tct_size; i++) {
 555                 vc = card->vcs[i];
 556                 if (!vc)
 557                         continue;
 558
 559                 vcc = NULL;
 560                 if (vc->rx_vcc)
 561                         vcc = vc->rx_vcc;
 562                 else if (vc->tx_vcc)
 563                         vcc = vc->tx_vcc;
 564
 565                 if (!vcc)
 566                         continue;
 567
 568                 printk("%s: Connection %d:\n", card->name, vc->index);
 569                 dump_tct(card, vc->index);
 570         }
 571 }
 572 #endif
 573
 574
 575 /*****************************************************************************/
 576 /*                                                                           */
 577 /* SCQ Handling                                                              */
 578 /*                                                                           */
 579 /*****************************************************************************/
 580
 581 static int
 582 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
 583 {
 584         struct sb_pool *pool = &card->sbpool[queue];
 585         int index;
 586
 587         index = pool->index;
 588         while (pool->skb[index]) {
 589                 index = (index + 1) & FBQ_MASK;
 590                 if (index == pool->index)
 591                         return -ENOBUFS;
 592         }
 593
 594         pool->skb[index] = skb;
 595         IDT77252_PRV_POOL(skb) = POOL_HANDLE(queue, index);
 596
 597         pool->index = (index + 1) & FBQ_MASK;
 598         return 0;
 599 }
 600
 601 static void
 602 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
 603 {
 604         unsigned int queue, index;
 605         u32 handle;
 606
 607         handle = IDT77252_PRV_POOL(skb);
 608
 609         queue = POOL_QUEUE(handle);
 610         if (queue > 3)
 611                 return;
 612
 613         index = POOL_INDEX(handle);
 614         if (index > FBQ_SIZE - 1)
 615                 return;
 616
 617         card->sbpool[queue].skb[index] = NULL;
 618 }
 619
 620 static struct sk_buff *
 621 sb_pool_skb(struct idt77252_dev *card, u32 handle)
 622 {
 623         unsigned int queue, index;
 624
 625         queue = POOL_QUEUE(handle);
 626         if (queue > 3)
 627                 return NULL;
 628
 629         index = POOL_INDEX(handle);
 630         if (index > FBQ_SIZE - 1)
 631                 return NULL;
 632
 633         return card->sbpool[queue].skb[index];
 634 }
 635
 636 static struct scq_info *
 637 alloc_scq(struct idt77252_dev *card, int class)
 638 {
 639         struct scq_info *scq;
 640
 641         scq = kzalloc(sizeof(struct scq_info), GFP_KERNEL);
 642         if (!scq)
 643                 return NULL;
 644         scq->base = pci_zalloc_consistent(card->pcidev, SCQ_SIZE, &scq->paddr);
 645         if (scq->base == NULL) {
 646                 kfree(scq);
 647                 return NULL;
 648         }
 649
 650         scq->next = scq->base;
 651         scq->last = scq->base + (SCQ_ENTRIES - 1);
 652         atomic_set(&scq->used, 0);
 653
 654         spin_lock_init(&scq->lock);
 655         spin_lock_init(&scq->skblock);
 656
 657         skb_queue_head_init(&scq->transmit);
 658         skb_queue_head_init(&scq->pending);
 659
 660         TXPRINTK("idt77252: SCQ: base 0x%p, next 0x%p, last 0x%p, paddr %08llx\n",
 661                  scq->base, scq->next, scq->last, (unsigned long long)scq->paddr);
 662
 663         return scq;
 664 }
 665
 666 static void
 667 free_scq(struct idt77252_dev *card, struct scq_info *scq)
 668 {
 669         struct sk_buff *skb;
 670         struct atm_vcc *vcc;
 671
 672         pci_free_consistent(card->pcidev, SCQ_SIZE,
 673                             scq->base, scq->paddr);
 674
 675         while ((skb = skb_dequeue(&scq->transmit))) {
 676                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 677                                  skb->len, PCI_DMA_TODEVICE);
 678
 679                 vcc = ATM_SKB(skb)->vcc;
 680                 if (vcc->pop)
 681                         vcc->pop(vcc, skb);
 682                 else
 683                         dev_kfree_skb(skb);
 684         }
 685
 686         while ((skb = skb_dequeue(&scq->pending))) {
 687                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 688                                  skb->len, PCI_DMA_TODEVICE);
 689
 690                 vcc = ATM_SKB(skb)->vcc;
 691                 if (vcc->pop)
 692                         vcc->pop(vcc, skb);
 693                 else
 694                         dev_kfree_skb(skb);
 695         }
 696
 697         kfree(scq);
 698 }
 699
 700
 701 static int
 702 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
 703 {
 704         struct scq_info *scq = vc->scq;
 705         unsigned long flags;
 706         struct scqe *tbd;
 707         int entries;
 708
 709         TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
 710
 711         atomic_inc(&scq->used);
 712         entries = atomic_read(&scq->used);
 713         if (entries > (SCQ_ENTRIES - 1)) {
 714                 atomic_dec(&scq->used);
 715                 goto out;
 716         }
 717
 718         skb_queue_tail(&scq->transmit, skb);
 719
 720         spin_lock_irqsave(&vc->lock, flags);
 721         if (vc->estimator) {
 722                 struct atm_vcc *vcc = vc->tx_vcc;
 723                 struct sock *sk = sk_atm(vcc);
 724
 725                 vc->estimator->cells += (skb->len + 47) / 48;
 726                 if (atomic_read(&sk->sk_wmem_alloc) >
 727                     (sk->sk_sndbuf >> 1)) {
 728                         u32 cps = vc->estimator->maxcps;
 729
 730                         vc->estimator->cps = cps;
 731                         vc->estimator->avcps = cps << 5;
 732                         if (vc->lacr < vc->init_er) {
 733                                 vc->lacr = vc->init_er;
 734                                 writel(TCMDQ_LACR | (vc->lacr << 16) |
 735                                        vc->index, SAR_REG_TCMDQ);
 736                         }
 737                 }
 738         }
 739         spin_unlock_irqrestore(&vc->lock, flags);
 740
 741         tbd = &IDT77252_PRV_TBD(skb);
 742
 743         spin_lock_irqsave(&scq->lock, flags);
 744         scq->next->word_1 = cpu_to_le32(tbd->word_1 |
 745                                         SAR_TBD_TSIF | SAR_TBD_GTSI);
 746         scq->next->word_2 = cpu_to_le32(tbd->word_2);
 747         scq->next->word_3 = cpu_to_le32(tbd->word_3);
 748         scq->next->word_4 = cpu_to_le32(tbd->word_4);
 749
 750         if (scq->next == scq->last)
 751                 scq->next = scq->base;
 752         else
 753                 scq->next++;
 754
 755         write_sram(card, scq->scd,
 756                    scq->paddr +
 757                    (u32)((unsigned long)scq->next - (unsigned long)scq->base));
 758         spin_unlock_irqrestore(&scq->lock, flags);
 759
 760         scq->trans_start = jiffies;
 761
 762         if (test_and_clear_bit(VCF_IDLE, &vc->flags)) {
 763                 writel(TCMDQ_START_LACR | (vc->lacr << 16) | vc->index,
 764                        SAR_REG_TCMDQ);
 765         }
 766
 767         TXPRINTK("%d entries in SCQ used (push).\n", atomic_read(&scq->used));
 768
 769         XPRINTK("%s: SCQ (after push %2d) head = 0x%x, next = 0x%p.\n",
 770                 card->name, atomic_read(&scq->used),
 771                 read_sram(card, scq->scd + 1), scq->next);
 772
 773         return 0;
 774
 775 out:
 776         if (time_after(jiffies, scq->trans_start + HZ)) {
 777                 printk("%s: Error pushing TBD for %d.%d\n",
 778                        card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
 779 #ifdef CONFIG_ATM_IDT77252_DEBUG
 780                 idt77252_tx_dump(card);
 781 #endif
 782                 scq->trans_start = jiffies;
 783         }
 784
 785         return -ENOBUFS;
 786 }
 787
 788
 789 static void
 790 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
 791 {
 792         struct scq_info *scq = vc->scq;
 793         struct sk_buff *skb;
 794         struct atm_vcc *vcc;
 795
 796         TXPRINTK("%s: SCQ (before drain %2d) next = 0x%p.\n",
 797                  card->name, atomic_read(&scq->used), scq->next);
 798
 799         skb = skb_dequeue(&scq->transmit);
 800         if (skb) {
 801                 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
 802
 803                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 804                                  skb->len, PCI_DMA_TODEVICE);
 805
 806                 vcc = ATM_SKB(skb)->vcc;
 807
 808                 if (vcc->pop)
 809                         vcc->pop(vcc, skb);
 810                 else
 811                         dev_kfree_skb(skb);
 812
 813                 atomic_inc(&vcc->stats->tx);
 814         }
 815
 816         atomic_dec(&scq->used);
 817
 818         spin_lock(&scq->skblock);
 819         while ((skb = skb_dequeue(&scq->pending))) {
 820                 if (push_on_scq(card, vc, skb)) {
 821                         skb_queue_head(&vc->scq->pending, skb);
 822                         break;
 823                 }
 824         }
 825         spin_unlock(&scq->skblock);
 826 }
 827
 828 static int
 829 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
 830           struct sk_buff *skb, int oam)
 831 {
 832         struct atm_vcc *vcc;
 833         struct scqe *tbd;
 834         unsigned long flags;
 835         int error;
 836         int aal;
 837
 838         if (skb->len == 0) {
 839                 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
 840                 return -EINVAL;
 841         }
 842
 843         TXPRINTK("%s: Sending %d bytes of data.\n",
 844                  card->name, skb->len);
 845
 846         tbd = &IDT77252_PRV_TBD(skb);
 847         vcc = ATM_SKB(skb)->vcc;
 848
 849         IDT77252_PRV_PADDR(skb) = pci_map_single(card->pcidev, skb->data,
 850                                                  skb->len, PCI_DMA_TODEVICE);
 851
 852         error = -EINVAL;
 853
 854         if (oam) {
 855                 if (skb->len != 52)
 856                         goto errout;
 857
 858                 tbd->word_1 = SAR_TBD_OAM | ATM_CELL_PAYLOAD | SAR_TBD_EPDU;
 859                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 860                 tbd->word_3 = 0x00000000;
 861                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 862                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 863
 864                 if (test_bit(VCF_RSV, &vc->flags))
 865                         vc = card->vcs[0];
 866
 867                 goto done;
 868         }
 869
 870         if (test_bit(VCF_RSV, &vc->flags)) {
 871                 printk("%s: Trying to transmit on reserved VC\n", card->name);
 872                 goto errout;
 873         }
 874
 875         aal = vcc->qos.aal;
 876
 877         switch (aal) {
 878         case ATM_AAL0:
 879         case ATM_AAL34:
 880                 if (skb->len > 52)
 881                         goto errout;
 882
 883                 if (aal == ATM_AAL0)
 884                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL0 |
 885                                       ATM_CELL_PAYLOAD;
 886                 else
 887                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL34 |
 888                                       ATM_CELL_PAYLOAD;
 889
 890                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 891                 tbd->word_3 = 0x00000000;
 892                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 893                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 894                 break;
 895
 896         case ATM_AAL5:
 897                 tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL5 | skb->len;
 898                 tbd->word_2 = IDT77252_PRV_PADDR(skb);
 899                 tbd->word_3 = skb->len;
 900                 tbd->word_4 = (vcc->vpi << SAR_TBD_VPI_SHIFT) |
 901                               (vcc->vci << SAR_TBD_VCI_SHIFT);
 902                 break;
 903
 904         case ATM_AAL1:
 905         case ATM_AAL2:
 906         default:
 907                 printk("%s: Traffic type not supported.\n", card->name);
 908                 error = -EPROTONOSUPPORT;
 909                 goto errout;
 910         }
 911
 912 done:
 913         spin_lock_irqsave(&vc->scq->skblock, flags);
 914         skb_queue_tail(&vc->scq->pending, skb);
 915
 916         while ((skb = skb_dequeue(&vc->scq->pending))) {
 917                 if (push_on_scq(card, vc, skb)) {
 918                         skb_queue_head(&vc->scq->pending, skb);
 919                         break;
 920                 }
 921         }
 922         spin_unlock_irqrestore(&vc->scq->skblock, flags);
 923
 924         return 0;
 925
 926 errout:
 927         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 928                          skb->len, PCI_DMA_TODEVICE);
 929         return error;
 930 }
 931
 932 static unsigned long
 933 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
 934 {
 935         int i;
 936
 937         for (i = 0; i < card->scd_size; i++) {
 938                 if (!card->scd2vc[i]) {
 939                         card->scd2vc[i] = vc;
 940                         vc->scd_index = i;
 941                         return card->scd_base + i * SAR_SRAM_SCD_SIZE;
 942                 }
 943         }
 944         return 0;
 945 }
 946
 947 static void
 948 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 949 {
 950         write_sram(card, scq->scd, scq->paddr);
 951         write_sram(card, scq->scd + 1, 0x00000000);
 952         write_sram(card, scq->scd + 2, 0xffffffff);
 953         write_sram(card, scq->scd + 3, 0x00000000);
 954 }
 955
 956 static void
 957 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 958 {
 959         return;
 960 }
 961
 962 /*****************************************************************************/
 963 /*                                                                           */
 964 /* RSQ Handling                                                              */
 965 /*                                                                           */
 966 /*****************************************************************************/
 967
 968 static int
 969 init_rsq(struct idt77252_dev *card)
 970 {
 971         struct rsq_entry *rsqe;
 972
 973         card->rsq.base = pci_zalloc_consistent(card->pcidev, RSQSIZE,
 974                                                &card->rsq.paddr);
 975         if (card->rsq.base == NULL) {
 976                 printk("%s: can't allocate RSQ.\n", card->name);
 977                 return -1;
 978         }
 979
 980         card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
 981         card->rsq.next = card->rsq.last;
 982         for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
 983                 rsqe->word_4 = 0;
 984
 985         writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
 986                SAR_REG_RSQH);
 987         writel(card->rsq.paddr, SAR_REG_RSQB);
 988
 989         IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
 990                 (unsigned long) card->rsq.base,
 991                 readl(SAR_REG_RSQB));
 992         IPRINTK("%s: RSQ head = 0x%x, base = 0x%x, tail = 0x%x.\n",
 993                 card->name,
 994                 readl(SAR_REG_RSQH),
 995                 readl(SAR_REG_RSQB),
 996                 readl(SAR_REG_RSQT));
 997
 998         return 0;
 999 }
1000
1001 static void
1002 deinit_rsq(struct idt77252_dev *card)
1003 {
1004         pci_free_consistent(card->pcidev, RSQSIZE,
1005                             card->rsq.base, card->rsq.paddr);
1006 }
1007
1008 static void
1009 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1010 {
1011         struct atm_vcc *vcc;
1012         struct sk_buff *skb;
1013         struct rx_pool *rpp;
1014         struct vc_map *vc;
1015         u32 header, vpi, vci;
1016         u32 stat;
1017         int i;
1018
1019         stat = le32_to_cpu(rsqe->word_4);
1020
1021         if (stat & SAR_RSQE_IDLE) {
1022                 RXPRINTK("%s: message about inactive connection.\n",
1023                          card->name);
1024                 return;
1025         }
1026
1027         skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1028         if (skb == NULL) {
1029                 printk("%s: NULL skb in %s, rsqe: %08x %08x %08x %08x\n",
1030                        card->name, __func__,
1031                        le32_to_cpu(rsqe->word_1), le32_to_cpu(rsqe->word_2),
1032                        le32_to_cpu(rsqe->word_3), le32_to_cpu(rsqe->word_4));
1033                 return;
1034         }
1035
1036         header = le32_to_cpu(rsqe->word_1);
1037         vpi = (header >> 16) & 0x00ff;
1038         vci = (header >>  0) & 0xffff;
1039
1040         RXPRINTK("%s: SDU for %d.%d received in buffer 0x%p (data 0x%p).\n",
1041                  card->name, vpi, vci, skb, skb->data);
1042
1043         if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1044                 printk("%s: SDU received for out-of-range vc %u.%u\n",
1045                        card->name, vpi, vci);
1046                 recycle_rx_skb(card, skb);
1047                 return;
1048         }
1049
1050         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1051         if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1052                 printk("%s: SDU received on non RX vc %u.%u\n",
1053                        card->name, vpi, vci);
1054                 recycle_rx_skb(card, skb);
1055                 return;
1056         }
1057
1058         vcc = vc->rx_vcc;
1059
1060         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(skb),
1061                                     skb_end_pointer(skb) - skb->data,
1062                                     PCI_DMA_FROMDEVICE);
1063
1064         if ((vcc->qos.aal == ATM_AAL0) ||
1065             (vcc->qos.aal == ATM_AAL34)) {
1066                 struct sk_buff *sb;
1067                 unsigned char *cell;
1068                 u32 aal0;
1069
1070                 cell = skb->data;
1071                 for (i = (stat & SAR_RSQE_CELLCNT); i; i--) {
1072                         if ((sb = dev_alloc_skb(64)) == NULL) {
1073                                 printk("%s: Can't allocate buffers for aal0.\n",
1074                                        card->name);
1075                                 atomic_add(i, &vcc->stats->rx_drop);
1076                                 break;
1077                         }
1078                         if (!atm_charge(vcc, sb->truesize)) {
1079                                 RXPRINTK("%s: atm_charge() dropped aal0 packets.\n",
1080                                          card->name);
1081                                 atomic_add(i - 1, &vcc->stats->rx_drop);
1082                                 dev_kfree_skb(sb);
1083                                 break;
1084                         }
1085                         aal0 = (vpi << ATM_HDR_VPI_SHIFT) |
1086                                (vci << ATM_HDR_VCI_SHIFT);
1087                         aal0 |= (stat & SAR_RSQE_EPDU) ? 0x00000002 : 0;
1088                         aal0 |= (stat & SAR_RSQE_CLP)  ? 0x00000001 : 0;
1089
1090                         *((u32 *) sb->data) = aal0;
1091                         skb_put(sb, sizeof(u32));
1092                         memcpy(skb_put(sb, ATM_CELL_PAYLOAD),
1093                                cell, ATM_CELL_PAYLOAD);
1094
1095                         ATM_SKB(sb)->vcc = vcc;
1096                         __net_timestamp(sb);
1097                         vcc->push(vcc, sb);
1098                         atomic_inc(&vcc->stats->rx);
1099
1100                         cell += ATM_CELL_PAYLOAD;
1101                 }
1102
1103                 recycle_rx_skb(card, skb);
1104                 return;
1105         }
1106         if (vcc->qos.aal != ATM_AAL5) {
1107                 printk("%s: Unexpected AAL type in dequeue_rx(): %d.\n",
1108                        card->name, vcc->qos.aal);
1109                 recycle_rx_skb(card, skb);
1110                 return;
1111         }
1112         skb->len = (stat & SAR_RSQE_CELLCNT) * ATM_CELL_PAYLOAD;
1113
1114         rpp = &vc->rcv.rx_pool;
1115
1116         __skb_queue_tail(&rpp->queue, skb);
1117         rpp->len += skb->len;
1118
1119         if (stat & SAR_RSQE_EPDU) {
1120                 unsigned char *l1l2;
1121                 unsigned int len;
1122
1123                 l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6);
1124
1125                 len = (l1l2[0] << 8) | l1l2[1];
1126                 len = len ? len : 0x10000;
1127
1128                 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1129
1130                 if ((len + 8 > rpp->len) || (len + (47 + 8) < rpp->len)) {
1131                         RXPRINTK("%s: AAL5 PDU size mismatch: %d != %d. "
1132                                  "(CDC: %08x)\n",
1133                                  card->name, len, rpp->len, readl(SAR_REG_CDC));
1134                         recycle_rx_pool_skb(card, rpp);
1135                         atomic_inc(&vcc->stats->rx_err);
1136                         return;
1137                 }
1138                 if (stat & SAR_RSQE_CRC) {
1139                         RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1140                         recycle_rx_pool_skb(card, rpp);
1141                         atomic_inc(&vcc->stats->rx_err);
1142                         return;
1143                 }
1144                 if (skb_queue_len(&rpp->queue) > 1) {
1145                         struct sk_buff *sb;
1146
1147                         skb = dev_alloc_skb(rpp->len);
1148                         if (!skb) {
1149                                 RXPRINTK("%s: Can't alloc RX skb.\n",
1150                                          card->name);
1151                                 recycle_rx_pool_skb(card, rpp);
1152                                 atomic_inc(&vcc->stats->rx_err);
1153                                 return;
1154                         }
1155                         if (!atm_charge(vcc, skb->truesize)) {
1156                                 recycle_rx_pool_skb(card, rpp);
1157                                 dev_kfree_skb(skb);
1158                                 return;
1159                         }
1160                         skb_queue_walk(&rpp->queue, sb)
1161                                 memcpy(skb_put(skb, sb->len),
1162                                        sb->data, sb->len);
1163
1164                         recycle_rx_pool_skb(card, rpp);
1165
1166                         skb_trim(skb, len);
1167                         ATM_SKB(skb)->vcc = vcc;
1168                         __net_timestamp(skb);
1169
1170                         vcc->push(vcc, skb);
1171                         atomic_inc(&vcc->stats->rx);
1172
1173                         return;
1174                 }
1175
1176                 flush_rx_pool(card, rpp);
1177
1178                 if (!atm_charge(vcc, skb->truesize)) {
1179                         recycle_rx_skb(card, skb);
1180                         return;
1181                 }
1182
1183                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1184                                  skb_end_pointer(skb) - skb->data,
1185                                  PCI_DMA_FROMDEVICE);
1186                 sb_pool_remove(card, skb);
1187
1188                 skb_trim(skb, len);
1189                 ATM_SKB(skb)->vcc = vcc;
1190                 __net_timestamp(skb);
1191
1192                 vcc->push(vcc, skb);
1193                 atomic_inc(&vcc->stats->rx);
1194
1195                 if (skb->truesize > SAR_FB_SIZE_3)
1196                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1197                 else if (skb->truesize > SAR_FB_SIZE_2)
1198                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1199                 else if (skb->truesize > SAR_FB_SIZE_1)
1200                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1201                 else
1202                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1203                 return;
1204         }
1205 }
1206
1207 static void
1208 idt77252_rx(struct idt77252_dev *card)
1209 {
1210         struct rsq_entry *rsqe;
1211
1212         if (card->rsq.next == card->rsq.last)
1213                 rsqe = card->rsq.base;
1214         else
1215                 rsqe = card->rsq.next + 1;
1216
1217         if (!(le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID)) {
1218                 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1219                 return;
1220         }
1221
1222         do {
1223                 dequeue_rx(card, rsqe);
1224                 rsqe->word_4 = 0;
1225                 card->rsq.next = rsqe;
1226                 if (card->rsq.next == card->rsq.last)
1227                         rsqe = card->rsq.base;
1228                 else
1229                         rsqe = card->rsq.next + 1;
1230         } while (le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID);
1231
1232         writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1233                SAR_REG_RSQH);
1234 }
1235
1236 static void
1237 idt77252_rx_raw(struct idt77252_dev *card)
1238 {
1239         struct sk_buff  *queue;
1240         u32             head, tail;
1241         struct atm_vcc  *vcc;
1242         struct vc_map   *vc;
1243         struct sk_buff  *sb;
1244
1245         if (card->raw_cell_head == NULL) {
1246                 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1247                 card->raw_cell_head = sb_pool_skb(card, handle);
1248         }
1249
1250         queue = card->raw_cell_head;
1251         if (!queue)
1252                 return;
1253
1254         head = IDT77252_PRV_PADDR(queue) + (queue->data - queue->head - 16);
1255         tail = readl(SAR_REG_RAWCT);
1256
1257         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(queue),
1258                                     skb_end_offset(queue) - 16,
1259                                     PCI_DMA_FROMDEVICE);
1260
1261         while (head != tail) {
1262                 unsigned int vpi, vci;
1263                 u32 header;
1264
1265                 header = le32_to_cpu(*(u32 *) &queue->data[0]);
1266
1267                 vpi = (header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1268                 vci = (header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1269
1270 #ifdef CONFIG_ATM_IDT77252_DEBUG
1271                 if (debug & DBG_RAW_CELL) {
1272                         int i;
1273
1274                         printk("%s: raw cell %x.%02x.%04x.%x.%x\n",
1275                                card->name, (header >> 28) & 0x000f,
1276                                (header >> 20) & 0x00ff,
1277                                (header >>  4) & 0xffff,
1278                                (header >>  1) & 0x0007,
1279                                (header >>  0) & 0x0001);
1280                         for (i = 16; i < 64; i++)
1281                                 printk(" %02x", queue->data[i]);
1282                         printk("\n");
1283                 }
1284 #endif
1285
1286                 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1287                         RPRINTK("%s: SDU received for out-of-range vc %u.%u\n",
1288                                 card->name, vpi, vci);
1289                         goto drop;
1290                 }
1291
1292                 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1293                 if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1294                         RPRINTK("%s: SDU received on non RX vc %u.%u\n",
1295                                 card->name, vpi, vci);
1296                         goto drop;
1297                 }
1298
1299                 vcc = vc->rx_vcc;
1300
1301                 if (vcc->qos.aal != ATM_AAL0) {
1302                         RPRINTK("%s: raw cell for non AAL0 vc %u.%u\n",
1303                                 card->name, vpi, vci);
1304                         atomic_inc(&vcc->stats->rx_drop);
1305                         goto drop;
1306                 }
1307
1308                 if ((sb = dev_alloc_skb(64)) == NULL) {
1309                         printk("%s: Can't allocate buffers for AAL0.\n",
1310                                card->name);
1311                         atomic_inc(&vcc->stats->rx_err);
1312                         goto drop;
1313                 }
1314
1315                 if (!atm_charge(vcc, sb->truesize)) {
1316                         RXPRINTK("%s: atm_charge() dropped AAL0 packets.\n",
1317                                  card->name);
1318                         dev_kfree_skb(sb);
1319                         goto drop;
1320                 }
1321
1322                 *((u32 *) sb->data) = header;
1323                 skb_put(sb, sizeof(u32));
1324                 memcpy(skb_put(sb, ATM_CELL_PAYLOAD), &(queue->data[16]),
1325                        ATM_CELL_PAYLOAD);
1326
1327                 ATM_SKB(sb)->vcc = vcc;
1328                 __net_timestamp(sb);
1329                 vcc->push(vcc, sb);
1330                 atomic_inc(&vcc->stats->rx);
1331
1332 drop:
1333                 skb_pull(queue, 64);
1334
1335                 head = IDT77252_PRV_PADDR(queue)
1336                                         + (queue->data - queue->head - 16);
1337
1338                 if (queue->len < 128) {
1339                         struct sk_buff *next;
1340                         u32 handle;
1341
1342                         head = le32_to_cpu(*(u32 *) &queue->data[0]);
1343                         handle = le32_to_cpu(*(u32 *) &queue->data[4]);
1344
1345                         next = sb_pool_skb(card, handle);
1346                         recycle_rx_skb(card, queue);
1347
1348                         if (next) {
1349                                 card->raw_cell_head = next;
1350                                 queue = card->raw_cell_head;
1351                                 pci_dma_sync_single_for_cpu(card->pcidev,
1352                                                             IDT77252_PRV_PADDR(queue),
1353                                                             (skb_end_pointer(queue) -
1354                                                              queue->data),
1355                                                             PCI_DMA_FROMDEVICE);
1356                         } else {
1357                                 card->raw_cell_head = NULL;
1358                                 printk("%s: raw cell queue overrun\n",
1359                                        card->name);
1360                                 break;
1361                         }
1362                 }
1363         }
1364 }
1365
1366
1367 /*****************************************************************************/
1368 /*                                                                           */
1369 /* TSQ Handling                                                              */
1370 /*                                                                           */
1371 /*****************************************************************************/
1372
1373 static int
1374 init_tsq(struct idt77252_dev *card)
1375 {
1376         struct tsq_entry *tsqe;
1377
1378         card->tsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
1379                                               &card->tsq.paddr);
1380         if (card->tsq.base == NULL) {
1381                 printk("%s: can't allocate TSQ.\n", card->name);
1382                 return -1;
1383         }
1384         memset(card->tsq.base, 0, TSQSIZE);
1385
1386         card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1387         card->tsq.next = card->tsq.last;
1388         for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1389                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1390
1391         writel(card->tsq.paddr, SAR_REG_TSQB);
1392         writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1393                SAR_REG_TSQH);
1394
1395         return 0;
1396 }
1397
1398 static void
1399 deinit_tsq(struct idt77252_dev *card)
1400 {
1401         pci_free_consistent(card->pcidev, TSQSIZE,
1402                             card->tsq.base, card->tsq.paddr);
1403 }
1404
1405 static void
1406 idt77252_tx(struct idt77252_dev *card)
1407 {
1408         struct tsq_entry *tsqe;
1409         unsigned int vpi, vci;
1410         struct vc_map *vc;
1411         u32 conn, stat;
1412
1413         if (card->tsq.next == card->tsq.last)
1414                 tsqe = card->tsq.base;
1415         else
1416                 tsqe = card->tsq.next + 1;
1417
1418         TXPRINTK("idt77252_tx: tsq  %p: base %p, next %p, last %p\n", tsqe,
1419                  card->tsq.base, card->tsq.next, card->tsq.last);
1420         TXPRINTK("idt77252_tx: tsqb %08x, tsqt %08x, tsqh %08x, \n",
1421                  readl(SAR_REG_TSQB),
1422                  readl(SAR_REG_TSQT),
1423                  readl(SAR_REG_TSQH));
1424
1425         stat = le32_to_cpu(tsqe->word_2);
1426
1427         if (stat & SAR_TSQE_INVALID)
1428                 return;
1429
1430         do {
1431                 TXPRINTK("tsqe: 0x%p [0x%08x 0x%08x]\n", tsqe,
1432                          le32_to_cpu(tsqe->word_1),
1433                          le32_to_cpu(tsqe->word_2));
1434
1435                 switch (stat & SAR_TSQE_TYPE) {
1436                 case SAR_TSQE_TYPE_TIMER:
1437                         TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1438                         break;
1439
1440                 case SAR_TSQE_TYPE_IDLE:
1441
1442                         conn = le32_to_cpu(tsqe->word_1);
1443
1444                         if (SAR_TSQE_TAG(stat) == 0x10) {
1445 #ifdef  NOTDEF
1446                                 printk("%s: Connection %d halted.\n",
1447                                        card->name,
1448                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1449 #endif
1450                                 break;
1451                         }
1452
1453                         vc = card->vcs[conn & 0x1fff];
1454                         if (!vc) {
1455                                 printk("%s: could not find VC from conn %d\n",
1456                                        card->name, conn & 0x1fff);
1457                                 break;
1458                         }
1459
1460                         printk("%s: Connection %d IDLE.\n",
1461                                card->name, vc->index);
1462
1463                         set_bit(VCF_IDLE, &vc->flags);
1464                         break;
1465
1466                 case SAR_TSQE_TYPE_TSR:
1467
1468                         conn = le32_to_cpu(tsqe->word_1);
1469
1470                         vc = card->vcs[conn & 0x1fff];
1471                         if (!vc) {
1472                                 printk("%s: no VC at index %d\n",
1473                                        card->name,
1474                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1475                                 break;
1476                         }
1477
1478                         drain_scq(card, vc);
1479                         break;
1480
1481                 case SAR_TSQE_TYPE_TBD_COMP:
1482
1483                         conn = le32_to_cpu(tsqe->word_1);
1484
1485                         vpi = (conn >> SAR_TBD_VPI_SHIFT) & 0x00ff;
1486                         vci = (conn >> SAR_TBD_VCI_SHIFT) & 0xffff;
1487
1488                         if (vpi >= (1 << card->vpibits) ||
1489                             vci >= (1 << card->vcibits)) {
1490                                 printk("%s: TBD complete: "
1491                                        "out of range VPI.VCI %u.%u\n",
1492                                        card->name, vpi, vci);
1493                                 break;
1494                         }
1495
1496                         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1497                         if (!vc) {
1498                                 printk("%s: TBD complete: "
1499                                        "no VC at VPI.VCI %u.%u\n",
1500                                        card->name, vpi, vci);
1501                                 break;
1502                         }
1503
1504                         drain_scq(card, vc);
1505                         break;
1506                 }
1507
1508                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1509
1510                 card->tsq.next = tsqe;
1511                 if (card->tsq.next == card->tsq.last)
1512                         tsqe = card->tsq.base;
1513                 else
1514                         tsqe = card->tsq.next + 1;
1515
1516                 TXPRINTK("tsqe: %p: base %p, next %p, last %p\n", tsqe,
1517                          card->tsq.base, card->tsq.next, card->tsq.last);
1518
1519                 stat = le32_to_cpu(tsqe->word_2);
1520
1521         } while (!(stat & SAR_TSQE_INVALID));
1522
1523         writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1524                SAR_REG_TSQH);
1525
1526         XPRINTK("idt77252_tx-after writel%d: TSQ head = 0x%x, tail = 0x%x, next = 0x%p.\n",
1527                 card->index, readl(SAR_REG_TSQH),
1528                 readl(SAR_REG_TSQT), card->tsq.next);
1529 }
1530
1531
1532 static void
1533 tst_timer(unsigned long data)
1534 {
1535         struct idt77252_dev *card = (struct idt77252_dev *)data;
1536         unsigned long base, idle, jump;
1537         unsigned long flags;
1538         u32 pc;
1539         int e;
1540
1541         spin_lock_irqsave(&card->tst_lock, flags);
1542
1543         base = card->tst[card->tst_index];
1544         idle = card->tst[card->tst_index ^ 1];
1545
1546         if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1547                 jump = base + card->tst_size - 2;
1548
1549                 pc = readl(SAR_REG_NOW) >> 2;
1550                 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1551                         mod_timer(&card->tst_timer, jiffies + 1);
1552                         goto out;
1553                 }
1554
1555                 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1556
1557                 card->tst_index ^= 1;
1558                 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1559
1560                 base = card->tst[card->tst_index];
1561                 idle = card->tst[card->tst_index ^ 1];
1562
1563                 for (e = 0; e < card->tst_size - 2; e++) {
1564                         if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1565                                 write_sram(card, idle + e,
1566                                            card->soft_tst[e].tste & TSTE_MASK);
1567                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1568                         }
1569                 }
1570         }
1571
1572         if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1573
1574                 for (e = 0; e < card->tst_size - 2; e++) {
1575                         if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1576                                 write_sram(card, idle + e,
1577                                            card->soft_tst[e].tste & TSTE_MASK);
1578                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1579                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1580                         }
1581                 }
1582
1583                 jump = base + card->tst_size - 2;
1584
1585                 write_sram(card, jump, TSTE_OPC_NULL);
1586                 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1587
1588                 mod_timer(&card->tst_timer, jiffies + 1);
1589         }
1590
1591 out:
1592         spin_unlock_irqrestore(&card->tst_lock, flags);
1593 }
1594
1595 static int
1596 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1597            int n, unsigned int opc)
1598 {
1599         unsigned long cl, avail;
1600         unsigned long idle;
1601         int e, r;
1602         u32 data;
1603
1604         avail = card->tst_size - 2;
1605         for (e = 0; e < avail; e++) {
1606                 if (card->soft_tst[e].vc == NULL)
1607                         break;
1608         }
1609         if (e >= avail) {
1610                 printk("%s: No free TST entries found\n", card->name);
1611                 return -1;
1612         }
1613
1614         NPRINTK("%s: conn %d: first TST entry at %d.\n",
1615                 card->name, vc ? vc->index : -1, e);
1616
1617         r = n;
1618         cl = avail;
1619         data = opc & TSTE_OPC_MASK;
1620         if (vc && (opc != TSTE_OPC_NULL))
1621                 data = opc | vc->index;
1622
1623         idle = card->tst[card->tst_index ^ 1];
1624
1625         /*
1626          * Fill Soft TST.
1627          */
1628         while (r > 0) {
1629                 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1630                         if (vc)
1631                                 card->soft_tst[e].vc = vc;
1632                         else
1633                                 card->soft_tst[e].vc = (void *)-1;
1634
1635                         card->soft_tst[e].tste = data;
1636                         if (timer_pending(&card->tst_timer))
1637                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1638                         else {
1639                                 write_sram(card, idle + e, data);
1640                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1641                         }
1642
1643                         cl -= card->tst_size;
1644                         r--;
1645                 }
1646
1647                 if (++e == avail)
1648                         e = 0;
1649                 cl += n;
1650         }
1651
1652         return 0;
1653 }
1654
1655 static int
1656 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1657 {
1658         unsigned long flags;
1659         int res;
1660
1661         spin_lock_irqsave(&card->tst_lock, flags);
1662
1663         res = __fill_tst(card, vc, n, opc);
1664
1665         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1666         if (!timer_pending(&card->tst_timer))
1667                 mod_timer(&card->tst_timer, jiffies + 1);
1668
1669         spin_unlock_irqrestore(&card->tst_lock, flags);
1670         return res;
1671 }
1672
1673 static int
1674 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1675 {
1676         unsigned long idle;
1677         int e;
1678
1679         idle = card->tst[card->tst_index ^ 1];
1680
1681         for (e = 0; e < card->tst_size - 2; e++) {
1682                 if (card->soft_tst[e].vc == vc) {
1683                         card->soft_tst[e].vc = NULL;
1684
1685                         card->soft_tst[e].tste = TSTE_OPC_VAR;
1686                         if (timer_pending(&card->tst_timer))
1687                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1688                         else {
1689                                 write_sram(card, idle + e, TSTE_OPC_VAR);
1690                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1691                         }
1692                 }
1693         }
1694
1695         return 0;
1696 }
1697
1698 static int
1699 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1700 {
1701         unsigned long flags;
1702         int res;
1703
1704         spin_lock_irqsave(&card->tst_lock, flags);
1705
1706         res = __clear_tst(card, vc);
1707
1708         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1709         if (!timer_pending(&card->tst_timer))
1710                 mod_timer(&card->tst_timer, jiffies + 1);
1711
1712         spin_unlock_irqrestore(&card->tst_lock, flags);
1713         return res;
1714 }
1715
1716 static int
1717 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1718            int n, unsigned int opc)
1719 {
1720         unsigned long flags;
1721         int res;
1722
1723         spin_lock_irqsave(&card->tst_lock, flags);
1724
1725         __clear_tst(card, vc);
1726         res = __fill_tst(card, vc, n, opc);
1727
1728         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1729         if (!timer_pending(&card->tst_timer))
1730                 mod_timer(&card->tst_timer, jiffies + 1);
1731
1732         spin_unlock_irqrestore(&card->tst_lock, flags);
1733         return res;
1734 }
1735
1736
1737 static int
1738 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1739 {
1740         unsigned long tct;
1741
1742         tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1743
1744         switch (vc->class) {
1745         case SCHED_CBR:
1746                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1747                         card->name, tct, vc->scq->scd);
1748
1749                 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1750                 write_sram(card, tct + 1, 0);
1751                 write_sram(card, tct + 2, 0);
1752                 write_sram(card, tct + 3, 0);
1753                 write_sram(card, tct + 4, 0);
1754                 write_sram(card, tct + 5, 0);
1755                 write_sram(card, tct + 6, 0);
1756                 write_sram(card, tct + 7, 0);
1757                 break;
1758
1759         case SCHED_UBR:
1760                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1761                         card->name, tct, vc->scq->scd);
1762
1763                 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1764                 write_sram(card, tct + 1, 0);
1765                 write_sram(card, tct + 2, TCT_TSIF);
1766                 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1767                 write_sram(card, tct + 4, 0);
1768                 write_sram(card, tct + 5, vc->init_er);
1769                 write_sram(card, tct + 6, 0);
1770                 write_sram(card, tct + 7, TCT_FLAG_UBR);
1771                 break;
1772
1773         case SCHED_VBR:
1774         case SCHED_ABR:
1775         default:
1776                 return -ENOSYS;
1777         }
1778
1779         return 0;
1780 }
1781
1782 /*****************************************************************************/
1783 /*                                                                           */
1784 /* FBQ Handling                                                              */
1785 /*                                                                           */
1786 /*****************************************************************************/
1787
1788 static __inline__ int
1789 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1790 {
1791         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) & 0x0f;
1792 }
1793
1794 static __inline__ int
1795 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1796 {
1797         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) == 0x0f;
1798 }
1799
1800 static int
1801 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1802 {
1803         unsigned long flags;
1804         u32 handle;
1805         u32 addr;
1806
1807         skb->data = skb->head;
1808         skb_reset_tail_pointer(skb);
1809         skb->len = 0;
1810
1811         skb_reserve(skb, 16);
1812
1813         switch (queue) {
1814         case 0:
1815                 skb_put(skb, SAR_FB_SIZE_0);
1816                 break;
1817         case 1:
1818                 skb_put(skb, SAR_FB_SIZE_1);
1819                 break;
1820         case 2:
1821                 skb_put(skb, SAR_FB_SIZE_2);
1822                 break;
1823         case 3:
1824                 skb_put(skb, SAR_FB_SIZE_3);
1825                 break;
1826         default:
1827                 return -1;
1828         }
1829
1830         if (idt77252_fbq_full(card, queue))
1831                 return -1;
1832
1833         memset(&skb->data[(skb->len & ~(0x3f)) - 64], 0, 2 * sizeof(u32));
1834
1835         handle = IDT77252_PRV_POOL(skb);
1836         addr = IDT77252_PRV_PADDR(skb);
1837
1838         spin_lock_irqsave(&card->cmd_lock, flags);
1839         writel(handle, card->fbq[queue]);
1840         writel(addr, card->fbq[queue]);
1841         spin_unlock_irqrestore(&card->cmd_lock, flags);
1842
1843         return 0;
1844 }
1845
1846 static void
1847 add_rx_skb(struct idt77252_dev *card, int queue,
1848            unsigned int size, unsigned int count)
1849 {
1850         struct sk_buff *skb;
1851         dma_addr_t paddr;
1852         u32 handle;
1853
1854         while (count--) {
1855                 skb = dev_alloc_skb(size);
1856                 if (!skb)
1857                         return;
1858
1859                 if (sb_pool_add(card, skb, queue)) {
1860                         printk("%s: SB POOL full\n", __func__);
1861                         goto outfree;
1862                 }
1863
1864                 paddr = pci_map_single(card->pcidev, skb->data,
1865                                        skb_end_pointer(skb) - skb->data,
1866                                        PCI_DMA_FROMDEVICE);
1867                 IDT77252_PRV_PADDR(skb) = paddr;
1868
1869                 if (push_rx_skb(card, skb, queue)) {
1870                         printk("%s: FB QUEUE full\n", __func__);
1871                         goto outunmap;
1872                 }
1873         }
1874
1875         return;
1876
1877 outunmap:
1878         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1879                          skb_end_pointer(skb) - skb->data, PCI_DMA_FROMDEVICE);
1880
1881         handle = IDT77252_PRV_POOL(skb);
1882         card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1883
1884 outfree:
1885         dev_kfree_skb(skb);
1886 }
1887
1888
1889 static void
1890 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1891 {
1892         u32 handle = IDT77252_PRV_POOL(skb);
1893         int err;
1894
1895         pci_dma_sync_single_for_device(card->pcidev, IDT77252_PRV_PADDR(skb),
1896                                        skb_end_pointer(skb) - skb->data,
1897                                        PCI_DMA_FROMDEVICE);
1898
1899         err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1900         if (err) {
1901                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1902                                  skb_end_pointer(skb) - skb->data,
1903                                  PCI_DMA_FROMDEVICE);
1904                 sb_pool_remove(card, skb);
1905                 dev_kfree_skb(skb);
1906         }
1907 }
1908
1909 static void
1910 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1911 {
1912         skb_queue_head_init(&rpp->queue);
1913         rpp->len = 0;
1914 }
1915
1916 static void
1917 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1918 {
1919         struct sk_buff *skb, *tmp;
1920
1921         skb_queue_walk_safe(&rpp->queue, skb, tmp)
1922                 recycle_rx_skb(card, skb);
1923
1924         flush_rx_pool(card, rpp);
1925 }
1926
1927 /*****************************************************************************/
1928 /*                                                                           */
1929 /* ATM Interface                                                             */
1930 /*                                                                           */
1931 /*****************************************************************************/
1932
1933 static void
1934 idt77252_phy_put(struct atm_dev *dev, unsigned char value, unsigned long addr)
1935 {
1936         write_utility(dev->dev_data, 0x100 + (addr & 0x1ff), value);
1937 }
1938
1939 static unsigned char
1940 idt77252_phy_get(struct atm_dev *dev, unsigned long addr)
1941 {
1942         return read_utility(dev->dev_data, 0x100 + (addr & 0x1ff));
1943 }
1944
1945 static inline int
1946 idt77252_send_skb(struct atm_vcc *vcc, struct sk_buff *skb, int oam)
1947 {
1948         struct atm_dev *dev = vcc->dev;
1949         struct idt77252_dev *card = dev->dev_data;
1950         struct vc_map *vc = vcc->dev_data;
1951         int err;
1952
1953         if (vc == NULL) {
1954                 printk("%s: NULL connection in send().\n", card->name);
1955                 atomic_inc(&vcc->stats->tx_err);
1956                 dev_kfree_skb(skb);
1957                 return -EINVAL;
1958         }
1959         if (!test_bit(VCF_TX, &vc->flags)) {
1960                 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1961                 atomic_inc(&vcc->stats->tx_err);
1962                 dev_kfree_skb(skb);
1963                 return -EINVAL;
1964         }
1965
1966         switch (vcc->qos.aal) {
1967         case ATM_AAL0:
1968         case ATM_AAL1:
1969         case ATM_AAL5:
1970                 break;
1971         default:
1972                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1973                 atomic_inc(&vcc->stats->tx_err);
1974                 dev_kfree_skb(skb);
1975                 return -EINVAL;
1976         }
1977
1978         if (skb_shinfo(skb)->nr_frags != 0) {
1979                 printk("%s: No scatter-gather yet.\n", card->name);
1980                 atomic_inc(&vcc->stats->tx_err);
1981                 dev_kfree_skb(skb);
1982                 return -EINVAL;
1983         }
1984         ATM_SKB(skb)->vcc = vcc;
1985
1986         err = queue_skb(card, vc, skb, oam);
1987         if (err) {
1988                 atomic_inc(&vcc->stats->tx_err);
1989                 dev_kfree_skb(skb);
1990                 return err;
1991         }
1992
1993         return 0;
1994 }
1995
1996 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb)
1997 {
1998         return idt77252_send_skb(vcc, skb, 0);
1999 }
2000
2001 static int
2002 idt77252_send_oam(struct atm_vcc *vcc, void *cell, int flags)
2003 {
2004         struct atm_dev *dev = vcc->dev;
2005         struct idt77252_dev *card = dev->dev_data;
2006         struct sk_buff *skb;
2007
2008         skb = dev_alloc_skb(64);
2009         if (!skb) {
2010                 printk("%s: Out of memory in send_oam().\n", card->name);
2011                 atomic_inc(&vcc->stats->tx_err);
2012                 return -ENOMEM;
2013         }
2014         atomic_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc);
2015
2016         memcpy(skb_put(skb, 52), cell, 52);
2017
2018         return idt77252_send_skb(vcc, skb, 1);
2019 }
2020
2021 static __inline__ unsigned int
2022 idt77252_fls(unsigned int x)
2023 {
2024         int r = 1;
2025
2026         if (x == 0)
2027                 return 0;
2028         if (x & 0xffff0000) {
2029                 x >>= 16;
2030                 r += 16;
2031         }
2032         if (x & 0xff00) {
2033                 x >>= 8;
2034                 r += 8;
2035         }
2036         if (x & 0xf0) {
2037                 x >>= 4;
2038                 r += 4;
2039         }
2040         if (x & 0xc) {
2041                 x >>= 2;
2042                 r += 2;
2043         }
2044         if (x & 0x2)
2045                 r += 1;
2046         return r;
2047 }
2048
2049 static u16
2050 idt77252_int_to_atmfp(unsigned int rate)
2051 {
2052         u16 m, e;
2053
2054         if (rate == 0)
2055                 return 0;
2056         e = idt77252_fls(rate) - 1;
2057         if (e < 9)
2058                 m = (rate - (1 << e)) << (9 - e);
2059         else if (e == 9)
2060                 m = (rate - (1 << e));
2061         else /* e > 9 */
2062                 m = (rate - (1 << e)) >> (e - 9);
2063         return 0x4000 | (e << 9) | m;
2064 }
2065
2066 static u8
2067 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2068 {
2069         u16 afp;
2070
2071         afp = idt77252_int_to_atmfp(pcr < 0 ? -pcr : pcr);
2072         if (pcr < 0)
2073                 return rate_to_log[(afp >> 5) & 0x1ff];
2074         return rate_to_log[((afp >> 5) + 1) & 0x1ff];
2075 }
2076
2077 static void
2078 idt77252_est_timer(unsigned long data)
2079 {
2080         struct vc_map *vc = (struct vc_map *)data;
2081         struct idt77252_dev *card = vc->card;
2082         struct rate_estimator *est;
2083         unsigned long flags;
2084         u32 rate, cps;
2085         u64 ncells;
2086         u8 lacr;
2087
2088         spin_lock_irqsave(&vc->lock, flags);
2089         est = vc->estimator;
2090         if (!est)
2091                 goto out;
2092
2093         ncells = est->cells;
2094
2095         rate = ((u32)(ncells - est->last_cells)) << (7 - est->interval);
2096         est->last_cells = ncells;
2097         est->avcps += ((long)rate - (long)est->avcps) >> est->ewma_log;
2098         est->cps = (est->avcps + 0x1f) >> 5;
2099
2100         cps = est->cps;
2101         if (cps < (est->maxcps >> 4))
2102                 cps = est->maxcps >> 4;
2103
2104         lacr = idt77252_rate_logindex(card, cps);
2105         if (lacr > vc->max_er)
2106                 lacr = vc->max_er;
2107
2108         if (lacr != vc->lacr) {
2109                 vc->lacr = lacr;
2110                 writel(TCMDQ_LACR|(vc->lacr << 16)|vc->index, SAR_REG_TCMDQ);
2111         }
2112
2113         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2114         add_timer(&est->timer);
2115
2116 out:
2117         spin_unlock_irqrestore(&vc->lock, flags);
2118 }
2119
2120 static struct rate_estimator *
2121 idt77252_init_est(struct vc_map *vc, int pcr)
2122 {
2123         struct rate_estimator *est;
2124
2125         est = kzalloc(sizeof(struct rate_estimator), GFP_KERNEL);
2126         if (!est)
2127                 return NULL;
2128         est->maxcps = pcr < 0 ? -pcr : pcr;
2129         est->cps = est->maxcps;
2130         est->avcps = est->cps << 5;
2131
2132         est->interval = 2;              /* XXX: make this configurable */
2133         est->ewma_log = 2;              /* XXX: make this configurable */
2134         init_timer(&est->timer);
2135         est->timer.data = (unsigned long)vc;
2136         est->timer.function = idt77252_est_timer;
2137
2138         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2139         add_timer(&est->timer);
2140
2141         return est;
2142 }
2143
2144 static int
2145 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2146                   struct atm_vcc *vcc, struct atm_qos *qos)
2147 {
2148         int tst_free, tst_used, tst_entries;
2149         unsigned long tmpl, modl;
2150         int tcr, tcra;
2151
2152         if ((qos->txtp.max_pcr == 0) &&
2153             (qos->txtp.pcr == 0) && (qos->txtp.min_pcr == 0)) {
2154                 printk("%s: trying to open a CBR VC with cell rate = 0\n",
2155                        card->name);
2156                 return -EINVAL;
2157         }
2158
2159         tst_used = 0;
2160         tst_free = card->tst_free;
2161         if (test_bit(VCF_TX, &vc->flags))
2162                 tst_used = vc->ntste;
2163         tst_free += tst_used;
2164
2165         tcr = atm_pcr_goal(&qos->txtp);
2166         tcra = tcr >= 0 ? tcr : -tcr;
2167
2168         TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2169
2170         tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2171         modl = tmpl % (unsigned long)card->utopia_pcr;
2172
2173         tst_entries = (int) (tmpl / card->utopia_pcr);
2174         if (tcr > 0) {
2175                 if (modl > 0)
2176                         tst_entries++;
2177         } else if (tcr == 0) {
2178                 tst_entries = tst_free - SAR_TST_RESERVED;
2179                 if (tst_entries <= 0) {
2180                         printk("%s: no CBR bandwidth free.\n", card->name);
2181                         return -ENOSR;
2182                 }
2183         }
2184
2185         if (tst_entries == 0) {
2186                 printk("%s: selected CBR bandwidth < granularity.\n",
2187                        card->name);
2188                 return -EINVAL;
2189         }
2190
2191         if (tst_entries > (tst_free - SAR_TST_RESERVED)) {
2192                 printk("%s: not enough CBR bandwidth free.\n", card->name);
2193                 return -ENOSR;
2194         }
2195
2196         vc->ntste = tst_entries;
2197
2198         card->tst_free = tst_free - tst_entries;
2199         if (test_bit(VCF_TX, &vc->flags)) {
2200                 if (tst_used == tst_entries)
2201                         return 0;
2202
2203                 OPRINTK("%s: modify %d -> %d entries in TST.\n",
2204                         card->name, tst_used, tst_entries);
2205                 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2206                 return 0;
2207         }
2208
2209         OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2210         fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2211         return 0;
2212 }
2213
2214 static int
2215 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2216                   struct atm_vcc *vcc, struct atm_qos *qos)
2217 {
2218         unsigned long flags;
2219         int tcr;
2220
2221         spin_lock_irqsave(&vc->lock, flags);
2222         if (vc->estimator) {
2223                 del_timer(&vc->estimator->timer);
2224                 kfree(vc->estimator);
2225                 vc->estimator = NULL;
2226         }
2227         spin_unlock_irqrestore(&vc->lock, flags);
2228
2229         tcr = atm_pcr_goal(&qos->txtp);
2230         if (tcr == 0)
2231                 tcr = card->link_pcr;
2232
2233         vc->estimator = idt77252_init_est(vc, tcr);
2234
2235         vc->class = SCHED_UBR;
2236         vc->init_er = idt77252_rate_logindex(card, tcr);
2237         vc->lacr = vc->init_er;
2238         if (tcr < 0)
2239                 vc->max_er = vc->init_er;
2240         else
2241                 vc->max_er = 0xff;
2242
2243         return 0;
2244 }
2245
2246 static int
2247 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2248                  struct atm_vcc *vcc, struct atm_qos *qos)
2249 {
2250         int error;
2251
2252         if (test_bit(VCF_TX, &vc->flags))
2253                 return -EBUSY;
2254
2255         switch (qos->txtp.traffic_class) {
2256                 case ATM_CBR:
2257                         vc->class = SCHED_CBR;
2258                         break;
2259
2260                 case ATM_UBR:
2261                         vc->class = SCHED_UBR;
2262                         break;
2263
2264                 case ATM_VBR:
2265                 case ATM_ABR:
2266                 default:
2267                         return -EPROTONOSUPPORT;
2268         }
2269
2270         vc->scq = alloc_scq(card, vc->class);
2271         if (!vc->scq) {
2272                 printk("%s: can't get SCQ.\n", card->name);
2273                 return -ENOMEM;
2274         }
2275
2276         vc->scq->scd = get_free_scd(card, vc);
2277         if (vc->scq->scd == 0) {
2278                 printk("%s: no SCD available.\n", card->name);
2279                 free_scq(card, vc->scq);
2280                 return -ENOMEM;
2281         }
2282
2283         fill_scd(card, vc->scq, vc->class);
2284
2285         if (set_tct(card, vc)) {
2286                 printk("%s: class %d not supported.\n",
2287                        card->name, qos->txtp.traffic_class);
2288
2289                 card->scd2vc[vc->scd_index] = NULL;
2290                 free_scq(card, vc->scq);
2291                 return -EPROTONOSUPPORT;
2292         }
2293
2294         switch (vc->class) {
2295                 case SCHED_CBR:
2296                         error = idt77252_init_cbr(card, vc, vcc, qos);
2297                         if (error) {
2298                                 card->scd2vc[vc->scd_index] = NULL;
2299                                 free_scq(card, vc->scq);
2300                                 return error;
2301                         }
2302
2303                         clear_bit(VCF_IDLE, &vc->flags);
2304                         writel(TCMDQ_START | vc->index, SAR_REG_TCMDQ);
2305                         break;
2306
2307                 case SCHED_UBR:
2308                         error = idt77252_init_ubr(card, vc, vcc, qos);
2309                         if (error) {
2310                                 card->scd2vc[vc->scd_index] = NULL;
2311                                 free_scq(card, vc->scq);
2312                                 return error;
2313                         }
2314
2315                         set_bit(VCF_IDLE, &vc->flags);
2316                         break;
2317         }
2318
2319         vc->tx_vcc = vcc;
2320         set_bit(VCF_TX, &vc->flags);
2321         return 0;
2322 }
2323
2324 static int
2325 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2326                  struct atm_vcc *vcc, struct atm_qos *qos)
2327 {
2328         unsigned long flags;
2329         unsigned long addr;
2330         u32 rcte = 0;
2331
2332         if (test_bit(VCF_RX, &vc->flags))
2333                 return -EBUSY;
2334
2335         vc->rx_vcc = vcc;
2336         set_bit(VCF_RX, &vc->flags);
2337
2338         if ((vcc->vci == 3) || (vcc->vci == 4))
2339                 return 0;
2340
2341         flush_rx_pool(card, &vc->rcv.rx_pool);
2342
2343         rcte |= SAR_RCTE_CONNECTOPEN;
2344         rcte |= SAR_RCTE_RAWCELLINTEN;
2345
2346         switch (qos->aal) {
2347                 case ATM_AAL0:
2348                         rcte |= SAR_RCTE_RCQ;
2349                         break;
2350                 case ATM_AAL1:
2351                         rcte |= SAR_RCTE_OAM; /* Let SAR drop Video */
2352                         break;
2353                 case ATM_AAL34:
2354                         rcte |= SAR_RCTE_AAL34;
2355                         break;
2356                 case ATM_AAL5:
2357                         rcte |= SAR_RCTE_AAL5;
2358                         break;
2359                 default:
2360                         rcte |= SAR_RCTE_RCQ;
2361                         break;
2362         }
2363
2364         if (qos->aal != ATM_AAL5)
2365                 rcte |= SAR_RCTE_FBP_1;
2366         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_2)
2367                 rcte |= SAR_RCTE_FBP_3;
2368         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_1)
2369                 rcte |= SAR_RCTE_FBP_2;
2370         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_0)
2371                 rcte |= SAR_RCTE_FBP_1;
2372         else
2373                 rcte |= SAR_RCTE_FBP_01;
2374
2375         addr = card->rct_base + (vc->index << 2);
2376
2377         OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2378         write_sram(card, addr, rcte);
2379
2380         spin_lock_irqsave(&card->cmd_lock, flags);
2381         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2), SAR_REG_CMD);
2382         waitfor_idle(card);
2383         spin_unlock_irqrestore(&card->cmd_lock, flags);
2384
2385         return 0;
2386 }
2387
2388 static int
2389 idt77252_open(struct atm_vcc *vcc)
2390 {
2391         struct atm_dev *dev = vcc->dev;
2392         struct idt77252_dev *card = dev->dev_data;
2393         struct vc_map *vc;
2394         unsigned int index;
2395         unsigned int inuse;
2396         int error;
2397         int vci = vcc->vci;
2398         short vpi = vcc->vpi;
2399
2400         if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC)
2401                 return 0;
2402
2403         if (vpi >= (1 << card->vpibits)) {
2404                 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2405                 return -EINVAL;
2406         }
2407
2408         if (vci >= (1 << card->vcibits)) {
2409                 printk("%s: unsupported VCI: %d\n", card->name, vci);
2410                 return -EINVAL;
2411         }
2412
2413         set_bit(ATM_VF_ADDR, &vcc->flags);
2414
2415         mutex_lock(&card->mutex);
2416
2417         OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2418
2419         switch (vcc->qos.aal) {
2420         case ATM_AAL0:
2421         case ATM_AAL1:
2422         case ATM_AAL5:
2423                 break;
2424         default:
2425                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2426                 mutex_unlock(&card->mutex);
2427                 return -EPROTONOSUPPORT;
2428         }
2429
2430         index = VPCI2VC(card, vpi, vci);
2431         if (!card->vcs[index]) {
2432                 card->vcs[index] = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2433                 if (!card->vcs[index]) {
2434                         printk("%s: can't alloc vc in open()\n", card->name);
2435                         mutex_unlock(&card->mutex);
2436                         return -ENOMEM;
2437                 }
2438                 card->vcs[index]->card = card;
2439                 card->vcs[index]->index = index;
2440
2441                 spin_lock_init(&card->vcs[index]->lock);
2442         }
2443         vc = card->vcs[index];
2444
2445         vcc->dev_data = vc;
2446
2447         IPRINTK("%s: idt77252_open: vc = %d (%d.%d) %s/%s (max RX SDU: %u)\n",
2448                 card->name, vc->index, vcc->vpi, vcc->vci,
2449                 vcc->qos.rxtp.traffic_class != ATM_NONE ? "rx" : "--",
2450                 vcc->qos.txtp.traffic_class != ATM_NONE ? "tx" : "--",
2451                 vcc->qos.rxtp.max_sdu);
2452
2453         inuse = 0;
2454         if (vcc->qos.txtp.traffic_class != ATM_NONE &&
2455             test_bit(VCF_TX, &vc->flags))
2456                 inuse = 1;
2457         if (vcc->qos.rxtp.traffic_class != ATM_NONE &&
2458             test_bit(VCF_RX, &vc->flags))
2459                 inuse += 2;
2460
2461         if (inuse) {
2462                 printk("%s: %s vci already in use.\n", card->name,
2463                        inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
2464                 mutex_unlock(&card->mutex);
2465                 return -EADDRINUSE;
2466         }
2467
2468         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2469                 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2470                 if (error) {
2471                         mutex_unlock(&card->mutex);
2472                         return error;
2473                 }
2474         }
2475
2476         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2477                 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2478                 if (error) {
2479                         mutex_unlock(&card->mutex);
2480                         return error;
2481                 }
2482         }
2483
2484         set_bit(ATM_VF_READY, &vcc->flags);
2485
2486         mutex_unlock(&card->mutex);
2487         return 0;
2488 }
2489
2490 static void
2491 idt77252_close(struct atm_vcc *vcc)
2492 {
2493         struct atm_dev *dev = vcc->dev;
2494         struct idt77252_dev *card = dev->dev_data;
2495         struct vc_map *vc = vcc->dev_data;
2496         unsigned long flags;
2497         unsigned long addr;
2498         unsigned long timeout;
2499
2500         mutex_lock(&card->mutex);
2501
2502         IPRINTK("%s: idt77252_close: vc = %d (%d.%d)\n",
2503                 card->name, vc->index, vcc->vpi, vcc->vci);
2504
2505         clear_bit(ATM_VF_READY, &vcc->flags);
2506
2507         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2508
2509                 spin_lock_irqsave(&vc->lock, flags);
2510                 clear_bit(VCF_RX, &vc->flags);
2511                 vc->rx_vcc = NULL;
2512                 spin_unlock_irqrestore(&vc->lock, flags);
2513
2514                 if ((vcc->vci == 3) || (vcc->vci == 4))
2515                         goto done;
2516
2517                 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2518
2519                 spin_lock_irqsave(&card->cmd_lock, flags);
2520                 writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2), SAR_REG_CMD);
2521                 waitfor_idle(card);
2522                 spin_unlock_irqrestore(&card->cmd_lock, flags);
2523
2524                 if (skb_queue_len(&vc->rcv.rx_pool.queue) != 0) {
2525                         DPRINTK("%s: closing a VC with pending rx buffers.\n",
2526                                 card->name);
2527
2528                         recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2529                 }
2530         }
2531
2532 done:
2533         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2534
2535                 spin_lock_irqsave(&vc->lock, flags);
2536                 clear_bit(VCF_TX, &vc->flags);
2537                 clear_bit(VCF_IDLE, &vc->flags);
2538                 clear_bit(VCF_RSV, &vc->flags);
2539                 vc->tx_vcc = NULL;
2540
2541                 if (vc->estimator) {
2542                         del_timer(&vc->estimator->timer);
2543                         kfree(vc->estimator);
2544                         vc->estimator = NULL;
2545                 }
2546                 spin_unlock_irqrestore(&vc->lock, flags);
2547
2548                 timeout = 5 * 1000;
2549                 while (atomic_read(&vc->scq->used) > 0) {
2550                         timeout = msleep_interruptible(timeout);
2551                         if (!timeout) {
2552                                 pr_warn("%s: SCQ drain timeout: %u used\n",
2553                                         card->name, atomic_read(&vc->scq->used));
2554                                 break;
2555                         }
2556                 }
2557
2558                 writel(TCMDQ_HALT | vc->index, SAR_REG_TCMDQ);
2559                 clear_scd(card, vc->scq, vc->class);
2560
2561                 if (vc->class == SCHED_CBR) {
2562                         clear_tst(card, vc);
2563                         card->tst_free += vc->ntste;
2564                         vc->ntste = 0;
2565                 }
2566
2567                 card->scd2vc[vc->scd_index] = NULL;
2568                 free_scq(card, vc->scq);
2569         }
2570
2571         mutex_unlock(&card->mutex);
2572 }
2573
2574 static int
2575 idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags)
2576 {
2577         struct atm_dev *dev = vcc->dev;
2578         struct idt77252_dev *card = dev->dev_data;
2579         struct vc_map *vc = vcc->dev_data;
2580         int error = 0;
2581
2582         mutex_lock(&card->mutex);
2583
2584         if (qos->txtp.traffic_class != ATM_NONE) {
2585                 if (!test_bit(VCF_TX, &vc->flags)) {
2586                         error = idt77252_init_tx(card, vc, vcc, qos);
2587                         if (error)
2588                                 goto out;
2589                 } else {
2590                         switch (qos->txtp.traffic_class) {
2591                         case ATM_CBR:
2592                                 error = idt77252_init_cbr(card, vc, vcc, qos);
2593                                 if (error)
2594                                         goto out;
2595                                 break;
2596
2597                         case ATM_UBR:
2598                                 error = idt77252_init_ubr(card, vc, vcc, qos);
2599                                 if (error)
2600                                         goto out;
2601
2602                                 if (!test_bit(VCF_IDLE, &vc->flags)) {
2603                                         writel(TCMDQ_LACR | (vc->lacr << 16) |
2604                                                vc->index, SAR_REG_TCMDQ);
2605                                 }
2606                                 break;
2607
2608                         case ATM_VBR:
2609                         case ATM_ABR:
2610                                 error = -EOPNOTSUPP;
2611                                 goto out;
2612                         }
2613                 }
2614         }
2615
2616         if ((qos->rxtp.traffic_class != ATM_NONE) &&
2617             !test_bit(VCF_RX, &vc->flags)) {
2618                 error = idt77252_init_rx(card, vc, vcc, qos);
2619                 if (error)
2620                         goto out;
2621         }
2622
2623         memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2624
2625         set_bit(ATM_VF_HASQOS, &vcc->flags);
2626
2627 out:
2628         mutex_unlock(&card->mutex);
2629         return error;
2630 }
2631
2632 static int
2633 idt77252_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2634 {
2635         struct idt77252_dev *card = dev->dev_data;
2636         int i, left;
2637
2638         left = (int) *pos;
2639         if (!left--)
2640                 return sprintf(page, "IDT77252 Interrupts:\n");
2641         if (!left--)
2642                 return sprintf(page, "TSIF:  %lu\n", card->irqstat[15]);
2643         if (!left--)
2644                 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2645         if (!left--)
2646                 return sprintf(page, "TSQF:  %lu\n", card->irqstat[12]);
2647         if (!left--)
2648                 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2649         if (!left--)
2650                 return sprintf(page, "PHYI:  %lu\n", card->irqstat[10]);
2651         if (!left--)
2652                 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2653         if (!left--)
2654                 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2655         if (!left--)
2656                 return sprintf(page, "RSQF:  %lu\n", card->irqstat[6]);
2657         if (!left--)
2658                 return sprintf(page, "EPDU:  %lu\n", card->irqstat[5]);
2659         if (!left--)
2660                 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2661         if (!left--)
2662                 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2663         if (!left--)
2664                 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2665         if (!left--)
2666                 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2667         if (!left--)
2668                 return sprintf(page, "IDT77252 Transmit Connection Table:\n");
2669
2670         for (i = 0; i < card->tct_size; i++) {
2671                 unsigned long tct;
2672                 struct atm_vcc *vcc;
2673                 struct vc_map *vc;
2674                 char *p;
2675
2676                 vc = card->vcs[i];
2677                 if (!vc)
2678                         continue;
2679
2680                 vcc = NULL;
2681                 if (vc->tx_vcc)
2682                         vcc = vc->tx_vcc;
2683                 if (!vcc)
2684                         continue;
2685                 if (left--)
2686                         continue;
2687
2688                 p = page;
2689                 p += sprintf(p, "  %4u: %u.%u: ", i, vcc->vpi, vcc->vci);
2690                 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2691
2692                 for (i = 0; i < 8; i++)
2693                         p += sprintf(p, " %08x", read_sram(card, tct + i));
2694                 p += sprintf(p, "\n");
2695                 return p - page;
2696         }
2697         return 0;
2698 }
2699
2700 /*****************************************************************************/
2701 /*                                                                           */
2702 /* Interrupt handler                                                         */
2703 /*                                                                           */
2704 /*****************************************************************************/
2705
2706 static void
2707 idt77252_collect_stat(struct idt77252_dev *card)
2708 {
2709         (void) readl(SAR_REG_CDC);
2710         (void) readl(SAR_REG_VPEC);
2711         (void) readl(SAR_REG_ICC);
2712
2713 }
2714
2715 static irqreturn_t
2716 idt77252_interrupt(int irq, void *dev_id)
2717 {
2718         struct idt77252_dev *card = dev_id;
2719         u32 stat;
2720
2721         stat = readl(SAR_REG_STAT) & 0xffff;
2722         if (!stat)      /* no interrupt for us */
2723                 return IRQ_NONE;
2724
2725         if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2726                 printk("%s: Re-entering irq_handler()\n", card->name);
2727                 goto out;
2728         }
2729
2730         writel(stat, SAR_REG_STAT);     /* reset interrupt */
2731
2732         if (stat & SAR_STAT_TSIF) {     /* entry written to TSQ  */
2733                 INTPRINTK("%s: TSIF\n", card->name);
2734                 card->irqstat[15]++;
2735                 idt77252_tx(card);
2736         }
2737         if (stat & SAR_STAT_TXICP) {    /* Incomplete CS-PDU has  */
2738                 INTPRINTK("%s: TXICP\n", card->name);
2739                 card->irqstat[14]++;
2740 #ifdef CONFIG_ATM_IDT77252_DEBUG
2741                 idt77252_tx_dump(card);
2742 #endif
2743         }
2744         if (stat & SAR_STAT_TSQF) {     /* TSQ 7/8 full           */
2745                 INTPRINTK("%s: TSQF\n", card->name);
2746                 card->irqstat[12]++;
2747                 idt77252_tx(card);
2748         }
2749         if (stat & SAR_STAT_TMROF) {    /* Timer overflow         */
2750                 INTPRINTK("%s: TMROF\n", card->name);
2751                 card->irqstat[11]++;
2752                 idt77252_collect_stat(card);
2753         }
2754
2755         if (stat & SAR_STAT_EPDU) {     /* Got complete CS-PDU    */
2756                 INTPRINTK("%s: EPDU\n", card->name);
2757                 card->irqstat[5]++;
2758                 idt77252_rx(card);
2759         }
2760         if (stat & SAR_STAT_RSQAF) {    /* RSQ is 7/8 full        */
2761                 INTPRINTK("%s: RSQAF\n", card->name);
2762                 card->irqstat[1]++;
2763                 idt77252_rx(card);
2764         }
2765         if (stat & SAR_STAT_RSQF) {     /* RSQ is full            */
2766                 INTPRINTK("%s: RSQF\n", card->name);
2767                 card->irqstat[6]++;
2768                 idt77252_rx(card);
2769         }
2770         if (stat & SAR_STAT_RAWCF) {    /* Raw cell received      */
2771                 INTPRINTK("%s: RAWCF\n", card->name);
2772                 card->irqstat[4]++;
2773                 idt77252_rx_raw(card);
2774         }
2775
2776         if (stat & SAR_STAT_PHYI) {     /* PHY device interrupt   */
2777                 INTPRINTK("%s: PHYI", card->name);
2778                 card->irqstat[10]++;
2779                 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2780                         card->atmdev->phy->interrupt(card->atmdev);
2781         }
2782
2783         if (stat & (SAR_STAT_FBQ0A | SAR_STAT_FBQ1A |
2784                     SAR_STAT_FBQ2A | SAR_STAT_FBQ3A)) {
2785
2786                 writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
2787
2788                 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2789
2790                 if (stat & SAR_STAT_FBQ0A)
2791                         card->irqstat[2]++;
2792                 if (stat & SAR_STAT_FBQ1A)
2793                         card->irqstat[3]++;
2794                 if (stat & SAR_STAT_FBQ2A)
2795                         card->irqstat[7]++;
2796                 if (stat & SAR_STAT_FBQ3A)
2797                         card->irqstat[8]++;
2798
2799                 schedule_work(&card->tqueue);
2800         }
2801
2802 out:
2803         clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2804         return IRQ_HANDLED;
2805 }
2806
2807 static void
2808 idt77252_softint(struct work_struct *work)
2809 {
2810         struct idt77252_dev *card =
2811                 container_of(work, struct idt77252_dev, tqueue);
2812         u32 stat;
2813         int done;
2814
2815         for (done = 1; ; done = 1) {
2816                 stat = readl(SAR_REG_STAT) >> 16;
2817
2818                 if ((stat & 0x0f) < SAR_FBQ0_HIGH) {
2819                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2820                         done = 0;
2821                 }
2822
2823                 stat >>= 4;
2824                 if ((stat & 0x0f) < SAR_FBQ1_HIGH) {
2825                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2826                         done = 0;
2827                 }
2828
2829                 stat >>= 4;
2830                 if ((stat & 0x0f) < SAR_FBQ2_HIGH) {
2831                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2832                         done = 0;
2833                 }
2834
2835                 stat >>= 4;
2836                 if ((stat & 0x0f) < SAR_FBQ3_HIGH) {
2837                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2838                         done = 0;
2839                 }
2840
2841                 if (done)
2842                         break;
2843         }
2844
2845         writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
2846 }
2847
2848
2849 static int
2850 open_card_oam(struct idt77252_dev *card)
2851 {
2852         unsigned long flags;
2853         unsigned long addr;
2854         struct vc_map *vc;
2855         int vpi, vci;
2856         int index;
2857         u32 rcte;
2858
2859         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2860                 for (vci = 3; vci < 5; vci++) {
2861                         index = VPCI2VC(card, vpi, vci);
2862
2863                         vc = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2864                         if (!vc) {
2865                                 printk("%s: can't alloc vc\n", card->name);
2866                                 return -ENOMEM;
2867                         }
2868                         vc->index = index;
2869                         card->vcs[index] = vc;
2870
2871                         flush_rx_pool(card, &vc->rcv.rx_pool);
2872
2873                         rcte = SAR_RCTE_CONNECTOPEN |
2874                                SAR_RCTE_RAWCELLINTEN |
2875                                SAR_RCTE_RCQ |
2876                                SAR_RCTE_FBP_1;
2877
2878                         addr = card->rct_base + (vc->index << 2);
2879                         write_sram(card, addr, rcte);
2880
2881                         spin_lock_irqsave(&card->cmd_lock, flags);
2882                         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2),
2883                                SAR_REG_CMD);
2884                         waitfor_idle(card);
2885                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2886                 }
2887         }
2888
2889         return 0;
2890 }
2891
2892 static void
2893 close_card_oam(struct idt77252_dev *card)
2894 {
2895         unsigned long flags;
2896         unsigned long addr;
2897         struct vc_map *vc;
2898         int vpi, vci;
2899         int index;
2900
2901         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2902                 for (vci = 3; vci < 5; vci++) {
2903                         index = VPCI2VC(card, vpi, vci);
2904                         vc = card->vcs[index];
2905
2906                         addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2907
2908                         spin_lock_irqsave(&card->cmd_lock, flags);
2909                         writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2),
2910                                SAR_REG_CMD);
2911                         waitfor_idle(card);
2912                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2913
2914                         if (skb_queue_len(&vc->rcv.rx_pool.queue) != 0) {
2915                                 DPRINTK("%s: closing a VC "
2916                                         "with pending rx buffers.\n",
2917                                         card->name);
2918
2919                                 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2920                         }
2921                 }
2922         }
2923 }
2924
2925 static int
2926 open_card_ubr0(struct idt77252_dev *card)
2927 {
2928         struct vc_map *vc;
2929
2930         vc = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2931         if (!vc) {
2932                 printk("%s: can't alloc vc\n", card->name);
2933                 return -ENOMEM;
2934         }
2935         card->vcs[0] = vc;
2936         vc->class = SCHED_UBR0;
2937
2938         vc->scq = alloc_scq(card, vc->class);
2939         if (!vc->scq) {
2940                 printk("%s: can't get SCQ.\n", card->name);
2941                 return -ENOMEM;
2942         }
2943
2944         card->scd2vc[0] = vc;
2945         vc->scd_index = 0;
2946         vc->scq->scd = card->scd_base;
2947
2948         fill_scd(card, vc->scq, vc->class);
2949
2950         write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
2951         write_sram(card, card->tct_base + 1, 0);
2952         write_sram(card, card->tct_base + 2, 0);
2953         write_sram(card, card->tct_base + 3, 0);
2954         write_sram(card, card->tct_base + 4, 0);
2955         write_sram(card, card->tct_base + 5, 0);
2956         write_sram(card, card->tct_base + 6, 0);
2957         write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
2958
2959         clear_bit(VCF_IDLE, &vc->flags);
2960         writel(TCMDQ_START | 0, SAR_REG_TCMDQ);
2961         return 0;
2962 }
2963
2964 static int
2965 idt77252_dev_open(struct idt77252_dev *card)
2966 {
2967         u32 conf;
2968
2969         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
2970                 printk("%s: SAR not yet initialized.\n", card->name);
2971                 return -1;
2972         }
2973
2974         conf = SAR_CFG_RXPTH|   /* enable receive path                  */
2975             SAR_RX_DELAY |      /* interrupt on complete PDU            */
2976             SAR_CFG_RAWIE |     /* interrupt enable on raw cells        */
2977             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full         */
2978             SAR_CFG_TMOIE |     /* interrupt on timer overflow          */
2979             SAR_CFG_FBIE |      /* interrupt on low free buffers        */
2980             SAR_CFG_TXEN |      /* transmit operation enable            */
2981             SAR_CFG_TXINT |     /* interrupt on transmit status         */
2982             SAR_CFG_TXUIE |     /* interrupt on transmit underrun       */
2983             SAR_CFG_TXSFI |     /* interrupt on TSQ almost full         */
2984             SAR_CFG_PHYIE       /* enable PHY interrupts                */
2985             ;
2986
2987 #ifdef CONFIG_ATM_IDT77252_RCV_ALL
2988         /* Test RAW cell receive. */
2989         conf |= SAR_CFG_VPECA;
2990 #endif
2991
2992         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
2993
2994         if (open_card_oam(card)) {
2995                 printk("%s: Error initializing OAM.\n", card->name);
2996                 return -1;
2997         }
2998
2999         if (open_card_ubr0(card)) {
3000                 printk("%s: Error initializing UBR0.\n", card->name);
3001                 return -1;
3002         }
3003
3004         IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3005         return 0;
3006 }
3007
3008 static void idt77252_dev_close(struct atm_dev *dev)
3009 {
3010         struct idt77252_dev *card = dev->dev_data;
3011         u32 conf;
3012
3013         close_card_oam(card);
3014
3015         conf = SAR_CFG_RXPTH |  /* enable receive path           */
3016             SAR_RX_DELAY |      /* interrupt on complete PDU     */
3017             SAR_CFG_RAWIE |     /* interrupt enable on raw cells */
3018             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full  */
3019             SAR_CFG_TMOIE |     /* interrupt on timer overflow   */
3020             SAR_CFG_FBIE |      /* interrupt on low free buffers */
3021             SAR_CFG_TXEN |      /* transmit operation enable     */
3022             SAR_CFG_TXINT |     /* interrupt on transmit status  */
3023             SAR_CFG_TXUIE |     /* interrupt on xmit underrun    */
3024             SAR_CFG_TXSFI       /* interrupt on TSQ almost full  */
3025             ;
3026
3027         writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
3028
3029         DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3030 }
3031
3032
3033 /*****************************************************************************/
3034 /*                                                                           */
3035 /* Initialisation and Deinitialization of IDT77252                           */
3036 /*                                                                           */
3037 /*****************************************************************************/
3038
3039
3040 static void
3041 deinit_card(struct idt77252_dev *card)
3042 {
3043         struct sk_buff *skb;
3044         int i, j;
3045
3046         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3047                 printk("%s: SAR not yet initialized.\n", card->name);
3048                 return;
3049         }
3050         DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3051
3052         writel(0, SAR_REG_CFG);
3053
3054         if (card->atmdev)
3055                 atm_dev_deregister(card->atmdev);
3056
3057         for (i = 0; i < 4; i++) {
3058                 for (j = 0; j < FBQ_SIZE; j++) {
3059                         skb = card->sbpool[i].skb[j];
3060                         if (skb) {
3061                                 pci_unmap_single(card->pcidev,
3062                                                  IDT77252_PRV_PADDR(skb),
3063                                                  (skb_end_pointer(skb) -
3064                                                   skb->data),
3065                                                  PCI_DMA_FROMDEVICE);
3066                                 card->sbpool[i].skb[j] = NULL;
3067                                 dev_kfree_skb(skb);
3068                         }
3069                 }
3070         }
3071
3072         vfree(card->soft_tst);
3073
3074         vfree(card->scd2vc);
3075
3076         vfree(card->vcs);
3077
3078         if (card->raw_cell_hnd) {
3079                 pci_free_consistent(card->pcidev, 2 * sizeof(u32),
3080                                     card->raw_cell_hnd, card->raw_cell_paddr);
3081         }
3082
3083         if (card->rsq.base) {
3084                 DIPRINTK("%s: Release RSQ ...\n", card->name);
3085                 deinit_rsq(card);
3086         }
3087
3088         if (card->tsq.base) {
3089                 DIPRINTK("%s: Release TSQ ...\n", card->name);
3090                 deinit_tsq(card);
3091         }
3092
3093         DIPRINTK("idt77252: Release IRQ.\n");
3094         free_irq(card->pcidev->irq, card);
3095
3096         for (i = 0; i < 4; i++) {
3097                 if (card->fbq[i])
3098                         iounmap(card->fbq[i]);
3099         }
3100
3101         if (card->membase)
3102                 iounmap(card->membase);
3103
3104         clear_bit(IDT77252_BIT_INIT, &card->flags);
3105         DIPRINTK("%s: Card deinitialized.\n", card->name);
3106 }
3107
3108
3109 static void init_sram(struct idt77252_dev *card)
3110 {
3111         int i;
3112
3113         for (i = 0; i < card->sramsize; i += 4)
3114                 write_sram(card, (i >> 2), 0);
3115
3116         /* set SRAM layout for THIS card */
3117         if (card->sramsize == (512 * 1024)) {
3118                 card->tct_base = SAR_SRAM_TCT_128_BASE;
3119                 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3120                     / SAR_SRAM_TCT_SIZE;
3121                 card->rct_base = SAR_SRAM_RCT_128_BASE;
3122                 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3123                     / SAR_SRAM_RCT_SIZE;
3124                 card->rt_base = SAR_SRAM_RT_128_BASE;
3125                 card->scd_base = SAR_SRAM_SCD_128_BASE;
3126                 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3127                     / SAR_SRAM_SCD_SIZE;
3128                 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3129                 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3130                 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3131                 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3132                 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3133                 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3134                 card->fifo_size = SAR_RXFD_SIZE_32K;
3135         } else {
3136                 card->tct_base = SAR_SRAM_TCT_32_BASE;
3137                 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3138                     / SAR_SRAM_TCT_SIZE;
3139                 card->rct_base = SAR_SRAM_RCT_32_BASE;
3140                 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3141                     / SAR_SRAM_RCT_SIZE;
3142                 card->rt_base = SAR_SRAM_RT_32_BASE;
3143                 card->scd_base = SAR_SRAM_SCD_32_BASE;
3144                 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3145                     / SAR_SRAM_SCD_SIZE;
3146                 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3147                 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3148                 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3149                 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3150                 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3151                 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3152                 card->fifo_size = SAR_RXFD_SIZE_4K;
3153         }
3154
3155         /* Initialize TCT */
3156         for (i = 0; i < card->tct_size; i++) {
3157                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3158                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3159                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3160                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3161                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3162                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3163                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3164                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3165         }
3166
3167         /* Initialize RCT */
3168         for (i = 0; i < card->rct_size; i++) {
3169                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3170                                     (u32) SAR_RCTE_RAWCELLINTEN);
3171                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3172                                     (u32) 0);
3173                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3174                                     (u32) 0);
3175                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3176                                     (u32) 0xffffffff);
3177         }
3178
3179         writel((SAR_FBQ0_LOW << 28) | 0x00000000 | 0x00000000 |
3180                (SAR_FB_SIZE_0 / 48), SAR_REG_FBQS0);
3181         writel((SAR_FBQ1_LOW << 28) | 0x00000000 | 0x00000000 |
3182                (SAR_FB_SIZE_1 / 48), SAR_REG_FBQS1);
3183         writel((SAR_FBQ2_LOW << 28) | 0x00000000 | 0x00000000 |
3184                (SAR_FB_SIZE_2 / 48), SAR_REG_FBQS2);
3185         writel((SAR_FBQ3_LOW << 28) | 0x00000000 | 0x00000000 |
3186                (SAR_FB_SIZE_3 / 48), SAR_REG_FBQS3);
3187
3188         /* Initialize rate table  */
3189         for (i = 0; i < 256; i++) {
3190                 write_sram(card, card->rt_base + i, log_to_rate[i]);
3191         }
3192
3193         for (i = 0; i < 128; i++) {
3194                 unsigned int tmp;
3195
3196                 tmp  = rate_to_log[(i << 2) + 0] << 0;
3197                 tmp |= rate_to_log[(i << 2) + 1] << 8;
3198                 tmp |= rate_to_log[(i << 2) + 2] << 16;
3199                 tmp |= rate_to_log[(i << 2) + 3] << 24;
3200                 write_sram(card, card->rt_base + 256 + i, tmp);
3201         }
3202
3203 #if 0 /* Fill RDF and AIR tables. */
3204         for (i = 0; i < 128; i++) {
3205                 unsigned int tmp;
3206
3207                 tmp = RDF[0][(i << 1) + 0] << 16;
3208                 tmp |= RDF[0][(i << 1) + 1] << 0;
3209                 write_sram(card, card->rt_base + 512 + i, tmp);
3210         }
3211
3212         for (i = 0; i < 128; i++) {
3213                 unsigned int tmp;
3214
3215                 tmp = AIR[0][(i << 1) + 0] << 16;
3216                 tmp |= AIR[0][(i << 1) + 1] << 0;
3217                 write_sram(card, card->rt_base + 640 + i, tmp);
3218         }
3219 #endif
3220
3221         IPRINTK("%s: initialize rate table ...\n", card->name);
3222         writel(card->rt_base << 2, SAR_REG_RTBL);
3223
3224         /* Initialize TSTs */
3225         IPRINTK("%s: initialize TST ...\n", card->name);
3226         card->tst_free = card->tst_size - 2;    /* last two are jumps */
3227
3228         for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3229                 write_sram(card, i, TSTE_OPC_VAR);
3230         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3231         idt77252_sram_write_errors = 1;
3232         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3233         idt77252_sram_write_errors = 0;
3234         for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3235                 write_sram(card, i, TSTE_OPC_VAR);
3236         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3237         idt77252_sram_write_errors = 1;
3238         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3239         idt77252_sram_write_errors = 0;
3240
3241         card->tst_index = 0;
3242         writel(card->tst[0] << 2, SAR_REG_TSTB);
3243
3244         /* Initialize ABRSTD and Receive FIFO */
3245         IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3246         writel(card->abrst_size | (card->abrst_base << 2),
3247                SAR_REG_ABRSTD);
3248
3249         IPRINTK("%s: initialize receive fifo ...\n", card->name);
3250         writel(card->fifo_size | (card->fifo_base << 2),
3251                SAR_REG_RXFD);
3252
3253         IPRINTK("%s: SRAM initialization complete.\n", card->name);
3254 }
3255
3256 static int init_card(struct atm_dev *dev)
3257 {
3258         struct idt77252_dev *card = dev->dev_data;
3259         struct pci_dev *pcidev = card->pcidev;
3260         unsigned long tmpl, modl;
3261         unsigned int linkrate, rsvdcr;
3262         unsigned int tst_entries;
3263         struct net_device *tmp;
3264         char tname[10];
3265
3266         u32 size;
3267         u_char pci_byte;
3268         u32 conf;
3269         int i, k;
3270
3271         if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3272                 printk("Error: SAR already initialized.\n");
3273                 return -1;
3274         }
3275
3276 /*****************************************************************/
3277 /*   P C I   C O N F I G U R A T I O N                           */
3278 /*****************************************************************/
3279
3280         /* Set PCI Retry-Timeout and TRDY timeout */
3281         IPRINTK("%s: Checking PCI retries.\n", card->name);
3282         if (pci_read_config_byte(pcidev, 0x40, &pci_byte) != 0) {
3283                 printk("%s: can't read PCI retry timeout.\n", card->name);
3284                 deinit_card(card);
3285                 return -1;
3286         }
3287         if (pci_byte != 0) {
3288                 IPRINTK("%s: PCI retry timeout: %d, set to 0.\n",
3289                         card->name, pci_byte);
3290                 if (pci_write_config_byte(pcidev, 0x40, 0) != 0) {
3291                         printk("%s: can't set PCI retry timeout.\n",
3292                                card->name);
3293                         deinit_card(card);
3294                         return -1;
3295                 }
3296         }
3297         IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3298         if (pci_read_config_byte(pcidev, 0x41, &pci_byte) != 0) {
3299                 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3300                 deinit_card(card);
3301                 return -1;
3302         }
3303         if (pci_byte != 0) {
3304                 IPRINTK("%s: PCI TRDY timeout: %d, set to 0.\n",
3305                         card->name, pci_byte);
3306                 if (pci_write_config_byte(pcidev, 0x41, 0) != 0) {
3307                         printk("%s: can't set PCI TRDY timeout.\n", card->name);
3308                         deinit_card(card);
3309                         return -1;
3310                 }
3311         }
3312         /* Reset Timer register */
3313         if (readl(SAR_REG_STAT) & SAR_STAT_TMROF) {
3314                 printk("%s: resetting timer overflow.\n", card->name);
3315                 writel(SAR_STAT_TMROF, SAR_REG_STAT);
3316         }
3317         IPRINTK("%s: Request IRQ ... ", card->name);
3318         if (request_irq(pcidev->irq, idt77252_interrupt, IRQF_SHARED,
3319                         card->name, card) != 0) {
3320                 printk("%s: can't allocate IRQ.\n", card->name);
3321                 deinit_card(card);
3322                 return -1;
3323         }
3324         IPRINTK("got %d.\n", pcidev->irq);
3325
3326 /*****************************************************************/
3327 /*   C H E C K   A N D   I N I T   S R A M                       */
3328 /*****************************************************************/
3329
3330         IPRINTK("%s: Initializing SRAM\n", card->name);
3331
3332         /* preset size of connecton table, so that init_sram() knows about it */
3333         conf =  SAR_CFG_TX_FIFO_SIZE_9 |        /* Use maximum fifo size */
3334                 SAR_CFG_RXSTQ_SIZE_8k |         /* Receive Status Queue is 8k */
3335                 SAR_CFG_IDLE_CLP |              /* Set CLP on idle cells */
3336 #ifndef ATM_IDT77252_SEND_IDLE
3337                 SAR_CFG_NO_IDLE |               /* Do not send idle cells */
3338 #endif
3339                 0;
3340
3341         if (card->sramsize == (512 * 1024))
3342                 conf |= SAR_CFG_CNTBL_1k;
3343         else
3344                 conf |= SAR_CFG_CNTBL_512;
3345
3346         switch (vpibits) {
3347         case 0:
3348                 conf |= SAR_CFG_VPVCS_0;
3349                 break;
3350         default:
3351         case 1:
3352                 conf |= SAR_CFG_VPVCS_1;
3353                 break;
3354         case 2:
3355                 conf |= SAR_CFG_VPVCS_2;
3356                 break;
3357         case 8:
3358                 conf |= SAR_CFG_VPVCS_8;
3359                 break;
3360         }
3361
3362         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3363
3364         init_sram(card);
3365
3366 /********************************************************************/
3367 /*  A L L O C   R A M   A N D   S E T   V A R I O U S   T H I N G S */
3368 /********************************************************************/
3369         /* Initialize TSQ */
3370         if (0 != init_tsq(card)) {
3371                 deinit_card(card);
3372                 return -1;
3373         }
3374         /* Initialize RSQ */
3375         if (0 != init_rsq(card)) {
3376                 deinit_card(card);
3377                 return -1;
3378         }
3379
3380         card->vpibits = vpibits;
3381         if (card->sramsize == (512 * 1024)) {
3382                 card->vcibits = 10 - card->vpibits;
3383         } else {
3384                 card->vcibits = 9 - card->vpibits;
3385         }
3386
3387         card->vcimask = 0;
3388         for (k = 0, i = 1; k < card->vcibits; k++) {
3389                 card->vcimask |= i;
3390                 i <<= 1;
3391         }
3392
3393         IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3394         writel(0, SAR_REG_VPM);
3395
3396         /* Little Endian Order   */
3397         writel(0, SAR_REG_GP);
3398
3399         /* Initialize RAW Cell Handle Register  */
3400         card->raw_cell_hnd = pci_zalloc_consistent(card->pcidev,
3401                                                    2 * sizeof(u32),
3402                                                    &card->raw_cell_paddr);
3403         if (!card->raw_cell_hnd) {
3404                 printk("%s: memory allocation failure.\n", card->name);
3405                 deinit_card(card);
3406                 return -1;
3407         }
3408         writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3409         IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3410                 card->raw_cell_hnd);
3411
3412         size = sizeof(struct vc_map *) * card->tct_size;
3413         IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3414         card->vcs = vzalloc(size);
3415         if (!card->vcs) {
3416                 printk("%s: memory allocation failure.\n", card->name);
3417                 deinit_card(card);
3418                 return -1;
3419         }
3420
3421         size = sizeof(struct vc_map *) * card->scd_size;
3422         IPRINTK("%s: allocate %d byte for SCD to VC mapping.\n",
3423                 card->name, size);
3424         card->scd2vc = vzalloc(size);
3425         if (!card->scd2vc) {
3426                 printk("%s: memory allocation failure.\n", card->name);
3427                 deinit_card(card);
3428                 return -1;
3429         }
3430
3431         size = sizeof(struct tst_info) * (card->tst_size - 2);
3432         IPRINTK("%s: allocate %d byte for TST to VC mapping.\n",
3433                 card->name, size);
3434         card->soft_tst = vmalloc(size);
3435         if (!card->soft_tst) {
3436                 printk("%s: memory allocation failure.\n", card->name);
3437                 deinit_card(card);
3438                 return -1;
3439         }
3440         for (i = 0; i < card->tst_size - 2; i++) {
3441                 card->soft_tst[i].tste = TSTE_OPC_VAR;
3442                 card->soft_tst[i].vc = NULL;
3443         }
3444
3445         if (dev->phy == NULL) {
3446                 printk("%s: No LT device defined.\n", card->name);
3447                 deinit_card(card);
3448                 return -1;
3449         }
3450         if (dev->phy->ioctl == NULL) {
3451                 printk("%s: LT had no IOCTL function defined.\n", card->name);
3452                 deinit_card(card);
3453                 return -1;
3454         }
3455
3456 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3457         /*
3458          * this is a jhs hack to get around special functionality in the
3459          * phy driver for the atecom hardware; the functionality doesn't
3460          * exist in the linux atm suni driver
3461          *
3462          * it isn't the right way to do things, but as the guy from NIST
3463          * said, talking about their measurement of the fine structure
3464          * constant, "it's good enough for government work."
3465          */
3466         linkrate = 149760000;
3467 #endif
3468
3469         card->link_pcr = (linkrate / 8 / 53);
3470         printk("%s: Linkrate on ATM line : %u bit/s, %u cell/s.\n",
3471                card->name, linkrate, card->link_pcr);
3472
3473 #ifdef ATM_IDT77252_SEND_IDLE
3474         card->utopia_pcr = card->link_pcr;
3475 #else
3476         card->utopia_pcr = (160000000 / 8 / 54);
3477 #endif
3478
3479         rsvdcr = 0;
3480         if (card->utopia_pcr > card->link_pcr)
3481                 rsvdcr = card->utopia_pcr - card->link_pcr;
3482
3483         tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3484         modl = tmpl % (unsigned long)card->utopia_pcr;
3485         tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3486         if (modl)
3487                 tst_entries++;
3488         card->tst_free -= tst_entries;
3489         fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3490
3491 #ifdef HAVE_EEPROM
3492         idt77252_eeprom_init(card);
3493         printk("%s: EEPROM: %02x:", card->name,
3494                 idt77252_eeprom_read_status(card));
3495
3496         for (i = 0; i < 0x80; i++) {
3497                 printk(" %02x",
3498                 idt77252_eeprom_read_byte(card, i)
3499                 );
3500         }
3501         printk("\n");
3502 #endif /* HAVE_EEPROM */
3503
3504         /*
3505          * XXX: <hack>
3506          */
3507         sprintf(tname, "eth%d", card->index);
3508         tmp = dev_get_by_name(&init_net, tname);        /* jhs: was "tmp = dev_get(tname);" */
3509         if (tmp) {
3510                 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3511                 dev_put(tmp);
3512                 printk("%s: ESI %pM\n", card->name, card->atmdev->esi);
3513         }
3514         /*
3515          * XXX: </hack>
3516          */
3517
3518         /* Set Maximum Deficit Count for now. */
3519         writel(0xffff, SAR_REG_MDFCT);
3520
3521         set_bit(IDT77252_BIT_INIT, &card->flags);
3522
3523         XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3524         return 0;
3525 }
3526
3527
3528 /*****************************************************************************/
3529 /*                                                                           */
3530 /* Probing of IDT77252 ABR SAR                                               */
3531 /*                                                                           */
3532 /*****************************************************************************/
3533
3534
3535 static int idt77252_preset(struct idt77252_dev *card)
3536 {
3537         u16 pci_command;
3538
3539 /*****************************************************************/
3540 /*   P C I   C O N F I G U R A T I O N                           */
3541 /*****************************************************************/
3542
3543         XPRINTK("%s: Enable PCI master and memory access for SAR.\n",
3544                 card->name);
3545         if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3546                 printk("%s: can't read PCI_COMMAND.\n", card->name);
3547                 deinit_card(card);
3548                 return -1;
3549         }
3550         if (!(pci_command & PCI_COMMAND_IO)) {
3551                 printk("%s: PCI_COMMAND: %04x (???)\n",
3552                        card->name, pci_command);
3553                 deinit_card(card);
3554                 return (-1);
3555         }
3556         pci_command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
3557         if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3558                 printk("%s: can't write PCI_COMMAND.\n", card->name);
3559                 deinit_card(card);
3560                 return -1;
3561         }
3562 /*****************************************************************/
3563 /*   G E N E R I C   R E S E T                                   */
3564 /*****************************************************************/
3565
3566         /* Software reset */
3567         writel(SAR_CFG_SWRST, SAR_REG_CFG);
3568         mdelay(1);
3569         writel(0, SAR_REG_CFG);
3570
3571         IPRINTK("%s: Software resetted.\n", card->name);
3572         return 0;
3573 }
3574
3575
3576 static unsigned long probe_sram(struct idt77252_dev *card)
3577 {
3578         u32 data, addr;
3579
3580         writel(0, SAR_REG_DR0);
3581         writel(SAR_CMD_WRITE_SRAM | (0 << 2), SAR_REG_CMD);
3582
3583         for (addr = 0x4000; addr < 0x80000; addr += 0x4000) {
3584                 writel(ATM_POISON, SAR_REG_DR0);
3585                 writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
3586
3587                 writel(SAR_CMD_READ_SRAM | (0 << 2), SAR_REG_CMD);
3588                 data = readl(SAR_REG_DR0);
3589
3590                 if (data != 0)
3591                         break;
3592         }
3593
3594         return addr * sizeof(u32);
3595 }
3596
3597 static int idt77252_init_one(struct pci_dev *pcidev,
3598                              const struct pci_device_id *id)
3599 {
3600         static struct idt77252_dev **last = &idt77252_chain;
3601         static int index = 0;
3602
3603         unsigned long membase, srambase;
3604         struct idt77252_dev *card;
3605         struct atm_dev *dev;
3606         int i, err;
3607
3608
3609         if ((err = pci_enable_device(pcidev))) {
3610                 printk("idt77252: can't enable PCI device at %s\n", pci_name(pcidev));
3611                 return err;
3612         }
3613
3614         card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3615         if (!card) {
3616                 printk("idt77252-%d: can't allocate private data\n", index);
3617                 err = -ENOMEM;
3618                 goto err_out_disable_pdev;
3619         }
3620         card->revision = pcidev->revision;
3621         card->index = index;
3622         card->pcidev = pcidev;
3623         sprintf(card->name, "idt77252-%d", card->index);
3624
3625         INIT_WORK(&card->tqueue, idt77252_softint);
3626
3627         membase = pci_resource_start(pcidev, 1);
3628         srambase = pci_resource_start(pcidev, 2);
3629
3630         mutex_init(&card->mutex);
3631         spin_lock_init(&card->cmd_lock);
3632         spin_lock_init(&card->tst_lock);
3633
3634         init_timer(&card->tst_timer);
3635         card->tst_timer.data = (unsigned long)card;
3636         card->tst_timer.function = tst_timer;
3637
3638         /* Do the I/O remapping... */
3639         card->membase = ioremap(membase, 1024);
3640         if (!card->membase) {
3641                 printk("%s: can't ioremap() membase\n", card->name);
3642                 err = -EIO;
3643                 goto err_out_free_card;
3644         }
3645
3646         if (idt77252_preset(card)) {
3647                 printk("%s: preset failed\n", card->name);
3648                 err = -EIO;
3649                 goto err_out_iounmap;
3650         }
3651
3652         dev = atm_dev_register("idt77252", &pcidev->dev, &idt77252_ops, -1,
3653                                NULL);
3654         if (!dev) {
3655                 printk("%s: can't register atm device\n", card->name);
3656                 err = -EIO;
3657                 goto err_out_iounmap;
3658         }
3659         dev->dev_data = card;
3660         card->atmdev = dev;
3661
3662 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3663         suni_init(dev);
3664         if (!dev->phy) {
3665                 printk("%s: can't init SUNI\n", card->name);
3666                 err = -EIO;
3667                 goto err_out_deinit_card;
3668         }
3669 #endif  /* CONFIG_ATM_IDT77252_USE_SUNI */
3670
3671         card->sramsize = probe_sram(card);
3672
3673         for (i = 0; i < 4; i++) {
3674                 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3675                 if (!card->fbq[i]) {
3676                         printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3677                         err = -EIO;
3678                         goto err_out_deinit_card;
3679                 }
3680         }
3681
3682         printk("%s: ABR SAR (Rev %c): MEM %08lx SRAM %08lx [%u KB]\n",
3683                card->name, ((card->revision > 1) && (card->revision < 25)) ?
3684                'A' + card->revision - 1 : '?', membase, srambase,
3685                card->sramsize / 1024);
3686
3687         if (init_card(dev)) {
3688                 printk("%s: init_card failed\n", card->name);
3689                 err = -EIO;
3690                 goto err_out_deinit_card;
3691         }
3692
3693         dev->ci_range.vpi_bits = card->vpibits;
3694         dev->ci_range.vci_bits = card->vcibits;
3695         dev->link_rate = card->link_pcr;
3696
3697         if (dev->phy->start)
3698                 dev->phy->start(dev);
3699
3700         if (idt77252_dev_open(card)) {
3701                 printk("%s: dev_open failed\n", card->name);
3702                 err = -EIO;
3703                 goto err_out_stop;
3704         }
3705
3706         *last = card;
3707         last = &card->next;
3708         index++;
3709
3710         return 0;
3711
3712 err_out_stop:
3713         if (dev->phy->stop)
3714                 dev->phy->stop(dev);
3715
3716 err_out_deinit_card:
3717         deinit_card(card);
3718
3719 err_out_iounmap:
3720         iounmap(card->membase);
3721
3722 err_out_free_card:
3723         kfree(card);
3724
3725 err_out_disable_pdev:
3726         pci_disable_device(pcidev);
3727         return err;
3728 }
3729
3730 static struct pci_device_id idt77252_pci_tbl[] =
3731 {
3732         { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77252), 0 },
3733         { 0, }
3734 };
3735
3736 MODULE_DEVICE_TABLE(pci, idt77252_pci_tbl);
3737
3738 static struct pci_driver idt77252_driver = {
3739         .name           = "idt77252",
3740         .id_table       = idt77252_pci_tbl,
3741         .probe          = idt77252_init_one,
3742 };
3743
3744 static int __init idt77252_init(void)
3745 {
3746         struct sk_buff *skb;
3747
3748         printk("%s: at %p\n", __func__, idt77252_init);
3749
3750         if (sizeof(skb->cb) < sizeof(struct atm_skb_data) +
3751                               sizeof(struct idt77252_skb_prv)) {
3752                 printk(KERN_ERR "%s: skb->cb is too small (%lu < %lu)\n",
3753                        __func__, (unsigned long) sizeof(skb->cb),
3754                        (unsigned long) sizeof(struct atm_skb_data) +
3755                                        sizeof(struct idt77252_skb_prv));
3756                 return -EIO;
3757         }
3758
3759         return pci_register_driver(&idt77252_driver);
3760 }
3761
3762 static void __exit idt77252_exit(void)
3763 {
3764         struct idt77252_dev *card;
3765         struct atm_dev *dev;
3766
3767         pci_unregister_driver(&idt77252_driver);
3768
3769         while (idt77252_chain) {
3770                 card = idt77252_chain;
3771                 dev = card->atmdev;
3772                 idt77252_chain = card->next;
3773
3774                 if (dev->phy->stop)
3775                         dev->phy->stop(dev);
3776                 deinit_card(card);
3777                 pci_disable_device(card->pcidev);
3778                 kfree(card);
3779         }
3780
3781         DIPRINTK("idt77252: finished cleanup-module().\n");
3782 }
3783
3784 module_init(idt77252_init);
3785 module_exit(idt77252_exit);
3786
3787 MODULE_LICENSE("GPL");
3788
3789 module_param(vpibits, uint, 0);
3790 MODULE_PARM_DESC(vpibits, "number of VPI bits supported (0, 1, or 2)");
3791 #ifdef CONFIG_ATM_IDT77252_DEBUG
3792 module_param(debug, ulong, 0644);
3793 MODULE_PARM_DESC(debug,   "debug bitmap, see drivers/atm/idt77252.h");
3794 #endif
3795
3796 MODULE_AUTHOR("Eddie C. Dost <ecd@atecom.com>");
3797 MODULE_DESCRIPTION("IDT77252 ABR SAR Driver");