2 A FORE Systems 200E-series driver for ATM on Linux.
3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
7 This driver simultaneously supports PCA-200E and SBA-200E adapters
8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/init.h>
29 #include <linux/capability.h>
30 #include <linux/interrupt.h>
31 #include <linux/bitops.h>
32 #include <linux/pci.h>
33 #include <linux/module.h>
34 #include <linux/atmdev.h>
35 #include <linux/sonet.h>
36 #include <linux/atm_suni.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/delay.h>
39 #include <linux/firmware.h>
41 #include <asm/string.h>
45 #include <asm/byteorder.h>
46 #include <asm/uaccess.h>
47 #include <asm/atomic.h>
51 #include <linux/of_device.h>
52 #include <asm/idprom.h>
53 #include <asm/openprom.h>
54 #include <asm/oplib.h>
55 #include <asm/pgtable.h>
58 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
59 #define FORE200E_USE_TASKLET
62 #if 0 /* enable the debugging code of the buffer supply queues */
63 #define FORE200E_BSQ_DEBUG
66 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
67 #define FORE200E_52BYTE_AAL0_SDU
73 #define FORE200E_VERSION "0.3e"
75 #define FORE200E "fore200e: "
77 #if 0 /* override .config */
78 #define CONFIG_ATM_FORE200E_DEBUG 1
80 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
84 #define DPRINTK(level, format, args...) do {} while (0)
88 #define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
91 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
93 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
95 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
98 #define ASSERT(expr) if (!(expr)) { \
99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
100 __func__, __LINE__, #expr); \
101 panic(FORE200E "%s", __func__); \
104 #define ASSERT(expr) do {} while (0)
108 static const struct atmdev_ops fore200e_ops;
109 static const struct fore200e_bus fore200e_bus[];
111 static LIST_HEAD(fore200e_boards);
114 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
115 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
116 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
119 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
120 { BUFFER_S1_NBR, BUFFER_L1_NBR },
121 { BUFFER_S2_NBR, BUFFER_L2_NBR }
124 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
130 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
131 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
135 #if 0 /* currently unused */
137 fore200e_fore2atm_aal(enum fore200e_aal aal)
140 case FORE200E_AAL0: return ATM_AAL0;
141 case FORE200E_AAL34: return ATM_AAL34;
142 case FORE200E_AAL5: return ATM_AAL5;
150 static enum fore200e_aal
151 fore200e_atm2fore_aal(int aal)
154 case ATM_AAL0: return FORE200E_AAL0;
155 case ATM_AAL34: return FORE200E_AAL34;
158 case ATM_AAL5: return FORE200E_AAL5;
166 fore200e_irq_itoa(int irq)
169 sprintf(str, "%d", irq);
174 /* allocate and align a chunk of memory intended to hold the data behing exchanged
175 between the driver and the adapter (using streaming DVMA) */
178 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
180 unsigned long offset = 0;
182 if (alignment <= sizeof(int))
185 chunk->alloc_size = size + alignment;
186 chunk->align_size = size;
187 chunk->direction = direction;
189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
190 if (chunk->alloc_addr == NULL)
194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
196 chunk->align_addr = chunk->alloc_addr + offset;
198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
204 /* free a chunk of memory */
207 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
211 kfree(chunk->alloc_addr);
216 fore200e_spin(int msecs)
218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
219 while (time_before(jiffies, timeout));
224 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
234 } while (time_before(jiffies, timeout));
238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
248 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
254 if ((ok = (fore200e->bus->read(addr) == val)))
257 } while (time_before(jiffies, timeout));
261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
262 fore200e->bus->read(addr), val);
271 fore200e_free_rx_buf(struct fore200e* fore200e)
273 int scheme, magn, nbr;
274 struct buffer* buffer;
276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
283 struct chunk* data = &buffer[ nbr ].data;
285 if (data->alloc_addr != NULL)
286 fore200e_chunk_free(fore200e, data);
295 fore200e_uninit_bs_queue(struct fore200e* fore200e)
299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
305 if (status->alloc_addr)
306 fore200e->bus->dma_chunk_free(fore200e, status);
308 if (rbd_block->alloc_addr)
309 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
316 fore200e_reset(struct fore200e* fore200e, int diag)
320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
324 fore200e->bus->reset(fore200e);
327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
330 printk(FORE200E "device %s self-test failed\n", fore200e->name);
334 printk(FORE200E "device %s self-test passed\n", fore200e->name);
336 fore200e->state = FORE200E_STATE_RESET;
344 fore200e_shutdown(struct fore200e* fore200e)
346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
347 fore200e->name, fore200e->phys_base,
348 fore200e_irq_itoa(fore200e->irq));
350 if (fore200e->state > FORE200E_STATE_RESET) {
351 /* first, reset the board to prevent further interrupts or data transfers */
352 fore200e_reset(fore200e, 0);
355 /* then, release all allocated resources */
356 switch(fore200e->state) {
358 case FORE200E_STATE_COMPLETE:
359 kfree(fore200e->stats);
361 case FORE200E_STATE_IRQ:
362 free_irq(fore200e->irq, fore200e->atm_dev);
364 case FORE200E_STATE_ALLOC_BUF:
365 fore200e_free_rx_buf(fore200e);
367 case FORE200E_STATE_INIT_BSQ:
368 fore200e_uninit_bs_queue(fore200e);
370 case FORE200E_STATE_INIT_RXQ:
371 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
372 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
374 case FORE200E_STATE_INIT_TXQ:
375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
378 case FORE200E_STATE_INIT_CMDQ:
379 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
381 case FORE200E_STATE_INITIALIZE:
382 /* nothing to do for that state */
384 case FORE200E_STATE_START_FW:
385 /* nothing to do for that state */
387 case FORE200E_STATE_RESET:
388 /* nothing to do for that state */
390 case FORE200E_STATE_MAP:
391 fore200e->bus->unmap(fore200e);
393 case FORE200E_STATE_CONFIGURE:
394 /* nothing to do for that state */
396 case FORE200E_STATE_REGISTER:
397 /* XXX shouldn't we *start* by deregistering the device? */
398 atm_dev_deregister(fore200e->atm_dev);
400 case FORE200E_STATE_BLANK:
401 /* nothing to do for that state */
409 static u32 fore200e_pca_read(volatile u32 __iomem *addr)
411 /* on big-endian hosts, the board is configured to convert
412 the endianess of slave RAM accesses */
413 return le32_to_cpu(readl(addr));
417 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
419 /* on big-endian hosts, the board is configured to convert
420 the endianess of slave RAM accesses */
421 writel(cpu_to_le32(val), addr);
426 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
428 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
430 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
431 virt_addr, size, direction, dma_addr);
438 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
440 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
441 dma_addr, size, direction);
443 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
448 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
450 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
452 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
456 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
460 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
464 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
465 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
468 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
469 int size, int nbr, int alignment)
471 /* returned chunks are page-aligned */
472 chunk->alloc_size = size * nbr;
473 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
477 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
480 chunk->align_addr = chunk->alloc_addr;
486 /* free a DMA consistent chunk of memory */
489 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
491 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
499 fore200e_pca_irq_check(struct fore200e* fore200e)
501 /* this is a 1 bit register */
502 int irq_posted = readl(fore200e->regs.pca.psr);
504 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
505 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
506 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
515 fore200e_pca_irq_ack(struct fore200e* fore200e)
517 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
522 fore200e_pca_reset(struct fore200e* fore200e)
524 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
526 writel(0, fore200e->regs.pca.hcr);
531 fore200e_pca_map(struct fore200e* fore200e)
533 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
535 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
537 if (fore200e->virt_base == NULL) {
538 printk(FORE200E "can't map device %s\n", fore200e->name);
542 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
544 /* gain access to the PCA specific registers */
545 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
546 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
547 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
549 fore200e->state = FORE200E_STATE_MAP;
555 fore200e_pca_unmap(struct fore200e* fore200e)
557 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
559 if (fore200e->virt_base != NULL)
560 iounmap(fore200e->virt_base);
565 fore200e_pca_configure(struct fore200e* fore200e)
567 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
568 u8 master_ctrl, latency;
570 DPRINTK(2, "device %s being configured\n", fore200e->name);
572 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
573 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
577 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
579 master_ctrl = master_ctrl
580 #if defined(__BIG_ENDIAN)
581 /* request the PCA board to convert the endianess of slave RAM accesses */
582 | PCA200E_CTRL_CONVERT_ENDIAN
585 | PCA200E_CTRL_DIS_CACHE_RD
586 | PCA200E_CTRL_DIS_WRT_INVAL
587 | PCA200E_CTRL_ENA_CONT_REQ_MODE
588 | PCA200E_CTRL_2_CACHE_WRT_INVAL
590 | PCA200E_CTRL_LARGE_PCI_BURSTS;
592 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
594 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
595 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
596 this may impact the performances of other PCI devices on the same bus, though */
598 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
600 fore200e->state = FORE200E_STATE_CONFIGURE;
606 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
608 struct host_cmdq* cmdq = &fore200e->host_cmdq;
609 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
610 struct prom_opcode opcode;
614 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
616 opcode.opcode = OPCODE_GET_PROM;
619 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
621 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
623 *entry->status = STATUS_PENDING;
625 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
627 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
629 *entry->status = STATUS_FREE;
631 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
634 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
638 #if defined(__BIG_ENDIAN)
640 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
642 /* MAC address is stored as little-endian */
643 swap_here(&prom->mac_addr[0]);
644 swap_here(&prom->mac_addr[4]);
652 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
654 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
656 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
657 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
660 #endif /* CONFIG_PCI */
665 static u32 fore200e_sba_read(volatile u32 __iomem *addr)
667 return sbus_readl(addr);
670 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
672 sbus_writel(val, addr);
675 static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
677 struct of_device *op = fore200e->bus_dev;
680 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
682 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
683 virt_addr, size, direction, dma_addr);
688 static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
690 struct of_device *op = fore200e->bus_dev;
692 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
693 dma_addr, size, direction);
695 dma_unmap_single(&op->dev, dma_addr, size, direction);
698 static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
700 struct of_device *op = fore200e->bus_dev;
702 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
704 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
707 static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
709 struct of_device *op = fore200e->bus_dev;
711 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
713 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
716 /* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
717 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
719 static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
720 int size, int nbr, int alignment)
722 struct of_device *op = fore200e->bus_dev;
724 chunk->alloc_size = chunk->align_size = size * nbr;
726 /* returned chunks are page-aligned */
727 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
728 &chunk->dma_addr, GFP_ATOMIC);
730 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
733 chunk->align_addr = chunk->alloc_addr;
738 /* free a DVMA consistent chunk of memory */
739 static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
741 struct of_device *op = fore200e->bus_dev;
743 dma_free_coherent(&op->dev, chunk->alloc_size,
744 chunk->alloc_addr, chunk->dma_addr);
747 static void fore200e_sba_irq_enable(struct fore200e *fore200e)
749 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
750 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
753 static int fore200e_sba_irq_check(struct fore200e *fore200e)
755 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
758 static void fore200e_sba_irq_ack(struct fore200e *fore200e)
760 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
761 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
764 static void fore200e_sba_reset(struct fore200e *fore200e)
766 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
768 fore200e->bus->write(0, fore200e->regs.sba.hcr);
771 static int __init fore200e_sba_map(struct fore200e *fore200e)
773 struct of_device *op = fore200e->bus_dev;
776 /* gain access to the SBA specific registers */
777 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
778 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
779 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
780 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
782 if (!fore200e->virt_base) {
783 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
787 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
789 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
791 /* get the supported DVMA burst sizes */
792 bursts = of_getintprop_default(op->node->parent, "burst-sizes", 0x00);
794 if (sbus_can_dma_64bit())
795 sbus_set_sbus64(&op->dev, bursts);
797 fore200e->state = FORE200E_STATE_MAP;
801 static void fore200e_sba_unmap(struct fore200e *fore200e)
803 struct of_device *op = fore200e->bus_dev;
805 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
806 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
807 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
808 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
811 static int __init fore200e_sba_configure(struct fore200e *fore200e)
813 fore200e->state = FORE200E_STATE_CONFIGURE;
817 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
819 struct of_device *op = fore200e->bus_dev;
823 prop = of_get_property(op->node, "madaddrlo2", &len);
826 memcpy(&prom->mac_addr[4], prop, 4);
828 prop = of_get_property(op->node, "madaddrhi4", &len);
831 memcpy(&prom->mac_addr[2], prop, 4);
833 prom->serial_number = of_getintprop_default(op->node, "serialnumber", 0);
834 prom->hw_revision = of_getintprop_default(op->node, "promversion", 0);
839 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
841 struct of_device *op = fore200e->bus_dev;
842 const struct linux_prom_registers *regs;
844 regs = of_get_property(op->node, "reg", NULL);
846 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
847 (regs ? regs->which_io : 0), op->node->name);
849 #endif /* CONFIG_SBUS */
853 fore200e_tx_irq(struct fore200e* fore200e)
855 struct host_txq* txq = &fore200e->host_txq;
856 struct host_txq_entry* entry;
858 struct fore200e_vc_map* vc_map;
860 if (fore200e->host_txq.txing == 0)
865 entry = &txq->host_entry[ txq->tail ];
867 if ((*entry->status & STATUS_COMPLETE) == 0) {
871 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
872 entry, txq->tail, entry->vc_map, entry->skb);
874 /* free copy of misaligned data */
877 /* remove DMA mapping */
878 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
881 vc_map = entry->vc_map;
883 /* vcc closed since the time the entry was submitted for tx? */
884 if ((vc_map->vcc == NULL) ||
885 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
887 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
888 fore200e->atm_dev->number);
890 dev_kfree_skb_any(entry->skb);
895 /* vcc closed then immediately re-opened? */
896 if (vc_map->incarn != entry->incarn) {
898 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
899 if the same vcc is immediately re-opened, those pending PDUs must
900 not be popped after the completion of their emission, as they refer
901 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
902 would be decremented by the size of the (unrelated) skb, possibly
903 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
904 we thus bind the tx entry to the current incarnation of the vcc
905 when the entry is submitted for tx. When the tx later completes,
906 if the incarnation number of the tx entry does not match the one
907 of the vcc, then this implies that the vcc has been closed then re-opened.
908 we thus just drop the skb here. */
910 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
911 fore200e->atm_dev->number);
913 dev_kfree_skb_any(entry->skb);
919 /* notify tx completion */
921 vcc->pop(vcc, entry->skb);
924 dev_kfree_skb_any(entry->skb);
927 /* race fixed by the above incarnation mechanism, but... */
928 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
929 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
932 /* check error condition */
933 if (*entry->status & STATUS_ERROR)
934 atomic_inc(&vcc->stats->tx_err);
936 atomic_inc(&vcc->stats->tx);
940 *entry->status = STATUS_FREE;
942 fore200e->host_txq.txing--;
944 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
949 #ifdef FORE200E_BSQ_DEBUG
950 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
952 struct buffer* buffer;
955 buffer = bsq->freebuf;
958 if (buffer->supplied) {
959 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
960 where, scheme, magn, buffer->index);
963 if (buffer->magn != magn) {
964 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
965 where, scheme, magn, buffer->index, buffer->magn);
968 if (buffer->scheme != scheme) {
969 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
970 where, scheme, magn, buffer->index, buffer->scheme);
973 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
974 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
975 where, scheme, magn, buffer->index);
979 buffer = buffer->next;
982 if (count != bsq->freebuf_count) {
983 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
984 where, scheme, magn, count, bsq->freebuf_count);
992 fore200e_supply(struct fore200e* fore200e)
996 struct host_bsq* bsq;
997 struct host_bsq_entry* entry;
998 struct buffer* buffer;
1000 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1001 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1003 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1005 #ifdef FORE200E_BSQ_DEBUG
1006 bsq_audit(1, bsq, scheme, magn);
1008 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1010 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1011 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1013 entry = &bsq->host_entry[ bsq->head ];
1015 for (i = 0; i < RBD_BLK_SIZE; i++) {
1017 /* take the first buffer in the free buffer list */
1018 buffer = bsq->freebuf;
1020 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1021 scheme, magn, bsq->freebuf_count);
1024 bsq->freebuf = buffer->next;
1026 #ifdef FORE200E_BSQ_DEBUG
1027 if (buffer->supplied)
1028 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1029 scheme, magn, buffer->index);
1030 buffer->supplied = 1;
1032 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1033 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1036 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1038 /* decrease accordingly the number of free rx buffers */
1039 bsq->freebuf_count -= RBD_BLK_SIZE;
1041 *entry->status = STATUS_PENDING;
1042 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1050 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1052 struct sk_buff* skb;
1053 struct buffer* buffer;
1054 struct fore200e_vcc* fore200e_vcc;
1056 #ifdef FORE200E_52BYTE_AAL0_SDU
1057 u32 cell_header = 0;
1062 fore200e_vcc = FORE200E_VCC(vcc);
1063 ASSERT(fore200e_vcc);
1065 #ifdef FORE200E_52BYTE_AAL0_SDU
1066 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1068 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1069 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1070 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1071 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1072 rpd->atm_header.clp;
1077 /* compute total PDU length */
1078 for (i = 0; i < rpd->nseg; i++)
1079 pdu_len += rpd->rsd[ i ].length;
1081 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1083 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1085 atomic_inc(&vcc->stats->rx_drop);
1089 __net_timestamp(skb);
1091 #ifdef FORE200E_52BYTE_AAL0_SDU
1093 *((u32*)skb_put(skb, 4)) = cell_header;
1097 /* reassemble segments */
1098 for (i = 0; i < rpd->nseg; i++) {
1100 /* rebuild rx buffer address from rsd handle */
1101 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1103 /* Make device DMA transfer visible to CPU. */
1104 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1106 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1108 /* Now let the device get at it again. */
1109 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1112 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1114 if (pdu_len < fore200e_vcc->rx_min_pdu)
1115 fore200e_vcc->rx_min_pdu = pdu_len;
1116 if (pdu_len > fore200e_vcc->rx_max_pdu)
1117 fore200e_vcc->rx_max_pdu = pdu_len;
1118 fore200e_vcc->rx_pdu++;
1121 if (atm_charge(vcc, skb->truesize) == 0) {
1123 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1124 vcc->itf, vcc->vpi, vcc->vci);
1126 dev_kfree_skb_any(skb);
1128 atomic_inc(&vcc->stats->rx_drop);
1132 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1134 vcc->push(vcc, skb);
1135 atomic_inc(&vcc->stats->rx);
1137 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1144 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1146 struct host_bsq* bsq;
1147 struct buffer* buffer;
1150 for (i = 0; i < rpd->nseg; i++) {
1152 /* rebuild rx buffer address from rsd handle */
1153 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1155 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1157 #ifdef FORE200E_BSQ_DEBUG
1158 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1160 if (buffer->supplied == 0)
1161 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1162 buffer->scheme, buffer->magn, buffer->index);
1163 buffer->supplied = 0;
1166 /* re-insert the buffer into the free buffer list */
1167 buffer->next = bsq->freebuf;
1168 bsq->freebuf = buffer;
1170 /* then increment the number of free rx buffers */
1171 bsq->freebuf_count++;
1177 fore200e_rx_irq(struct fore200e* fore200e)
1179 struct host_rxq* rxq = &fore200e->host_rxq;
1180 struct host_rxq_entry* entry;
1181 struct atm_vcc* vcc;
1182 struct fore200e_vc_map* vc_map;
1186 entry = &rxq->host_entry[ rxq->head ];
1188 /* no more received PDUs */
1189 if ((*entry->status & STATUS_COMPLETE) == 0)
1192 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1194 if ((vc_map->vcc == NULL) ||
1195 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1197 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1198 fore200e->atm_dev->number,
1199 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1205 if ((*entry->status & STATUS_ERROR) == 0) {
1207 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1210 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1211 fore200e->atm_dev->number,
1212 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1213 atomic_inc(&vcc->stats->rx_err);
1217 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1219 fore200e_collect_rpd(fore200e, entry->rpd);
1221 /* rewrite the rpd address to ack the received PDU */
1222 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1223 *entry->status = STATUS_FREE;
1225 fore200e_supply(fore200e);
1230 #ifndef FORE200E_USE_TASKLET
1232 fore200e_irq(struct fore200e* fore200e)
1234 unsigned long flags;
1236 spin_lock_irqsave(&fore200e->q_lock, flags);
1237 fore200e_rx_irq(fore200e);
1238 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1240 spin_lock_irqsave(&fore200e->q_lock, flags);
1241 fore200e_tx_irq(fore200e);
1242 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1248 fore200e_interrupt(int irq, void* dev)
1250 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1252 if (fore200e->bus->irq_check(fore200e) == 0) {
1254 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1257 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1259 #ifdef FORE200E_USE_TASKLET
1260 tasklet_schedule(&fore200e->tx_tasklet);
1261 tasklet_schedule(&fore200e->rx_tasklet);
1263 fore200e_irq(fore200e);
1266 fore200e->bus->irq_ack(fore200e);
1271 #ifdef FORE200E_USE_TASKLET
1273 fore200e_tx_tasklet(unsigned long data)
1275 struct fore200e* fore200e = (struct fore200e*) data;
1276 unsigned long flags;
1278 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1280 spin_lock_irqsave(&fore200e->q_lock, flags);
1281 fore200e_tx_irq(fore200e);
1282 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1287 fore200e_rx_tasklet(unsigned long data)
1289 struct fore200e* fore200e = (struct fore200e*) data;
1290 unsigned long flags;
1292 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1294 spin_lock_irqsave(&fore200e->q_lock, flags);
1295 fore200e_rx_irq((struct fore200e*) data);
1296 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1302 fore200e_select_scheme(struct atm_vcc* vcc)
1304 /* fairly balance the VCs over (identical) buffer schemes */
1305 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1307 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1308 vcc->itf, vcc->vpi, vcc->vci, scheme);
1315 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1317 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1318 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1319 struct activate_opcode activ_opcode;
1320 struct deactivate_opcode deactiv_opcode;
1323 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1325 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1328 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1330 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1331 activ_opcode.aal = aal;
1332 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1333 activ_opcode.pad = 0;
1336 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1337 deactiv_opcode.pad = 0;
1340 vpvc.vci = vcc->vci;
1341 vpvc.vpi = vcc->vpi;
1343 *entry->status = STATUS_PENDING;
1347 #ifdef FORE200E_52BYTE_AAL0_SDU
1350 /* the MTU is not used by the cp, except in the case of AAL0 */
1351 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1352 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1353 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1356 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1357 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1360 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1362 *entry->status = STATUS_FREE;
1365 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1366 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1370 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1371 activate ? "open" : "clos");
1377 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1380 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1382 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1384 /* compute the data cells to idle cells ratio from the tx PCR */
1385 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1386 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1389 /* disable rate control */
1390 rate->data_cells = rate->idle_cells = 0;
1396 fore200e_open(struct atm_vcc *vcc)
1398 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1399 struct fore200e_vcc* fore200e_vcc;
1400 struct fore200e_vc_map* vc_map;
1401 unsigned long flags;
1403 short vpi = vcc->vpi;
1405 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1406 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1408 spin_lock_irqsave(&fore200e->q_lock, flags);
1410 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1413 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1415 printk(FORE200E "VC %d.%d.%d already in use\n",
1416 fore200e->atm_dev->number, vpi, vci);
1423 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1425 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1426 if (fore200e_vcc == NULL) {
1431 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1432 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1433 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1434 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1435 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1436 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1437 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1439 /* pseudo-CBR bandwidth requested? */
1440 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1442 mutex_lock(&fore200e->rate_mtx);
1443 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1444 mutex_unlock(&fore200e->rate_mtx);
1446 kfree(fore200e_vcc);
1451 /* reserve bandwidth */
1452 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1453 mutex_unlock(&fore200e->rate_mtx);
1456 vcc->itf = vcc->dev->number;
1458 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1459 set_bit(ATM_VF_ADDR, &vcc->flags);
1461 vcc->dev_data = fore200e_vcc;
1463 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1467 clear_bit(ATM_VF_ADDR, &vcc->flags);
1468 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1470 vcc->dev_data = NULL;
1472 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1474 kfree(fore200e_vcc);
1478 /* compute rate control parameters */
1479 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1481 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1482 set_bit(ATM_VF_HASQOS, &vcc->flags);
1484 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1485 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1486 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1487 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1490 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1491 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1492 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1494 /* new incarnation of the vcc */
1495 vc_map->incarn = ++fore200e->incarn_count;
1497 /* VC unusable before this flag is set */
1498 set_bit(ATM_VF_READY, &vcc->flags);
1505 fore200e_close(struct atm_vcc* vcc)
1507 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1508 struct fore200e_vcc* fore200e_vcc;
1509 struct fore200e_vc_map* vc_map;
1510 unsigned long flags;
1513 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1514 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1516 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1518 clear_bit(ATM_VF_READY, &vcc->flags);
1520 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1522 spin_lock_irqsave(&fore200e->q_lock, flags);
1524 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1526 /* the vc is no longer considered as "in use" by fore200e_open() */
1529 vcc->itf = vcc->vci = vcc->vpi = 0;
1531 fore200e_vcc = FORE200E_VCC(vcc);
1532 vcc->dev_data = NULL;
1534 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1536 /* release reserved bandwidth, if any */
1537 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1539 mutex_lock(&fore200e->rate_mtx);
1540 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1541 mutex_unlock(&fore200e->rate_mtx);
1543 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1546 clear_bit(ATM_VF_ADDR, &vcc->flags);
1547 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1549 ASSERT(fore200e_vcc);
1550 kfree(fore200e_vcc);
1555 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1557 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1558 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1559 struct fore200e_vc_map* vc_map;
1560 struct host_txq* txq = &fore200e->host_txq;
1561 struct host_txq_entry* entry;
1563 struct tpd_haddr tpd_haddr;
1564 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1566 int tx_len = skb->len;
1567 u32* cell_header = NULL;
1568 unsigned char* skb_data;
1570 unsigned char* data;
1571 unsigned long flags;
1574 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1576 ASSERT(fore200e_vcc);
1578 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1579 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1580 dev_kfree_skb_any(skb);
1584 #ifdef FORE200E_52BYTE_AAL0_SDU
1585 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1586 cell_header = (u32*) skb->data;
1587 skb_data = skb->data + 4; /* skip 4-byte cell header */
1588 skb_len = tx_len = skb->len - 4;
1590 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1595 skb_data = skb->data;
1599 if (((unsigned long)skb_data) & 0x3) {
1601 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1606 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1608 /* this simply NUKES the PCA board */
1609 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1611 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1615 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1621 dev_kfree_skb_any(skb);
1626 memcpy(data, skb_data, skb_len);
1627 if (skb_len < tx_len)
1628 memset(data + skb_len, 0x00, tx_len - skb_len);
1634 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1635 ASSERT(vc_map->vcc == vcc);
1639 spin_lock_irqsave(&fore200e->q_lock, flags);
1641 entry = &txq->host_entry[ txq->head ];
1643 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1645 /* try to free completed tx queue entries */
1646 fore200e_tx_irq(fore200e);
1648 if (*entry->status != STATUS_FREE) {
1650 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1652 /* retry once again? */
1658 atomic_inc(&vcc->stats->tx_err);
1661 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1662 fore200e->name, fore200e->cp_queues->heartbeat);
1667 dev_kfree_skb_any(skb);
1677 entry->incarn = vc_map->incarn;
1678 entry->vc_map = vc_map;
1680 entry->data = tx_copy ? data : NULL;
1683 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1684 tpd->tsd[ 0 ].length = tx_len;
1686 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1689 /* The dma_map call above implies a dma_sync so the device can use it,
1690 * thus no explicit dma_sync call is necessary here.
1693 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1694 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1695 tpd->tsd[0].length, skb_len);
1697 if (skb_len < fore200e_vcc->tx_min_pdu)
1698 fore200e_vcc->tx_min_pdu = skb_len;
1699 if (skb_len > fore200e_vcc->tx_max_pdu)
1700 fore200e_vcc->tx_max_pdu = skb_len;
1701 fore200e_vcc->tx_pdu++;
1703 /* set tx rate control information */
1704 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1705 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1708 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1709 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1710 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1711 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1712 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1715 /* set the ATM header, common to all cells conveying the PDU */
1716 tpd->atm_header.clp = 0;
1717 tpd->atm_header.plt = 0;
1718 tpd->atm_header.vci = vcc->vci;
1719 tpd->atm_header.vpi = vcc->vpi;
1720 tpd->atm_header.gfc = 0;
1723 tpd->spec.length = tx_len;
1725 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1728 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1730 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1732 *entry->status = STATUS_PENDING;
1733 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1735 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1742 fore200e_getstats(struct fore200e* fore200e)
1744 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1745 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1746 struct stats_opcode opcode;
1750 if (fore200e->stats == NULL) {
1751 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1752 if (fore200e->stats == NULL)
1756 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1757 sizeof(struct stats), DMA_FROM_DEVICE);
1759 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1761 opcode.opcode = OPCODE_GET_STATS;
1764 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1766 *entry->status = STATUS_PENDING;
1768 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1770 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1772 *entry->status = STATUS_FREE;
1774 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1777 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1786 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1788 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1790 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1791 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1798 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1800 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1802 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1803 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1809 #if 0 /* currently unused */
1811 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1813 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1814 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1815 struct oc3_opcode opcode;
1817 u32 oc3_regs_dma_addr;
1819 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1821 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1823 opcode.opcode = OPCODE_GET_OC3;
1828 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1830 *entry->status = STATUS_PENDING;
1832 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1834 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1836 *entry->status = STATUS_FREE;
1838 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1841 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1851 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1853 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1854 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1855 struct oc3_opcode opcode;
1858 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1860 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1862 opcode.opcode = OPCODE_SET_OC3;
1864 opcode.value = value;
1867 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1869 *entry->status = STATUS_PENDING;
1871 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1873 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1875 *entry->status = STATUS_FREE;
1878 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1887 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1889 u32 mct_value, mct_mask;
1892 if (!capable(CAP_NET_ADMIN))
1895 switch (loop_mode) {
1899 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1902 case ATM_LM_LOC_PHY:
1903 mct_value = mct_mask = SUNI_MCT_DLE;
1906 case ATM_LM_RMT_PHY:
1907 mct_value = mct_mask = SUNI_MCT_LLE;
1914 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1916 fore200e->loop_mode = loop_mode;
1923 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1925 struct sonet_stats tmp;
1927 if (fore200e_getstats(fore200e) < 0)
1930 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1931 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1932 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1933 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1934 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1935 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1936 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1937 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1938 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1939 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1940 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1941 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1942 be32_to_cpu(fore200e->stats->aal5.cells_received);
1945 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1952 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1954 struct fore200e* fore200e = FORE200E_DEV(dev);
1956 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1961 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1964 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1967 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1970 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1973 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1976 return -ENOSYS; /* not implemented */
1981 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1983 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1984 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1986 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1987 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1991 DPRINTK(2, "change_qos %d.%d.%d, "
1992 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1993 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1994 "available_cell_rate = %u",
1995 vcc->itf, vcc->vpi, vcc->vci,
1996 fore200e_traffic_class[ qos->txtp.traffic_class ],
1997 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1998 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1999 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2000 flags, fore200e->available_cell_rate);
2002 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2004 mutex_lock(&fore200e->rate_mtx);
2005 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2006 mutex_unlock(&fore200e->rate_mtx);
2010 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2011 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2013 mutex_unlock(&fore200e->rate_mtx);
2015 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2017 /* update rate control parameters */
2018 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2020 set_bit(ATM_VF_HASQOS, &vcc->flags);
2029 static int __devinit
2030 fore200e_irq_request(struct fore200e* fore200e)
2032 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
2034 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2035 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2039 printk(FORE200E "IRQ %s reserved for device %s\n",
2040 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2042 #ifdef FORE200E_USE_TASKLET
2043 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2044 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2047 fore200e->state = FORE200E_STATE_IRQ;
2052 static int __devinit
2053 fore200e_get_esi(struct fore200e* fore200e)
2055 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2061 ok = fore200e->bus->prom_read(fore200e, prom);
2067 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
2069 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2070 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
2072 for (i = 0; i < ESI_LEN; i++) {
2073 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2082 static int __devinit
2083 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2085 int scheme, magn, nbr, size, i;
2087 struct host_bsq* bsq;
2088 struct buffer* buffer;
2090 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2091 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2093 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2095 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2096 size = fore200e_rx_buf_size[ scheme ][ magn ];
2098 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2100 /* allocate the array of receive buffers */
2101 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2106 bsq->freebuf = NULL;
2108 for (i = 0; i < nbr; i++) {
2110 buffer[ i ].scheme = scheme;
2111 buffer[ i ].magn = magn;
2112 #ifdef FORE200E_BSQ_DEBUG
2113 buffer[ i ].index = i;
2114 buffer[ i ].supplied = 0;
2117 /* allocate the receive buffer body */
2118 if (fore200e_chunk_alloc(fore200e,
2119 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2120 DMA_FROM_DEVICE) < 0) {
2123 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2129 /* insert the buffer into the free buffer list */
2130 buffer[ i ].next = bsq->freebuf;
2131 bsq->freebuf = &buffer[ i ];
2133 /* all the buffers are free, initially */
2134 bsq->freebuf_count = nbr;
2136 #ifdef FORE200E_BSQ_DEBUG
2137 bsq_audit(3, bsq, scheme, magn);
2142 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2147 static int __devinit
2148 fore200e_init_bs_queue(struct fore200e* fore200e)
2150 int scheme, magn, i;
2152 struct host_bsq* bsq;
2153 struct cp_bsq_entry __iomem * cp_entry;
2155 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2156 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2158 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2160 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2162 /* allocate and align the array of status words */
2163 if (fore200e->bus->dma_chunk_alloc(fore200e,
2165 sizeof(enum status),
2167 fore200e->bus->status_alignment) < 0) {
2171 /* allocate and align the array of receive buffer descriptors */
2172 if (fore200e->bus->dma_chunk_alloc(fore200e,
2174 sizeof(struct rbd_block),
2176 fore200e->bus->descr_alignment) < 0) {
2178 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2182 /* get the base address of the cp resident buffer supply queue entries */
2183 cp_entry = fore200e->virt_base +
2184 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2186 /* fill the host resident and cp resident buffer supply queue entries */
2187 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2189 bsq->host_entry[ i ].status =
2190 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2191 bsq->host_entry[ i ].rbd_block =
2192 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2193 bsq->host_entry[ i ].rbd_block_dma =
2194 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2195 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2197 *bsq->host_entry[ i ].status = STATUS_FREE;
2199 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2200 &cp_entry[ i ].status_haddr);
2205 fore200e->state = FORE200E_STATE_INIT_BSQ;
2210 static int __devinit
2211 fore200e_init_rx_queue(struct fore200e* fore200e)
2213 struct host_rxq* rxq = &fore200e->host_rxq;
2214 struct cp_rxq_entry __iomem * cp_entry;
2217 DPRINTK(2, "receive queue is being initialized\n");
2219 /* allocate and align the array of status words */
2220 if (fore200e->bus->dma_chunk_alloc(fore200e,
2222 sizeof(enum status),
2224 fore200e->bus->status_alignment) < 0) {
2228 /* allocate and align the array of receive PDU descriptors */
2229 if (fore200e->bus->dma_chunk_alloc(fore200e,
2233 fore200e->bus->descr_alignment) < 0) {
2235 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2239 /* get the base address of the cp resident rx queue entries */
2240 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2242 /* fill the host resident and cp resident rx entries */
2243 for (i=0; i < QUEUE_SIZE_RX; i++) {
2245 rxq->host_entry[ i ].status =
2246 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2247 rxq->host_entry[ i ].rpd =
2248 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2249 rxq->host_entry[ i ].rpd_dma =
2250 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2251 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2253 *rxq->host_entry[ i ].status = STATUS_FREE;
2255 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2256 &cp_entry[ i ].status_haddr);
2258 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2259 &cp_entry[ i ].rpd_haddr);
2262 /* set the head entry of the queue */
2265 fore200e->state = FORE200E_STATE_INIT_RXQ;
2270 static int __devinit
2271 fore200e_init_tx_queue(struct fore200e* fore200e)
2273 struct host_txq* txq = &fore200e->host_txq;
2274 struct cp_txq_entry __iomem * cp_entry;
2277 DPRINTK(2, "transmit queue is being initialized\n");
2279 /* allocate and align the array of status words */
2280 if (fore200e->bus->dma_chunk_alloc(fore200e,
2282 sizeof(enum status),
2284 fore200e->bus->status_alignment) < 0) {
2288 /* allocate and align the array of transmit PDU descriptors */
2289 if (fore200e->bus->dma_chunk_alloc(fore200e,
2293 fore200e->bus->descr_alignment) < 0) {
2295 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2299 /* get the base address of the cp resident tx queue entries */
2300 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2302 /* fill the host resident and cp resident tx entries */
2303 for (i=0; i < QUEUE_SIZE_TX; i++) {
2305 txq->host_entry[ i ].status =
2306 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2307 txq->host_entry[ i ].tpd =
2308 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2309 txq->host_entry[ i ].tpd_dma =
2310 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2311 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2313 *txq->host_entry[ i ].status = STATUS_FREE;
2315 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2316 &cp_entry[ i ].status_haddr);
2318 /* although there is a one-to-one mapping of tx queue entries and tpds,
2319 we do not write here the DMA (physical) base address of each tpd into
2320 the related cp resident entry, because the cp relies on this write
2321 operation to detect that a new pdu has been submitted for tx */
2324 /* set the head and tail entries of the queue */
2328 fore200e->state = FORE200E_STATE_INIT_TXQ;
2333 static int __devinit
2334 fore200e_init_cmd_queue(struct fore200e* fore200e)
2336 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2337 struct cp_cmdq_entry __iomem * cp_entry;
2340 DPRINTK(2, "command queue is being initialized\n");
2342 /* allocate and align the array of status words */
2343 if (fore200e->bus->dma_chunk_alloc(fore200e,
2345 sizeof(enum status),
2347 fore200e->bus->status_alignment) < 0) {
2351 /* get the base address of the cp resident cmd queue entries */
2352 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2354 /* fill the host resident and cp resident cmd entries */
2355 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2357 cmdq->host_entry[ i ].status =
2358 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2359 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2361 *cmdq->host_entry[ i ].status = STATUS_FREE;
2363 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2364 &cp_entry[ i ].status_haddr);
2367 /* set the head entry of the queue */
2370 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2375 static void __devinit
2376 fore200e_param_bs_queue(struct fore200e* fore200e,
2377 enum buffer_scheme scheme, enum buffer_magn magn,
2378 int queue_length, int pool_size, int supply_blksize)
2380 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2382 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2383 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2384 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2385 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2389 static int __devinit
2390 fore200e_initialize(struct fore200e* fore200e)
2392 struct cp_queues __iomem * cpq;
2393 int ok, scheme, magn;
2395 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2397 mutex_init(&fore200e->rate_mtx);
2398 spin_lock_init(&fore200e->q_lock);
2400 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2402 /* enable cp to host interrupts */
2403 fore200e->bus->write(1, &cpq->imask);
2405 if (fore200e->bus->irq_enable)
2406 fore200e->bus->irq_enable(fore200e);
2408 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2410 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2411 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2412 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2414 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2415 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2417 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2418 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2419 fore200e_param_bs_queue(fore200e, scheme, magn,
2421 fore200e_rx_buf_nbr[ scheme ][ magn ],
2424 /* issue the initialize command */
2425 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2426 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2428 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2430 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2434 printk(FORE200E "device %s initialized\n", fore200e->name);
2436 fore200e->state = FORE200E_STATE_INITIALIZE;
2441 static void __devinit
2442 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2444 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2449 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2453 static int __devinit
2454 fore200e_monitor_getc(struct fore200e* fore200e)
2456 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2457 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2460 while (time_before(jiffies, timeout)) {
2462 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2464 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2466 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2468 printk("%c", c & 0xFF);
2478 static void __devinit
2479 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2483 /* the i960 monitor doesn't accept any new character if it has something to say */
2484 while (fore200e_monitor_getc(fore200e) >= 0);
2486 fore200e_monitor_putc(fore200e, *str++);
2489 while (fore200e_monitor_getc(fore200e) >= 0);
2492 #ifdef __LITTLE_ENDIAN
2493 #define FW_EXT ".bin"
2495 #define FW_EXT "_ecd.bin2"
2498 static int __devinit
2499 fore200e_load_and_start_fw(struct fore200e* fore200e)
2501 const struct firmware *firmware;
2502 struct device *device;
2503 struct fw_header *fw_header;
2504 const __le32 *fw_data;
2506 u32 __iomem *load_addr;
2510 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2511 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2513 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2514 device = &((struct of_device *) fore200e->bus_dev)->dev;
2519 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2520 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2521 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2525 fw_data = (__le32 *) firmware->data;
2526 fw_size = firmware->size / sizeof(u32);
2527 fw_header = (struct fw_header *) firmware->data;
2528 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2530 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2531 fore200e->name, load_addr, fw_size);
2533 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2534 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2538 for (; fw_size--; fw_data++, load_addr++)
2539 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2541 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2543 #if defined(__sparc_v9__)
2544 /* reported to be required by SBA cards on some sparc64 hosts */
2548 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2549 fore200e_monitor_puts(fore200e, buf);
2551 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2552 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2556 printk(FORE200E "device %s firmware started\n", fore200e->name);
2558 fore200e->state = FORE200E_STATE_START_FW;
2562 release_firmware(firmware);
2567 static int __devinit
2568 fore200e_register(struct fore200e* fore200e)
2570 struct atm_dev* atm_dev;
2572 DPRINTK(2, "device %s being registered\n", fore200e->name);
2574 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2576 if (atm_dev == NULL) {
2577 printk(FORE200E "unable to register device %s\n", fore200e->name);
2581 atm_dev->dev_data = fore200e;
2582 fore200e->atm_dev = atm_dev;
2584 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2585 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2587 fore200e->available_cell_rate = ATM_OC3_PCR;
2589 fore200e->state = FORE200E_STATE_REGISTER;
2594 static int __devinit
2595 fore200e_init(struct fore200e* fore200e)
2597 if (fore200e_register(fore200e) < 0)
2600 if (fore200e->bus->configure(fore200e) < 0)
2603 if (fore200e->bus->map(fore200e) < 0)
2606 if (fore200e_reset(fore200e, 1) < 0)
2609 if (fore200e_load_and_start_fw(fore200e) < 0)
2612 if (fore200e_initialize(fore200e) < 0)
2615 if (fore200e_init_cmd_queue(fore200e) < 0)
2618 if (fore200e_init_tx_queue(fore200e) < 0)
2621 if (fore200e_init_rx_queue(fore200e) < 0)
2624 if (fore200e_init_bs_queue(fore200e) < 0)
2627 if (fore200e_alloc_rx_buf(fore200e) < 0)
2630 if (fore200e_get_esi(fore200e) < 0)
2633 if (fore200e_irq_request(fore200e) < 0)
2636 fore200e_supply(fore200e);
2638 /* all done, board initialization is now complete */
2639 fore200e->state = FORE200E_STATE_COMPLETE;
2644 static int __devinit fore200e_sba_probe(struct of_device *op,
2645 const struct of_device_id *match)
2647 const struct fore200e_bus *bus = match->data;
2648 struct fore200e *fore200e;
2649 static int index = 0;
2652 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2656 fore200e->bus = bus;
2657 fore200e->bus_dev = op;
2658 fore200e->irq = op->irqs[0];
2659 fore200e->phys_base = op->resource[0].start;
2661 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2663 err = fore200e_init(fore200e);
2665 fore200e_shutdown(fore200e);
2671 dev_set_drvdata(&op->dev, fore200e);
2676 static int __devexit fore200e_sba_remove(struct of_device *op)
2678 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2680 fore200e_shutdown(fore200e);
2686 static const struct of_device_id fore200e_sba_match[] = {
2688 .name = SBA200E_PROM_NAME,
2689 .data = (void *) &fore200e_bus[1],
2693 MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2695 static struct of_platform_driver fore200e_sba_driver = {
2696 .name = "fore_200e",
2697 .match_table = fore200e_sba_match,
2698 .probe = fore200e_sba_probe,
2699 .remove = __devexit_p(fore200e_sba_remove),
2704 static int __devinit
2705 fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2707 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2708 struct fore200e* fore200e;
2710 static int index = 0;
2712 if (pci_enable_device(pci_dev)) {
2717 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2718 if (fore200e == NULL) {
2723 fore200e->bus = bus;
2724 fore200e->bus_dev = pci_dev;
2725 fore200e->irq = pci_dev->irq;
2726 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2728 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2730 pci_set_master(pci_dev);
2732 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2733 fore200e->bus->model_name,
2734 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2736 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2738 err = fore200e_init(fore200e);
2740 fore200e_shutdown(fore200e);
2745 pci_set_drvdata(pci_dev, fore200e);
2753 pci_disable_device(pci_dev);
2758 static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev)
2760 struct fore200e *fore200e;
2762 fore200e = pci_get_drvdata(pci_dev);
2764 fore200e_shutdown(fore200e);
2766 pci_disable_device(pci_dev);
2770 static struct pci_device_id fore200e_pca_tbl[] = {
2771 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2772 0, 0, (unsigned long) &fore200e_bus[0] },
2776 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2778 static struct pci_driver fore200e_pca_driver = {
2779 .name = "fore_200e",
2780 .probe = fore200e_pca_detect,
2781 .remove = __devexit_p(fore200e_pca_remove_one),
2782 .id_table = fore200e_pca_tbl,
2786 static int __init fore200e_module_init(void)
2790 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2793 err = of_register_driver(&fore200e_sba_driver, &of_bus_type);
2799 err = pci_register_driver(&fore200e_pca_driver);
2804 of_unregister_driver(&fore200e_sba_driver);
2810 static void __exit fore200e_module_cleanup(void)
2813 pci_unregister_driver(&fore200e_pca_driver);
2816 of_unregister_driver(&fore200e_sba_driver);
2821 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2823 struct fore200e* fore200e = FORE200E_DEV(dev);
2824 struct fore200e_vcc* fore200e_vcc;
2825 struct atm_vcc* vcc;
2826 int i, len, left = *pos;
2827 unsigned long flags;
2831 if (fore200e_getstats(fore200e) < 0)
2834 len = sprintf(page,"\n"
2836 " internal name:\t\t%s\n", fore200e->name);
2838 /* print bus-specific information */
2839 if (fore200e->bus->proc_read)
2840 len += fore200e->bus->proc_read(fore200e, page + len);
2842 len += sprintf(page + len,
2843 " interrupt line:\t\t%s\n"
2844 " physical base address:\t0x%p\n"
2845 " virtual base address:\t0x%p\n"
2846 " factory address (ESI):\t%pM\n"
2847 " board serial number:\t\t%d\n\n",
2848 fore200e_irq_itoa(fore200e->irq),
2849 (void*)fore200e->phys_base,
2850 fore200e->virt_base,
2852 fore200e->esi[4] * 256 + fore200e->esi[5]);
2858 return sprintf(page,
2859 " free small bufs, scheme 1:\t%d\n"
2860 " free large bufs, scheme 1:\t%d\n"
2861 " free small bufs, scheme 2:\t%d\n"
2862 " free large bufs, scheme 2:\t%d\n",
2863 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2864 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2865 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2866 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2869 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2871 len = sprintf(page,"\n\n"
2872 " cell processor:\n"
2873 " heartbeat state:\t\t");
2875 if (hb >> 16 != 0xDEAD)
2876 len += sprintf(page + len, "0x%08x\n", hb);
2878 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2884 static const char* media_name[] = {
2885 "unshielded twisted pair",
2886 "multimode optical fiber ST",
2887 "multimode optical fiber SC",
2888 "single-mode optical fiber ST",
2889 "single-mode optical fiber SC",
2893 static const char* oc3_mode[] = {
2895 "diagnostic loopback",
2900 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2901 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2902 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2903 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2906 if (media_index > 4)
2909 switch (fore200e->loop_mode) {
2910 case ATM_LM_NONE: oc3_index = 0;
2912 case ATM_LM_LOC_PHY: oc3_index = 1;
2914 case ATM_LM_RMT_PHY: oc3_index = 2;
2916 default: oc3_index = 3;
2919 return sprintf(page,
2920 " firmware release:\t\t%d.%d.%d\n"
2921 " monitor release:\t\t%d.%d\n"
2922 " media type:\t\t\t%s\n"
2923 " OC-3 revision:\t\t0x%x\n"
2924 " OC-3 mode:\t\t\t%s",
2925 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2926 mon960_release >> 16, mon960_release << 16 >> 16,
2927 media_name[ media_index ],
2929 oc3_mode[ oc3_index ]);
2933 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2935 return sprintf(page,
2938 " version number:\t\t%d\n"
2939 " boot status word:\t\t0x%08x\n",
2940 fore200e->bus->read(&cp_monitor->mon_version),
2941 fore200e->bus->read(&cp_monitor->bstat));
2945 return sprintf(page,
2947 " device statistics:\n"
2949 " crc_header_errors:\t\t%10u\n"
2950 " framing_errors:\t\t%10u\n",
2951 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2952 be32_to_cpu(fore200e->stats->phy.framing_errors));
2955 return sprintf(page, "\n"
2957 " section_bip8_errors:\t%10u\n"
2958 " path_bip8_errors:\t\t%10u\n"
2959 " line_bip24_errors:\t\t%10u\n"
2960 " line_febe_errors:\t\t%10u\n"
2961 " path_febe_errors:\t\t%10u\n"
2962 " corr_hcs_errors:\t\t%10u\n"
2963 " ucorr_hcs_errors:\t\t%10u\n",
2964 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2965 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2966 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2967 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2968 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2969 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2970 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2973 return sprintf(page,"\n"
2974 " ATM:\t\t\t\t cells\n"
2977 " vpi out of range:\t\t%10u\n"
2978 " vpi no conn:\t\t%10u\n"
2979 " vci out of range:\t\t%10u\n"
2980 " vci no conn:\t\t%10u\n",
2981 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2982 be32_to_cpu(fore200e->stats->atm.cells_received),
2983 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2984 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2985 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2986 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2989 return sprintf(page,"\n"
2990 " AAL0:\t\t\t cells\n"
2993 " dropped:\t\t\t%10u\n",
2994 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2995 be32_to_cpu(fore200e->stats->aal0.cells_received),
2996 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2999 return sprintf(page,"\n"
3001 " SAR sublayer:\t\t cells\n"
3004 " dropped:\t\t\t%10u\n"
3005 " CRC errors:\t\t%10u\n"
3006 " protocol errors:\t\t%10u\n\n"
3007 " CS sublayer:\t\t PDUs\n"
3010 " dropped:\t\t\t%10u\n"
3011 " protocol errors:\t\t%10u\n",
3012 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
3013 be32_to_cpu(fore200e->stats->aal34.cells_received),
3014 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
3015 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
3016 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
3017 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
3018 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
3019 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
3020 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
3023 return sprintf(page,"\n"
3025 " SAR sublayer:\t\t cells\n"
3028 " dropped:\t\t\t%10u\n"
3029 " congestions:\t\t%10u\n\n"
3030 " CS sublayer:\t\t PDUs\n"
3033 " dropped:\t\t\t%10u\n"
3034 " CRC errors:\t\t%10u\n"
3035 " protocol errors:\t\t%10u\n",
3036 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
3037 be32_to_cpu(fore200e->stats->aal5.cells_received),
3038 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
3039 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
3040 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
3041 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
3042 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
3043 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
3044 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
3047 return sprintf(page,"\n"
3048 " AUX:\t\t allocation failures\n"
3049 " small b1:\t\t\t%10u\n"
3050 " large b1:\t\t\t%10u\n"
3051 " small b2:\t\t\t%10u\n"
3052 " large b2:\t\t\t%10u\n"
3053 " RX PDUs:\t\t\t%10u\n"
3054 " TX PDUs:\t\t\t%10lu\n",
3055 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
3056 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
3057 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
3058 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
3059 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
3063 return sprintf(page,"\n"
3064 " receive carrier:\t\t\t%s\n",
3065 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3068 return sprintf(page,"\n"
3069 " VCCs:\n address VPI VCI AAL "
3070 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3073 for (i = 0; i < NBR_CONNECT; i++) {
3075 vcc = fore200e->vc_map[i].vcc;
3080 spin_lock_irqsave(&fore200e->q_lock, flags);
3082 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3084 fore200e_vcc = FORE200E_VCC(vcc);
3085 ASSERT(fore200e_vcc);
3088 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3089 (u32)(unsigned long)vcc,
3090 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3091 fore200e_vcc->tx_pdu,
3092 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3093 fore200e_vcc->tx_max_pdu,
3094 fore200e_vcc->rx_pdu,
3095 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3096 fore200e_vcc->rx_max_pdu);
3098 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3102 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3108 module_init(fore200e_module_init);
3109 module_exit(fore200e_module_cleanup);
3112 static const struct atmdev_ops fore200e_ops =
3114 .open = fore200e_open,
3115 .close = fore200e_close,
3116 .ioctl = fore200e_ioctl,
3117 .getsockopt = fore200e_getsockopt,
3118 .setsockopt = fore200e_setsockopt,
3119 .send = fore200e_send,
3120 .change_qos = fore200e_change_qos,
3121 .proc_read = fore200e_proc_read,
3122 .owner = THIS_MODULE
3126 static const struct fore200e_bus fore200e_bus[] = {
3128 { "PCA-200E", "pca200e", 32, 4, 32,
3131 fore200e_pca_dma_map,
3132 fore200e_pca_dma_unmap,
3133 fore200e_pca_dma_sync_for_cpu,
3134 fore200e_pca_dma_sync_for_device,
3135 fore200e_pca_dma_chunk_alloc,
3136 fore200e_pca_dma_chunk_free,
3137 fore200e_pca_configure,
3140 fore200e_pca_prom_read,
3143 fore200e_pca_irq_check,
3144 fore200e_pca_irq_ack,
3145 fore200e_pca_proc_read,
3149 { "SBA-200E", "sba200e", 32, 64, 32,
3152 fore200e_sba_dma_map,
3153 fore200e_sba_dma_unmap,
3154 fore200e_sba_dma_sync_for_cpu,
3155 fore200e_sba_dma_sync_for_device,
3156 fore200e_sba_dma_chunk_alloc,
3157 fore200e_sba_dma_chunk_free,
3158 fore200e_sba_configure,
3161 fore200e_sba_prom_read,
3163 fore200e_sba_irq_enable,
3164 fore200e_sba_irq_check,
3165 fore200e_sba_irq_ack,
3166 fore200e_sba_proc_read,
3172 MODULE_LICENSE("GPL");
3174 #ifdef __LITTLE_ENDIAN__
3175 MODULE_FIRMWARE("pca200e.bin");
3177 MODULE_FIRMWARE("pca200e_ecd.bin2");
3179 #endif /* CONFIG_PCI */
3181 MODULE_FIRMWARE("sba200e_ecd.bin2");