2 * pata_optidma.c - Opti DMA PATA for new ATA layer
4 * Alan Cox <alan@redhat.com>
6 * The Opti DMA controllers are related to the older PIO PCI controllers
7 * and indeed the VLB ones. The main differences are that the timing
8 * numbers are now based off PCI clocks not VLB and differ, and that
11 * This driver should support Viper-N+, FireStar, FireStar Plus.
13 * These devices support virtual DMA for read (aka the CS5520). Later
14 * chips support UDMA33, but only if the rest of the board logic does,
15 * so you have to get this right. We don't support the virtual DMA
16 * but we do handle UDMA.
18 * Bits that are worth knowing
19 * Most control registers are shadowed into I/O registers
20 * 0x1F5 bit 0 tells you if the PCI/VLB clock is 33 or 25Mhz
21 * Virtual DMA registers *move* between rev 0x02 and rev 0x10
22 * UDMA requires a 66MHz FSB
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
35 #define DRV_NAME "pata_optidma"
36 #define DRV_VERSION "0.2.3"
39 READ_REG = 0, /* index of Read cycle timing register */
40 WRITE_REG = 1, /* index of Write cycle timing register */
41 CNTRL_REG = 3, /* index of Control register */
42 STRAP_REG = 5, /* index of Strap register */
43 MISC_REG = 6 /* index of Miscellaneous register */
46 static int pci_clock; /* 0 = 33 1 = 25 */
49 * optidma_pre_reset - probe begin
52 * Set up cable type and use generic probe init
55 static int optidma_pre_reset(struct ata_port *ap)
57 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
58 static const struct pci_bits optidma_enable_bits = {
62 if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits))
65 ap->cbl = ATA_CBL_PATA40;
66 return ata_std_prereset(ap);
70 * optidma_probe_reset - probe reset
73 * Perform the ATA probe and bus reset sequence plus specific handling
74 * for this hardware. The Opti needs little handling - we have no UDMA66
75 * capability that needs cable detection. All we must do is check the port
79 static void optidma_error_handler(struct ata_port *ap)
81 ata_bmdma_drive_eh(ap, optidma_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
85 * optidma_unlock - unlock control registers
88 * Unlock the control register block for this adapter. Registers must not
89 * be unlocked in a situation where libata might look at them.
92 static void optidma_unlock(struct ata_port *ap)
94 void __iomem *regio = ap->ioaddr.cmd_addr;
96 /* These 3 unlock the control register access */
99 iowrite8(3, regio + 2);
103 * optidma_lock - issue temporary relock
106 * Re-lock the configuration register settings.
109 static void optidma_lock(struct ata_port *ap)
111 void __iomem *regio = ap->ioaddr.cmd_addr;
114 iowrite8(0x83, regio + 2);
118 * optidma_set_mode - set mode data
123 * Called to do the DMA or PIO mode setup. Timing numbers are all
124 * pre computed to keep the code clean. There are two tables depending
125 * on the hardware clock speed.
127 * WARNING: While we do this the IDE registers vanish. If we take an
128 * IRQ here we depend on the host set locking to avoid catastrophe.
131 static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mode)
133 struct ata_device *pair = ata_dev_pair(adev);
134 int pio = adev->pio_mode - XFER_PIO_0;
135 int dma = adev->dma_mode - XFER_MW_DMA_0;
136 void __iomem *regio = ap->ioaddr.cmd_addr;
139 /* Address table precomputed with a DCLK of 2 */
140 static const u8 addr_timing[2][5] = {
141 { 0x30, 0x20, 0x20, 0x10, 0x10 },
142 { 0x20, 0x20, 0x10, 0x10, 0x10 }
144 static const u8 data_rec_timing[2][5] = {
145 { 0x59, 0x46, 0x30, 0x20, 0x20 },
146 { 0x46, 0x32, 0x20, 0x20, 0x10 }
148 static const u8 dma_data_rec_timing[2][3] = {
149 { 0x76, 0x20, 0x20 },
153 /* Switch from IDE to control mode */
158 * As with many controllers the address setup time is shared
159 * and must suit both devices if present. FIXME: Check if we
160 * need to look at slowest of PIO/DMA mode of either device
163 if (mode >= XFER_MW_DMA_0)
166 addr = addr_timing[pci_clock][pio];
170 /* Hardware constraint */
174 pair_addr = addr_timing[pci_clock][pair->pio_mode - XFER_PIO_0];
175 if (pair_addr > addr)
179 /* Commence primary programming sequence */
180 /* First we load the device number into the timing select */
181 iowrite8(adev->devno, regio + MISC_REG);
182 /* Now we load the data timings into read data/write data */
183 if (mode < XFER_MW_DMA_0) {
184 iowrite8(data_rec_timing[pci_clock][pio], regio + READ_REG);
185 iowrite8(data_rec_timing[pci_clock][pio], regio + WRITE_REG);
186 } else if (mode < XFER_UDMA_0) {
187 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + READ_REG);
188 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + WRITE_REG);
190 /* Finally we load the address setup into the misc register */
191 iowrite8(addr | adev->devno, regio + MISC_REG);
193 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */
194 iowrite8(0x85, regio + CNTRL_REG);
196 /* Switch back to IDE mode */
199 /* Note: at this point our programming is incomplete. We are
200 not supposed to program PCI 0x43 "things we hacked onto the chip"
201 until we've done both sets of PIO/DMA timings */
205 * optiplus_set_mode - DMA setup for Firestar Plus
208 * @mode: desired mode
210 * The Firestar plus has additional UDMA functionality for UDMA0-2 and
211 * requires we do some additional work. Because the base work we must do
212 * is mostly shared we wrap the Firestar setup functionality in this
216 static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mode)
218 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
221 int dev2 = 2 * adev->devno;
222 int unit = 2 * ap->port_no + adev->devno;
223 int udma = mode - XFER_UDMA_0;
225 pci_read_config_byte(pdev, 0x44, &udcfg);
226 if (mode <= XFER_UDMA_0) {
227 udcfg &= ~(1 << unit);
228 optidma_set_mode(ap, adev, adev->dma_mode);
230 udcfg |= (1 << unit);
232 pci_read_config_byte(pdev, 0x45, &udslave);
233 udslave &= ~(0x03 << dev2);
234 udslave |= (udma << dev2);
235 pci_write_config_byte(pdev, 0x45, udslave);
237 udcfg &= ~(0x30 << dev2);
238 udcfg |= (udma << dev2);
241 pci_write_config_byte(pdev, 0x44, udcfg);
245 * optidma_set_pio_mode - PIO setup callback
249 * The libata core provides separate functions for handling PIO and
250 * DMA programming. The architecture of the Firestar makes it easier
251 * for us to have a common function so we provide wrappers
254 static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
256 optidma_set_mode(ap, adev, adev->pio_mode);
260 * optidma_set_dma_mode - DMA setup callback
264 * The libata core provides separate functions for handling PIO and
265 * DMA programming. The architecture of the Firestar makes it easier
266 * for us to have a common function so we provide wrappers
269 static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
271 optidma_set_mode(ap, adev, adev->dma_mode);
275 * optiplus_set_pio_mode - PIO setup callback
279 * The libata core provides separate functions for handling PIO and
280 * DMA programming. The architecture of the Firestar makes it easier
281 * for us to have a common function so we provide wrappers
284 static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
286 optiplus_set_mode(ap, adev, adev->pio_mode);
290 * optiplus_set_dma_mode - DMA setup callback
294 * The libata core provides separate functions for handling PIO and
295 * DMA programming. The architecture of the Firestar makes it easier
296 * for us to have a common function so we provide wrappers
299 static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
301 optiplus_set_mode(ap, adev, adev->dma_mode);
305 * optidma_make_bits - PCI setup helper
308 * Turn the ATA device setup into PCI configuration bits
309 * for register 0x43 and return the two bits needed.
312 static u8 optidma_make_bits43(struct ata_device *adev)
314 static const u8 bits43[5] = {
317 if (!ata_dev_enabled(adev))
320 return adev->dma_mode - XFER_MW_DMA_0;
321 return bits43[adev->pio_mode - XFER_PIO_0];
325 * optidma_post_set_mode - finalize PCI setup
326 * @ap: port to set up
328 * Finalise the configuration by writing the nibble of extra bits
329 * of data into the chip.
332 static void optidma_post_set_mode(struct ata_port *ap)
335 int nybble = 4 * ap->port_no;
336 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
338 pci_read_config_byte(pdev, 0x43, &r);
340 r &= (0x0F << nybble);
341 r |= (optidma_make_bits43(&ap->device[0]) +
342 (optidma_make_bits43(&ap->device[0]) << 2)) << nybble;
344 pci_write_config_byte(pdev, 0x43, r);
347 static struct scsi_host_template optidma_sht = {
348 .module = THIS_MODULE,
350 .ioctl = ata_scsi_ioctl,
351 .queuecommand = ata_scsi_queuecmd,
352 .can_queue = ATA_DEF_QUEUE,
353 .this_id = ATA_SHT_THIS_ID,
354 .sg_tablesize = LIBATA_MAX_PRD,
355 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
356 .emulated = ATA_SHT_EMULATED,
357 .use_clustering = ATA_SHT_USE_CLUSTERING,
358 .proc_name = DRV_NAME,
359 .dma_boundary = ATA_DMA_BOUNDARY,
360 .slave_configure = ata_scsi_slave_config,
361 .slave_destroy = ata_scsi_slave_destroy,
362 .bios_param = ata_std_bios_param,
363 .resume = ata_scsi_device_resume,
364 .suspend = ata_scsi_device_suspend,
367 static struct ata_port_operations optidma_port_ops = {
368 .port_disable = ata_port_disable,
369 .set_piomode = optidma_set_pio_mode,
370 .set_dmamode = optidma_set_dma_mode,
372 .tf_load = ata_tf_load,
373 .tf_read = ata_tf_read,
374 .check_status = ata_check_status,
375 .exec_command = ata_exec_command,
376 .dev_select = ata_std_dev_select,
378 .freeze = ata_bmdma_freeze,
379 .thaw = ata_bmdma_thaw,
380 .post_internal_cmd = ata_bmdma_post_internal_cmd,
381 .error_handler = optidma_error_handler,
382 .post_set_mode = optidma_post_set_mode,
384 .bmdma_setup = ata_bmdma_setup,
385 .bmdma_start = ata_bmdma_start,
386 .bmdma_stop = ata_bmdma_stop,
387 .bmdma_status = ata_bmdma_status,
389 .qc_prep = ata_qc_prep,
390 .qc_issue = ata_qc_issue_prot,
392 .data_xfer = ata_data_xfer,
394 .irq_handler = ata_interrupt,
395 .irq_clear = ata_bmdma_irq_clear,
396 .irq_on = ata_irq_on,
397 .irq_ack = ata_irq_ack,
399 .port_start = ata_port_start,
402 static struct ata_port_operations optiplus_port_ops = {
403 .port_disable = ata_port_disable,
404 .set_piomode = optiplus_set_pio_mode,
405 .set_dmamode = optiplus_set_dma_mode,
407 .tf_load = ata_tf_load,
408 .tf_read = ata_tf_read,
409 .check_status = ata_check_status,
410 .exec_command = ata_exec_command,
411 .dev_select = ata_std_dev_select,
413 .freeze = ata_bmdma_freeze,
414 .thaw = ata_bmdma_thaw,
415 .post_internal_cmd = ata_bmdma_post_internal_cmd,
416 .error_handler = optidma_error_handler,
417 .post_set_mode = optidma_post_set_mode,
419 .bmdma_setup = ata_bmdma_setup,
420 .bmdma_start = ata_bmdma_start,
421 .bmdma_stop = ata_bmdma_stop,
422 .bmdma_status = ata_bmdma_status,
424 .qc_prep = ata_qc_prep,
425 .qc_issue = ata_qc_issue_prot,
427 .data_xfer = ata_data_xfer,
429 .irq_handler = ata_interrupt,
430 .irq_clear = ata_bmdma_irq_clear,
431 .irq_on = ata_irq_on,
432 .irq_ack = ata_irq_ack,
434 .port_start = ata_port_start,
438 * optiplus_with_udma - Look for UDMA capable setup
439 * @pdev; ATA controller
442 static int optiplus_with_udma(struct pci_dev *pdev)
447 struct pci_dev *dev1;
449 /* Find function 1 */
450 dev1 = pci_get_device(0x1045, 0xC701, NULL);
454 /* Rev must be >= 0x10 */
455 pci_read_config_byte(dev1, 0x08, &r);
458 /* Read the chipset system configuration to check our mode */
459 pci_read_config_byte(dev1, 0x5F, &r);
462 /* Must be 66Mhz sync */
463 if ((inb(ioport + 2) & 1) == 0)
466 /* Check the ATA arbitration/timing is suitable */
467 pci_read_config_byte(pdev, 0x42, &r);
468 if ((r & 0x36) != 0x36)
470 pci_read_config_byte(dev1, 0x52, &r);
471 if (r & 0x80) /* IDEDIR disabled */
474 printk(KERN_WARNING "UDMA not supported in this configuration.\n");
475 done_nomsg: /* Wrong chip revision */
480 static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id)
482 static struct ata_port_info info_82c700 = {
484 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
487 .port_ops = &optidma_port_ops
489 static struct ata_port_info info_82c700_udma = {
491 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
495 .port_ops = &optiplus_port_ops
497 static struct ata_port_info *port_info[2];
498 struct ata_port_info *info = &info_82c700;
499 static int printed_version;
501 if (!printed_version++)
502 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
504 /* Fixed location chipset magic */
507 pci_clock = inb(0x1F5) & 1; /* 0 = 33Mhz, 1 = 25Mhz */
509 if (optiplus_with_udma(dev))
510 info = &info_82c700_udma;
512 port_info[0] = port_info[1] = info;
513 return ata_pci_init_one(dev, port_info, 2);
516 static const struct pci_device_id optidma[] = {
517 { PCI_VDEVICE(OPTI, 0xD568), }, /* Opti 82C700 */
522 static struct pci_driver optidma_pci_driver = {
525 .probe = optidma_init_one,
526 .remove = ata_pci_remove_one,
527 .suspend = ata_pci_device_suspend,
528 .resume = ata_pci_device_resume,
531 static int __init optidma_init(void)
533 return pci_register_driver(&optidma_pci_driver);
536 static void __exit optidma_exit(void)
538 pci_unregister_driver(&optidma_pci_driver);
541 MODULE_AUTHOR("Alan Cox");
542 MODULE_DESCRIPTION("low-level driver for Opti Firestar/Firestar Plus");
543 MODULE_LICENSE("GPL");
544 MODULE_DEVICE_TABLE(pci, optidma);
545 MODULE_VERSION(DRV_VERSION);
547 module_init(optidma_init);
548 module_exit(optidma_exit);