2 * pata_cs5536.c - CS5536 PATA for new ATA layer
3 * (C) 2007 Martin K. Petersen <mkp@mkp.net>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 * Available from AMD web site.
21 * The IDE timing registers for the CS5536 live in the Geode Machine
22 * Specific Register file and not PCI config space. Most BIOSes
23 * virtualize the PCI registers so the chip looks like a standard IDE
24 * controller. Unfortunately not all implementations get this right.
25 * In particular some have problems with unaligned accesses to the
26 * virtualized PCI registers. This driver always does full dword
27 * writes to work around the issue. Also, in case of a bad BIOS this
28 * driver can be loaded with the "msr=1" parameter which forces using
29 * the Machine Specific Registers to configure the device.
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/pci.h>
35 #include <linux/init.h>
36 #include <linux/blkdev.h>
37 #include <linux/delay.h>
38 #include <linux/libata.h>
39 #include <scsi/scsi_host.h>
44 module_param_named(msr, use_msr, int, 0644);
45 MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");
47 #define rdmsr(x, y, z) do { } while (0)
48 #define wrmsr(x, y, z) do { } while (0)
52 #define DRV_NAME "pata_cs5536"
53 #define DRV_VERSION "0.0.8"
61 MSR_IDE_BASE = 0x51300000,
62 MSR_IDE_CFG = (MSR_IDE_BASE + 0x10),
63 MSR_IDE_DTC = (MSR_IDE_BASE + 0x12),
64 MSR_IDE_CAST = (MSR_IDE_BASE + 0x13),
65 MSR_IDE_ETC = (MSR_IDE_BASE + 0x14),
73 IDE_CFG_CABLE = 0x10000,
79 IDE_CAST_D0_SHIFT = 6,
80 IDE_CAST_D1_SHIFT = 4,
81 IDE_CAST_DRV_MASK = 0x3,
82 IDE_CAST_CMD_MASK = 0xff,
83 IDE_CAST_CMD_SHIFT = 24,
88 static const u32 msr_reg[4] = {
89 MSR_IDE_CFG, MSR_IDE_DTC, MSR_IDE_CAST, MSR_IDE_ETC,
92 static const u8 pci_reg[4] = {
93 PCI_IDE_CFG, PCI_IDE_DTC, PCI_IDE_CAST, PCI_IDE_ETC,
96 static inline int cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
98 if (unlikely(use_msr)) {
99 u32 dummy __maybe_unused;
101 rdmsr(msr_reg[reg], *val, dummy);
105 return pci_read_config_dword(pdev, pci_reg[reg], val);
108 static inline int cs5536_write(struct pci_dev *pdev, int reg, int val)
110 if (unlikely(use_msr)) {
111 wrmsr(msr_reg[reg], val, 0);
115 return pci_write_config_dword(pdev, pci_reg[reg], val);
119 * cs5536_cable_detect - detect cable type
120 * @ap: Port to detect on
122 * Perform cable detection for ATA66 capable cable. Return a libata
126 static int cs5536_cable_detect(struct ata_port *ap)
128 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
131 cs5536_read(pdev, CFG, &cfg);
133 if (cfg & (IDE_CFG_CABLE << ap->port_no))
134 return ATA_CBL_PATA80;
136 return ATA_CBL_PATA40;
140 * cs5536_set_piomode - PIO setup
142 * @adev: device on the interface
145 static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev)
147 static const u8 drv_timings[5] = {
148 0x98, 0x55, 0x32, 0x21, 0x20,
151 static const u8 addr_timings[5] = {
152 0x2, 0x1, 0x0, 0x0, 0x0,
155 static const u8 cmd_timings[5] = {
156 0x99, 0x92, 0x90, 0x22, 0x20,
159 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
160 struct ata_device *pair = ata_dev_pair(adev);
161 int mode = adev->pio_mode - XFER_PIO_0;
163 int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
164 int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
168 cmdmode = min(mode, pair->pio_mode - XFER_PIO_0);
170 cs5536_read(pdev, DTC, &dtc);
171 cs5536_read(pdev, CAST, &cast);
172 cs5536_read(pdev, ETC, &etc);
174 dtc &= ~(IDE_DRV_MASK << dshift);
175 dtc |= drv_timings[mode] << dshift;
177 cast &= ~(IDE_CAST_DRV_MASK << cshift);
178 cast |= addr_timings[mode] << cshift;
180 cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT);
181 cast |= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT;
183 etc &= ~(IDE_DRV_MASK << dshift);
184 etc |= IDE_ETC_NODMA << dshift;
186 cs5536_write(pdev, DTC, dtc);
187 cs5536_write(pdev, CAST, cast);
188 cs5536_write(pdev, ETC, etc);
192 * cs5536_set_dmamode - DMA timing setup
194 * @adev: Device being configured
198 static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev)
200 static const u8 udma_timings[6] = {
201 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
204 static const u8 mwdma_timings[3] = {
208 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
210 int mode = adev->dma_mode;
211 int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
213 if (mode >= XFER_UDMA_0) {
214 cs5536_read(pdev, ETC, &etc);
216 etc &= ~(IDE_DRV_MASK << dshift);
217 etc |= udma_timings[mode - XFER_UDMA_0] << dshift;
219 cs5536_write(pdev, ETC, etc);
221 cs5536_read(pdev, DTC, &dtc);
223 dtc &= ~(IDE_DRV_MASK << dshift);
224 dtc |= mwdma_timings[mode - XFER_MW_DMA_0] << dshift;
226 cs5536_write(pdev, DTC, dtc);
230 static struct scsi_host_template cs5536_sht = {
231 ATA_BMDMA_SHT(DRV_NAME),
234 static struct ata_port_operations cs5536_port_ops = {
235 .inherits = &ata_bmdma32_port_ops,
236 .cable_detect = cs5536_cable_detect,
237 .set_piomode = cs5536_set_piomode,
238 .set_dmamode = cs5536_set_dmamode,
244 * @id: Entry in match table
248 static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
250 static const struct ata_port_info info = {
251 .flags = ATA_FLAG_SLAVE_POSS,
252 .pio_mask = ATA_PIO4,
253 .mwdma_mask = ATA_MWDMA2,
254 .udma_mask = ATA_UDMA5,
255 .port_ops = &cs5536_port_ops,
258 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
262 printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n");
264 cs5536_read(dev, CFG, &cfg);
266 if ((cfg & IDE_CFG_CHANEN) == 0) {
267 printk(KERN_ERR DRV_NAME ": disabled by BIOS\n");
271 return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0);
274 static const struct pci_device_id cs5536[] = {
275 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), },
279 static struct pci_driver cs5536_pci_driver = {
282 .probe = cs5536_init_one,
283 .remove = ata_pci_remove_one,
285 .suspend = ata_pci_device_suspend,
286 .resume = ata_pci_device_resume,
290 static int __init cs5536_init(void)
292 return pci_register_driver(&cs5536_pci_driver);
295 static void __exit cs5536_exit(void)
297 pci_unregister_driver(&cs5536_pci_driver);
300 MODULE_AUTHOR("Martin K. Petersen");
301 MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
302 MODULE_LICENSE("GPL");
303 MODULE_DEVICE_TABLE(pci, cs5536);
304 MODULE_VERSION(DRV_VERSION);
306 module_init(cs5536_init);
307 module_exit(cs5536_exit);