2 * pata-cs5530.c - CS5530 PATA for new ATA layer
4 * Alan Cox <alan@redhat.com>
6 * based upon cs5530.c by Mark Lord.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Loosely based on the piix & svwks drivers.
24 * Available from AMD web site.
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/blkdev.h>
32 #include <linux/delay.h>
33 #include <scsi/scsi_host.h>
34 #include <linux/libata.h>
35 #include <linux/dmi.h>
37 #define DRV_NAME "pata_cs5530"
38 #define DRV_VERSION "0.7.1"
40 static void __iomem *cs5530_port_base(struct ata_port *ap)
42 unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr;
44 return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no);
48 * cs5530_set_piomode - PIO setup
50 * @adev: device on the interface
52 * Set our PIO requirements. This is fairly simple on the CS5530
56 static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev)
58 static const unsigned int cs5530_pio_timings[2][5] = {
59 {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
60 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
62 void __iomem *base = cs5530_port_base(ap);
66 /* Find out which table to use */
67 tuning = ioread32(base + 0x04);
68 format = (tuning & 0x80000000UL) ? 1 : 0;
70 /* Now load the right timing register */
74 iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base);
78 * cs5530_set_dmamode - DMA timing setup
80 * @adev: Device being configured
82 * We cannot mix MWDMA and UDMA without reloading timings each switch
83 * master to slave. We track the last DMA setup in order to minimise
87 static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev)
89 void __iomem *base = cs5530_port_base(ap);
90 u32 tuning, timing = 0;
93 /* Find out which table to use */
94 tuning = ioread32(base + 0x04);
96 switch(adev->dma_mode) {
98 timing = 0x00921250;break;
100 timing = 0x00911140;break;
102 timing = 0x00911030;break;
104 timing = 0x00077771;break;
106 timing = 0x00012121;break;
108 timing = 0x00002020;break;
112 /* Merge in the PIO format bit */
113 timing |= (tuning & 0x80000000UL);
114 if (adev->devno == 0) /* Master */
115 iowrite32(timing, base + 0x04);
117 if (timing & 0x00100000)
118 tuning |= 0x00100000; /* UDMA for both */
120 tuning &= ~0x00100000; /* MWDMA for both */
121 iowrite32(tuning, base + 0x04);
122 iowrite32(timing, base + 0x0C);
125 /* Set the DMA capable bit in the BMDMA area */
126 reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
127 reg |= (1 << (5 + adev->devno));
128 iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
130 /* Remember the last DMA setup we did */
132 ap->private_data = adev;
136 * cs5530_qc_issue_prot - command issue
137 * @qc: command pending
139 * Called when the libata layer is about to issue a command. We wrap
140 * this interface so that we can load the correct ATA timings if
141 * neccessary. Specifically we have a problem that there is only
142 * one MWDMA/UDMA bit.
145 static unsigned int cs5530_qc_issue_prot(struct ata_queued_cmd *qc)
147 struct ata_port *ap = qc->ap;
148 struct ata_device *adev = qc->dev;
149 struct ata_device *prev = ap->private_data;
151 /* See if the DMA settings could be wrong */
152 if (adev->dma_mode != 0 && adev != prev && prev != NULL) {
153 /* Maybe, but do the channels match MWDMA/UDMA ? */
154 if ((adev->dma_mode >= XFER_UDMA_0 && prev->dma_mode < XFER_UDMA_0) ||
155 (adev->dma_mode < XFER_UDMA_0 && prev->dma_mode >= XFER_UDMA_0))
156 /* Switch the mode bits */
157 cs5530_set_dmamode(ap, adev);
160 return ata_qc_issue_prot(qc);
163 static int cs5530_pre_reset(struct ata_port *ap)
165 ap->cbl = ATA_CBL_PATA40;
166 return ata_std_prereset(ap);
169 static void cs5530_error_handler(struct ata_port *ap)
171 return ata_bmdma_drive_eh(ap, cs5530_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
175 static struct scsi_host_template cs5530_sht = {
176 .module = THIS_MODULE,
178 .ioctl = ata_scsi_ioctl,
179 .queuecommand = ata_scsi_queuecmd,
180 .can_queue = ATA_DEF_QUEUE,
181 .this_id = ATA_SHT_THIS_ID,
182 .sg_tablesize = LIBATA_MAX_PRD,
183 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
184 .emulated = ATA_SHT_EMULATED,
185 .use_clustering = ATA_SHT_USE_CLUSTERING,
186 .proc_name = DRV_NAME,
187 .dma_boundary = ATA_DMA_BOUNDARY,
188 .slave_configure = ata_scsi_slave_config,
189 .slave_destroy = ata_scsi_slave_destroy,
190 .bios_param = ata_std_bios_param,
191 .resume = ata_scsi_device_resume,
192 .suspend = ata_scsi_device_suspend,
195 static struct ata_port_operations cs5530_port_ops = {
196 .port_disable = ata_port_disable,
197 .set_piomode = cs5530_set_piomode,
198 .set_dmamode = cs5530_set_dmamode,
199 .mode_filter = ata_pci_default_filter,
201 .tf_load = ata_tf_load,
202 .tf_read = ata_tf_read,
203 .check_status = ata_check_status,
204 .exec_command = ata_exec_command,
205 .dev_select = ata_std_dev_select,
207 .bmdma_setup = ata_bmdma_setup,
208 .bmdma_start = ata_bmdma_start,
209 .bmdma_stop = ata_bmdma_stop,
210 .bmdma_status = ata_bmdma_status,
212 .freeze = ata_bmdma_freeze,
213 .thaw = ata_bmdma_thaw,
214 .error_handler = cs5530_error_handler,
215 .post_internal_cmd = ata_bmdma_post_internal_cmd,
217 .qc_prep = ata_qc_prep,
218 .qc_issue = cs5530_qc_issue_prot,
220 .data_xfer = ata_data_xfer,
222 .irq_handler = ata_interrupt,
223 .irq_clear = ata_bmdma_irq_clear,
224 .irq_on = ata_irq_on,
225 .irq_ack = ata_irq_ack,
227 .port_start = ata_port_start,
230 static struct dmi_system_id palmax_dmi_table[] = {
232 .ident = "Palmax PD1100",
234 DMI_MATCH(DMI_SYS_VENDOR, "Cyrix"),
235 DMI_MATCH(DMI_PRODUCT_NAME, "Caddis"),
241 static int cs5530_is_palmax(void)
243 if (dmi_check_system(palmax_dmi_table)) {
244 printk(KERN_INFO "Palmax PD1100: Disabling DMA on docking port.\n");
252 * cs5530_init_chip - Chipset init
254 * Perform the chip initialisation work that is shared between both
255 * setup and resume paths
258 static int cs5530_init_chip(void)
260 struct pci_dev *master_0 = NULL, *cs5530_0 = NULL, *dev = NULL;
262 while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
263 switch (dev->device) {
264 case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
265 master_0 = pci_dev_get(dev);
267 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
268 cs5530_0 = pci_dev_get(dev);
273 printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
277 printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
281 pci_set_master(cs5530_0);
282 pci_set_mwi(cs5530_0);
285 * Set PCI CacheLineSize to 16-bytes:
286 * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
288 * Note: This value is constant because the 5530 is only a Geode companion
291 pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
294 * Disable trapping of UDMA register accesses (Win98 hack):
295 * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
298 pci_write_config_word(cs5530_0, 0xd0, 0x5006);
301 * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
302 * The other settings are what is necessary to get the register
303 * into a sane state for IDE DMA operation.
306 pci_write_config_byte(master_0, 0x40, 0x1e);
309 * Set max PCI burst size (16-bytes seems to work best):
310 * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
311 * all others: clear bit-1 at 0x41, and do:
312 * 128bytes: OR 0x00 at 0x41
313 * 256bytes: OR 0x04 at 0x41
314 * 512bytes: OR 0x08 at 0x41
315 * 1024bytes: OR 0x0c at 0x41
318 pci_write_config_byte(master_0, 0x41, 0x14);
321 * These settings are necessary to get the chip
322 * into a sane state for IDE DMA operation.
325 pci_write_config_byte(master_0, 0x42, 0x00);
326 pci_write_config_byte(master_0, 0x43, 0xc1);
328 pci_dev_put(master_0);
329 pci_dev_put(cs5530_0);
333 pci_dev_put(master_0);
335 pci_dev_put(cs5530_0);
340 * cs5530_init_one - Initialise a CS5530
342 * @id: Entry in match table
344 * Install a driver for the newly found CS5530 companion chip. Most of
345 * this is just housekeeping. We have to set the chip up correctly and
346 * turn off various bits of emulation magic.
349 static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
351 static struct ata_port_info info = {
353 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
357 .port_ops = &cs5530_port_ops
359 /* The docking connector doesn't do UDMA, and it seems not MWDMA */
360 static struct ata_port_info info_palmax_secondary = {
362 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
364 .port_ops = &cs5530_port_ops
366 static struct ata_port_info *port_info[2] = { &info, &info };
368 /* Chip initialisation */
369 if (cs5530_init_chip())
372 if (cs5530_is_palmax())
373 port_info[1] = &info_palmax_secondary;
375 /* Now kick off ATA set up */
376 return ata_pci_init_one(pdev, port_info, 2);
379 static int cs5530_reinit_one(struct pci_dev *pdev)
381 /* If we fail on resume we are doomed */
382 if (cs5530_init_chip())
384 return ata_pci_device_resume(pdev);
387 static const struct pci_device_id cs5530[] = {
388 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), },
393 static struct pci_driver cs5530_pci_driver = {
396 .probe = cs5530_init_one,
397 .remove = ata_pci_remove_one,
398 .suspend = ata_pci_device_suspend,
399 .resume = cs5530_reinit_one,
402 static int __init cs5530_init(void)
404 return pci_register_driver(&cs5530_pci_driver);
407 static void __exit cs5530_exit(void)
409 pci_unregister_driver(&cs5530_pci_driver);
412 MODULE_AUTHOR("Alan Cox");
413 MODULE_DESCRIPTION("low-level driver for the Cyrix/NS/AMD 5530");
414 MODULE_LICENSE("GPL");
415 MODULE_DEVICE_TABLE(pci, cs5530);
416 MODULE_VERSION(DRV_VERSION);
418 module_init(cs5530_init);
419 module_exit(cs5530_exit);