2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
47 * Include the apic definitions for x86 to have the APIC timer related defines
48 * available also for UP (on SMP it gets magically included via linux/smp.h).
49 * asm/acpi.h is not an option, as it would require more include magic. Also
50 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
57 #include <asm/uaccess.h>
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
63 #define ACPI_PROCESSOR_CLASS "processor"
64 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
65 ACPI_MODULE_NAME("processor_idle");
66 #define ACPI_PROCESSOR_FILE_POWER "power"
67 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD 1 /* 1us */
69 #define C3_OVERHEAD 1 /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
72 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73 module_param(max_cstate, uint, 0000);
74 static unsigned int nocst __read_mostly;
75 module_param(nocst, uint, 0000);
77 static unsigned int latency_factor __read_mostly = 2;
78 module_param(latency_factor, uint, 0644);
80 static s64 us_to_pm_timer_ticks(s64 t)
82 return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
85 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
86 * For now disable this. Probably a bug somewhere else.
88 * To skip this limit, boot/load with a large max_cstate limit.
90 static int set_max_cstate(const struct dmi_system_id *id)
92 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
95 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
96 " Override with \"processor.max_cstate=%d\"\n", id->ident,
97 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
99 max_cstate = (long)id->driver_data;
104 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
105 callers to only run once -AK */
106 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
107 { set_max_cstate, "Clevo 5600D", {
108 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
109 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
116 * Callers should disable interrupts before the call and enable
117 * interrupts after return.
119 static void acpi_safe_halt(void)
121 current_thread_info()->status &= ~TS_POLLING;
123 * TS_POLLING-cleared state must be visible before we
127 if (!need_resched()) {
131 current_thread_info()->status |= TS_POLLING;
134 #ifdef ARCH_APICTIMER_STOPS_ON_C3
137 * Some BIOS implementations switch to C3 in the published C2 state.
138 * This seems to be a common problem on AMD boxen, but other vendors
139 * are affected too. We pick the most conservative approach: we assume
140 * that the local APIC stops in both C2 and C3.
142 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
143 struct acpi_processor_cx *cx)
145 struct acpi_processor_power *pwr = &pr->power;
146 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
148 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
151 if (boot_cpu_has(X86_FEATURE_AMDC1E))
152 type = ACPI_STATE_C1;
155 * Check, if one of the previous states already marked the lapic
158 if (pwr->timer_broadcast_on_state < state)
161 if (cx->type >= type)
162 pr->power.timer_broadcast_on_state = state;
165 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
167 unsigned long reason;
169 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
170 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
172 clockevents_notify(reason, &pr->id);
175 /* Power(C) State timer broadcast control */
176 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
177 struct acpi_processor_cx *cx,
180 int state = cx - pr->power.states;
182 if (state >= pr->power.timer_broadcast_on_state) {
183 unsigned long reason;
185 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
186 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
187 clockevents_notify(reason, &pr->id);
193 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
194 struct acpi_processor_cx *cstate) { }
195 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
196 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
205 * Suspend / resume control
207 static int acpi_idle_suspend;
208 static u32 saved_bm_rld;
210 static void acpi_idle_bm_rld_save(void)
212 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
214 static void acpi_idle_bm_rld_restore(void)
218 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
220 if (resumed_bm_rld != saved_bm_rld)
221 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
224 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
226 if (acpi_idle_suspend == 1)
229 acpi_idle_bm_rld_save();
230 acpi_idle_suspend = 1;
234 int acpi_processor_resume(struct acpi_device * device)
236 if (acpi_idle_suspend == 0)
239 acpi_idle_bm_rld_restore();
240 acpi_idle_suspend = 0;
244 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
245 static void tsc_check_state(int state)
247 switch (boot_cpu_data.x86_vendor) {
249 case X86_VENDOR_INTEL:
251 * AMD Fam10h TSC will tick in all
252 * C/P/S0/S1 states when this bit is set.
254 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
259 /* TSC could halt in idle, so notify users */
260 if (state > ACPI_STATE_C1)
261 mark_tsc_unstable("TSC halts in idle");
265 static void tsc_check_state(int state) { return; }
268 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
277 /* if info is obtained from pblk/fadt, type equals state */
278 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
279 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
281 #ifndef CONFIG_HOTPLUG_CPU
283 * Check for P_LVL2_UP flag before entering C2 and above on
286 if ((num_online_cpus() > 1) &&
287 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
291 /* determine C2 and C3 address from pblk */
292 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
293 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
295 /* determine latencies from FADT */
296 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
297 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
299 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
300 "lvl2[0x%08x] lvl3[0x%08x]\n",
301 pr->power.states[ACPI_STATE_C2].address,
302 pr->power.states[ACPI_STATE_C3].address));
307 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
309 if (!pr->power.states[ACPI_STATE_C1].valid) {
310 /* set the first C-State to C1 */
311 /* all processors need to support C1 */
312 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
313 pr->power.states[ACPI_STATE_C1].valid = 1;
314 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
316 /* the C0 state only exists as a filler in our array */
317 pr->power.states[ACPI_STATE_C0].valid = 1;
321 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
323 acpi_status status = 0;
327 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
328 union acpi_object *cst;
336 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
337 if (ACPI_FAILURE(status)) {
338 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
342 cst = buffer.pointer;
344 /* There must be at least 2 elements */
345 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
346 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
351 count = cst->package.elements[0].integer.value;
353 /* Validate number of power states. */
354 if (count < 1 || count != cst->package.count - 1) {
355 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
360 /* Tell driver that at least _CST is supported. */
361 pr->flags.has_cst = 1;
363 for (i = 1; i <= count; i++) {
364 union acpi_object *element;
365 union acpi_object *obj;
366 struct acpi_power_register *reg;
367 struct acpi_processor_cx cx;
369 memset(&cx, 0, sizeof(cx));
371 element = &(cst->package.elements[i]);
372 if (element->type != ACPI_TYPE_PACKAGE)
375 if (element->package.count != 4)
378 obj = &(element->package.elements[0]);
380 if (obj->type != ACPI_TYPE_BUFFER)
383 reg = (struct acpi_power_register *)obj->buffer.pointer;
385 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
386 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
389 /* There should be an easy way to extract an integer... */
390 obj = &(element->package.elements[1]);
391 if (obj->type != ACPI_TYPE_INTEGER)
394 cx.type = obj->integer.value;
396 * Some buggy BIOSes won't list C1 in _CST -
397 * Let acpi_processor_get_power_info_default() handle them later
399 if (i == 1 && cx.type != ACPI_STATE_C1)
402 cx.address = reg->address;
403 cx.index = current_count + 1;
405 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
406 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
407 if (acpi_processor_ffh_cstate_probe
408 (pr->id, &cx, reg) == 0) {
409 cx.entry_method = ACPI_CSTATE_FFH;
410 } else if (cx.type == ACPI_STATE_C1) {
412 * C1 is a special case where FIXED_HARDWARE
413 * can be handled in non-MWAIT way as well.
414 * In that case, save this _CST entry info.
415 * Otherwise, ignore this info and continue.
417 cx.entry_method = ACPI_CSTATE_HALT;
418 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
422 if (cx.type == ACPI_STATE_C1 &&
423 (idle_halt || idle_nomwait)) {
425 * In most cases the C1 space_id obtained from
426 * _CST object is FIXED_HARDWARE access mode.
427 * But when the option of idle=halt is added,
428 * the entry_method type should be changed from
429 * CSTATE_FFH to CSTATE_HALT.
430 * When the option of idle=nomwait is added,
431 * the C1 entry_method type should be
434 cx.entry_method = ACPI_CSTATE_HALT;
435 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
438 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
442 if (cx.type == ACPI_STATE_C1) {
446 obj = &(element->package.elements[2]);
447 if (obj->type != ACPI_TYPE_INTEGER)
450 cx.latency = obj->integer.value;
452 obj = &(element->package.elements[3]);
453 if (obj->type != ACPI_TYPE_INTEGER)
456 cx.power = obj->integer.value;
459 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
462 * We support total ACPI_PROCESSOR_MAX_POWER - 1
463 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
465 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
467 "Limiting number of power states to max (%d)\n",
468 ACPI_PROCESSOR_MAX_POWER);
470 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
475 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
478 /* Validate number of power states discovered */
479 if (current_count < 2)
483 kfree(buffer.pointer);
488 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
495 * C2 latency must be less than or equal to 100
498 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
499 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
500 "latency too large [%d]\n", cx->latency));
505 * Otherwise we've met all of our C2 requirements.
506 * Normalize the C2 latency to expidite policy
510 cx->latency_ticks = cx->latency;
515 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
516 struct acpi_processor_cx *cx)
518 static int bm_check_flag;
525 * C3 latency must be less than or equal to 1000
528 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
529 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
530 "latency too large [%d]\n", cx->latency));
535 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
536 * DMA transfers are used by any ISA device to avoid livelock.
537 * Note that we could disable Type-F DMA (as recommended by
538 * the erratum), but this is known to disrupt certain ISA
539 * devices thus we take the conservative approach.
541 else if (errata.piix4.fdma) {
542 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
543 "C3 not supported on PIIX4 with Type-F DMA\n"));
547 /* All the logic here assumes flags.bm_check is same across all CPUs */
548 if (!bm_check_flag) {
549 /* Determine whether bm_check is needed based on CPU */
550 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
551 bm_check_flag = pr->flags.bm_check;
553 pr->flags.bm_check = bm_check_flag;
556 if (pr->flags.bm_check) {
557 if (!pr->flags.bm_control) {
558 if (pr->flags.has_cst != 1) {
559 /* bus mastering control is necessary */
560 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
561 "C3 support requires BM control\n"));
564 /* Here we enter C3 without bus mastering */
565 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
566 "C3 support without BM control\n"));
571 * WBINVD should be set in fadt, for C3 state to be
572 * supported on when bm_check is not required.
574 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
575 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
576 "Cache invalidation should work properly"
577 " for C3 to be enabled on SMP systems\n"));
583 * Otherwise we've met all of our C3 requirements.
584 * Normalize the C3 latency to expidite policy. Enable
585 * checking of bus mastering status (bm_check) so we can
586 * use this in our C3 policy
590 cx->latency_ticks = cx->latency;
592 * On older chipsets, BM_RLD needs to be set
593 * in order for Bus Master activity to wake the
594 * system from C3. Newer chipsets handle DMA
595 * during C3 automatically and BM_RLD is a NOP.
596 * In either case, the proper way to
597 * handle BM_RLD is to set it and leave it set.
599 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
604 static int acpi_processor_power_verify(struct acpi_processor *pr)
607 unsigned int working = 0;
609 pr->power.timer_broadcast_on_state = INT_MAX;
611 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
612 struct acpi_processor_cx *cx = &pr->power.states[i];
620 acpi_processor_power_verify_c2(cx);
624 acpi_processor_power_verify_c3(pr, cx);
630 lapic_timer_check_state(i, pr, cx);
631 tsc_check_state(cx->type);
635 lapic_timer_propagate_broadcast(pr);
640 static int acpi_processor_get_power_info(struct acpi_processor *pr)
646 /* NOTE: the idle thread may not be running while calling
649 /* Zero initialize all the C-states info. */
650 memset(pr->power.states, 0, sizeof(pr->power.states));
652 result = acpi_processor_get_power_info_cst(pr);
653 if (result == -ENODEV)
654 result = acpi_processor_get_power_info_fadt(pr);
659 acpi_processor_get_power_info_default(pr);
661 pr->power.count = acpi_processor_power_verify(pr);
664 * if one state of type C2 or C3 is available, mark this
665 * CPU as being "idle manageable"
667 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
668 if (pr->power.states[i].valid) {
670 if (pr->power.states[i].type >= ACPI_STATE_C2)
678 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
680 struct acpi_processor *pr = seq->private;
687 seq_printf(seq, "active state: C%zd\n"
689 "maximum allowed latency: %d usec\n",
690 pr->power.state ? pr->power.state - pr->power.states : 0,
691 max_cstate, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
693 seq_puts(seq, "states:\n");
695 for (i = 1; i <= pr->power.count; i++) {
696 seq_printf(seq, " %cC%d: ",
697 (&pr->power.states[i] ==
698 pr->power.state ? '*' : ' '), i);
700 if (!pr->power.states[i].valid) {
701 seq_puts(seq, "<not supported>\n");
705 switch (pr->power.states[i].type) {
707 seq_printf(seq, "type[C1] ");
710 seq_printf(seq, "type[C2] ");
713 seq_printf(seq, "type[C3] ");
716 seq_printf(seq, "type[--] ");
720 if (pr->power.states[i].promotion.state)
721 seq_printf(seq, "promotion[C%zd] ",
722 (pr->power.states[i].promotion.state -
725 seq_puts(seq, "promotion[--] ");
727 if (pr->power.states[i].demotion.state)
728 seq_printf(seq, "demotion[C%zd] ",
729 (pr->power.states[i].demotion.state -
732 seq_puts(seq, "demotion[--] ");
734 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
735 pr->power.states[i].latency,
736 pr->power.states[i].usage,
737 (unsigned long long)pr->power.states[i].time);
744 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
746 return single_open(file, acpi_processor_power_seq_show,
750 static const struct file_operations acpi_processor_power_fops = {
751 .owner = THIS_MODULE,
752 .open = acpi_processor_power_open_fs,
755 .release = single_release,
760 * acpi_idle_bm_check - checks if bus master activity was detected
762 static int acpi_idle_bm_check(void)
766 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
768 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
770 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
771 * the true state of bus mastering activity; forcing us to
772 * manually check the BMIDEA bit of each IDE channel.
774 else if (errata.piix4.bmisx) {
775 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
776 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
783 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
786 * Caller disables interrupt before call and enables interrupt after return.
788 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
790 /* Don't trace irqs off for idle */
791 stop_critical_timings();
792 if (cx->entry_method == ACPI_CSTATE_FFH) {
793 /* Call into architectural FFH based C-state */
794 acpi_processor_ffh_cstate_enter(cx);
795 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
799 /* IO port based C-state */
801 /* Dummy wait op - must do something useless after P_LVL2 read
802 because chipsets cannot guarantee that STPCLK# signal
803 gets asserted in time to freeze execution properly. */
804 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
806 start_critical_timings();
810 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
811 * @dev: the target CPU
812 * @state: the state data
814 * This is equivalent to the HALT instruction.
816 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
817 struct cpuidle_state *state)
821 struct acpi_processor *pr;
822 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
824 pr = __get_cpu_var(processors);
831 /* Do not access any ACPI IO ports in suspend path */
832 if (acpi_idle_suspend) {
838 lapic_timer_state_broadcast(pr, cx, 1);
839 kt1 = ktime_get_real();
840 acpi_idle_do_entry(cx);
841 kt2 = ktime_get_real();
842 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
846 lapic_timer_state_broadcast(pr, cx, 0);
852 * acpi_idle_enter_simple - enters an ACPI state without BM handling
853 * @dev: the target CPU
854 * @state: the state data
856 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
857 struct cpuidle_state *state)
859 struct acpi_processor *pr;
860 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
865 pr = __get_cpu_var(processors);
870 if (acpi_idle_suspend)
871 return(acpi_idle_enter_c1(dev, state));
874 current_thread_info()->status &= ~TS_POLLING;
876 * TS_POLLING-cleared state must be visible before we test
881 if (unlikely(need_resched())) {
882 current_thread_info()->status |= TS_POLLING;
888 * Must be done before busmaster disable as we might need to
891 lapic_timer_state_broadcast(pr, cx, 1);
893 if (cx->type == ACPI_STATE_C3)
894 ACPI_FLUSH_CPU_CACHE();
896 kt1 = ktime_get_real();
897 /* Tell the scheduler that we are going deep-idle: */
898 sched_clock_idle_sleep_event();
899 acpi_idle_do_entry(cx);
900 kt2 = ktime_get_real();
901 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
903 sleep_ticks = us_to_pm_timer_ticks(idle_time);
905 /* Tell the scheduler how much we idled: */
906 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
909 current_thread_info()->status |= TS_POLLING;
913 lapic_timer_state_broadcast(pr, cx, 0);
914 cx->time += sleep_ticks;
918 static int c3_cpu_count;
919 static DEFINE_SPINLOCK(c3_lock);
922 * acpi_idle_enter_bm - enters C3 with proper BM handling
923 * @dev: the target CPU
924 * @state: the state data
926 * If BM is detected, the deepest non-C3 idle state is entered instead.
928 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
929 struct cpuidle_state *state)
931 struct acpi_processor *pr;
932 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
938 pr = __get_cpu_var(processors);
943 if (acpi_idle_suspend)
944 return(acpi_idle_enter_c1(dev, state));
946 if (acpi_idle_bm_check()) {
947 if (dev->safe_state) {
948 dev->last_state = dev->safe_state;
949 return dev->safe_state->enter(dev, dev->safe_state);
959 current_thread_info()->status &= ~TS_POLLING;
961 * TS_POLLING-cleared state must be visible before we test
966 if (unlikely(need_resched())) {
967 current_thread_info()->status |= TS_POLLING;
972 acpi_unlazy_tlb(smp_processor_id());
974 /* Tell the scheduler that we are going deep-idle: */
975 sched_clock_idle_sleep_event();
977 * Must be done before busmaster disable as we might need to
980 lapic_timer_state_broadcast(pr, cx, 1);
982 kt1 = ktime_get_real();
985 * bm_check implies we need ARB_DIS
986 * !bm_check implies we need cache flush
987 * bm_control implies whether we can do ARB_DIS
989 * That leaves a case where bm_check is set and bm_control is
990 * not set. In that case we cannot do much, we enter C3
991 * without doing anything.
993 if (pr->flags.bm_check && pr->flags.bm_control) {
996 /* Disable bus master arbitration when all CPUs are in C3 */
997 if (c3_cpu_count == num_online_cpus())
998 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
999 spin_unlock(&c3_lock);
1000 } else if (!pr->flags.bm_check) {
1001 ACPI_FLUSH_CPU_CACHE();
1004 acpi_idle_do_entry(cx);
1006 /* Re-enable bus master arbitration */
1007 if (pr->flags.bm_check && pr->flags.bm_control) {
1008 spin_lock(&c3_lock);
1009 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1011 spin_unlock(&c3_lock);
1013 kt2 = ktime_get_real();
1014 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
1016 sleep_ticks = us_to_pm_timer_ticks(idle_time);
1017 /* Tell the scheduler how much we idled: */
1018 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1021 current_thread_info()->status |= TS_POLLING;
1025 lapic_timer_state_broadcast(pr, cx, 0);
1026 cx->time += sleep_ticks;
1030 struct cpuidle_driver acpi_idle_driver = {
1031 .name = "acpi_idle",
1032 .owner = THIS_MODULE,
1036 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1037 * @pr: the ACPI processor
1039 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1041 int i, count = CPUIDLE_DRIVER_STATE_START;
1042 struct acpi_processor_cx *cx;
1043 struct cpuidle_state *state;
1044 struct cpuidle_device *dev = &pr->power.dev;
1046 if (!pr->flags.power_setup_done)
1049 if (pr->flags.power == 0) {
1054 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1055 dev->states[i].name[0] = '\0';
1056 dev->states[i].desc[0] = '\0';
1059 if (max_cstate == 0)
1062 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1063 cx = &pr->power.states[i];
1064 state = &dev->states[count];
1069 #ifdef CONFIG_HOTPLUG_CPU
1070 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1071 !pr->flags.has_cst &&
1072 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1075 cpuidle_set_statedata(state, cx);
1077 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1078 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1079 state->exit_latency = cx->latency;
1080 state->target_residency = cx->latency * latency_factor;
1081 state->power_usage = cx->power;
1086 state->flags |= CPUIDLE_FLAG_SHALLOW;
1087 if (cx->entry_method == ACPI_CSTATE_FFH)
1088 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1090 state->enter = acpi_idle_enter_c1;
1091 dev->safe_state = state;
1095 state->flags |= CPUIDLE_FLAG_BALANCED;
1096 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1097 state->enter = acpi_idle_enter_simple;
1098 dev->safe_state = state;
1102 state->flags |= CPUIDLE_FLAG_DEEP;
1103 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1104 state->flags |= CPUIDLE_FLAG_CHECK_BM;
1105 state->enter = pr->flags.bm_check ?
1106 acpi_idle_enter_bm :
1107 acpi_idle_enter_simple;
1112 if (count == CPUIDLE_STATE_MAX)
1116 dev->state_count = count;
1124 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1128 if (boot_option_idle_override)
1138 if (!pr->flags.power_setup_done)
1141 cpuidle_pause_and_lock();
1142 cpuidle_disable_device(&pr->power.dev);
1143 acpi_processor_get_power_info(pr);
1144 if (pr->flags.power) {
1145 acpi_processor_setup_cpuidle(pr);
1146 ret = cpuidle_enable_device(&pr->power.dev);
1148 cpuidle_resume_and_unlock();
1153 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1154 struct acpi_device *device)
1156 acpi_status status = 0;
1157 static int first_run;
1158 struct proc_dir_entry *entry = NULL;
1161 if (boot_option_idle_override)
1167 * When the boot option of "idle=halt" is added, halt
1168 * is used for CPU IDLE.
1169 * In such case C2/C3 is meaningless. So the max_cstate
1174 dmi_check_system(processor_power_dmi_table);
1175 max_cstate = acpi_processor_cstate_check(max_cstate);
1176 if (max_cstate < ACPI_C_STATES_MAX)
1178 "ACPI: processor limited to max C-state %d\n",
1186 if (acpi_gbl_FADT.cst_control && !nocst) {
1188 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1189 if (ACPI_FAILURE(status)) {
1190 ACPI_EXCEPTION((AE_INFO, status,
1191 "Notifying BIOS of _CST ability failed"));
1195 acpi_processor_get_power_info(pr);
1196 pr->flags.power_setup_done = 1;
1199 * Install the idle handler if processor power management is supported.
1200 * Note that we use previously set idle handler will be used on
1201 * platforms that only support C1.
1203 if (pr->flags.power) {
1204 acpi_processor_setup_cpuidle(pr);
1205 if (cpuidle_register_device(&pr->power.dev))
1208 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1209 for (i = 1; i <= pr->power.count; i++)
1210 if (pr->power.states[i].valid)
1211 printk(" C%d[C%d]", i,
1212 pr->power.states[i].type);
1217 entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1218 S_IRUGO, acpi_device_dir(device),
1219 &acpi_processor_power_fops,
1220 acpi_driver_data(device));
1226 int acpi_processor_power_exit(struct acpi_processor *pr,
1227 struct acpi_device *device)
1229 if (boot_option_idle_override)
1232 cpuidle_unregister_device(&pr->power.dev);
1233 pr->flags.power_setup_done = 0;
1235 if (acpi_device_dir(device))
1236 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1237 acpi_device_dir(device));