1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
20 #include <display_options.h>
23 #include <env_internal.h>
39 #include <status_led.h>
45 #include <asm/cache.h>
46 #include <asm/global_data.h>
48 #include <asm/sections.h>
50 #include <linux/errno.h>
51 #include <linux/log2.h>
53 DECLARE_GLOBAL_DATA_PTR;
56 * TODO(sjg@chromium.org): IMO this code should be
57 * refactored to a single function, something like:
59 * void led_set_state(enum led_colour_t colour, int on);
61 /************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
66 __weak void coloured_LED_init(void) {}
67 __weak void red_led_on(void) {}
68 __weak void red_led_off(void) {}
69 __weak void green_led_on(void) {}
70 __weak void green_led_off(void) {}
71 __weak void yellow_led_on(void) {}
72 __weak void yellow_led_off(void) {}
73 __weak void blue_led_on(void) {}
74 __weak void blue_led_off(void) {}
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
87 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
88 static int init_func_watchdog_init(void)
90 # if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
92 defined(CONFIG_SH) || \
93 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
94 defined(CONFIG_IMX_WATCHDOG))
96 puts(" Watchdog enabled\n");
103 int init_func_watchdog_reset(void)
109 #endif /* CONFIG_WATCHDOG */
111 __weak void board_add_ram_info(int use_default)
113 /* please define platform specific board_add_ram_info() */
116 static int init_baud_rate(void)
118 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
122 static int display_text_info(void)
124 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
125 ulong bss_start, bss_end, text_base;
127 bss_start = (ulong)__bss_start;
128 bss_end = (ulong)__bss_end;
130 #ifdef CONFIG_TEXT_BASE
131 text_base = CONFIG_TEXT_BASE;
133 text_base = CONFIG_SYS_MONITOR_BASE;
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
137 text_base, bss_start, bss_end);
143 #ifdef CONFIG_SYSRESET
144 static int print_resetinfo(void)
148 bool status_printed = false;
152 * Not all boards have sysreset drivers available during early
153 * boot, so don't fail if one can't be found.
155 for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
156 ret = uclass_next_device_check(&dev)) {
158 debug("%s: %s sysreset device (error: %d)\n",
159 __func__, dev->name, ret);
163 if (!sysreset_get_status(dev, status, sizeof(status))) {
164 printf("%s%s", status_printed ? " " : "", status);
165 status_printed = true;
175 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
176 static int print_cpuinfo(void)
182 dev = cpu_get_current_dev();
184 debug("%s: Could not get CPU device\n",
189 ret = cpu_get_desc(dev, desc, sizeof(desc));
191 debug("%s: Could not get CPU description (err = %d)\n",
196 printf("CPU: %s\n", desc);
202 static int announce_dram_init(void)
209 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
210 * and value in calculated unit scale multiplied by 10 (as fractional fixed
211 * point number with one decimal digit), which is human natural format,
212 * same what uses print_size() function for displaying. Mathematically it is:
213 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
215 * For example for size=87654321 we calculate scale=20 and val=836 which means
216 * that input has natural human format 83.6 M (mega = 2^20).
218 #define compute_size_scale_val(size, scale, val) do { \
219 scale = ilog2(size) / 10 * 10; \
220 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
221 if (val == 10240) { val = 10; scale += 10; } \
225 * Check if the sizes in their natural units written in decimal format with
226 * one fraction number are same.
228 static int sizes_near(unsigned long long size1, unsigned long long size2)
230 unsigned int size1_scale, size1_val, size2_scale, size2_val;
232 compute_size_scale_val(size1, size1_scale, size1_val);
233 compute_size_scale_val(size2, size2_scale, size2_val);
235 return size1_scale == size2_scale && size1_val == size2_val;
238 static int show_dram_config(void)
240 unsigned long long size;
243 debug("\nRAM Configuration:\n");
244 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
245 size += gd->bd->bi_dram[i].size;
246 debug("Bank #%d: %llx ", i,
247 (unsigned long long)(gd->bd->bi_dram[i].start));
249 print_size(gd->bd->bi_dram[i].size, "\n");
254 print_size(gd->ram_size, "");
255 if (!sizes_near(gd->ram_size, size)) {
256 printf(" (effective ");
257 print_size(size, ")");
259 board_add_ram_info(0);
265 __weak int dram_init_banksize(void)
267 gd->bd->bi_dram[0].start = gd->ram_base;
268 gd->bd->bi_dram[0].size = get_effective_memsize();
273 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
274 static int init_func_i2c(void)
283 #if defined(CONFIG_VID)
284 __weak int init_func_vid(void)
290 static int setup_mon_len(void)
292 #if defined(__ARM__) || defined(__MICROBLAZE__)
293 gd->mon_len = (ulong)__bss_end - (ulong)_start;
294 #elif defined(CONFIG_SANDBOX) && !defined(__riscv)
295 gd->mon_len = (ulong)_end - (ulong)_init;
296 #elif defined(CONFIG_SANDBOX)
297 /* gcc does not provide _init in crti.o on RISC-V */
299 #elif defined(CONFIG_EFI_APP)
300 gd->mon_len = (ulong)_end - (ulong)_init;
301 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
302 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
303 #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
304 gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
305 #elif defined(CONFIG_SYS_MONITOR_BASE)
306 /* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
307 gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
312 static int setup_spl_handoff(void)
314 #if CONFIG_IS_ENABLED(HANDOFF)
315 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
316 sizeof(struct spl_handoff));
317 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
323 __weak int arch_cpu_init(void)
328 __weak int mach_cpu_init(void)
333 /* Get the top of usable RAM */
334 __weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
336 #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
338 * Detect whether we have so much RAM that it goes past the end of our
339 * 32-bit address space. If so, clip the usable RAM so it doesn't.
341 if (gd->ram_top < CFG_SYS_SDRAM_BASE)
343 * Will wrap back to top of 32-bit space when reservations
351 __weak int arch_setup_dest_addr(void)
356 static int setup_dest_addr(void)
358 debug("Monitor len: %08lX\n", gd->mon_len);
360 * Ram is setup, size stored in gd !!
362 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
363 #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
365 * Subtract specified amount of memory to hide so that it won't
366 * get "touched" at all by U-Boot. By fixing up gd->ram_size
367 * the Linux kernel should now get passed the now "corrected"
368 * memory size and won't touch it either. This should work
369 * for arch/ppc and arch/powerpc. Only Linux board ports in
370 * arch/powerpc with bootwrapper support, that recalculate the
371 * memory size from the SDRAM controller setup will have to
374 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
376 #ifdef CFG_SYS_SDRAM_BASE
377 gd->ram_base = CFG_SYS_SDRAM_BASE;
379 gd->ram_top = gd->ram_base + get_effective_memsize();
380 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
381 gd->relocaddr = gd->ram_top;
382 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
384 return arch_setup_dest_addr();
388 /* reserve protected RAM */
389 static int reserve_pram(void)
393 reg = env_get_ulong("pram", 10, CFG_PRAM);
394 gd->relocaddr -= (reg << 10); /* size is in kB */
395 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
399 #endif /* CFG_PRAM */
401 /* Round memory pointer down to next 4 kB limit */
402 static int reserve_round_4k(void)
404 gd->relocaddr &= ~(4096 - 1);
408 __weak int arch_reserve_mmu(void)
413 static int reserve_video(void)
415 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) {
416 struct video_handoff *ho;
418 ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
420 return log_msg_ret("blf", -ENOENT);
421 video_reserve_from_bloblist(ho);
422 gd->relocaddr = ho->fb;
423 } else if (CONFIG_IS_ENABLED(VIDEO)) {
427 addr = gd->relocaddr;
428 ret = video_reserve(&addr);
431 debug("Reserving %luk for video at: %08lx\n",
432 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
433 gd->relocaddr = addr;
439 static int reserve_trace(void)
442 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
443 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
444 debug("Reserving %luk for trace data at: %08lx\n",
445 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
451 static int reserve_uboot(void)
453 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
455 * reserve memory for U-Boot code, data & bss
456 * round down to next 4 kB limit
458 gd->relocaddr -= gd->mon_len;
459 gd->relocaddr &= ~(4096 - 1);
460 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
461 /* round down to next 64 kB limit so that IVPR stays aligned */
462 gd->relocaddr &= ~(65536 - 1);
465 debug("Reserving %ldk for U-Boot at: %08lx\n",
466 gd->mon_len >> 10, gd->relocaddr);
469 gd->start_addr_sp = gd->relocaddr;
475 * reserve after start_addr_sp the requested size and make the stack pointer
476 * 16-byte aligned, this alignment is needed for cast on the reserved memory
477 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
478 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
480 static unsigned long reserve_stack_aligned(size_t size)
482 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
485 #ifdef CONFIG_SYS_NONCACHED_MEMORY
486 static int reserve_noncached(void)
489 * The value of gd->start_addr_sp must match the value of malloc_start
490 * calculated in board_r.c:initr_malloc(), which is passed to
491 * dlmalloc.c:mem_malloc_init() and then used by
492 * cache.c:noncached_init()
494 * These calculations must match the code in cache.c:noncached_init()
496 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
498 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
500 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
501 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
507 /* reserve memory for malloc() area */
508 static int reserve_malloc(void)
510 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
511 debug("Reserving %dk for malloc() at: %08lx\n",
512 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
513 #ifdef CONFIG_SYS_NONCACHED_MEMORY
520 /* (permanently) allocate a Board Info struct */
521 static int reserve_board(void)
524 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
525 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
526 sizeof(struct bd_info));
527 memset(gd->bd, '\0', sizeof(struct bd_info));
528 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
529 sizeof(struct bd_info), gd->start_addr_sp);
534 static int reserve_global_data(void)
536 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
537 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
538 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
539 sizeof(gd_t), gd->start_addr_sp);
543 static int reserve_fdt(void)
545 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
547 * If the device tree is sitting immediately above our image
548 * then we must relocate it. If it is embedded in the data
549 * section, then it will be relocated with other data.
552 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
554 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
555 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
556 debug("Reserving %lu Bytes for FDT at: %08lx\n",
557 gd->fdt_size, gd->start_addr_sp);
564 static int reserve_bootstage(void)
566 #ifdef CONFIG_BOOTSTAGE
567 int size = bootstage_get_size();
569 gd->start_addr_sp = reserve_stack_aligned(size);
570 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
571 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
578 __weak int arch_reserve_stacks(void)
583 static int reserve_stacks(void)
585 /* make stack pointer 16-byte aligned */
586 gd->start_addr_sp = reserve_stack_aligned(16);
589 * let the architecture-specific code tailor gd->start_addr_sp and
592 return arch_reserve_stacks();
595 static int reserve_bloblist(void)
597 #ifdef CONFIG_BLOBLIST
598 /* Align to a 4KB boundary for easier reading of addresses */
599 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
600 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
601 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
602 CONFIG_BLOBLIST_SIZE_RELOC);
608 static int display_new_sp(void)
610 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
615 __weak int arch_setup_bdinfo(void)
620 int setup_bdinfo(void)
622 struct bd_info *bd = gd->bd;
624 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
625 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
626 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
629 return arch_setup_bdinfo();
633 static int init_post(void)
635 post_bootmode_init();
636 post_run(NULL, POST_ROM | post_bootmode_get(0));
642 static int reloc_fdt(void)
644 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
646 memcpy(gd->new_fdt, gd->fdt_blob,
647 fdt_totalsize(gd->fdt_blob));
648 gd->fdt_blob = gd->new_fdt;
655 static int reloc_bootstage(void)
657 #ifdef CONFIG_BOOTSTAGE
658 if (gd->flags & GD_FLG_SKIP_RELOC)
660 if (gd->new_bootstage) {
661 int size = bootstage_get_size();
663 debug("Copying bootstage from %p to %p, size %x\n",
664 gd->bootstage, gd->new_bootstage, size);
665 memcpy(gd->new_bootstage, gd->bootstage, size);
666 gd->bootstage = gd->new_bootstage;
667 bootstage_relocate();
674 static int reloc_bloblist(void)
676 #ifdef CONFIG_BLOBLIST
678 * Relocate only if we are supposed to send it
680 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
681 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
682 debug("Not relocating bloblist\n");
685 if (gd->new_bloblist) {
686 int size = CONFIG_BLOBLIST_SIZE;
688 debug("Copying bloblist from %p to %p, size %x\n",
689 gd->bloblist, gd->new_bloblist, size);
690 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
692 gd->bloblist = gd->new_bloblist;
699 static int setup_reloc(void)
701 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
702 #ifdef CONFIG_TEXT_BASE
704 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
705 #elif defined(CONFIG_MICROBLAZE)
706 gd->reloc_off = gd->relocaddr - (u32)_start;
707 #elif defined(CONFIG_M68K)
709 * On all ColdFire arch cpu, monitor code starts always
710 * just after the default vector table location, so at 0x400
712 gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
713 #elif !defined(CONFIG_SANDBOX)
714 gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
719 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
721 if (gd->flags & GD_FLG_SKIP_RELOC) {
722 debug("Skipping relocation due to flag\n");
724 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
725 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
726 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
733 #ifdef CONFIG_OF_BOARD_FIXUP
734 static int fix_fdt(void)
736 return board_fix_fdt((void *)gd->fdt_blob);
740 /* ARM calls relocate_code from its crt0.S */
741 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
743 static int jump_to_copy(void)
745 if (gd->flags & GD_FLG_SKIP_RELOC)
748 * x86 is special, but in a nice way. It uses a trampoline which
749 * enables the dcache if possible.
751 * For now, other archs use relocate_code(), which is implemented
752 * similarly for all archs. When we do generic relocation, hopefully
753 * we can make all archs enable the dcache prior to relocation.
755 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
757 * SDRAM and console are now initialised. The final stack can now
758 * be setup in SDRAM. Code execution will continue in Flash, but
759 * with the stack in SDRAM and Global Data in temporary memory
762 arch_setup_gd(gd->new_gd);
763 # if CONFIG_IS_ENABLED(X86_64)
764 board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
766 board_init_f_r_trampoline(gd->start_addr_sp);
769 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
776 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
777 static int initf_bootstage(void)
779 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
780 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
783 ret = bootstage_init(!from_spl);
787 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
788 CONFIG_BOOTSTAGE_STASH_SIZE);
790 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
791 if (ret && ret != -ENOENT) {
792 debug("Failed to unstash bootstage: err=%d\n", ret);
797 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
802 static int initf_dm(void)
804 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
807 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
808 ret = dm_init_and_scan(true);
809 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
813 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
814 ret = dm_timer_init();
823 /* Architecture-specific memory reservation */
824 __weak int reserve_arch(void)
829 __weak int checkcpu(void)
834 __weak int clear_bss(void)
839 static int misc_init_f(void)
841 return event_notify_null(EVT_MISC_INIT_F);
844 static const init_fnc_t init_sequence_f[] = {
846 #ifdef CONFIG_OF_CONTROL
849 #ifdef CONFIG_TRACE_EARLY
854 initf_bootstage, /* uses its own timer, so does not need DM */
856 #ifdef CONFIG_BLOBLIST
860 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
863 #if defined(CONFIG_HAVE_FSP)
866 arch_cpu_init, /* basic arch cpu dependent setup */
867 mach_cpu_init, /* SoC/machine dependent CPU setup */
869 #if defined(CONFIG_BOARD_EARLY_INIT_F)
872 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
873 /* get CPU and bus clocks according to the environment variable */
874 get_clocks, /* get CPU and bus clocks (etc.) */
876 #if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
877 timer_init, /* initialize timer */
879 #if defined(CONFIG_BOARD_POSTCLK_INIT)
882 env_init, /* initialize environment */
883 init_baud_rate, /* initialze baudrate settings */
884 serial_init, /* serial communications setup */
885 console_init_f, /* stage 1 init of console */
886 display_options, /* say that we are here */
887 display_text_info, /* show debugging info if required */
889 #if defined(CONFIG_SYSRESET)
892 #if defined(CONFIG_DISPLAY_CPUINFO)
893 print_cpuinfo, /* display cpu info (and speed) */
895 #if defined(CONFIG_DTB_RESELECT)
898 #if defined(CONFIG_DISPLAY_BOARDINFO)
901 INIT_FUNC_WATCHDOG_INIT
903 INIT_FUNC_WATCHDOG_RESET
904 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
907 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
911 dram_init, /* configure available RAM banks */
915 INIT_FUNC_WATCHDOG_RESET
916 #if defined(CFG_SYS_DRAM_TEST)
918 #endif /* CFG_SYS_DRAM_TEST */
919 INIT_FUNC_WATCHDOG_RESET
924 INIT_FUNC_WATCHDOG_RESET
926 * Now that we have DRAM mapped and working, we can
927 * relocate the code and continue running from DRAM.
929 * Reserve memory at end of RAM for (top down in that order):
930 * - area that won't get touched by U-Boot and Linux (optional)
931 * - kernel log buffer
935 * - board info struct
938 #ifdef CONFIG_OF_BOARD_FIXUP
959 INIT_FUNC_WATCHDOG_RESET
962 INIT_FUNC_WATCHDOG_RESET
967 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
973 * Deregister all cyclic functions before relocation, so that
974 * gd->cyclic_list does not contain any references to pre-relocation
975 * devices. Drivers will register their cyclic functions anew when the
976 * devices are probed again.
978 * This should happen as late as possible so that the window where a
979 * watchdog device is not serviced is as small as possible.
981 cyclic_unregister_all,
982 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
988 void board_init_f(ulong boot_flags)
990 gd->flags = boot_flags;
991 gd->have_console = 0;
993 if (initcall_run_list(init_sequence_f))
996 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
997 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
999 /* NOTREACHED - jump_to_copy() does not return */
1004 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1006 * For now this code is only used on x86.
1008 * init_sequence_f_r is the list of init functions which are run when
1009 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1010 * The following limitations must be considered when implementing an
1012 * - 'static' variables are read-only
1013 * - Global Data (gd->xxx) is read/write
1015 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1016 * supported). It _should_, if possible, copy global data to RAM and
1017 * initialise the CPU caches (to speed up the relocation process)
1019 * NOTE: At present only x86 uses this route, but it is intended that
1020 * all archs will move to this when generic relocation is implemented.
1022 static const init_fnc_t init_sequence_f_r[] = {
1023 #if !CONFIG_IS_ENABLED(X86_64)
1030 void board_init_f_r(void)
1032 if (initcall_run_list(init_sequence_f_r))
1036 * The pre-relocation drivers may be using memory that has now gone
1037 * away. Mark serial as unavailable - this will fall back to the debug
1038 * UART if available.
1040 * Do the same with log drivers since the memory may not be available.
1042 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1048 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1049 * Transfer execution from Flash to RAM by calculating the address
1050 * of the in-RAM copy of board_init_r() and calling it
1052 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1054 /* NOTREACHED - board_init_r() does not return */
1057 #endif /* CONFIG_X86 */