1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011 Samsung Electronics
13 #include <asm/arch/cpu.h>
14 #include <asm/arch/mmc.h>
15 #include <asm/arch/periph.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/sromc.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 static void smc9115_pre_init(void)
23 u32 smc_bw_conf, smc_bc_conf;
25 /* gpio configuration GPK0CON */
26 gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
28 /* Ethernet needs bus width of 16 bits */
29 smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
30 smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
31 | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
32 | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
35 /* Select and configure the SROMC bank */
36 s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
43 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
49 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
50 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
51 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
52 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
57 int dram_init_banksize(void)
59 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
60 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
62 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
63 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
65 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
66 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
68 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
69 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
75 int board_eth_init(bd_t *bis)
79 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
84 #ifdef CONFIG_DISPLAY_BOARDINFO
87 printf("\nBoard: SMDKV310\n");
93 int board_mmc_init(bd_t *bis)
100 * GPK2[0] SD_2_CLK(2)
101 * GPK2[1] SD_2_CMD(2)
103 * GPK2[3:6] SD_2_DATA[0:3](2)
105 for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
106 /* GPK2[0:6] special function 2 */
107 gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
109 /* GPK2[0:6] drv 4x */
110 gpio_set_drv(i, S5P_GPIO_DRV_4X);
112 /* GPK2[0:1] pull disable */
113 if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
114 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
118 /* GPK2[2:6] pull up */
119 gpio_set_pull(i, S5P_GPIO_PULL_UP);
121 err = s5p_mmc_init(2, 4);
126 static int board_uart_init(void)
130 err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
132 debug("UART0 not configured\n");
136 err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
138 debug("UART1 not configured\n");
142 err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
144 debug("UART2 not configured\n");
148 err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
150 debug("UART3 not configured\n");
157 #ifdef CONFIG_BOARD_EARLY_INIT_F
158 int board_early_init_f(void)
161 err = board_uart_init();
163 debug("UART init failed\n");