1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com>
11 #include <asm/arch-rockchip/clock.h>
12 #include <asm/arch-rockchip/grf_rk3399.h>
13 #include <asm/arch-rockchip/hardware.h>
14 #include <asm/arch-rockchip/misc.h>
16 #define GRF_IO_VSEL_BT565_SHIFT 0
17 #define PMUGRF_CON0_VSEL_SHIFT 8
19 #ifdef CONFIG_MISC_INIT_R
20 static void setup_iodomain(void)
22 struct rk3399_grf_regs *grf =
23 syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
24 struct rk3399_pmugrf_regs *pmugrf =
25 syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
27 /* BT565 is in 1.8v domain */
28 rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
30 /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
31 rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
36 const u32 cpuid_offset = 0x7;
37 const u32 cpuid_length = 0x10;
38 u8 cpuid[cpuid_length];
43 ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
47 ret = rockchip_cpuid_set(cpuid, cpuid_length);
51 ret = rockchip_setup_macaddr();