board/phytium/durian/durian.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2019
   4  * shuyiqi <shuyiqi@phytium.com.cn>
   5  * liuhao  <liuhao@phytium.com.cn>
   6  */
   7
   8 #include <common.h>
   9 #include <cpu_func.h>
  10 #include <init.h>
  11 #include <asm/armv8/mmu.h>
  12 #include <asm/cache.h>
  13 #include <asm/system.h>
  14 #include <asm/io.h>
  15 #include <linux/arm-smccc.h>
  16 #include <linux/kernel.h>
  17 #include <scsi.h>
  18 #include "cpu.h"
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 int dram_init(void)
  23 {
  24         gd->mem_clk = 0;
  25         gd->ram_size = PHYS_SDRAM_1_SIZE;
  26         return 0;
  27 }
  28
  29 int dram_init_banksize(void)
  30 {
  31         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  32         gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
  33
  34         return 0;
  35 }
  36
  37 int board_init(void)
  38 {
  39         return 0;
  40 }
  41
  42 void reset_cpu(ulong addr)
  43 {
  44         struct arm_smccc_res res;
  45
  46         arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
  47         debug("reset cpu error, %lx\n", res.a0);
  48 }
  49
  50 static struct mm_region durian_mem_map[] = {
  51         {
  52                 .virt = 0x0UL,
  53                 .phys = 0x0UL,
  54                 .size = 0x80000000UL,
  55                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  56                                  PTE_BLOCK_NON_SHARE |
  57                                  PTE_BLOCK_PXN |
  58                                  PTE_BLOCK_UXN
  59         },
  60         {
  61                 .virt = (u64)PHYS_SDRAM_1,
  62                 .phys = (u64)PHYS_SDRAM_1,
  63                 .size = (u64)PHYS_SDRAM_1_SIZE,
  64                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  65                                  PTE_BLOCK_NS |
  66                                  PTE_BLOCK_INNER_SHARE
  67         },
  68         {
  69                 0,
  70         }
  71 };
  72
  73 struct mm_region *mem_map = durian_mem_map;
  74
  75 int print_cpuinfo(void)
  76 {
  77         printf("CPU: Phytium ft2004 %ld MHz\n", gd->cpu_clk);
  78         return 0;
  79 }
  80
  81 int __asm_flush_l3_dcache(void)
  82 {
  83         int i, pstate;
  84
  85         for (i = 0; i < HNF_COUNT; i++)
  86                 writeq(HNF_PSTATE_SFONLY, HNF_PSTATE_REQ + i * HNF_STRIDE);
  87         for (i = 0; i < HNF_COUNT; i++) {
  88                 do {
  89                         pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE);
  90                 } while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
  91         }
  92
  93         for (i = 0; i < HNF_COUNT; i++)
  94                 writeq(HNF_PSTATE_FULL, HNF_PSTATE_REQ + i * HNF_STRIDE);
  95
  96         return 0;
  97 }
  98
  99 int last_stage_init(void)
 100 {
 101         int ret;
 102
 103         /* pci e */
 104         pci_init();
 105         /* scsi scan */
 106         ret = scsi_scan(true);
 107         if (ret) {
 108                 printf("scsi scan failed\n");
 109                 return CMD_RET_FAILURE;
 110         }
 111         return ret;
 112 }
 113