1 // SPDX-License-Identifier: GPL-2.0+
4 * ISEE 2007 SL, <www.iseebcn.com>
11 #include <status_led.h>
19 #include <asm/arch/mem.h>
20 #include <asm/arch/mmc_host_def.h>
21 #include <asm/arch/mux.h>
22 #include <asm/arch/sys_proto.h>
23 #include <linux/delay.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/rawnand.h>
26 #include <linux/mtd/onenand.h>
27 #include <jffs2/load_kernel.h>
29 #include <fdt_support.h>
32 static const struct ns16550_platdata igep_serial = {
33 .base = OMAP34XX_UART3,
35 .clock = V_NS16550_CLK,
36 .fcr = UART_FCR_DEFVAL,
39 U_BOOT_DEVICE(igep_uart) = {
45 * Routine: get_board_revision
46 * Description: GPIO_28 and GPIO_129 are used to read board and revision from
47 * IGEP00x0 boards. First of all, it is necessary to reset USB transceiver from
48 * IGEP0030 in order to read GPIO_IGEP00X0_BOARD_DETECTION correctly, because
49 * this functionality is shared by USB HOST.
50 * Once USB reset is applied, U-boot configures these pins as input pullup to
51 * detect board and revision:
57 static int get_board_revision(void)
61 gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
62 "igep0030_usb_transceiver_reset");
63 gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
65 gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
66 gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
67 revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
68 gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
70 gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
71 "igep00x0_revision_detection");
72 gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
73 revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
74 gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
76 gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
81 int onenand_board_init(struct mtd_info *mtd)
83 if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
84 struct onenand_chip *this = mtd->priv;
85 this->base = (void *)CONFIG_SYS_ONENAND_BASE;
91 #if defined(CONFIG_CMD_NET)
92 static void reset_net_chip(int gpio)
94 if (!gpio_request(gpio, "eth nrst")) {
95 gpio_direction_output(gpio, 1);
97 gpio_set_value(gpio, 0);
99 gpio_set_value(gpio, 1);
105 * Routine: setup_net_chip
106 * Description: Setting up the configuration GPMC registers specific to the
109 static void setup_net_chip(void)
111 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
112 static const u32 gpmc_lan_config[] = {
113 NET_LAN9221_GPMC_CONFIG1,
114 NET_LAN9221_GPMC_CONFIG2,
115 NET_LAN9221_GPMC_CONFIG3,
116 NET_LAN9221_GPMC_CONFIG4,
117 NET_LAN9221_GPMC_CONFIG5,
118 NET_LAN9221_GPMC_CONFIG6,
121 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
122 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
124 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
125 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
126 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
127 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
128 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
129 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
130 &ctrl_base->gpmc_nadv_ale);
135 int board_eth_init(bd_t *bis)
137 #ifdef CONFIG_SMC911X
138 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
144 static inline void setup_net_chip(void) {}
147 #ifdef CONFIG_OF_BOARD_SETUP
148 static int ft_enable_by_compatible(void *blob, char *compat, int enable)
150 int off = fdt_node_offset_by_compatible(blob, -1, compat);
155 fdt_status_okay(blob, off);
157 fdt_status_disabled(blob, off);
162 int ft_board_setup(void *blob, bd_t *bd)
164 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
165 static const struct node_info nodes[] = {
166 { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
167 { "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
170 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
172 ft_enable_by_compatible(blob, "ti,omap2-nand",
173 gpmc_cs0_flash == MTD_DEV_TYPE_NAND);
174 ft_enable_by_compatible(blob, "ti,omap2-onenand",
175 gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND);
183 switch (get_board_revision()) {
186 gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
187 gpio_direction_output(IGEP0020_GPIO_LED, 1);
191 gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
192 gpio_direction_output(IGEP0030_GPIO_LED, 0);
195 /* Should not happen... */
200 void set_boardname(void)
202 char rev[5] = { 'F','C','G','E', };
203 int i = get_board_revision();
206 env_set("board_rev", rev + i);
207 env_set("board_name", i < 2 ? "igep0020" : "igep0030");
211 * Routine: misc_init_r
212 * Description: Configure board specific parts
214 int misc_init_r(void)
216 t2_t *t2_base = (t2_t *)T2_BASE;
219 twl4030_power_init();
221 /* set VSIM to 1.8V */
222 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
223 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
224 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
225 TWL4030_PM_RECEIVER_DEV_GRP_P1);
227 /* set up dual-voltage GPIOs to 1.8V */
228 pbias_lite = readl(&t2_base->pbias_lite);
229 pbias_lite &= ~PBIASLITEVMODE1;
230 pbias_lite |= PBIASLITEPWRDNZ1;
231 writel(pbias_lite, &t2_base->pbias_lite);
232 if (get_cpu_family() == CPU_OMAP36XX)
233 writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
234 OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
235 OMAP34XX_CTRL_WKUP_CTRL);
239 omap_die_id_display();
248 void board_mtdparts_default(const char **mtdids, const char **mtdparts)
250 struct mtd_info *mtd = get_mtd_device(NULL, 0);
253 static char parts[48];
254 const char *linux_name = "omap2-nand";
255 if (strncmp(mtd->name, "onenand0", 8) == 0)
256 linux_name = "omap2-onenand";
257 snprintf(ids, sizeof(ids), "%s=%s", mtd->name, linux_name);
258 snprintf(parts, sizeof(parts), "mtdparts=%s:%dk(SPL),-(UBI)",
259 linux_name, 4 * mtd->erasesize >> 10);