2 * arch/xtensa/mm/cache.c
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 2001-2006 Tensilica Inc.
10 * Chris Zankel <chris@zankel.net>
16 #include <linux/init.h>
17 #include <linux/signal.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/types.h>
23 #include <linux/ptrace.h>
24 #include <linux/bootmem.h>
25 #include <linux/swap.h>
26 #include <linux/pagemap.h>
28 #include <asm/bootparam.h>
29 #include <asm/mmu_context.h>
31 #include <asm/tlbflush.h>
33 #include <asm/pgalloc.h>
34 #include <asm/pgtable.h>
36 //#define printd(x...) printk(x)
37 #define printd(x...) do { } while(0)
41 * The kernel provides one architecture bit PG_arch_1 in the page flags that
42 * can be used for cache coherency.
46 * The Xtensa architecture doesn't keep the instruction cache coherent with
47 * the data cache. We use the architecture bit to indicate if the caches
48 * are coherent. The kernel clears this bit whenever a page is added to the
49 * page cache. At that time, the caches might not be in sync. We, therefore,
50 * define this flag as 'clean' if set.
54 * With cache aliasing, we have to always flush the cache when pages are
55 * unmapped (see tlb_start_vma(). So, we use this flag to indicate a dirty
62 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
65 * Any time the kernel writes to a user page cache page, or it is about to
66 * read from a page cache page this routine is called.
70 void flush_dcache_page(struct page *page)
72 struct address_space *mapping = page_mapping(page);
75 * If we have a mapping but the page is not mapped to user-space
76 * yet, we simply mark this page dirty and defer flushing the
77 * caches until update_mmu().
80 if (mapping && !mapping_mapped(mapping)) {
81 if (!test_bit(PG_arch_1, &page->flags))
82 set_bit(PG_arch_1, &page->flags);
87 unsigned long phys = page_to_phys(page);
88 unsigned long temp = page->index << PAGE_SHIFT;
89 unsigned long alias = !(DCACHE_ALIAS_EQ(temp, phys));
93 * Flush the page in kernel space and user space.
94 * Note that we can omit that step if aliasing is not
95 * an issue, but we do have to synchronize I$ and D$
96 * if we have a mapping.
99 if (!alias && !mapping)
102 __flush_invalidate_dcache_page((long)page_address(page));
104 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK);
107 __flush_invalidate_dcache_page_alias(virt, phys);
110 __invalidate_icache_page_alias(virt, phys);
113 /* There shouldn't be an entry in the cache for this page anymore. */
115 EXPORT_SYMBOL(flush_dcache_page);
118 * For now, flush the whole cache. FIXME??
121 void flush_cache_range(struct vm_area_struct* vma,
122 unsigned long start, unsigned long end)
124 __flush_invalidate_dcache_all();
125 __invalidate_icache_all();
127 EXPORT_SYMBOL(local_flush_cache_range);
130 * Remove any entry in the cache for this page.
132 * Note that this function is only called for user pages, so use the
133 * alias versions of the cache flush functions.
136 void flush_cache_page(struct vm_area_struct* vma, unsigned long address,
139 /* Note that we have to use the 'alias' address to avoid multi-hit */
141 unsigned long phys = page_to_phys(pfn_to_page(pfn));
142 unsigned long virt = TLBTEMP_BASE_1 + (address & DCACHE_ALIAS_MASK);
144 __flush_invalidate_dcache_page_alias(virt, phys);
145 __invalidate_icache_page_alias(virt, phys);
147 EXPORT_SYMBOL(local_flush_cache_page);
149 #endif /* DCACHE_WAY_SIZE > PAGE_SIZE */
152 update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)
154 unsigned long pfn = pte_pfn(*ptep);
160 page = pfn_to_page(pfn);
162 /* Invalidate old entry in TLBs */
164 invalidate_itlb_mapping(addr);
165 invalidate_dtlb_mapping(addr);
167 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
169 if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) {
171 unsigned long vaddr = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK);
172 unsigned long paddr = (unsigned long) page_address(page);
173 unsigned long phys = page_to_phys(page);
175 __flush_invalidate_dcache_page(paddr);
177 __flush_invalidate_dcache_page_alias(vaddr, phys);
178 __invalidate_icache_page_alias(vaddr, phys);
180 clear_bit(PG_arch_1, &page->flags);
183 if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)
184 && (vma->vm_flags & VM_EXEC) != 0) {
185 unsigned long paddr = (unsigned long) page_address(page);
186 __flush_dcache_page(paddr);
187 __invalidate_icache_page(paddr);
188 set_bit(PG_arch_1, &page->flags);
194 * access_process_vm() has called get_user_pages(), which has done a
195 * flush_dcache_page() on the page.
198 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
200 void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
201 unsigned long vaddr, void *dst, const void *src,
204 unsigned long phys = page_to_phys(page);
205 unsigned long alias = !(DCACHE_ALIAS_EQ(vaddr, phys));
207 /* Flush and invalidate user page if aliased. */
210 unsigned long temp = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK);
211 __flush_invalidate_dcache_page_alias(temp, phys);
216 memcpy(dst, src, len);
219 * Flush and invalidate kernel page if aliased and synchronize
220 * data and instruction caches for executable pages.
224 unsigned long temp = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK);
226 __flush_invalidate_dcache_range((unsigned long) dst, len);
227 if ((vma->vm_flags & VM_EXEC) != 0) {
228 __invalidate_icache_page_alias(temp, phys);
231 } else if ((vma->vm_flags & VM_EXEC) != 0) {
232 __flush_dcache_range((unsigned long)dst,len);
233 __invalidate_icache_range((unsigned long) dst, len);
237 extern void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
238 unsigned long vaddr, void *dst, const void *src,
241 unsigned long phys = page_to_phys(page);
242 unsigned long alias = !(DCACHE_ALIAS_EQ(vaddr, phys));
245 * Flush user page if aliased.
246 * (Note: a simply flush would be sufficient)
250 unsigned long temp = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK);
251 __flush_invalidate_dcache_page_alias(temp, phys);
254 memcpy(dst, src, len);