2 * Machine check handler.
3 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
4 * Rest from unknown author(s).
5 * 2004 Andi Kleen. Rewrote most of it.
8 #include <linux/init.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/rcupdate.h>
14 #include <linux/kallsyms.h>
15 #include <linux/sysdev.h>
16 #include <linux/miscdevice.h>
18 #include <asm/processor.h>
21 #include <asm/kdebug.h>
22 #include <asm/uaccess.h>
24 #define MISC_MCELOG_MINOR 227
27 static int mce_dont_init;
29 /* 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic,
30 3: never panic or exit (for testing only) */
31 static int tolerant = 1;
33 static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL };
34 static unsigned long console_logged;
35 static int notify_user;
38 * Lockless MCE logging infrastructure.
39 * This avoids deadlocks on printk locks without having to break locks. Also
40 * separate MCEs from kernel messages to avoid bogus bug reports.
43 struct mce_log mcelog = {
48 void mce_log(struct mce *mce)
54 entry = rcu_dereference(mcelog.next);
55 /* When the buffer fills up discard new entries. Assume
56 that the earlier errors are the more interesting. */
57 if (entry >= MCE_LOG_LEN) {
58 set_bit(MCE_OVERFLOW, &mcelog.flags);
61 /* Old left over entry. Skip. */
62 if (mcelog.entry[entry].finished)
66 if (cmpxchg(&mcelog.next, entry, next) == entry)
69 memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
71 mcelog.entry[entry].finished = 1;
74 if (!test_and_set_bit(0, &console_logged))
78 static void print_mce(struct mce *m)
80 printk(KERN_EMERG "\n"
82 "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
83 m->cpu, m->mcgstatus, m->bank, m->status);
86 "RIP%s %02x:<%016Lx> ",
87 !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
89 if (m->cs == __KERNEL_CS)
90 print_symbol("{%s}", m->rip);
93 printk(KERN_EMERG "TSC %Lx ", m->tsc);
95 printk("ADDR %Lx ", m->addr);
97 printk("MISC %Lx ", m->misc);
101 static void mce_panic(char *msg, struct mce *backup, unsigned long start)
105 for (i = 0; i < MCE_LOG_LEN; i++) {
106 unsigned long tsc = mcelog.entry[i].tsc;
107 if (time_before(tsc, start))
109 print_mce(&mcelog.entry[i]);
110 if (backup && mcelog.entry[i].tsc == backup->tsc)
116 printk("Fake panic: %s\n", msg);
121 static int mce_available(struct cpuinfo_x86 *c)
123 return test_bit(X86_FEATURE_MCE, &c->x86_capability) &&
124 test_bit(X86_FEATURE_MCA, &c->x86_capability);
128 * The actual machine check handler
131 void do_machine_check(struct pt_regs * regs, long error_code)
133 struct mce m, panicm;
134 int nowayout = (tolerant < 1);
138 int panicm_found = 0;
141 notify_die(DIE_NMI, "machine check", regs, error_code, 255, SIGKILL);
145 memset(&m, 0, sizeof(struct mce));
146 m.cpu = hard_smp_processor_id();
147 rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
148 if (!(m.mcgstatus & MCG_STATUS_RIPV))
154 for (i = 0; i < banks; i++) {
163 rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
164 if ((m.status & MCI_STATUS_VAL) == 0)
167 if (m.status & MCI_STATUS_EN) {
168 /* In theory _OVER could be a nowayout too, but
169 assume any overflowed errors were no fatal. */
170 nowayout |= !!(m.status & MCI_STATUS_PCC);
171 kill_it |= !!(m.status & MCI_STATUS_UC);
174 if (m.status & MCI_STATUS_MISCV)
175 rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
176 if (m.status & MCI_STATUS_ADDRV)
177 rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
179 if (regs && (m.mcgstatus & MCG_STATUS_RIPV)) {
187 if (error_code != -1)
189 wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
192 /* Did this bank cause the exception? */
193 /* Assume that the bank with uncorrectable errors did it,
194 and that there is only a single one. */
195 if ((m.status & MCI_STATUS_UC) && (m.status & MCI_STATUS_EN)) {
200 tainted |= TAINT_MACHINE_CHECK;
203 /* Never do anything final in the polling timer */
207 /* If we didn't find an uncorrectable error, pick
208 the last one (shouldn't happen, just being safe). */
212 mce_panic("Machine check", &panicm, mcestart);
216 if (m.mcgstatus & MCG_STATUS_RIPV)
217 user_space = panicm.rip && (panicm.cs & 3);
219 /* When the machine was in user space and the CPU didn't get
220 confused it's normally not necessary to panic, unless you
221 are paranoid (tolerant == 0)
223 RED-PEN could be more tolerant for MCEs in idle,
224 but most likely they occur at boot anyways, where
225 it is best to just halt the machine. */
226 if ((!user_space && (panic_on_oops || tolerant < 2)) ||
227 (unsigned)current->pid <= 1)
228 mce_panic("Uncorrected machine check", &panicm, mcestart);
230 /* do_exit takes an awful lot of locks and has as
231 slight risk of deadlocking. If you don't want that
232 don't set tolerant >= 2 */
238 /* Last thing done in the machine check exception to clear state. */
239 wrmsrl(MSR_IA32_MCG_STATUS, 0);
243 * Periodic polling timer for "silent" machine check errors.
246 static int check_interval = 5 * 60; /* 5 minutes */
247 static void mcheck_timer(void *data);
248 static DECLARE_WORK(mcheck_work, mcheck_timer, NULL);
250 static void mcheck_check_cpu(void *info)
252 if (mce_available(¤t_cpu_data))
253 do_machine_check(NULL, 0);
256 static void mcheck_timer(void *data)
258 on_each_cpu(mcheck_check_cpu, NULL, 1, 1);
259 schedule_delayed_work(&mcheck_work, check_interval * HZ);
262 * It's ok to read stale data here for notify_user and
263 * console_logged as we'll simply get the updated versions
264 * on the next mcheck_timer execution and atomic operations
265 * on console_logged act as synchronization for notify_user
268 if (notify_user && console_logged) {
270 clear_bit(0, &console_logged);
271 printk(KERN_INFO "Machine check events logged\n");
276 static __init int periodic_mcheck_init(void)
279 schedule_delayed_work(&mcheck_work, check_interval*HZ);
282 __initcall(periodic_mcheck_init);
286 * Initialize Machine Checks for a CPU.
288 static void mce_init(void *dummy)
293 rdmsrl(MSR_IA32_MCG_CAP, cap);
295 if (banks > NR_BANKS) {
296 printk(KERN_INFO "MCE: warning: using only %d banks\n", banks);
300 /* Log the machine checks left over from the previous reset.
301 This also clears all registers */
302 do_machine_check(NULL, -1);
304 set_in_cr4(X86_CR4_MCE);
307 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
309 for (i = 0; i < banks; i++) {
310 wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
311 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
315 /* Add per CPU specific workarounds here */
316 static void __init mce_cpu_quirks(struct cpuinfo_x86 *c)
318 /* This should be disabled by the BIOS, but isn't always */
319 if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 15) {
320 /* disable GART TBL walk error reporting, which trips off
321 incorrectly with the IOMMU & 3ware & Cerberus. */
322 clear_bit(10, &bank[4]);
326 static void __init mce_cpu_features(struct cpuinfo_x86 *c)
328 switch (c->x86_vendor) {
329 case X86_VENDOR_INTEL:
330 mce_intel_feature_init(c);
338 * Called for each booted CPU to set up machine checks.
339 * Must be called with preempt off.
341 void __init mcheck_init(struct cpuinfo_x86 *c)
343 static cpumask_t mce_cpus __initdata = CPU_MASK_NONE;
348 cpu_test_and_set(smp_processor_id(), mce_cpus) ||
357 * Character device to read and clear the MCE log.
360 static void collect_tscs(void *data)
362 unsigned long *cpu_tsc = (unsigned long *)data;
363 rdtscll(cpu_tsc[smp_processor_id()]);
366 static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, loff_t *off)
368 unsigned long cpu_tsc[NR_CPUS];
369 static DECLARE_MUTEX(mce_read_sem);
371 char __user *buf = ubuf;
375 next = rcu_dereference(mcelog.next);
377 /* Only supports full reads right now */
378 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
384 for (i = 0; i < next; i++) {
385 if (!mcelog.entry[i].finished)
388 err |= copy_to_user(buf, mcelog.entry + i, sizeof(struct mce));
389 buf += sizeof(struct mce);
392 memset(mcelog.entry, 0, next * sizeof(struct mce));
395 synchronize_kernel();
397 /* Collect entries that were still getting written before the synchronize. */
399 on_each_cpu(collect_tscs, cpu_tsc, 1, 1);
400 for (i = next; i < MCE_LOG_LEN; i++) {
401 if (mcelog.entry[i].finished &&
402 mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
403 err |= copy_to_user(buf, mcelog.entry+i, sizeof(struct mce));
405 buf += sizeof(struct mce);
406 memset(&mcelog.entry[i], 0, sizeof(struct mce));
410 return err ? -EFAULT : buf - ubuf;
413 static int mce_ioctl(struct inode *i, struct file *f,unsigned int cmd, unsigned long arg)
415 int __user *p = (int __user *)arg;
416 if (!capable(CAP_SYS_ADMIN))
419 case MCE_GET_RECORD_LEN:
420 return put_user(sizeof(struct mce), p);
421 case MCE_GET_LOG_LEN:
422 return put_user(MCE_LOG_LEN, p);
423 case MCE_GETCLEAR_FLAGS: {
426 flags = mcelog.flags;
427 } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
428 return put_user(flags, p);
435 static struct file_operations mce_chrdev_ops = {
440 static struct miscdevice mce_log_device = {
447 * Old style boot options parsing. Only for compatibility.
450 static int __init mcheck_disable(char *str)
456 /* mce=off disables machine check. Note you can reenable it later
458 static int __init mcheck_enable(char *str)
460 if (!strcmp(str, "off"))
463 printk("mce= argument %s ignored. Please use /sys", str);
467 __setup("nomce", mcheck_disable);
468 __setup("mce", mcheck_enable);
474 /* On resume clear all MCE state. Don't want to see leftovers from the BIOS. */
475 static int mce_resume(struct sys_device *dev)
477 on_each_cpu(mce_init, NULL, 1, 1);
481 /* Reinit MCEs after user configuration changes */
482 static void mce_restart(void)
485 cancel_delayed_work(&mcheck_work);
486 /* Timer race is harmless here */
487 on_each_cpu(mce_init, NULL, 1, 1);
489 schedule_delayed_work(&mcheck_work, check_interval*HZ);
492 static struct sysdev_class mce_sysclass = {
493 .resume = mce_resume,
494 set_kset_name("machinecheck"),
497 static struct sys_device device_mce = {
499 .cls = &mce_sysclass,
502 /* Why are there no generic functions for this? */
503 #define ACCESSOR(name, var, start) \
504 static ssize_t show_ ## name(struct sys_device *s, char *buf) { \
505 return sprintf(buf, "%lx\n", (unsigned long)var); \
507 static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \
509 unsigned long new = simple_strtoul(buf, &end, 0); \
510 if (end == buf) return -EINVAL; \
515 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
517 ACCESSOR(bank0ctl,bank[0],mce_restart())
518 ACCESSOR(bank1ctl,bank[1],mce_restart())
519 ACCESSOR(bank2ctl,bank[2],mce_restart())
520 ACCESSOR(bank3ctl,bank[3],mce_restart())
521 ACCESSOR(bank4ctl,bank[4],mce_restart())
522 ACCESSOR(tolerant,tolerant,)
523 ACCESSOR(check_interval,check_interval,mce_restart())
525 static __init int mce_init_device(void)
528 if (!mce_available(&boot_cpu_data))
530 err = sysdev_class_register(&mce_sysclass);
532 err = sysdev_register(&device_mce);
534 /* could create per CPU objects, but it is not worth it. */
535 sysdev_create_file(&device_mce, &attr_bank0ctl);
536 sysdev_create_file(&device_mce, &attr_bank1ctl);
537 sysdev_create_file(&device_mce, &attr_bank2ctl);
538 sysdev_create_file(&device_mce, &attr_bank3ctl);
539 sysdev_create_file(&device_mce, &attr_bank4ctl);
540 sysdev_create_file(&device_mce, &attr_tolerant);
541 sysdev_create_file(&device_mce, &attr_check_interval);
544 misc_register(&mce_log_device);
548 device_initcall(mce_init_device);