arch/x86/lib/fsp2/fsp_dram.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019 Google LLC
   4  * Written by Simon Glass <sjg@chromium.org>
   5  */
   6
   7 #include <common.h>
   8 #include <handoff.h>
   9 #include <init.h>
  10 #include <spl.h>
  11 #include <acpi/acpi_s3.h>
  12 #include <asm/arch/cpu.h>
  13 #include <asm/fsp/fsp_support.h>
  14 #include <asm/fsp2/fsp_api.h>
  15 #include <asm/fsp2/fsp_internal.h>
  16 #include <linux/sizes.h>
  17
  18 int dram_init(void)
  19 {
  20         int ret;
  21
  22         if (!ll_boot_init()) {
  23                 /* Use a small and safe amount of 1GB */
  24                 gd->ram_size = SZ_1G;
  25
  26                 return 0;
  27         }
  28         if (spl_phase() == PHASE_SPL) {
  29 #ifdef CONFIG_HAVE_ACPI_RESUME
  30                 bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
  31 #else
  32                 bool s3wake = false;
  33 #endif
  34
  35                 ret = fsp_memory_init(s3wake,
  36                               IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH));
  37                 if (ret) {
  38                         debug("Memory init failed (err=%x)\n", ret);
  39                         return ret;
  40                 }
  41
  42                 /* The FSP has already set up DRAM, so grab the info we need */
  43                 ret = fsp_scan_for_ram_size();
  44                 if (ret)
  45                         return ret;
  46
  47 #ifdef CONFIG_ENABLE_MRC_CACHE
  48                 gd->arch.mrc[MRC_TYPE_NORMAL].buf =
  49                         fsp_get_nvs_data(gd->arch.hob_list,
  50                                          &gd->arch.mrc[MRC_TYPE_NORMAL].len);
  51                 gd->arch.mrc[MRC_TYPE_VAR].buf =
  52                         fsp_get_var_nvs_data(gd->arch.hob_list,
  53                                              &gd->arch.mrc[MRC_TYPE_VAR].len);
  54                 log_debug("normal %x, var %x\n",
  55                           gd->arch.mrc[MRC_TYPE_NORMAL].len,
  56                           gd->arch.mrc[MRC_TYPE_VAR].len);
  57 #endif
  58         } else {
  59 #if CONFIG_IS_ENABLED(HANDOFF)
  60                 struct spl_handoff *ho = gd->spl_handoff;
  61
  62                 if (!ho) {
  63                         debug("No SPL handoff found\n");
  64                         return -ESTRPIPE;
  65                 }
  66                 gd->ram_size = ho->ram_size;
  67                 handoff_load_dram_banks(ho);
  68 #endif
  69                 ret = arch_fsps_preinit();
  70                 if (ret)
  71                         return log_msg_ret("fsp_s_preinit", ret);
  72         }
  73
  74         return 0;
  75 }
  76
  77 ulong board_get_usable_ram_top(ulong total_size)
  78 {
  79         if (!ll_boot_init())
  80                 return gd->ram_size;
  81
  82 #if CONFIG_IS_ENABLED(HANDOFF)
  83         struct spl_handoff *ho = gd->spl_handoff;
  84
  85         return ho->arch.usable_ram_top;
  86 #endif
  87
  88         return gd->ram_top;
  89 }