2 * A hypervisor allows multiple Operating Systems to run on a single machine.
3 * To quote David Wheeler: "Any problem in computer science can be solved with
4 * another layer of indirection."
6 * We keep things simple in two ways. First, we start with a normal Linux
7 * kernel and insert a module (lg.ko) which allows us to run other Linux
8 * kernels the same way we'd run processes. We call the first kernel the Host,
9 * and the others the Guests. The program which sets up and configures Guests
10 * (such as the example in Documentation/lguest/lguest.c) is called the
13 * Secondly, we only run specially modified Guests, not normal kernels: setting
14 * CONFIG_LGUEST_GUEST to "y" compiles this file into the kernel so it knows
15 * how to be a Guest at boot time. This means that you can use the same kernel
16 * you boot normally (ie. as a Host) as a Guest.
18 * These Guests know that they cannot do privileged operations, such as disable
19 * interrupts, and that they have to ask the Host to do such things explicitly.
20 * This file consists of all the replacements for such low-level native
21 * hardware operations: these special Guest versions call the Host.
23 * So how does the kernel know it's a Guest? We'll see that later, but let's
24 * just say that we end up here where we replace the native functions various
25 * "paravirt" structures with our Guest versions, then boot like normal.
29 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
31 * This program is free software; you can redistribute it and/or modify
32 * it under the terms of the GNU General Public License as published by
33 * the Free Software Foundation; either version 2 of the License, or
34 * (at your option) any later version.
36 * This program is distributed in the hope that it will be useful, but
37 * WITHOUT ANY WARRANTY; without even the implied warranty of
38 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
39 * NON INFRINGEMENT. See the GNU General Public License for more
42 * You should have received a copy of the GNU General Public License
43 * along with this program; if not, write to the Free Software
44 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
46 #include <linux/kernel.h>
47 #include <linux/start_kernel.h>
48 #include <linux/string.h>
49 #include <linux/console.h>
50 #include <linux/screen_info.h>
51 #include <linux/irq.h>
52 #include <linux/interrupt.h>
53 #include <linux/clocksource.h>
54 #include <linux/clockchips.h>
55 #include <linux/lguest.h>
56 #include <linux/lguest_launcher.h>
57 #include <linux/virtio_console.h>
60 #include <asm/lguest.h>
61 #include <asm/paravirt.h>
62 #include <asm/param.h>
64 #include <asm/pgtable.h>
66 #include <asm/setup.h>
71 #include <asm/stackprotector.h>
72 #include <asm/reboot.h> /* for struct machine_ops */
74 /*G:010 Welcome to the Guest!
76 * The Guest in our tale is a simple creature: identical to the Host but
77 * behaving in simplified but equivalent ways. In particular, the Guest is the
78 * same kernel as the Host (or at least, built from the same source code).
81 struct lguest_data lguest_data = {
82 .hcall_status = { [0 ... LHCALL_RING_SIZE-1] = 0xFF },
83 .noirq_start = (u32)lguest_noirq_start,
84 .noirq_end = (u32)lguest_noirq_end,
85 .kernel_address = PAGE_OFFSET,
86 .blocked_interrupts = { 1 }, /* Block timer interrupts */
87 .syscall_vec = SYSCALL_VECTOR,
91 * async_hcall() is pretty simple: I'm quite proud of it really. We have a
92 * ring buffer of stored hypercalls which the Host will run though next time we
93 * do a normal hypercall. Each entry in the ring has 5 slots for the hypercall
94 * arguments, and a "hcall_status" word which is 0 if the call is ready to go,
95 * and 255 once the Host has finished with it.
97 * If we come around to a slot which hasn't been finished, then the table is
98 * full and we just make the hypercall directly. This has the nice side
99 * effect of causing the Host to run all the stored calls in the ring buffer
100 * which empties it for next time!
102 static void async_hcall(unsigned long call, unsigned long arg1,
103 unsigned long arg2, unsigned long arg3,
106 /* Note: This code assumes we're uniprocessor. */
107 static unsigned int next_call;
111 * Disable interrupts if not already disabled: we don't want an
112 * interrupt handler making a hypercall while we're already doing
115 local_irq_save(flags);
116 if (lguest_data.hcall_status[next_call] != 0xFF) {
117 /* Table full, so do normal hcall which will flush table. */
118 hcall(call, arg1, arg2, arg3, arg4);
120 lguest_data.hcalls[next_call].arg0 = call;
121 lguest_data.hcalls[next_call].arg1 = arg1;
122 lguest_data.hcalls[next_call].arg2 = arg2;
123 lguest_data.hcalls[next_call].arg3 = arg3;
124 lguest_data.hcalls[next_call].arg4 = arg4;
125 /* Arguments must all be written before we mark it to go */
127 lguest_data.hcall_status[next_call] = 0;
128 if (++next_call == LHCALL_RING_SIZE)
131 local_irq_restore(flags);
135 * Notice the lazy_hcall() above, rather than hcall(). This is our first real
136 * optimization trick!
138 * When lazy_mode is set, it means we're allowed to defer all hypercalls and do
139 * them as a batch when lazy_mode is eventually turned off. Because hypercalls
140 * are reasonably expensive, batching them up makes sense. For example, a
141 * large munmap might update dozens of page table entries: that code calls
142 * paravirt_enter_lazy_mmu(), does the dozen updates, then calls
143 * lguest_leave_lazy_mode().
145 * So, when we're in lazy mode, we call async_hcall() to store the call for
148 static void lazy_hcall1(unsigned long call, unsigned long arg1)
150 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
151 hcall(call, arg1, 0, 0, 0);
153 async_hcall(call, arg1, 0, 0, 0);
156 /* You can imagine what lazy_hcall2, 3 and 4 look like. :*/
157 static void lazy_hcall2(unsigned long call,
161 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
162 hcall(call, arg1, arg2, 0, 0);
164 async_hcall(call, arg1, arg2, 0, 0);
167 static void lazy_hcall3(unsigned long call,
172 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
173 hcall(call, arg1, arg2, arg3, 0);
175 async_hcall(call, arg1, arg2, arg3, 0);
178 #ifdef CONFIG_X86_PAE
179 static void lazy_hcall4(unsigned long call,
185 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
186 hcall(call, arg1, arg2, arg3, arg4);
188 async_hcall(call, arg1, arg2, arg3, arg4);
193 * When lazy mode is turned off reset the per-cpu lazy mode variable and then
194 * issue the do-nothing hypercall to flush any stored calls.
196 static void lguest_leave_lazy_mmu_mode(void)
198 hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0, 0);
199 paravirt_leave_lazy_mmu();
202 static void lguest_end_context_switch(struct task_struct *next)
204 hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0, 0);
205 paravirt_end_context_switch(next);
209 * After that diversion we return to our first native-instruction
210 * replacements: four functions for interrupt control.
212 * The simplest way of implementing these would be to have "turn interrupts
213 * off" and "turn interrupts on" hypercalls. Unfortunately, this is too slow:
214 * these are by far the most commonly called functions of those we override.
216 * So instead we keep an "irq_enabled" field inside our "struct lguest_data",
217 * which the Guest can update with a single instruction. The Host knows to
218 * check there before it tries to deliver an interrupt.
222 * save_flags() is expected to return the processor state (ie. "flags"). The
223 * flags word contains all kind of stuff, but in practice Linux only cares
224 * about the interrupt flag. Our "save_flags()" just returns that.
226 static unsigned long save_fl(void)
228 return lguest_data.irq_enabled;
231 /* Interrupts go off... */
232 static void irq_disable(void)
234 lguest_data.irq_enabled = 0;
238 * Let's pause a moment. Remember how I said these are called so often?
239 * Jeremy Fitzhardinge optimized them so hard early in 2009 that he had to
240 * break some rules. In particular, these functions are assumed to save their
241 * own registers if they need to: normal C functions assume they can trash the
242 * eax register. To use normal C functions, we use
243 * PV_CALLEE_SAVE_REGS_THUNK(), which pushes %eax onto the stack, calls the
244 * C function, then restores it.
246 PV_CALLEE_SAVE_REGS_THUNK(save_fl);
247 PV_CALLEE_SAVE_REGS_THUNK(irq_disable);
250 /* These are in i386_head.S */
251 extern void lg_irq_enable(void);
252 extern void lg_restore_fl(unsigned long flags);
255 * We could be more efficient in our checking of outstanding interrupts, rather
256 * than using a branch. One way would be to put the "irq_enabled" field in a
257 * page by itself, and have the Host write-protect it when an interrupt comes
258 * in when irqs are disabled. There will then be a page fault as soon as
259 * interrupts are re-enabled.
261 * A better method is to implement soft interrupt disable generally for x86:
262 * instead of disabling interrupts, we set a flag. If an interrupt does come
263 * in, we then disable them for real. This is uncommon, so we could simply use
264 * a hypercall for interrupt control and not worry about efficiency.
268 * The Interrupt Descriptor Table (IDT).
270 * The IDT tells the processor what to do when an interrupt comes in. Each
271 * entry in the table is a 64-bit descriptor: this holds the privilege level,
272 * address of the handler, and... well, who cares? The Guest just asks the
273 * Host to make the change anyway, because the Host controls the real IDT.
275 static void lguest_write_idt_entry(gate_desc *dt,
276 int entrynum, const gate_desc *g)
279 * The gate_desc structure is 8 bytes long: we hand it to the Host in
280 * two 32-bit chunks. The whole 32-bit kernel used to hand descriptors
281 * around like this; typesafety wasn't a big concern in Linux's early
284 u32 *desc = (u32 *)g;
285 /* Keep the local copy up to date. */
286 native_write_idt_entry(dt, entrynum, g);
287 /* Tell Host about this new entry. */
288 hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1], 0);
292 * Changing to a different IDT is very rare: we keep the IDT up-to-date every
293 * time it is written, so we can simply loop through all entries and tell the
296 static void lguest_load_idt(const struct desc_ptr *desc)
299 struct desc_struct *idt = (void *)desc->address;
301 for (i = 0; i < (desc->size+1)/8; i++)
302 hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b, 0);
306 * The Global Descriptor Table.
308 * The Intel architecture defines another table, called the Global Descriptor
309 * Table (GDT). You tell the CPU where it is (and its size) using the "lgdt"
310 * instruction, and then several other instructions refer to entries in the
311 * table. There are three entries which the Switcher needs, so the Host simply
312 * controls the entire thing and the Guest asks it to make changes using the
313 * LOAD_GDT hypercall.
315 * This is the exactly like the IDT code.
317 static void lguest_load_gdt(const struct desc_ptr *desc)
320 struct desc_struct *gdt = (void *)desc->address;
322 for (i = 0; i < (desc->size+1)/8; i++)
323 hcall(LHCALL_LOAD_GDT_ENTRY, i, gdt[i].a, gdt[i].b, 0);
327 * For a single GDT entry which changes, we do the lazy thing: alter our GDT,
328 * then tell the Host to reload the entire thing. This operation is so rare
329 * that this naive implementation is reasonable.
331 static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
332 const void *desc, int type)
334 native_write_gdt_entry(dt, entrynum, desc, type);
335 /* Tell Host about this new entry. */
336 hcall(LHCALL_LOAD_GDT_ENTRY, entrynum,
337 dt[entrynum].a, dt[entrynum].b, 0);
341 * OK, I lied. There are three "thread local storage" GDT entries which change
342 * on every context switch (these three entries are how glibc implements
343 * __thread variables). So we have a hypercall specifically for this case.
345 static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
348 * There's one problem which normal hardware doesn't have: the Host
349 * can't handle us removing entries we're currently using. So we clear
350 * the GS register here: if it's needed it'll be reloaded anyway.
353 lazy_hcall2(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu);
357 * That's enough excitement for now, back to ploughing through each of the
358 * different pv_ops structures (we're about 1/3 of the way through).
360 * This is the Local Descriptor Table, another weird Intel thingy. Linux only
361 * uses this for some strange applications like Wine. We don't do anything
362 * here, so they'll get an informative and friendly Segmentation Fault.
364 static void lguest_set_ldt(const void *addr, unsigned entries)
369 * This loads a GDT entry into the "Task Register": that entry points to a
370 * structure called the Task State Segment. Some comments scattered though the
371 * kernel code indicate that this used for task switching in ages past, along
372 * with blood sacrifice and astrology.
374 * Now there's nothing interesting in here that we don't get told elsewhere.
375 * But the native version uses the "ltr" instruction, which makes the Host
376 * complain to the Guest about a Segmentation Fault and it'll oops. So we
377 * override the native version with a do-nothing version.
379 static void lguest_load_tr_desc(void)
384 * The "cpuid" instruction is a way of querying both the CPU identity
385 * (manufacturer, model, etc) and its features. It was introduced before the
386 * Pentium in 1993 and keeps getting extended by both Intel, AMD and others.
387 * As you might imagine, after a decade and a half this treatment, it is now a
388 * giant ball of hair. Its entry in the current Intel manual runs to 28 pages.
390 * This instruction even it has its own Wikipedia entry. The Wikipedia entry
391 * has been translated into 5 languages. I am not making this up!
393 * We could get funky here and identify ourselves as "GenuineLguest", but
394 * instead we just use the real "cpuid" instruction. Then I pretty much turned
395 * off feature bits until the Guest booted. (Don't say that: you'll damage
396 * lguest sales!) Shut up, inner voice! (Hey, just pointing out that this is
397 * hardly future proof.) Noone's listening! They don't like you anyway,
398 * parenthetic weirdo!
400 * Replacing the cpuid so we can turn features off is great for the kernel, but
401 * anyone (including userspace) can just use the raw "cpuid" instruction and
402 * the Host won't even notice since it isn't privileged. So we try not to get
403 * too worked up about it.
405 static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
406 unsigned int *cx, unsigned int *dx)
410 native_cpuid(ax, bx, cx, dx);
413 * CPUID 0 gives the highest legal CPUID number (and the ID string).
414 * We futureproof our code a little by sticking to known CPUID values.
422 * CPUID 1 is a basic feature request.
424 * CX: we only allow kernel to see SSE3, CMPXCHG16B and SSSE3
425 * DX: SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, TSC, FPU and PAE.
431 * The Host can do a nice optimization if it knows that the
432 * kernel mappings (addresses above 0xC0000000 or whatever
433 * PAGE_OFFSET is set to) haven't changed. But Linux calls
434 * flush_tlb_user() for both user and kernel mappings unless
435 * the Page Global Enable (PGE) feature bit is set.
439 * We also lie, and say we're family id 5. 6 or greater
440 * leads to a rdmsr in early_init_intel which we can't handle.
441 * Family ID is returned as bits 8-12 in ax.
447 * 0x80000000 returns the highest Extended Function, so we futureproof
448 * like we do above by limiting it to known fields.
451 if (*ax > 0x80000008)
456 * PAE systems can mark pages as non-executable. Linux calls this the
457 * NX bit. Intel calls it XD (eXecute Disable), AMD EVP (Enhanced
458 * Virus Protection). We just switch turn if off here, since we don't
468 * Intel has four control registers, imaginatively named cr0, cr2, cr3 and cr4.
469 * I assume there's a cr1, but it hasn't bothered us yet, so we'll not bother
470 * it. The Host needs to know when the Guest wants to change them, so we have
471 * a whole series of functions like read_cr0() and write_cr0().
473 * We start with cr0. cr0 allows you to turn on and off all kinds of basic
474 * features, but Linux only really cares about one: the horrifically-named Task
475 * Switched (TS) bit at bit 3 (ie. 8)
477 * What does the TS bit do? Well, it causes the CPU to trap (interrupt 7) if
478 * the floating point unit is used. Which allows us to restore FPU state
479 * lazily after a task switch, and Linux uses that gratefully, but wouldn't a
480 * name like "FPUTRAP bit" be a little less cryptic?
482 * We store cr0 locally because the Host never changes it. The Guest sometimes
483 * wants to read it and we'd prefer not to bother the Host unnecessarily.
485 static unsigned long current_cr0;
486 static void lguest_write_cr0(unsigned long val)
488 lazy_hcall1(LHCALL_TS, val & X86_CR0_TS);
492 static unsigned long lguest_read_cr0(void)
498 * Intel provided a special instruction to clear the TS bit for people too cool
499 * to use write_cr0() to do it. This "clts" instruction is faster, because all
500 * the vowels have been optimized out.
502 static void lguest_clts(void)
504 lazy_hcall1(LHCALL_TS, 0);
505 current_cr0 &= ~X86_CR0_TS;
509 * cr2 is the virtual address of the last page fault, which the Guest only ever
510 * reads. The Host kindly writes this into our "struct lguest_data", so we
511 * just read it out of there.
513 static unsigned long lguest_read_cr2(void)
515 return lguest_data.cr2;
518 /* See lguest_set_pte() below. */
519 static bool cr3_changed = false;
522 * cr3 is the current toplevel pagetable page: the principle is the same as
523 * cr0. Keep a local copy, and tell the Host when it changes. The only
524 * difference is that our local copy is in lguest_data because the Host needs
525 * to set it upon our initial hypercall.
527 static void lguest_write_cr3(unsigned long cr3)
529 lguest_data.pgdir = cr3;
530 lazy_hcall1(LHCALL_NEW_PGTABLE, cr3);
534 static unsigned long lguest_read_cr3(void)
536 return lguest_data.pgdir;
539 /* cr4 is used to enable and disable PGE, but we don't care. */
540 static unsigned long lguest_read_cr4(void)
545 static void lguest_write_cr4(unsigned long val)
550 * Page Table Handling.
552 * Now would be a good time to take a rest and grab a coffee or similarly
553 * relaxing stimulant. The easy parts are behind us, and the trek gradually
554 * winds uphill from here.
556 * Quick refresher: memory is divided into "pages" of 4096 bytes each. The CPU
557 * maps virtual addresses to physical addresses using "page tables". We could
558 * use one huge index of 1 million entries: each address is 4 bytes, so that's
559 * 1024 pages just to hold the page tables. But since most virtual addresses
560 * are unused, we use a two level index which saves space. The cr3 register
561 * contains the physical address of the top level "page directory" page, which
562 * contains physical addresses of up to 1024 second-level pages. Each of these
563 * second level pages contains up to 1024 physical addresses of actual pages,
564 * or Page Table Entries (PTEs).
566 * Here's a diagram, where arrows indicate physical addresses:
568 * cr3 ---> +---------+
569 * | --------->+---------+
571 * Mid-level | | PADDR2 |
578 * So to convert a virtual address to a physical address, we look up the top
579 * level, which points us to the second level, which gives us the physical
580 * address of that page. If the top level entry was not present, or the second
581 * level entry was not present, then the virtual address is invalid (we
582 * say "the page was not mapped").
584 * Put another way, a 32-bit virtual address is divided up like so:
586 * 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
587 * |<---- 10 bits ---->|<---- 10 bits ---->|<------ 12 bits ------>|
588 * Index into top Index into second Offset within page
589 * page directory page pagetable page
591 * Now, unfortunately, this isn't the whole story: Intel added Physical Address
592 * Extension (PAE) to allow 32 bit systems to use 64GB of memory (ie. 36 bits).
593 * These are held in 64-bit page table entries, so we can now only fit 512
594 * entries in a page, and the neat three-level tree breaks down.
596 * The result is a four level page table:
598 * cr3 --> [ 4 Upper ]
601 * [(PUD Page)]---> +---------+
602 * | --------->+---------+
604 * Mid-level | | PADDR2 |
612 * And the virtual address is decoded as:
614 * 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
615 * |<-2->|<--- 9 bits ---->|<---- 9 bits --->|<------ 12 bits ------>|
616 * Index into Index into mid Index into lower Offset within page
617 * top entries directory page pagetable page
619 * It's too hard to switch between these two formats at runtime, so Linux only
620 * supports one or the other depending on whether CONFIG_X86_PAE is set. Many
621 * distributions turn it on, and not just for people with silly amounts of
622 * memory: the larger PTE entries allow room for the NX bit, which lets the
623 * kernel disable execution of pages and increase security.
625 * This was a problem for lguest, which couldn't run on these distributions;
626 * then Matias Zabaljauregui figured it all out and implemented it, and only a
627 * handful of puppies were crushed in the process!
629 * Back to our point: the kernel spends a lot of time changing both the
630 * top-level page directory and lower-level pagetable pages. The Guest doesn't
631 * know physical addresses, so while it maintains these page tables exactly
632 * like normal, it also needs to keep the Host informed whenever it makes a
633 * change: the Host will create the real page tables based on the Guests'.
637 * The Guest calls this after it has set a second-level entry (pte), ie. to map
638 * a page into a process' address space. Wetell the Host the toplevel and
639 * address this corresponds to. The Guest uses one pagetable per process, so
640 * we need to tell the Host which one we're changing (mm->pgd).
642 static void lguest_pte_update(struct mm_struct *mm, unsigned long addr,
645 #ifdef CONFIG_X86_PAE
646 /* PAE needs to hand a 64 bit page table entry, so it uses two args. */
647 lazy_hcall4(LHCALL_SET_PTE, __pa(mm->pgd), addr,
648 ptep->pte_low, ptep->pte_high);
650 lazy_hcall3(LHCALL_SET_PTE, __pa(mm->pgd), addr, ptep->pte_low);
654 /* This is the "set and update" combo-meal-deal version. */
655 static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
656 pte_t *ptep, pte_t pteval)
658 native_set_pte(ptep, pteval);
659 lguest_pte_update(mm, addr, ptep);
663 * The Guest calls lguest_set_pud to set a top-level entry and lguest_set_pmd
664 * to set a middle-level entry when PAE is activated.
666 * Again, we set the entry then tell the Host which page we changed,
667 * and the index of the entry we changed.
669 #ifdef CONFIG_X86_PAE
670 static void lguest_set_pud(pud_t *pudp, pud_t pudval)
672 native_set_pud(pudp, pudval);
674 /* 32 bytes aligned pdpt address and the index. */
675 lazy_hcall2(LHCALL_SET_PGD, __pa(pudp) & 0xFFFFFFE0,
676 (__pa(pudp) & 0x1F) / sizeof(pud_t));
679 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
681 native_set_pmd(pmdp, pmdval);
682 lazy_hcall2(LHCALL_SET_PMD, __pa(pmdp) & PAGE_MASK,
683 (__pa(pmdp) & (PAGE_SIZE - 1)) / sizeof(pmd_t));
687 /* The Guest calls lguest_set_pmd to set a top-level entry when !PAE. */
688 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
690 native_set_pmd(pmdp, pmdval);
691 lazy_hcall2(LHCALL_SET_PGD, __pa(pmdp) & PAGE_MASK,
692 (__pa(pmdp) & (PAGE_SIZE - 1)) / sizeof(pmd_t));
697 * There are a couple of legacy places where the kernel sets a PTE, but we
698 * don't know the top level any more. This is useless for us, since we don't
699 * know which pagetable is changing or what address, so we just tell the Host
700 * to forget all of them. Fortunately, this is very rare.
702 * ... except in early boot when the kernel sets up the initial pagetables,
703 * which makes booting astonishingly slow: 1.83 seconds! So we don't even tell
704 * the Host anything changed until we've done the first page table switch,
705 * which brings boot back to 0.25 seconds.
707 static void lguest_set_pte(pte_t *ptep, pte_t pteval)
709 native_set_pte(ptep, pteval);
711 lazy_hcall1(LHCALL_FLUSH_TLB, 1);
714 #ifdef CONFIG_X86_PAE
716 * With 64-bit PTE values, we need to be careful setting them: if we set 32
717 * bits at a time, the hardware could see a weird half-set entry. These
718 * versions ensure we update all 64 bits at once.
720 static void lguest_set_pte_atomic(pte_t *ptep, pte_t pte)
722 native_set_pte_atomic(ptep, pte);
724 lazy_hcall1(LHCALL_FLUSH_TLB, 1);
727 static void lguest_pte_clear(struct mm_struct *mm, unsigned long addr,
730 native_pte_clear(mm, addr, ptep);
731 lguest_pte_update(mm, addr, ptep);
734 static void lguest_pmd_clear(pmd_t *pmdp)
736 lguest_set_pmd(pmdp, __pmd(0));
741 * Unfortunately for Lguest, the pv_mmu_ops for page tables were based on
742 * native page table operations. On native hardware you can set a new page
743 * table entry whenever you want, but if you want to remove one you have to do
744 * a TLB flush (a TLB is a little cache of page table entries kept by the CPU).
746 * So the lguest_set_pte_at() and lguest_set_pmd() functions above are only
747 * called when a valid entry is written, not when it's removed (ie. marked not
748 * present). Instead, this is where we come when the Guest wants to remove a
749 * page table entry: we tell the Host to set that entry to 0 (ie. the present
752 static void lguest_flush_tlb_single(unsigned long addr)
754 /* Simply set it to zero: if it was not, it will fault back in. */
755 lazy_hcall3(LHCALL_SET_PTE, lguest_data.pgdir, addr, 0);
759 * This is what happens after the Guest has removed a large number of entries.
760 * This tells the Host that any of the page table entries for userspace might
761 * have changed, ie. virtual addresses below PAGE_OFFSET.
763 static void lguest_flush_tlb_user(void)
765 lazy_hcall1(LHCALL_FLUSH_TLB, 0);
769 * This is called when the kernel page tables have changed. That's not very
770 * common (unless the Guest is using highmem, which makes the Guest extremely
771 * slow), so it's worth separating this from the user flushing above.
773 static void lguest_flush_tlb_kernel(void)
775 lazy_hcall1(LHCALL_FLUSH_TLB, 1);
779 * The Unadvanced Programmable Interrupt Controller.
781 * This is an attempt to implement the simplest possible interrupt controller.
782 * I spent some time looking though routines like set_irq_chip_and_handler,
783 * set_irq_chip_and_handler_name, set_irq_chip_data and set_phasers_to_stun and
784 * I *think* this is as simple as it gets.
786 * We can tell the Host what interrupts we want blocked ready for using the
787 * lguest_data.interrupts bitmap, so disabling (aka "masking") them is as
788 * simple as setting a bit. We don't actually "ack" interrupts as such, we
789 * just mask and unmask them. I wonder if we should be cleverer?
791 static void disable_lguest_irq(unsigned int irq)
793 set_bit(irq, lguest_data.blocked_interrupts);
796 static void enable_lguest_irq(unsigned int irq)
798 clear_bit(irq, lguest_data.blocked_interrupts);
801 /* This structure describes the lguest IRQ controller. */
802 static struct irq_chip lguest_irq_controller = {
804 .mask = disable_lguest_irq,
805 .mask_ack = disable_lguest_irq,
806 .unmask = enable_lguest_irq,
810 * This sets up the Interrupt Descriptor Table (IDT) entry for each hardware
811 * interrupt (except 128, which is used for system calls), and then tells the
812 * Linux infrastructure that each interrupt is controlled by our level-based
813 * lguest interrupt controller.
815 static void __init lguest_init_IRQ(void)
819 for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
820 /* Some systems map "vectors" to interrupts weirdly. Not us! */
821 __get_cpu_var(vector_irq)[i] = i - FIRST_EXTERNAL_VECTOR;
822 if (i != SYSCALL_VECTOR)
823 set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
827 * This call is required to set up for 4k stacks, where we have
828 * separate stacks for hard and soft interrupts.
830 irq_ctx_init(smp_processor_id());
834 * With CONFIG_SPARSE_IRQ, interrupt descriptors are allocated as-needed, so
835 * rather than set them in lguest_init_IRQ we are called here every time an
836 * lguest device needs an interrupt.
838 * FIXME: irq_to_desc_alloc_node() can fail due to lack of memory, we should
841 void lguest_setup_irq(unsigned int irq)
843 irq_to_desc_alloc_node(irq, 0);
844 set_irq_chip_and_handler_name(irq, &lguest_irq_controller,
845 handle_level_irq, "level");
851 * It would be far better for everyone if the Guest had its own clock, but
852 * until then the Host gives us the time on every interrupt.
854 static unsigned long lguest_get_wallclock(void)
856 return lguest_data.time.tv_sec;
860 * The TSC is an Intel thing called the Time Stamp Counter. The Host tells us
861 * what speed it runs at, or 0 if it's unusable as a reliable clock source.
862 * This matches what we want here: if we return 0 from this function, the x86
863 * TSC clock will give up and not register itself.
865 static unsigned long lguest_tsc_khz(void)
867 return lguest_data.tsc_khz;
871 * If we can't use the TSC, the kernel falls back to our lower-priority
872 * "lguest_clock", where we read the time value given to us by the Host.
874 static cycle_t lguest_clock_read(struct clocksource *cs)
876 unsigned long sec, nsec;
879 * Since the time is in two parts (seconds and nanoseconds), we risk
880 * reading it just as it's changing from 99 & 0.999999999 to 100 and 0,
881 * and getting 99 and 0. As Linux tends to come apart under the stress
882 * of time travel, we must be careful:
885 /* First we read the seconds part. */
886 sec = lguest_data.time.tv_sec;
888 * This read memory barrier tells the compiler and the CPU that
889 * this can't be reordered: we have to complete the above
893 /* Now we read the nanoseconds part. */
894 nsec = lguest_data.time.tv_nsec;
895 /* Make sure we've done that. */
897 /* Now if the seconds part has changed, try again. */
898 } while (unlikely(lguest_data.time.tv_sec != sec));
900 /* Our lguest clock is in real nanoseconds. */
901 return sec*1000000000ULL + nsec;
904 /* This is the fallback clocksource: lower priority than the TSC clocksource. */
905 static struct clocksource lguest_clock = {
908 .read = lguest_clock_read,
909 .mask = CLOCKSOURCE_MASK(64),
912 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
916 * We also need a "struct clock_event_device": Linux asks us to set it to go
917 * off some time in the future. Actually, James Morris figured all this out, I
918 * just applied the patch.
920 static int lguest_clockevent_set_next_event(unsigned long delta,
921 struct clock_event_device *evt)
923 /* FIXME: I don't think this can ever happen, but James tells me he had
924 * to put this code in. Maybe we should remove it now. Anyone? */
925 if (delta < LG_CLOCK_MIN_DELTA) {
926 if (printk_ratelimit())
927 printk(KERN_DEBUG "%s: small delta %lu ns\n",
932 /* Please wake us this far in the future. */
933 hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0, 0);
937 static void lguest_clockevent_set_mode(enum clock_event_mode mode,
938 struct clock_event_device *evt)
941 case CLOCK_EVT_MODE_UNUSED:
942 case CLOCK_EVT_MODE_SHUTDOWN:
943 /* A 0 argument shuts the clock down. */
944 hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0, 0);
946 case CLOCK_EVT_MODE_ONESHOT:
947 /* This is what we expect. */
949 case CLOCK_EVT_MODE_PERIODIC:
951 case CLOCK_EVT_MODE_RESUME:
956 /* This describes our primitive timer chip. */
957 static struct clock_event_device lguest_clockevent = {
959 .features = CLOCK_EVT_FEAT_ONESHOT,
960 .set_next_event = lguest_clockevent_set_next_event,
961 .set_mode = lguest_clockevent_set_mode,
965 .min_delta_ns = LG_CLOCK_MIN_DELTA,
966 .max_delta_ns = LG_CLOCK_MAX_DELTA,
970 * This is the Guest timer interrupt handler (hardware interrupt 0). We just
971 * call the clockevent infrastructure and it does whatever needs doing.
973 static void lguest_time_irq(unsigned int irq, struct irq_desc *desc)
977 /* Don't interrupt us while this is running. */
978 local_irq_save(flags);
979 lguest_clockevent.event_handler(&lguest_clockevent);
980 local_irq_restore(flags);
984 * At some point in the boot process, we get asked to set up our timing
985 * infrastructure. The kernel doesn't expect timer interrupts before this, but
986 * we cleverly initialized the "blocked_interrupts" field of "struct
987 * lguest_data" so that timer interrupts were blocked until now.
989 static void lguest_time_init(void)
991 /* Set up the timer interrupt (0) to go to our simple timer routine */
992 set_irq_handler(0, lguest_time_irq);
994 clocksource_register(&lguest_clock);
996 /* We can't set cpumask in the initializer: damn C limitations! Set it
997 * here and register our timer device. */
998 lguest_clockevent.cpumask = cpumask_of(0);
999 clockevents_register_device(&lguest_clockevent);
1001 /* Finally, we unblock the timer interrupt. */
1002 enable_lguest_irq(0);
1006 * Miscellaneous bits and pieces.
1008 * Here is an oddball collection of functions which the Guest needs for things
1009 * to work. They're pretty simple.
1013 * The Guest needs to tell the Host what stack it expects traps to use. For
1014 * native hardware, this is part of the Task State Segment mentioned above in
1015 * lguest_load_tr_desc(), but to help hypervisors there's this special call.
1017 * We tell the Host the segment we want to use (__KERNEL_DS is the kernel data
1018 * segment), the privilege level (we're privilege level 1, the Host is 0 and
1019 * will not tolerate us trying to use that), the stack pointer, and the number
1020 * of pages in the stack.
1022 static void lguest_load_sp0(struct tss_struct *tss,
1023 struct thread_struct *thread)
1025 lazy_hcall3(LHCALL_SET_STACK, __KERNEL_DS | 0x1, thread->sp0,
1026 THREAD_SIZE / PAGE_SIZE);
1029 /* Let's just say, I wouldn't do debugging under a Guest. */
1030 static void lguest_set_debugreg(int regno, unsigned long value)
1032 /* FIXME: Implement */
1036 * There are times when the kernel wants to make sure that no memory writes are
1037 * caught in the cache (that they've all reached real hardware devices). This
1038 * doesn't matter for the Guest which has virtual hardware.
1040 * On the Pentium 4 and above, cpuid() indicates that the Cache Line Flush
1041 * (clflush) instruction is available and the kernel uses that. Otherwise, it
1042 * uses the older "Write Back and Invalidate Cache" (wbinvd) instruction.
1043 * Unlike clflush, wbinvd can only be run at privilege level 0. So we can
1044 * ignore clflush, but replace wbinvd.
1046 static void lguest_wbinvd(void)
1051 * If the Guest expects to have an Advanced Programmable Interrupt Controller,
1052 * we play dumb by ignoring writes and returning 0 for reads. So it's no
1053 * longer Programmable nor Controlling anything, and I don't think 8 lines of
1054 * code qualifies for Advanced. It will also never interrupt anything. It
1055 * does, however, allow us to get through the Linux boot code.
1057 #ifdef CONFIG_X86_LOCAL_APIC
1058 static void lguest_apic_write(u32 reg, u32 v)
1062 static u32 lguest_apic_read(u32 reg)
1067 static u64 lguest_apic_icr_read(void)
1072 static void lguest_apic_icr_write(u32 low, u32 id)
1074 /* Warn to see if there's any stray references */
1078 static void lguest_apic_wait_icr_idle(void)
1083 static u32 lguest_apic_safe_wait_icr_idle(void)
1088 static void set_lguest_basic_apic_ops(void)
1090 apic->read = lguest_apic_read;
1091 apic->write = lguest_apic_write;
1092 apic->icr_read = lguest_apic_icr_read;
1093 apic->icr_write = lguest_apic_icr_write;
1094 apic->wait_icr_idle = lguest_apic_wait_icr_idle;
1095 apic->safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle;
1099 /* STOP! Until an interrupt comes in. */
1100 static void lguest_safe_halt(void)
1102 hcall(LHCALL_HALT, 0, 0, 0, 0);
1106 * The SHUTDOWN hypercall takes a string to describe what's happening, and
1107 * an argument which says whether this to restart (reboot) the Guest or not.
1109 * Note that the Host always prefers that the Guest speak in physical addresses
1110 * rather than virtual addresses, so we use __pa() here.
1112 static void lguest_power_off(void)
1114 hcall(LHCALL_SHUTDOWN, __pa("Power down"),
1115 LGUEST_SHUTDOWN_POWEROFF, 0, 0);
1121 * Don't. But if you did, this is what happens.
1123 static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
1125 hcall(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF, 0, 0);
1126 /* The hcall won't return, but to keep gcc happy, we're "done". */
1130 static struct notifier_block paniced = {
1131 .notifier_call = lguest_panic
1134 /* Setting up memory is fairly easy. */
1135 static __init char *lguest_memory_setup(void)
1138 *The Linux bootloader header contains an "e820" memory map: the
1139 * Launcher populated the first entry with our memory limit.
1141 e820_add_region(boot_params.e820_map[0].addr,
1142 boot_params.e820_map[0].size,
1143 boot_params.e820_map[0].type);
1145 /* This string is for the boot messages. */
1150 * We will eventually use the virtio console device to produce console output,
1151 * but before that is set up we use LHCALL_NOTIFY on normal memory to produce
1154 static __init int early_put_chars(u32 vtermno, const char *buf, int count)
1157 unsigned int len = count;
1159 /* We use a nul-terminated string, so we make a copy. Icky, huh? */
1160 if (len > sizeof(scratch) - 1)
1161 len = sizeof(scratch) - 1;
1162 scratch[len] = '\0';
1163 memcpy(scratch, buf, len);
1164 hcall(LHCALL_NOTIFY, __pa(scratch), 0, 0, 0);
1166 /* This routine returns the number of bytes actually written. */
1171 * Rebooting also tells the Host we're finished, but the RESTART flag tells the
1172 * Launcher to reboot us.
1174 static void lguest_restart(char *reason)
1176 hcall(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART, 0, 0);
1180 * Patching (Powerfully Placating Performance Pedants)
1182 * We have already seen that pv_ops structures let us replace simple native
1183 * instructions with calls to the appropriate back end all throughout the
1184 * kernel. This allows the same kernel to run as a Guest and as a native
1185 * kernel, but it's slow because of all the indirect branches.
1187 * Remember that David Wheeler quote about "Any problem in computer science can
1188 * be solved with another layer of indirection"? The rest of that quote is
1189 * "... But that usually will create another problem." This is the first of
1192 * Our current solution is to allow the paravirt back end to optionally patch
1193 * over the indirect calls to replace them with something more efficient. We
1194 * patch two of the simplest of the most commonly called functions: disable
1195 * interrupts and save interrupts. We usually have 6 or 10 bytes to patch
1196 * into: the Guest versions of these operations are small enough that we can
1199 * First we need assembly templates of each of the patchable Guest operations,
1200 * and these are in i386_head.S.
1203 /*G:060 We construct a table from the assembler templates: */
1204 static const struct lguest_insns
1206 const char *start, *end;
1207 } lguest_insns[] = {
1208 [PARAVIRT_PATCH(pv_irq_ops.irq_disable)] = { lgstart_cli, lgend_cli },
1209 [PARAVIRT_PATCH(pv_irq_ops.save_fl)] = { lgstart_pushf, lgend_pushf },
1213 * Now our patch routine is fairly simple (based on the native one in
1214 * paravirt.c). If we have a replacement, we copy it in and return how much of
1215 * the available space we used.
1217 static unsigned lguest_patch(u8 type, u16 clobber, void *ibuf,
1218 unsigned long addr, unsigned len)
1220 unsigned int insn_len;
1222 /* Don't do anything special if we don't have a replacement */
1223 if (type >= ARRAY_SIZE(lguest_insns) || !lguest_insns[type].start)
1224 return paravirt_patch_default(type, clobber, ibuf, addr, len);
1226 insn_len = lguest_insns[type].end - lguest_insns[type].start;
1228 /* Similarly if it can't fit (doesn't happen, but let's be thorough). */
1230 return paravirt_patch_default(type, clobber, ibuf, addr, len);
1232 /* Copy in our instructions. */
1233 memcpy(ibuf, lguest_insns[type].start, insn_len);
1238 * Once we get to lguest_init(), we know we're a Guest. The various
1239 * pv_ops structures in the kernel provide points for (almost) every routine we
1240 * have to override to avoid privileged instructions.
1242 __init void lguest_init(void)
1244 /* We're under lguest. */
1245 pv_info.name = "lguest";
1246 /* Paravirt is enabled. */
1247 pv_info.paravirt_enabled = 1;
1248 /* We're running at privilege level 1, not 0 as normal. */
1249 pv_info.kernel_rpl = 1;
1250 /* Everyone except Xen runs with this set. */
1251 pv_info.shared_kernel_pmd = 1;
1254 * We set up all the lguest overrides for sensitive operations. These
1255 * are detailed with the operations themselves.
1258 /* Interrupt-related operations */
1259 pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl);
1260 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl);
1261 pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable);
1262 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(lg_irq_enable);
1263 pv_irq_ops.safe_halt = lguest_safe_halt;
1265 /* Setup operations */
1266 pv_init_ops.patch = lguest_patch;
1268 /* Intercepts of various CPU instructions */
1269 pv_cpu_ops.load_gdt = lguest_load_gdt;
1270 pv_cpu_ops.cpuid = lguest_cpuid;
1271 pv_cpu_ops.load_idt = lguest_load_idt;
1272 pv_cpu_ops.iret = lguest_iret;
1273 pv_cpu_ops.load_sp0 = lguest_load_sp0;
1274 pv_cpu_ops.load_tr_desc = lguest_load_tr_desc;
1275 pv_cpu_ops.set_ldt = lguest_set_ldt;
1276 pv_cpu_ops.load_tls = lguest_load_tls;
1277 pv_cpu_ops.set_debugreg = lguest_set_debugreg;
1278 pv_cpu_ops.clts = lguest_clts;
1279 pv_cpu_ops.read_cr0 = lguest_read_cr0;
1280 pv_cpu_ops.write_cr0 = lguest_write_cr0;
1281 pv_cpu_ops.read_cr4 = lguest_read_cr4;
1282 pv_cpu_ops.write_cr4 = lguest_write_cr4;
1283 pv_cpu_ops.write_gdt_entry = lguest_write_gdt_entry;
1284 pv_cpu_ops.write_idt_entry = lguest_write_idt_entry;
1285 pv_cpu_ops.wbinvd = lguest_wbinvd;
1286 pv_cpu_ops.start_context_switch = paravirt_start_context_switch;
1287 pv_cpu_ops.end_context_switch = lguest_end_context_switch;
1289 /* Pagetable management */
1290 pv_mmu_ops.write_cr3 = lguest_write_cr3;
1291 pv_mmu_ops.flush_tlb_user = lguest_flush_tlb_user;
1292 pv_mmu_ops.flush_tlb_single = lguest_flush_tlb_single;
1293 pv_mmu_ops.flush_tlb_kernel = lguest_flush_tlb_kernel;
1294 pv_mmu_ops.set_pte = lguest_set_pte;
1295 pv_mmu_ops.set_pte_at = lguest_set_pte_at;
1296 pv_mmu_ops.set_pmd = lguest_set_pmd;
1297 #ifdef CONFIG_X86_PAE
1298 pv_mmu_ops.set_pte_atomic = lguest_set_pte_atomic;
1299 pv_mmu_ops.pte_clear = lguest_pte_clear;
1300 pv_mmu_ops.pmd_clear = lguest_pmd_clear;
1301 pv_mmu_ops.set_pud = lguest_set_pud;
1303 pv_mmu_ops.read_cr2 = lguest_read_cr2;
1304 pv_mmu_ops.read_cr3 = lguest_read_cr3;
1305 pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
1306 pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode;
1307 pv_mmu_ops.pte_update = lguest_pte_update;
1308 pv_mmu_ops.pte_update_defer = lguest_pte_update;
1310 #ifdef CONFIG_X86_LOCAL_APIC
1311 /* APIC read/write intercepts */
1312 set_lguest_basic_apic_ops();
1315 x86_init.resources.memory_setup = lguest_memory_setup;
1316 x86_init.irqs.intr_init = lguest_init_IRQ;
1317 x86_init.timers.timer_init = lguest_time_init;
1318 x86_platform.calibrate_tsc = lguest_tsc_khz;
1319 x86_platform.get_wallclock = lguest_get_wallclock;
1322 * Now is a good time to look at the implementations of these functions
1323 * before returning to the rest of lguest_init().
1327 * Now we've seen all the paravirt_ops, we return to
1328 * lguest_init() where the rest of the fairly chaotic boot setup
1333 * The stack protector is a weird thing where gcc places a canary
1334 * value on the stack and then checks it on return. This file is
1335 * compiled with -fno-stack-protector it, so we got this far without
1336 * problems. The value of the canary is kept at offset 20 from the
1337 * %gs register, so we need to set that up before calling C functions
1340 setup_stack_canary_segment(0);
1343 * We could just call load_stack_canary_segment(), but we might as well
1344 * call switch_to_new_gdt() which loads the whole table and sets up the
1345 * per-cpu segment descriptor register %fs as well.
1347 switch_to_new_gdt(0);
1349 /* We actually boot with all memory mapped, but let's say 128MB. */
1350 max_pfn_mapped = (128*1024*1024) >> PAGE_SHIFT;
1353 * The Host<->Guest Switcher lives at the top of our address space, and
1354 * the Host told us how big it is when we made LGUEST_INIT hypercall:
1355 * it put the answer in lguest_data.reserve_mem
1357 reserve_top_address(lguest_data.reserve_mem);
1360 * If we don't initialize the lock dependency checker now, it crashes
1361 * atomic_notifier_chain_register, then paravirt_disable_iospace.
1365 /* Hook in our special panic hypercall code. */
1366 atomic_notifier_chain_register(&panic_notifier_list, &paniced);
1369 * The IDE code spends about 3 seconds probing for disks: if we reserve
1370 * all the I/O ports up front it can't get them and so doesn't probe.
1371 * Other device drivers are similar (but less severe). This cuts the
1372 * kernel boot time on my machine from 4.1 seconds to 0.45 seconds.
1374 paravirt_disable_iospace();
1377 * This is messy CPU setup stuff which the native boot code does before
1378 * start_kernel, so we have to do, too:
1380 cpu_detect(&new_cpu_data);
1381 /* head.S usually sets up the first capability word, so do it here. */
1382 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1384 /* Math is always hard! */
1385 new_cpu_data.hard_math = 1;
1387 /* We don't have features. We have puppies! Puppies! */
1388 #ifdef CONFIG_X86_MCE
1397 * We set the preferred console to "hvc". This is the "hypervisor
1398 * virtual console" driver written by the PowerPC people, which we also
1399 * adapted for lguest's use.
1401 add_preferred_console("hvc", 0, NULL);
1403 /* Register our very early console. */
1404 virtio_cons_early_init(early_put_chars);
1407 * Last of all, we set the power management poweroff hook to point to
1408 * the Guest routine to power off, and the reboot hook to our restart
1411 pm_power_off = lguest_power_off;
1412 machine_ops.restart = lguest_restart;
1415 * Now we're set up, call i386_start_kernel() in head32.c and we proceed
1416 * to boot as normal. It never returns.
1418 i386_start_kernel();
1421 * This marks the end of stage II of our journey, The Guest.
1423 * It is now time for us to explore the layer of virtual drivers and complete
1424 * our understanding of the Guest in "make Drivers".