arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 unsigned int min_timer_period_us = 500;
  96 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  97
  98 bool kvm_has_tsc_control;
  99 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 100 u32  kvm_max_guest_tsc_khz;
 101 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (!(xcr0 & XSTATE_FP))
 558                 return 1;
 559         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 560                 return 1;
 561         if (xcr0 & ~host_xcr0)
 562                 return 1;
 563         vcpu->arch.xcr0 = xcr0;
 564         vcpu->guest_xcr0_loaded = 0;
 565         return 0;
 566 }
 567
 568 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 569 {
 570         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 571             __kvm_set_xcr(vcpu, index, xcr)) {
 572                 kvm_inject_gp(vcpu, 0);
 573                 return 1;
 574         }
 575         return 0;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 578
 579 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 580 {
 581         struct kvm_cpuid_entry2 *best;
 582
 583         if (!static_cpu_has(X86_FEATURE_XSAVE))
 584                 return 0;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 588 }
 589
 590 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 591 {
 592         struct kvm_cpuid_entry2 *best;
 593
 594         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 595         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 596 }
 597
 598 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 599 {
 600         struct kvm_cpuid_entry2 *best;
 601
 602         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 603         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 604 }
 605
 606 static void update_cpuid(struct kvm_vcpu *vcpu)
 607 {
 608         struct kvm_cpuid_entry2 *best;
 609         struct kvm_lapic *apic = vcpu->arch.apic;
 610
 611         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 612         if (!best)
 613                 return;
 614
 615         /* Update OSXSAVE bit */
 616         if (cpu_has_xsave && best->function == 0x1) {
 617                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 618                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 619                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 620         }
 621
 622         if (apic) {
 623                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 624                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 625                 else
 626                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 627         }
 628 }
 629
 630 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 631 {
 632         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 633         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 634                                    X86_CR4_PAE | X86_CR4_SMEP;
 635         if (cr4 & CR4_RESERVED_BITS)
 636                 return 1;
 637
 638         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 639                 return 1;
 640
 641         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 642                 return 1;
 643
 644         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 645                 return 1;
 646
 647         if (is_long_mode(vcpu)) {
 648                 if (!(cr4 & X86_CR4_PAE))
 649                         return 1;
 650         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 651                    && ((cr4 ^ old_cr4) & pdptr_bits)
 652                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 653                                    kvm_read_cr3(vcpu)))
 654                 return 1;
 655
 656         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 657                 return 1;
 658
 659         if ((cr4 ^ old_cr4) & pdptr_bits)
 660                 kvm_mmu_reset_context(vcpu);
 661
 662         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 663                 update_cpuid(vcpu);
 664
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 668
 669 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 670 {
 671         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 672                 kvm_mmu_sync_roots(vcpu);
 673                 kvm_mmu_flush_tlb(vcpu);
 674                 return 0;
 675         }
 676
 677         if (is_long_mode(vcpu)) {
 678                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 679                         return 1;
 680         } else {
 681                 if (is_pae(vcpu)) {
 682                         if (cr3 & CR3_PAE_RESERVED_BITS)
 683                                 return 1;
 684                         if (is_paging(vcpu) &&
 685                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 686                                 return 1;
 687                 }
 688                 /*
 689                  * We don't check reserved bits in nonpae mode, because
 690                  * this isn't enforced, and VMware depends on this.
 691                  */
 692         }
 693
 694         /*
 695          * Does the new cr3 value map to physical memory? (Note, we
 696          * catch an invalid cr3 even in real-mode, because it would
 697          * cause trouble later on when we turn on paging anyway.)
 698          *
 699          * A real CPU would silently accept an invalid cr3 and would
 700          * attempt to use it - with largely undefined (and often hard
 701          * to debug) behavior on the guest side.
 702          */
 703         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 704                 return 1;
 705         vcpu->arch.cr3 = cr3;
 706         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 707         vcpu->arch.mmu.new_cr3(vcpu);
 708         return 0;
 709 }
 710 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 711
 712 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 713 {
 714         if (cr8 & CR8_RESERVED_BITS)
 715                 return 1;
 716         if (irqchip_in_kernel(vcpu->kvm))
 717                 kvm_lapic_set_tpr(vcpu, cr8);
 718         else
 719                 vcpu->arch.cr8 = cr8;
 720         return 0;
 721 }
 722 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 723
 724 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 725 {
 726         if (irqchip_in_kernel(vcpu->kvm))
 727                 return kvm_lapic_get_cr8(vcpu);
 728         else
 729                 return vcpu->arch.cr8;
 730 }
 731 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 732
 733 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 734 {
 735         switch (dr) {
 736         case 0 ... 3:
 737                 vcpu->arch.db[dr] = val;
 738                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 739                         vcpu->arch.eff_db[dr] = val;
 740                 break;
 741         case 4:
 742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 743                         return 1; /* #UD */
 744                 /* fall through */
 745         case 6:
 746                 if (val & 0xffffffff00000000ULL)
 747                         return -1; /* #GP */
 748                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 749                 break;
 750         case 5:
 751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 752                         return 1; /* #UD */
 753                 /* fall through */
 754         default: /* 7 */
 755                 if (val & 0xffffffff00000000ULL)
 756                         return -1; /* #GP */
 757                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 758                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 759                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 760                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 761                 }
 762                 break;
 763         }
 764
 765         return 0;
 766 }
 767
 768 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 769 {
 770         int res;
 771
 772         res = __kvm_set_dr(vcpu, dr, val);
 773         if (res > 0)
 774                 kvm_queue_exception(vcpu, UD_VECTOR);
 775         else if (res < 0)
 776                 kvm_inject_gp(vcpu, 0);
 777
 778         return res;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_set_dr);
 781
 782 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         switch (dr) {
 785         case 0 ... 3:
 786                 *val = vcpu->arch.db[dr];
 787                 break;
 788         case 4:
 789                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 790                         return 1;
 791                 /* fall through */
 792         case 6:
 793                 *val = vcpu->arch.dr6;
 794                 break;
 795         case 5:
 796                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 797                         return 1;
 798                 /* fall through */
 799         default: /* 7 */
 800                 *val = vcpu->arch.dr7;
 801                 break;
 802         }
 803
 804         return 0;
 805 }
 806
 807 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 808 {
 809         if (_kvm_get_dr(vcpu, dr, val)) {
 810                 kvm_queue_exception(vcpu, UD_VECTOR);
 811                 return 1;
 812         }
 813         return 0;
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_get_dr);
 816
 817 /*
 818  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 819  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 820  *
 821  * This list is modified at module load time to reflect the
 822  * capabilities of the host cpu. This capabilities test skips MSRs that are
 823  * kvm-specific. Those are put in the beginning of the list.
 824  */
 825
 826 #define KVM_SAVE_MSRS_BEGIN     9
 827 static u32 msrs_to_save[] = {
 828         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 829         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 830         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 831         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 832         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 833         MSR_STAR,
 834 #ifdef CONFIG_X86_64
 835         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 836 #endif
 837         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 838 };
 839
 840 static unsigned num_msrs_to_save;
 841
 842 static u32 emulated_msrs[] = {
 843         MSR_IA32_TSCDEADLINE,
 844         MSR_IA32_MISC_ENABLE,
 845         MSR_IA32_MCG_STATUS,
 846         MSR_IA32_MCG_CTL,
 847 };
 848
 849 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 850 {
 851         u64 old_efer = vcpu->arch.efer;
 852
 853         if (efer & efer_reserved_bits)
 854                 return 1;
 855
 856         if (is_paging(vcpu)
 857             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 858                 return 1;
 859
 860         if (efer & EFER_FFXSR) {
 861                 struct kvm_cpuid_entry2 *feat;
 862
 863                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 864                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 865                         return 1;
 866         }
 867
 868         if (efer & EFER_SVME) {
 869                 struct kvm_cpuid_entry2 *feat;
 870
 871                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 872                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 873                         return 1;
 874         }
 875
 876         efer &= ~EFER_LMA;
 877         efer |= vcpu->arch.efer & EFER_LMA;
 878
 879         kvm_x86_ops->set_efer(vcpu, efer);
 880
 881         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 882
 883         /* Update reserved bits */
 884         if ((efer ^ old_efer) & EFER_NX)
 885                 kvm_mmu_reset_context(vcpu);
 886
 887         return 0;
 888 }
 889
 890 void kvm_enable_efer_bits(u64 mask)
 891 {
 892        efer_reserved_bits &= ~mask;
 893 }
 894 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 895
 896 /*
 897  * Writes msr value into into the appropriate "register".
 898  * Returns 0 on success, non-0 otherwise.
 899  * Assumes vcpu_load() was already called.
 900  */
 901 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 902 {
 903         switch (msr_index) {
 904         case MSR_FS_BASE:
 905         case MSR_GS_BASE:
 906         case MSR_KERNEL_GS_BASE:
 907         case MSR_CSTAR:
 908         case MSR_LSTAR:
 909                 if (is_noncanonical_address(data))
 910                         return 1;
 911                 break;
 912         case MSR_IA32_SYSENTER_EIP:
 913         case MSR_IA32_SYSENTER_ESP:
 914                 /*
 915                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
 916                  * non-canonical address is written on Intel but not on
 917                  * AMD (which ignores the top 32-bits, because it does
 918                  * not implement 64-bit SYSENTER).
 919                  *
 920                  * 64-bit code should hence be able to write a non-canonical
 921                  * value on AMD.  Making the address canonical ensures that
 922                  * vmentry does not fail on Intel after writing a non-canonical
 923                  * value, and that something deterministic happens if the guest
 924                  * invokes 64-bit SYSENTER.
 925                  */
 926                 data = get_canonical(data);
 927         }
 928         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 929 }
 930 EXPORT_SYMBOL_GPL(kvm_set_msr);
 931
 932 /*
 933  * Adapt set_msr() to msr_io()'s calling convention
 934  */
 935 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 936 {
 937         return kvm_set_msr(vcpu, index, *data);
 938 }
 939
 940 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 941 {
 942         int version;
 943         int r;
 944         struct pvclock_wall_clock wc;
 945         struct timespec boot;
 946
 947         if (!wall_clock)
 948                 return;
 949
 950         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 951         if (r)
 952                 return;
 953
 954         if (version & 1)
 955                 ++version;  /* first time write, random junk */
 956
 957         ++version;
 958
 959         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 960
 961         /*
 962          * The guest calculates current wall clock time by adding
 963          * system time (updated by kvm_guest_time_update below) to the
 964          * wall clock specified here.  guest system time equals host
 965          * system time for us, thus we must fill in host boot time here.
 966          */
 967         getboottime(&boot);
 968
 969         wc.sec = boot.tv_sec;
 970         wc.nsec = boot.tv_nsec;
 971         wc.version = version;
 972
 973         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 974
 975         version++;
 976         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 977 }
 978
 979 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 980 {
 981         uint32_t quotient, remainder;
 982
 983         /* Don't try to replace with do_div(), this one calculates
 984          * "(dividend << 32) / divisor" */
 985         __asm__ ( "divl %4"
 986                   : "=a" (quotient), "=d" (remainder)
 987                   : "0" (0), "1" (dividend), "r" (divisor) );
 988         return quotient;
 989 }
 990
 991 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 992                                s8 *pshift, u32 *pmultiplier)
 993 {
 994         uint64_t scaled64;
 995         int32_t  shift = 0;
 996         uint64_t tps64;
 997         uint32_t tps32;
 998
 999         tps64 = base_khz * 1000LL;
1000         scaled64 = scaled_khz * 1000LL;
1001         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1002                 tps64 >>= 1;
1003                 shift--;
1004         }
1005
1006         tps32 = (uint32_t)tps64;
1007         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1008                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1009                         scaled64 >>= 1;
1010                 else
1011                         tps32 <<= 1;
1012                 shift++;
1013         }
1014
1015         *pshift = shift;
1016         *pmultiplier = div_frac(scaled64, tps32);
1017
1018         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1019                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1020 }
1021
1022 static inline u64 get_kernel_ns(void)
1023 {
1024         struct timespec ts;
1025
1026         WARN_ON(preemptible());
1027         ktime_get_ts(&ts);
1028         monotonic_to_bootbased(&ts);
1029         return timespec_to_ns(&ts);
1030 }
1031
1032 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1033 unsigned long max_tsc_khz;
1034
1035 static inline int kvm_tsc_changes_freq(void)
1036 {
1037         int cpu = get_cpu();
1038         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1039                   cpufreq_quick_get(cpu) != 0;
1040         put_cpu();
1041         return ret;
1042 }
1043
1044 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1045 {
1046         if (vcpu->arch.virtual_tsc_khz)
1047                 return vcpu->arch.virtual_tsc_khz;
1048         else
1049                 return __this_cpu_read(cpu_tsc_khz);
1050 }
1051
1052 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1053 {
1054         u64 ret;
1055
1056         WARN_ON(preemptible());
1057         if (kvm_tsc_changes_freq())
1058                 printk_once(KERN_WARNING
1059                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1060         ret = nsec * vcpu_tsc_khz(vcpu);
1061         do_div(ret, USEC_PER_SEC);
1062         return ret;
1063 }
1064
1065 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1066 {
1067         /* Compute a scale to convert nanoseconds in TSC cycles */
1068         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1069                            &vcpu->arch.tsc_catchup_shift,
1070                            &vcpu->arch.tsc_catchup_mult);
1071 }
1072
1073 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1074 {
1075         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1076                                       vcpu->arch.tsc_catchup_mult,
1077                                       vcpu->arch.tsc_catchup_shift);
1078         tsc += vcpu->arch.last_tsc_write;
1079         return tsc;
1080 }
1081
1082 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1083 {
1084         struct kvm *kvm = vcpu->kvm;
1085         u64 offset, ns, elapsed;
1086         unsigned long flags;
1087         s64 sdiff;
1088
1089         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1090         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1091         ns = get_kernel_ns();
1092         elapsed = ns - kvm->arch.last_tsc_nsec;
1093         sdiff = data - kvm->arch.last_tsc_write;
1094         if (sdiff < 0)
1095                 sdiff = -sdiff;
1096
1097         /*
1098          * Special case: close write to TSC within 5 seconds of
1099          * another CPU is interpreted as an attempt to synchronize
1100          * The 5 seconds is to accommodate host load / swapping as
1101          * well as any reset of TSC during the boot process.
1102          *
1103          * In that case, for a reliable TSC, we can match TSC offsets,
1104          * or make a best guest using elapsed value.
1105          */
1106         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1107             elapsed < 5ULL * NSEC_PER_SEC) {
1108                 if (!check_tsc_unstable()) {
1109                         offset = kvm->arch.last_tsc_offset;
1110                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1111                 } else {
1112                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1113                         offset += delta;
1114                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1115                 }
1116                 ns = kvm->arch.last_tsc_nsec;
1117         }
1118         kvm->arch.last_tsc_nsec = ns;
1119         kvm->arch.last_tsc_write = data;
1120         kvm->arch.last_tsc_offset = offset;
1121         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1122         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1123
1124         /* Reset of TSC must disable overshoot protection below */
1125         vcpu->arch.hv_clock.tsc_timestamp = 0;
1126         vcpu->arch.last_tsc_write = data;
1127         vcpu->arch.last_tsc_nsec = ns;
1128 }
1129 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1130
1131 static int kvm_guest_time_update(struct kvm_vcpu *v)
1132 {
1133         unsigned long flags;
1134         struct kvm_vcpu_arch *vcpu = &v->arch;
1135         unsigned long this_tsc_khz;
1136         s64 kernel_ns, max_kernel_ns;
1137         u64 tsc_timestamp;
1138
1139         /* Keep irq disabled to prevent changes to the clock */
1140         local_irq_save(flags);
1141         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1142         kernel_ns = get_kernel_ns();
1143         this_tsc_khz = vcpu_tsc_khz(v);
1144         if (unlikely(this_tsc_khz == 0)) {
1145                 local_irq_restore(flags);
1146                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1147                 return 1;
1148         }
1149
1150         /*
1151          * We may have to catch up the TSC to match elapsed wall clock
1152          * time for two reasons, even if kvmclock is used.
1153          *   1) CPU could have been running below the maximum TSC rate
1154          *   2) Broken TSC compensation resets the base at each VCPU
1155          *      entry to avoid unknown leaps of TSC even when running
1156          *      again on the same CPU.  This may cause apparent elapsed
1157          *      time to disappear, and the guest to stand still or run
1158          *      very slowly.
1159          */
1160         if (vcpu->tsc_catchup) {
1161                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1162                 if (tsc > tsc_timestamp) {
1163                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1164                         tsc_timestamp = tsc;
1165                 }
1166         }
1167
1168         local_irq_restore(flags);
1169
1170         if (!vcpu->pv_time_enabled)
1171                 return 0;
1172
1173         /*
1174          * Time as measured by the TSC may go backwards when resetting the base
1175          * tsc_timestamp.  The reason for this is that the TSC resolution is
1176          * higher than the resolution of the other clock scales.  Thus, many
1177          * possible measurments of the TSC correspond to one measurement of any
1178          * other clock, and so a spread of values is possible.  This is not a
1179          * problem for the computation of the nanosecond clock; with TSC rates
1180          * around 1GHZ, there can only be a few cycles which correspond to one
1181          * nanosecond value, and any path through this code will inevitably
1182          * take longer than that.  However, with the kernel_ns value itself,
1183          * the precision may be much lower, down to HZ granularity.  If the
1184          * first sampling of TSC against kernel_ns ends in the low part of the
1185          * range, and the second in the high end of the range, we can get:
1186          *
1187          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1188          *
1189          * As the sampling errors potentially range in the thousands of cycles,
1190          * it is possible such a time value has already been observed by the
1191          * guest.  To protect against this, we must compute the system time as
1192          * observed by the guest and ensure the new system time is greater.
1193          */
1194         max_kernel_ns = 0;
1195         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1196                 max_kernel_ns = vcpu->last_guest_tsc -
1197                                 vcpu->hv_clock.tsc_timestamp;
1198                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1199                                     vcpu->hv_clock.tsc_to_system_mul,
1200                                     vcpu->hv_clock.tsc_shift);
1201                 max_kernel_ns += vcpu->last_kernel_ns;
1202         }
1203
1204         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1205                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1206                                    &vcpu->hv_clock.tsc_shift,
1207                                    &vcpu->hv_clock.tsc_to_system_mul);
1208                 vcpu->hw_tsc_khz = this_tsc_khz;
1209         }
1210
1211         if (max_kernel_ns > kernel_ns)
1212                 kernel_ns = max_kernel_ns;
1213
1214         /* With all the info we got, fill in the values */
1215         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1216         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1217         vcpu->last_kernel_ns = kernel_ns;
1218         vcpu->last_guest_tsc = tsc_timestamp;
1219         vcpu->hv_clock.flags = 0;
1220
1221         /*
1222          * The interface expects us to write an even number signaling that the
1223          * update is finished. Since the guest won't see the intermediate
1224          * state, we just increase by 2 at the end.
1225          */
1226         vcpu->hv_clock.version += 2;
1227
1228         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1229                                 &vcpu->hv_clock,
1230                                 sizeof(vcpu->hv_clock));
1231         return 0;
1232 }
1233
1234 static bool msr_mtrr_valid(unsigned msr)
1235 {
1236         switch (msr) {
1237         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1238         case MSR_MTRRfix64K_00000:
1239         case MSR_MTRRfix16K_80000:
1240         case MSR_MTRRfix16K_A0000:
1241         case MSR_MTRRfix4K_C0000:
1242         case MSR_MTRRfix4K_C8000:
1243         case MSR_MTRRfix4K_D0000:
1244         case MSR_MTRRfix4K_D8000:
1245         case MSR_MTRRfix4K_E0000:
1246         case MSR_MTRRfix4K_E8000:
1247         case MSR_MTRRfix4K_F0000:
1248         case MSR_MTRRfix4K_F8000:
1249         case MSR_MTRRdefType:
1250         case MSR_IA32_CR_PAT:
1251                 return true;
1252         case 0x2f8:
1253                 return true;
1254         }
1255         return false;
1256 }
1257
1258 static bool valid_pat_type(unsigned t)
1259 {
1260         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1261 }
1262
1263 static bool valid_mtrr_type(unsigned t)
1264 {
1265         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1266 }
1267
1268 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1269 {
1270         int i;
1271
1272         if (!msr_mtrr_valid(msr))
1273                 return false;
1274
1275         if (msr == MSR_IA32_CR_PAT) {
1276                 for (i = 0; i < 8; i++)
1277                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1278                                 return false;
1279                 return true;
1280         } else if (msr == MSR_MTRRdefType) {
1281                 if (data & ~0xcff)
1282                         return false;
1283                 return valid_mtrr_type(data & 0xff);
1284         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1285                 for (i = 0; i < 8 ; i++)
1286                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1287                                 return false;
1288                 return true;
1289         }
1290
1291         /* variable MTRRs */
1292         return valid_mtrr_type(data & 0xff);
1293 }
1294
1295 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1296 {
1297         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1298
1299         if (!mtrr_valid(vcpu, msr, data))
1300                 return 1;
1301
1302         if (msr == MSR_MTRRdefType) {
1303                 vcpu->arch.mtrr_state.def_type = data;
1304                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1305         } else if (msr == MSR_MTRRfix64K_00000)
1306                 p[0] = data;
1307         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1308                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1309         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1310                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1311         else if (msr == MSR_IA32_CR_PAT)
1312                 vcpu->arch.pat = data;
1313         else {  /* Variable MTRRs */
1314                 int idx, is_mtrr_mask;
1315                 u64 *pt;
1316
1317                 idx = (msr - 0x200) / 2;
1318                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1319                 if (!is_mtrr_mask)
1320                         pt =
1321                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1322                 else
1323                         pt =
1324                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1325                 *pt = data;
1326         }
1327
1328         kvm_mmu_reset_context(vcpu);
1329         return 0;
1330 }
1331
1332 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1333 {
1334         u64 mcg_cap = vcpu->arch.mcg_cap;
1335         unsigned bank_num = mcg_cap & 0xff;
1336
1337         switch (msr) {
1338         case MSR_IA32_MCG_STATUS:
1339                 vcpu->arch.mcg_status = data;
1340                 break;
1341         case MSR_IA32_MCG_CTL:
1342                 if (!(mcg_cap & MCG_CTL_P))
1343                         return 1;
1344                 if (data != 0 && data != ~(u64)0)
1345                         return -1;
1346                 vcpu->arch.mcg_ctl = data;
1347                 break;
1348         default:
1349                 if (msr >= MSR_IA32_MC0_CTL &&
1350                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1351                         u32 offset = msr - MSR_IA32_MC0_CTL;
1352                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1353                          * some Linux kernels though clear bit 10 in bank 4 to
1354                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1355                          * this to avoid an uncatched #GP in the guest
1356                          */
1357                         if ((offset & 0x3) == 0 &&
1358                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1359                                 return -1;
1360                         vcpu->arch.mce_banks[offset] = data;
1361                         break;
1362                 }
1363                 return 1;
1364         }
1365         return 0;
1366 }
1367
1368 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1369 {
1370         struct kvm *kvm = vcpu->kvm;
1371         int lm = is_long_mode(vcpu);
1372         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1373                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1374         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1375                 : kvm->arch.xen_hvm_config.blob_size_32;
1376         u32 page_num = data & ~PAGE_MASK;
1377         u64 page_addr = data & PAGE_MASK;
1378         u8 *page;
1379         int r;
1380
1381         r = -E2BIG;
1382         if (page_num >= blob_size)
1383                 goto out;
1384         r = -ENOMEM;
1385         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1386         if (!page)
1387                 goto out;
1388         r = -EFAULT;
1389         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1390                 goto out_free;
1391         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1392                 goto out_free;
1393         r = 0;
1394 out_free:
1395         kfree(page);
1396 out:
1397         return r;
1398 }
1399
1400 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1401 {
1402         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1403 }
1404
1405 static bool kvm_hv_msr_partition_wide(u32 msr)
1406 {
1407         bool r = false;
1408         switch (msr) {
1409         case HV_X64_MSR_GUEST_OS_ID:
1410         case HV_X64_MSR_HYPERCALL:
1411                 r = true;
1412                 break;
1413         }
1414
1415         return r;
1416 }
1417
1418 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1419 {
1420         struct kvm *kvm = vcpu->kvm;
1421
1422         switch (msr) {
1423         case HV_X64_MSR_GUEST_OS_ID:
1424                 kvm->arch.hv_guest_os_id = data;
1425                 /* setting guest os id to zero disables hypercall page */
1426                 if (!kvm->arch.hv_guest_os_id)
1427                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1428                 break;
1429         case HV_X64_MSR_HYPERCALL: {
1430                 u64 gfn;
1431                 unsigned long addr;
1432                 u8 instructions[4];
1433
1434                 /* if guest os id is not set hypercall should remain disabled */
1435                 if (!kvm->arch.hv_guest_os_id)
1436                         break;
1437                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1438                         kvm->arch.hv_hypercall = data;
1439                         break;
1440                 }
1441                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1442                 addr = gfn_to_hva(kvm, gfn);
1443                 if (kvm_is_error_hva(addr))
1444                         return 1;
1445                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1446                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1447                 if (__copy_to_user((void __user *)addr, instructions, 4))
1448                         return 1;
1449                 kvm->arch.hv_hypercall = data;
1450                 break;
1451         }
1452         default:
1453                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1454                           "data 0x%llx\n", msr, data);
1455                 return 1;
1456         }
1457         return 0;
1458 }
1459
1460 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1461 {
1462         switch (msr) {
1463         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1464                 unsigned long addr;
1465
1466                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1467                         vcpu->arch.hv_vapic = data;
1468                         break;
1469                 }
1470                 addr = gfn_to_hva(vcpu->kvm, data >>
1471                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1472                 if (kvm_is_error_hva(addr))
1473                         return 1;
1474                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1475                         return 1;
1476                 vcpu->arch.hv_vapic = data;
1477                 break;
1478         }
1479         case HV_X64_MSR_EOI:
1480                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1481         case HV_X64_MSR_ICR:
1482                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1483         case HV_X64_MSR_TPR:
1484                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1485         default:
1486                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1487                           "data 0x%llx\n", msr, data);
1488                 return 1;
1489         }
1490
1491         return 0;
1492 }
1493
1494 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1495 {
1496         gpa_t gpa = data & ~0x3f;
1497
1498         /* Bits 2:5 are resrved, Should be zero */
1499         if (data & 0x3c)
1500                 return 1;
1501
1502         vcpu->arch.apf.msr_val = data;
1503
1504         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1505                 kvm_clear_async_pf_completion_queue(vcpu);
1506                 kvm_async_pf_hash_reset(vcpu);
1507                 return 0;
1508         }
1509
1510         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1511                                         sizeof(u32)))
1512                 return 1;
1513
1514         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1515         kvm_async_pf_wakeup_all(vcpu);
1516         return 0;
1517 }
1518
1519 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1520 {
1521         vcpu->arch.pv_time_enabled = false;
1522 }
1523
1524 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1525 {
1526         u64 delta;
1527
1528         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1529                 return;
1530
1531         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1532         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1533         vcpu->arch.st.accum_steal = delta;
1534 }
1535
1536 static void record_steal_time(struct kvm_vcpu *vcpu)
1537 {
1538         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1539                 return;
1540
1541         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1542                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1543                 return;
1544
1545         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1546         vcpu->arch.st.steal.version += 2;
1547         vcpu->arch.st.accum_steal = 0;
1548
1549         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1550                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1551 }
1552
1553 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1554 {
1555         switch (msr) {
1556         case MSR_EFER:
1557                 return set_efer(vcpu, data);
1558         case MSR_K7_HWCR:
1559                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1560                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1561                 if (data != 0) {
1562                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1563                                 data);
1564                         return 1;
1565                 }
1566                 break;
1567         case MSR_FAM10H_MMIO_CONF_BASE:
1568                 if (data != 0) {
1569                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1570                                 "0x%llx\n", data);
1571                         return 1;
1572                 }
1573                 break;
1574         case MSR_AMD64_NB_CFG:
1575                 break;
1576         case MSR_IA32_DEBUGCTLMSR:
1577                 if (!data) {
1578                         /* We support the non-activated case already */
1579                         break;
1580                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1581                         /* Values other than LBR and BTF are vendor-specific,
1582                            thus reserved and should throw a #GP */
1583                         return 1;
1584                 }
1585                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1586                         __func__, data);
1587                 break;
1588         case MSR_IA32_UCODE_REV:
1589         case MSR_IA32_UCODE_WRITE:
1590         case MSR_VM_HSAVE_PA:
1591         case MSR_AMD64_PATCH_LOADER:
1592                 break;
1593         case 0x200 ... 0x2ff:
1594                 return set_msr_mtrr(vcpu, msr, data);
1595         case MSR_IA32_APICBASE:
1596                 kvm_set_apic_base(vcpu, data);
1597                 break;
1598         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1599                 return kvm_x2apic_msr_write(vcpu, msr, data);
1600         case MSR_IA32_TSCDEADLINE:
1601                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1602                 break;
1603         case MSR_IA32_MISC_ENABLE:
1604                 vcpu->arch.ia32_misc_enable_msr = data;
1605                 break;
1606         case MSR_KVM_WALL_CLOCK_NEW:
1607         case MSR_KVM_WALL_CLOCK:
1608                 vcpu->kvm->arch.wall_clock = data;
1609                 kvm_write_wall_clock(vcpu->kvm, data);
1610                 break;
1611         case MSR_KVM_SYSTEM_TIME_NEW:
1612         case MSR_KVM_SYSTEM_TIME: {
1613                 u64 gpa_offset;
1614                 kvmclock_reset(vcpu);
1615
1616                 vcpu->arch.time = data;
1617                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1618
1619                 /* we verify if the enable bit is set... */
1620                 if (!(data & 1))
1621                         break;
1622
1623                 gpa_offset = data & ~(PAGE_MASK | 1);
1624
1625                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1626                      &vcpu->arch.pv_time, data & ~1ULL,
1627                      sizeof(struct pvclock_vcpu_time_info)))
1628                         vcpu->arch.pv_time_enabled = false;
1629                 else
1630                         vcpu->arch.pv_time_enabled = true;
1631                 break;
1632         }
1633         case MSR_KVM_ASYNC_PF_EN:
1634                 if (kvm_pv_enable_async_pf(vcpu, data))
1635                         return 1;
1636                 break;
1637         case MSR_KVM_STEAL_TIME:
1638
1639                 if (unlikely(!sched_info_on()))
1640                         return 1;
1641
1642                 if (data & KVM_STEAL_RESERVED_MASK)
1643                         return 1;
1644
1645                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1646                                                 data & KVM_STEAL_VALID_BITS,
1647                                                 sizeof(struct kvm_steal_time)))
1648                         return 1;
1649
1650                 vcpu->arch.st.msr_val = data;
1651
1652                 if (!(data & KVM_MSR_ENABLED))
1653                         break;
1654
1655                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1656
1657                 preempt_disable();
1658                 accumulate_steal_time(vcpu);
1659                 preempt_enable();
1660
1661                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1662
1663                 break;
1664
1665         case MSR_IA32_MCG_CTL:
1666         case MSR_IA32_MCG_STATUS:
1667         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1668                 return set_msr_mce(vcpu, msr, data);
1669
1670         /* Performance counters are not protected by a CPUID bit,
1671          * so we should check all of them in the generic path for the sake of
1672          * cross vendor migration.
1673          * Writing a zero into the event select MSRs disables them,
1674          * which we perfectly emulate ;-). Any other value should be at least
1675          * reported, some guests depend on them.
1676          */
1677         case MSR_P6_EVNTSEL0:
1678         case MSR_P6_EVNTSEL1:
1679         case MSR_K7_EVNTSEL0:
1680         case MSR_K7_EVNTSEL1:
1681         case MSR_K7_EVNTSEL2:
1682         case MSR_K7_EVNTSEL3:
1683                 if (data != 0)
1684                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1685                                 "0x%x data 0x%llx\n", msr, data);
1686                 break;
1687         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1688          * so we ignore writes to make it happy.
1689          */
1690         case MSR_P6_PERFCTR0:
1691         case MSR_P6_PERFCTR1:
1692         case MSR_K7_PERFCTR0:
1693         case MSR_K7_PERFCTR1:
1694         case MSR_K7_PERFCTR2:
1695         case MSR_K7_PERFCTR3:
1696                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1697                         "0x%x data 0x%llx\n", msr, data);
1698                 break;
1699         case MSR_K7_CLK_CTL:
1700                 /*
1701                  * Ignore all writes to this no longer documented MSR.
1702                  * Writes are only relevant for old K7 processors,
1703                  * all pre-dating SVM, but a recommended workaround from
1704                  * AMD for these chips. It is possible to speicify the
1705                  * affected processor models on the command line, hence
1706                  * the need to ignore the workaround.
1707                  */
1708                 break;
1709         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1710                 if (kvm_hv_msr_partition_wide(msr)) {
1711                         int r;
1712                         mutex_lock(&vcpu->kvm->lock);
1713                         r = set_msr_hyperv_pw(vcpu, msr, data);
1714                         mutex_unlock(&vcpu->kvm->lock);
1715                         return r;
1716                 } else
1717                         return set_msr_hyperv(vcpu, msr, data);
1718                 break;
1719         case MSR_IA32_BBL_CR_CTL3:
1720                 /* Drop writes to this legacy MSR -- see rdmsr
1721                  * counterpart for further detail.
1722                  */
1723                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1724                 break;
1725         default:
1726                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1727                         return xen_hvm_config(vcpu, data);
1728                 if (!ignore_msrs) {
1729                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1730                                 msr, data);
1731                         return 1;
1732                 } else {
1733                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1734                                 msr, data);
1735                         break;
1736                 }
1737         }
1738         return 0;
1739 }
1740 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1741
1742
1743 /*
1744  * Reads an msr value (of 'msr_index') into 'pdata'.
1745  * Returns 0 on success, non-0 otherwise.
1746  * Assumes vcpu_load() was already called.
1747  */
1748 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1749 {
1750         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1751 }
1752
1753 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1754 {
1755         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1756
1757         if (!msr_mtrr_valid(msr))
1758                 return 1;
1759
1760         if (msr == MSR_MTRRdefType)
1761                 *pdata = vcpu->arch.mtrr_state.def_type +
1762                          (vcpu->arch.mtrr_state.enabled << 10);
1763         else if (msr == MSR_MTRRfix64K_00000)
1764                 *pdata = p[0];
1765         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1766                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1767         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1768                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1769         else if (msr == MSR_IA32_CR_PAT)
1770                 *pdata = vcpu->arch.pat;
1771         else {  /* Variable MTRRs */
1772                 int idx, is_mtrr_mask;
1773                 u64 *pt;
1774
1775                 idx = (msr - 0x200) / 2;
1776                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1777                 if (!is_mtrr_mask)
1778                         pt =
1779                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1780                 else
1781                         pt =
1782                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1783                 *pdata = *pt;
1784         }
1785
1786         return 0;
1787 }
1788
1789 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1790 {
1791         u64 data;
1792         u64 mcg_cap = vcpu->arch.mcg_cap;
1793         unsigned bank_num = mcg_cap & 0xff;
1794
1795         switch (msr) {
1796         case MSR_IA32_P5_MC_ADDR:
1797         case MSR_IA32_P5_MC_TYPE:
1798                 data = 0;
1799                 break;
1800         case MSR_IA32_MCG_CAP:
1801                 data = vcpu->arch.mcg_cap;
1802                 break;
1803         case MSR_IA32_MCG_CTL:
1804                 if (!(mcg_cap & MCG_CTL_P))
1805                         return 1;
1806                 data = vcpu->arch.mcg_ctl;
1807                 break;
1808         case MSR_IA32_MCG_STATUS:
1809                 data = vcpu->arch.mcg_status;
1810                 break;
1811         default:
1812                 if (msr >= MSR_IA32_MC0_CTL &&
1813                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1814                         u32 offset = msr - MSR_IA32_MC0_CTL;
1815                         data = vcpu->arch.mce_banks[offset];
1816                         break;
1817                 }
1818                 return 1;
1819         }
1820         *pdata = data;
1821         return 0;
1822 }
1823
1824 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1825 {
1826         u64 data = 0;
1827         struct kvm *kvm = vcpu->kvm;
1828
1829         switch (msr) {
1830         case HV_X64_MSR_GUEST_OS_ID:
1831                 data = kvm->arch.hv_guest_os_id;
1832                 break;
1833         case HV_X64_MSR_HYPERCALL:
1834                 data = kvm->arch.hv_hypercall;
1835                 break;
1836         default:
1837                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1838                 return 1;
1839         }
1840
1841         *pdata = data;
1842         return 0;
1843 }
1844
1845 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1846 {
1847         u64 data = 0;
1848
1849         switch (msr) {
1850         case HV_X64_MSR_VP_INDEX: {
1851                 int r;
1852                 struct kvm_vcpu *v;
1853                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1854                         if (v == vcpu)
1855                                 data = r;
1856                 break;
1857         }
1858         case HV_X64_MSR_EOI:
1859                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1860         case HV_X64_MSR_ICR:
1861                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1862         case HV_X64_MSR_TPR:
1863                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1864         case HV_X64_MSR_APIC_ASSIST_PAGE:
1865                 data = vcpu->arch.hv_vapic;
1866                 break;
1867         default:
1868                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1869                 return 1;
1870         }
1871         *pdata = data;
1872         return 0;
1873 }
1874
1875 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1876 {
1877         u64 data;
1878
1879         switch (msr) {
1880         case MSR_IA32_PLATFORM_ID:
1881         case MSR_IA32_EBL_CR_POWERON:
1882         case MSR_IA32_DEBUGCTLMSR:
1883         case MSR_IA32_LASTBRANCHFROMIP:
1884         case MSR_IA32_LASTBRANCHTOIP:
1885         case MSR_IA32_LASTINTFROMIP:
1886         case MSR_IA32_LASTINTTOIP:
1887         case MSR_K8_SYSCFG:
1888         case MSR_K7_HWCR:
1889         case MSR_VM_HSAVE_PA:
1890         case MSR_P6_PERFCTR0:
1891         case MSR_P6_PERFCTR1:
1892         case MSR_P6_EVNTSEL0:
1893         case MSR_P6_EVNTSEL1:
1894         case MSR_K7_EVNTSEL0:
1895         case MSR_K7_PERFCTR0:
1896         case MSR_K8_INT_PENDING_MSG:
1897         case MSR_AMD64_NB_CFG:
1898         case MSR_FAM10H_MMIO_CONF_BASE:
1899                 data = 0;
1900                 break;
1901         case MSR_IA32_UCODE_REV:
1902                 data = 0x100000000ULL;
1903                 break;
1904         case MSR_MTRRcap:
1905                 data = 0x500 | KVM_NR_VAR_MTRR;
1906                 break;
1907         case 0x200 ... 0x2ff:
1908                 return get_msr_mtrr(vcpu, msr, pdata);
1909         case 0xcd: /* fsb frequency */
1910                 data = 3;
1911                 break;
1912                 /*
1913                  * MSR_EBC_FREQUENCY_ID
1914                  * Conservative value valid for even the basic CPU models.
1915                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1916                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1917                  * and 266MHz for model 3, or 4. Set Core Clock
1918                  * Frequency to System Bus Frequency Ratio to 1 (bits
1919                  * 31:24) even though these are only valid for CPU
1920                  * models > 2, however guests may end up dividing or
1921                  * multiplying by zero otherwise.
1922                  */
1923         case MSR_EBC_FREQUENCY_ID:
1924                 data = 1 << 24;
1925                 break;
1926         case MSR_IA32_APICBASE:
1927                 data = kvm_get_apic_base(vcpu);
1928                 break;
1929         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1930                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1931                 break;
1932         case MSR_IA32_TSCDEADLINE:
1933                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1934                 break;
1935         case MSR_IA32_MISC_ENABLE:
1936                 data = vcpu->arch.ia32_misc_enable_msr;
1937                 break;
1938         case MSR_IA32_PERF_STATUS:
1939                 /* TSC increment by tick */
1940                 data = 1000ULL;
1941                 /* CPU multiplier */
1942                 data |= (((uint64_t)4ULL) << 40);
1943                 break;
1944         case MSR_EFER:
1945                 data = vcpu->arch.efer;
1946                 break;
1947         case MSR_KVM_WALL_CLOCK:
1948         case MSR_KVM_WALL_CLOCK_NEW:
1949                 data = vcpu->kvm->arch.wall_clock;
1950                 break;
1951         case MSR_KVM_SYSTEM_TIME:
1952         case MSR_KVM_SYSTEM_TIME_NEW:
1953                 data = vcpu->arch.time;
1954                 break;
1955         case MSR_KVM_ASYNC_PF_EN:
1956                 data = vcpu->arch.apf.msr_val;
1957                 break;
1958         case MSR_KVM_STEAL_TIME:
1959                 data = vcpu->arch.st.msr_val;
1960                 break;
1961         case MSR_IA32_P5_MC_ADDR:
1962         case MSR_IA32_P5_MC_TYPE:
1963         case MSR_IA32_MCG_CAP:
1964         case MSR_IA32_MCG_CTL:
1965         case MSR_IA32_MCG_STATUS:
1966         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1967                 return get_msr_mce(vcpu, msr, pdata);
1968         case MSR_K7_CLK_CTL:
1969                 /*
1970                  * Provide expected ramp-up count for K7. All other
1971                  * are set to zero, indicating minimum divisors for
1972                  * every field.
1973                  *
1974                  * This prevents guest kernels on AMD host with CPU
1975                  * type 6, model 8 and higher from exploding due to
1976                  * the rdmsr failing.
1977                  */
1978                 data = 0x20000000;
1979                 break;
1980         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1981                 if (kvm_hv_msr_partition_wide(msr)) {
1982                         int r;
1983                         mutex_lock(&vcpu->kvm->lock);
1984                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1985                         mutex_unlock(&vcpu->kvm->lock);
1986                         return r;
1987                 } else
1988                         return get_msr_hyperv(vcpu, msr, pdata);
1989                 break;
1990         case MSR_IA32_BBL_CR_CTL3:
1991                 /* This legacy MSR exists but isn't fully documented in current
1992                  * silicon.  It is however accessed by winxp in very narrow
1993                  * scenarios where it sets bit #19, itself documented as
1994                  * a "reserved" bit.  Best effort attempt to source coherent
1995                  * read data here should the balance of the register be
1996                  * interpreted by the guest:
1997                  *
1998                  * L2 cache control register 3: 64GB range, 256KB size,
1999                  * enabled, latency 0x1, configured
2000                  */
2001                 data = 0xbe702111;
2002                 break;
2003         default:
2004                 if (!ignore_msrs) {
2005                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2006                         return 1;
2007                 } else {
2008                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2009                         data = 0;
2010                 }
2011                 break;
2012         }
2013         *pdata = data;
2014         return 0;
2015 }
2016 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2017
2018 /*
2019  * Read or write a bunch of msrs. All parameters are kernel addresses.
2020  *
2021  * @return number of msrs set successfully.
2022  */
2023 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2024                     struct kvm_msr_entry *entries,
2025                     int (*do_msr)(struct kvm_vcpu *vcpu,
2026                                   unsigned index, u64 *data))
2027 {
2028         int i, idx;
2029
2030         idx = srcu_read_lock(&vcpu->kvm->srcu);
2031         for (i = 0; i < msrs->nmsrs; ++i)
2032                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2033                         break;
2034         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2035
2036         return i;
2037 }
2038
2039 /*
2040  * Read or write a bunch of msrs. Parameters are user addresses.
2041  *
2042  * @return number of msrs set successfully.
2043  */
2044 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2045                   int (*do_msr)(struct kvm_vcpu *vcpu,
2046                                 unsigned index, u64 *data),
2047                   int writeback)
2048 {
2049         struct kvm_msrs msrs;
2050         struct kvm_msr_entry *entries;
2051         int r, n;
2052         unsigned size;
2053
2054         r = -EFAULT;
2055         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2056                 goto out;
2057
2058         r = -E2BIG;
2059         if (msrs.nmsrs >= MAX_IO_MSRS)
2060                 goto out;
2061
2062         r = -ENOMEM;
2063         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2064         entries = kmalloc(size, GFP_KERNEL);
2065         if (!entries)
2066                 goto out;
2067
2068         r = -EFAULT;
2069         if (copy_from_user(entries, user_msrs->entries, size))
2070                 goto out_free;
2071
2072         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2073         if (r < 0)
2074                 goto out_free;
2075
2076         r = -EFAULT;
2077         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2078                 goto out_free;
2079
2080         r = n;
2081
2082 out_free:
2083         kfree(entries);
2084 out:
2085         return r;
2086 }
2087
2088 int kvm_dev_ioctl_check_extension(long ext)
2089 {
2090         int r;
2091
2092         switch (ext) {
2093         case KVM_CAP_IRQCHIP:
2094         case KVM_CAP_HLT:
2095         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2096         case KVM_CAP_SET_TSS_ADDR:
2097         case KVM_CAP_EXT_CPUID:
2098         case KVM_CAP_CLOCKSOURCE:
2099         case KVM_CAP_PIT:
2100         case KVM_CAP_NOP_IO_DELAY:
2101         case KVM_CAP_MP_STATE:
2102         case KVM_CAP_SYNC_MMU:
2103         case KVM_CAP_USER_NMI:
2104         case KVM_CAP_REINJECT_CONTROL:
2105         case KVM_CAP_IRQ_INJECT_STATUS:
2106         case KVM_CAP_ASSIGN_DEV_IRQ:
2107         case KVM_CAP_IRQFD:
2108         case KVM_CAP_IOEVENTFD:
2109         case KVM_CAP_PIT2:
2110         case KVM_CAP_PIT_STATE2:
2111         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2112         case KVM_CAP_XEN_HVM:
2113         case KVM_CAP_ADJUST_CLOCK:
2114         case KVM_CAP_VCPU_EVENTS:
2115         case KVM_CAP_HYPERV:
2116         case KVM_CAP_HYPERV_VAPIC:
2117         case KVM_CAP_HYPERV_SPIN:
2118         case KVM_CAP_PCI_SEGMENT:
2119         case KVM_CAP_DEBUGREGS:
2120         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2121         case KVM_CAP_XSAVE:
2122         case KVM_CAP_ASYNC_PF:
2123         case KVM_CAP_GET_TSC_KHZ:
2124                 r = 1;
2125                 break;
2126         case KVM_CAP_COALESCED_MMIO:
2127                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2128                 break;
2129         case KVM_CAP_VAPIC:
2130                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2131                 break;
2132         case KVM_CAP_NR_VCPUS:
2133                 r = KVM_SOFT_MAX_VCPUS;
2134                 break;
2135         case KVM_CAP_MAX_VCPUS:
2136                 r = KVM_MAX_VCPUS;
2137                 break;
2138         case KVM_CAP_NR_MEMSLOTS:
2139                 r = KVM_MEMORY_SLOTS;
2140                 break;
2141         case KVM_CAP_PV_MMU:    /* obsolete */
2142                 r = 0;
2143                 break;
2144         case KVM_CAP_IOMMU:
2145                 r = iommu_present(&pci_bus_type);
2146                 break;
2147         case KVM_CAP_MCE:
2148                 r = KVM_MAX_MCE_BANKS;
2149                 break;
2150         case KVM_CAP_XCRS:
2151                 r = cpu_has_xsave;
2152                 break;
2153         case KVM_CAP_TSC_CONTROL:
2154                 r = kvm_has_tsc_control;
2155                 break;
2156         case KVM_CAP_TSC_DEADLINE_TIMER:
2157                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2158                 break;
2159         default:
2160                 r = 0;
2161                 break;
2162         }
2163         return r;
2164
2165 }
2166
2167 long kvm_arch_dev_ioctl(struct file *filp,
2168                         unsigned int ioctl, unsigned long arg)
2169 {
2170         void __user *argp = (void __user *)arg;
2171         long r;
2172
2173         switch (ioctl) {
2174         case KVM_GET_MSR_INDEX_LIST: {
2175                 struct kvm_msr_list __user *user_msr_list = argp;
2176                 struct kvm_msr_list msr_list;
2177                 unsigned n;
2178
2179                 r = -EFAULT;
2180                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2181                         goto out;
2182                 n = msr_list.nmsrs;
2183                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2184                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2185                         goto out;
2186                 r = -E2BIG;
2187                 if (n < msr_list.nmsrs)
2188                         goto out;
2189                 r = -EFAULT;
2190                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2191                                  num_msrs_to_save * sizeof(u32)))
2192                         goto out;
2193                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2194                                  &emulated_msrs,
2195                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2196                         goto out;
2197                 r = 0;
2198                 break;
2199         }
2200         case KVM_GET_SUPPORTED_CPUID: {
2201                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2202                 struct kvm_cpuid2 cpuid;
2203
2204                 r = -EFAULT;
2205                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2206                         goto out;
2207                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2208                                                       cpuid_arg->entries);
2209                 if (r)
2210                         goto out;
2211
2212                 r = -EFAULT;
2213                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2214                         goto out;
2215                 r = 0;
2216                 break;
2217         }
2218         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2219                 u64 mce_cap;
2220
2221                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2222                 r = -EFAULT;
2223                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2224                         goto out;
2225                 r = 0;
2226                 break;
2227         }
2228         default:
2229                 r = -EINVAL;
2230         }
2231 out:
2232         return r;
2233 }
2234
2235 static void wbinvd_ipi(void *garbage)
2236 {
2237         wbinvd();
2238 }
2239
2240 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2241 {
2242         return vcpu->kvm->arch.iommu_domain &&
2243                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2244 }
2245
2246 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2247 {
2248         /* Address WBINVD may be executed by guest */
2249         if (need_emulate_wbinvd(vcpu)) {
2250                 if (kvm_x86_ops->has_wbinvd_exit())
2251                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2252                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2253                         smp_call_function_single(vcpu->cpu,
2254                                         wbinvd_ipi, NULL, 1);
2255         }
2256
2257         kvm_x86_ops->vcpu_load(vcpu, cpu);
2258         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2259                 /* Make sure TSC doesn't go backwards */
2260                 s64 tsc_delta;
2261                 u64 tsc;
2262
2263                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2264                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2265                              tsc - vcpu->arch.last_guest_tsc;
2266
2267                 if (tsc_delta < 0)
2268                         mark_tsc_unstable("KVM discovered backwards TSC");
2269                 if (check_tsc_unstable()) {
2270                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2271                         vcpu->arch.tsc_catchup = 1;
2272                 }
2273                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2274                 if (vcpu->cpu != cpu)
2275                         kvm_migrate_timers(vcpu);
2276                 vcpu->cpu = cpu;
2277         }
2278
2279         accumulate_steal_time(vcpu);
2280         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2281 }
2282
2283 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2284 {
2285         kvm_x86_ops->vcpu_put(vcpu);
2286         kvm_put_guest_fpu(vcpu);
2287         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2288 }
2289
2290 static int is_efer_nx(void)
2291 {
2292         unsigned long long efer = 0;
2293
2294         rdmsrl_safe(MSR_EFER, &efer);
2295         return efer & EFER_NX;
2296 }
2297
2298 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2299 {
2300         int i;
2301         struct kvm_cpuid_entry2 *e, *entry;
2302
2303         entry = NULL;
2304         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2305                 e = &vcpu->arch.cpuid_entries[i];
2306                 if (e->function == 0x80000001) {
2307                         entry = e;
2308                         break;
2309                 }
2310         }
2311         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2312                 entry->edx &= ~(1 << 20);
2313                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2314         }
2315 }
2316
2317 /* when an old userspace process fills a new kernel module */
2318 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2319                                     struct kvm_cpuid *cpuid,
2320                                     struct kvm_cpuid_entry __user *entries)
2321 {
2322         int r, i;
2323         struct kvm_cpuid_entry *cpuid_entries;
2324
2325         r = -E2BIG;
2326         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2327                 goto out;
2328         r = -ENOMEM;
2329         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2330         if (!cpuid_entries)
2331                 goto out;
2332         r = -EFAULT;
2333         if (copy_from_user(cpuid_entries, entries,
2334                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2335                 goto out_free;
2336         for (i = 0; i < cpuid->nent; i++) {
2337                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2338                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2339                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2340                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2341                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2342                 vcpu->arch.cpuid_entries[i].index = 0;
2343                 vcpu->arch.cpuid_entries[i].flags = 0;
2344                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2345                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2346                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2347         }
2348         vcpu->arch.cpuid_nent = cpuid->nent;
2349         cpuid_fix_nx_cap(vcpu);
2350         r = 0;
2351         kvm_apic_set_version(vcpu);
2352         kvm_x86_ops->cpuid_update(vcpu);
2353         update_cpuid(vcpu);
2354
2355 out_free:
2356         vfree(cpuid_entries);
2357 out:
2358         return r;
2359 }
2360
2361 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2362                                      struct kvm_cpuid2 *cpuid,
2363                                      struct kvm_cpuid_entry2 __user *entries)
2364 {
2365         int r;
2366
2367         r = -E2BIG;
2368         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2369                 goto out;
2370         r = -EFAULT;
2371         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2372                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2373                 goto out;
2374         vcpu->arch.cpuid_nent = cpuid->nent;
2375         kvm_apic_set_version(vcpu);
2376         kvm_x86_ops->cpuid_update(vcpu);
2377         update_cpuid(vcpu);
2378         return 0;
2379
2380 out:
2381         return r;
2382 }
2383
2384 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2385                                      struct kvm_cpuid2 *cpuid,
2386                                      struct kvm_cpuid_entry2 __user *entries)
2387 {
2388         int r;
2389
2390         r = -E2BIG;
2391         if (cpuid->nent < vcpu->arch.cpuid_nent)
2392                 goto out;
2393         r = -EFAULT;
2394         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2395                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2396                 goto out;
2397         return 0;
2398
2399 out:
2400         cpuid->nent = vcpu->arch.cpuid_nent;
2401         return r;
2402 }
2403
2404 static void cpuid_mask(u32 *word, int wordnum)
2405 {
2406         *word &= boot_cpu_data.x86_capability[wordnum];
2407 }
2408
2409 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2410                            u32 index)
2411 {
2412         entry->function = function;
2413         entry->index = index;
2414         cpuid_count(entry->function, entry->index,
2415                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2416         entry->flags = 0;
2417 }
2418
2419 static bool supported_xcr0_bit(unsigned bit)
2420 {
2421         u64 mask = ((u64)1 << bit);
2422
2423         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2424 }
2425
2426 #define F(x) bit(X86_FEATURE_##x)
2427
2428 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2429                          u32 index, int *nent, int maxnent)
2430 {
2431         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2432 #ifdef CONFIG_X86_64
2433         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2434                                 ? F(GBPAGES) : 0;
2435         unsigned f_lm = F(LM);
2436 #else
2437         unsigned f_gbpages = 0;
2438         unsigned f_lm = 0;
2439 #endif
2440         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2441
2442         /* cpuid 1.edx */
2443         const u32 kvm_supported_word0_x86_features =
2444                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2445                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2446                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2447                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2448                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2449                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2450                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2451                 0 /* HTT, TM, Reserved, PBE */;
2452         /* cpuid 0x80000001.edx */
2453         const u32 kvm_supported_word1_x86_features =
2454                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2455                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2456                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2457                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2458                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2459                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2460                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2461                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2462         /* cpuid 1.ecx */
2463         const u32 kvm_supported_word4_x86_features =
2464                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2465                 0 /* DS-CPL, VMX, SMX, EST */ |
2466                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2467                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2468                 0 /* Reserved, DCA */ | F(XMM4_1) |
2469                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2470                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2471                 F(F16C) | F(RDRAND);
2472         /* cpuid 0x80000001.ecx */
2473         const u32 kvm_supported_word6_x86_features =
2474                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2475                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2476                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2477                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2478
2479         /* cpuid 0xC0000001.edx */
2480         const u32 kvm_supported_word5_x86_features =
2481                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2482                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2483                 F(PMM) | F(PMM_EN);
2484
2485         /* cpuid 7.0.ebx */
2486         const u32 kvm_supported_word9_x86_features =
2487                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2488
2489         /* all calls to cpuid_count() should be made on the same cpu */
2490         get_cpu();
2491         do_cpuid_1_ent(entry, function, index);
2492         ++*nent;
2493
2494         switch (function) {
2495         case 0:
2496                 entry->eax = min(entry->eax, (u32)0xd);
2497                 break;
2498         case 1:
2499                 entry->edx &= kvm_supported_word0_x86_features;
2500                 cpuid_mask(&entry->edx, 0);
2501                 entry->ecx &= kvm_supported_word4_x86_features;
2502                 cpuid_mask(&entry->ecx, 4);
2503                 /* we support x2apic emulation even if host does not support
2504                  * it since we emulate x2apic in software */
2505                 entry->ecx |= F(X2APIC);
2506                 break;
2507         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2508          * may return different values. This forces us to get_cpu() before
2509          * issuing the first command, and also to emulate this annoying behavior
2510          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2511         case 2: {
2512                 int t, times = entry->eax & 0xff;
2513
2514                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2515                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2516                 for (t = 1; t < times && *nent < maxnent; ++t) {
2517                         do_cpuid_1_ent(&entry[t], function, 0);
2518                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2519                         ++*nent;
2520                 }
2521                 break;
2522         }
2523         /* function 4 has additional index. */
2524         case 4: {
2525                 int i, cache_type;
2526
2527                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2528                 /* read more entries until cache_type is zero */
2529                 for (i = 1; *nent < maxnent; ++i) {
2530                         cache_type = entry[i - 1].eax & 0x1f;
2531                         if (!cache_type)
2532                                 break;
2533                         do_cpuid_1_ent(&entry[i], function, i);
2534                         entry[i].flags |=
2535                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2536                         ++*nent;
2537                 }
2538                 break;
2539         }
2540         case 7: {
2541                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2542                 /* Mask ebx against host capbability word 9 */
2543                 if (index == 0) {
2544                         entry->ebx &= kvm_supported_word9_x86_features;
2545                         cpuid_mask(&entry->ebx, 9);
2546                 } else
2547                         entry->ebx = 0;
2548                 entry->eax = 0;
2549                 entry->ecx = 0;
2550                 entry->edx = 0;
2551                 break;
2552         }
2553         case 9:
2554                 break;
2555         /* function 0xb has additional index. */
2556         case 0xb: {
2557                 int i, level_type;
2558
2559                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2560                 /* read more entries until level_type is zero */
2561                 for (i = 1; *nent < maxnent; ++i) {
2562                         level_type = entry[i - 1].ecx & 0xff00;
2563                         if (!level_type)
2564                                 break;
2565                         do_cpuid_1_ent(&entry[i], function, i);
2566                         entry[i].flags |=
2567                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2568                         ++*nent;
2569                 }
2570                 break;
2571         }
2572         case 0xd: {
2573                 int idx, i;
2574
2575                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2576                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2577                         do_cpuid_1_ent(&entry[i], function, idx);
2578                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2579                                 continue;
2580                         entry[i].flags |=
2581                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2582                         ++*nent;
2583                         ++i;
2584                 }
2585                 break;
2586         }
2587         case KVM_CPUID_SIGNATURE: {
2588                 char signature[12] = "KVMKVMKVM\0\0";
2589                 u32 *sigptr = (u32 *)signature;
2590                 entry->eax = 0;
2591                 entry->ebx = sigptr[0];
2592                 entry->ecx = sigptr[1];
2593                 entry->edx = sigptr[2];
2594                 break;
2595         }
2596         case KVM_CPUID_FEATURES:
2597                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2598                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2599                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2600                              (1 << KVM_FEATURE_ASYNC_PF) |
2601                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2602
2603                 if (sched_info_on())
2604                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2605
2606                 entry->ebx = 0;
2607                 entry->ecx = 0;
2608                 entry->edx = 0;
2609                 break;
2610         case 0x80000000:
2611                 entry->eax = min(entry->eax, 0x8000001a);
2612                 break;
2613         case 0x80000001:
2614                 entry->edx &= kvm_supported_word1_x86_features;
2615                 cpuid_mask(&entry->edx, 1);
2616                 entry->ecx &= kvm_supported_word6_x86_features;
2617                 cpuid_mask(&entry->ecx, 6);
2618                 break;
2619         case 0x80000008: {
2620                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2621                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2622                 unsigned phys_as = entry->eax & 0xff;
2623
2624                 if (!g_phys_as)
2625                         g_phys_as = phys_as;
2626                 entry->eax = g_phys_as | (virt_as << 8);
2627                 entry->ebx = entry->edx = 0;
2628                 break;
2629         }
2630         case 0x80000019:
2631                 entry->ecx = entry->edx = 0;
2632                 break;
2633         case 0x8000001a:
2634                 break;
2635         case 0x8000001d:
2636                 break;
2637         /*Add support for Centaur's CPUID instruction*/
2638         case 0xC0000000:
2639                 /*Just support up to 0xC0000004 now*/
2640                 entry->eax = min(entry->eax, 0xC0000004);
2641                 break;
2642         case 0xC0000001:
2643                 entry->edx &= kvm_supported_word5_x86_features;
2644                 cpuid_mask(&entry->edx, 5);
2645                 break;
2646         case 3: /* Processor serial number */
2647         case 5: /* MONITOR/MWAIT */
2648         case 6: /* Thermal management */
2649         case 0xA: /* Architectural Performance Monitoring */
2650         case 0x80000007: /* Advanced power management */
2651         case 0xC0000002:
2652         case 0xC0000003:
2653         case 0xC0000004:
2654         default:
2655                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2656                 break;
2657         }
2658
2659         kvm_x86_ops->set_supported_cpuid(function, entry);
2660
2661         put_cpu();
2662 }
2663
2664 #undef F
2665
2666 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2667                                      struct kvm_cpuid_entry2 __user *entries)
2668 {
2669         struct kvm_cpuid_entry2 *cpuid_entries;
2670         int limit, nent = 0, r = -E2BIG;
2671         u32 func;
2672
2673         if (cpuid->nent < 1)
2674                 goto out;
2675         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2676                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2677         r = -ENOMEM;
2678         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2679         if (!cpuid_entries)
2680                 goto out;
2681
2682         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2683         limit = cpuid_entries[0].eax;
2684         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2685                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2686                              &nent, cpuid->nent);
2687         r = -E2BIG;
2688         if (nent >= cpuid->nent)
2689                 goto out_free;
2690
2691         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2692         limit = cpuid_entries[nent - 1].eax;
2693         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2694                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2695                              &nent, cpuid->nent);
2696
2697
2698
2699         r = -E2BIG;
2700         if (nent >= cpuid->nent)
2701                 goto out_free;
2702
2703         /* Add support for Centaur's CPUID instruction. */
2704         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2705                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2706                                 &nent, cpuid->nent);
2707
2708                 r = -E2BIG;
2709                 if (nent >= cpuid->nent)
2710                         goto out_free;
2711
2712                 limit = cpuid_entries[nent - 1].eax;
2713                 for (func = 0xC0000001;
2714                         func <= limit && nent < cpuid->nent; ++func)
2715                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2716                                         &nent, cpuid->nent);
2717
2718                 r = -E2BIG;
2719                 if (nent >= cpuid->nent)
2720                         goto out_free;
2721         }
2722
2723         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2724                      cpuid->nent);
2725
2726         r = -E2BIG;
2727         if (nent >= cpuid->nent)
2728                 goto out_free;
2729
2730         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2731                      cpuid->nent);
2732
2733         r = -E2BIG;
2734         if (nent >= cpuid->nent)
2735                 goto out_free;
2736
2737         r = -EFAULT;
2738         if (copy_to_user(entries, cpuid_entries,
2739                          nent * sizeof(struct kvm_cpuid_entry2)))
2740                 goto out_free;
2741         cpuid->nent = nent;
2742         r = 0;
2743
2744 out_free:
2745         vfree(cpuid_entries);
2746 out:
2747         return r;
2748 }
2749
2750 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2751                                     struct kvm_lapic_state *s)
2752 {
2753         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2754
2755         return 0;
2756 }
2757
2758 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2759                                     struct kvm_lapic_state *s)
2760 {
2761         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2762         kvm_apic_post_state_restore(vcpu);
2763         update_cr8_intercept(vcpu);
2764
2765         return 0;
2766 }
2767
2768 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2769                                     struct kvm_interrupt *irq)
2770 {
2771         if (irq->irq < 0 || irq->irq >= 256)
2772                 return -EINVAL;
2773         if (irqchip_in_kernel(vcpu->kvm))
2774                 return -ENXIO;
2775
2776         kvm_queue_interrupt(vcpu, irq->irq, false);
2777         kvm_make_request(KVM_REQ_EVENT, vcpu);
2778
2779         return 0;
2780 }
2781
2782 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2783 {
2784         kvm_inject_nmi(vcpu);
2785
2786         return 0;
2787 }
2788
2789 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2790                                            struct kvm_tpr_access_ctl *tac)
2791 {
2792         if (tac->flags)
2793                 return -EINVAL;
2794         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2795         return 0;
2796 }
2797
2798 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2799                                         u64 mcg_cap)
2800 {
2801         int r;
2802         unsigned bank_num = mcg_cap & 0xff, bank;
2803
2804         r = -EINVAL;
2805         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2806                 goto out;
2807         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2808                 goto out;
2809         r = 0;
2810         vcpu->arch.mcg_cap = mcg_cap;
2811         /* Init IA32_MCG_CTL to all 1s */
2812         if (mcg_cap & MCG_CTL_P)
2813                 vcpu->arch.mcg_ctl = ~(u64)0;
2814         /* Init IA32_MCi_CTL to all 1s */
2815         for (bank = 0; bank < bank_num; bank++)
2816                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2817 out:
2818         return r;
2819 }
2820
2821 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2822                                       struct kvm_x86_mce *mce)
2823 {
2824         u64 mcg_cap = vcpu->arch.mcg_cap;
2825         unsigned bank_num = mcg_cap & 0xff;
2826         u64 *banks = vcpu->arch.mce_banks;
2827
2828         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2829                 return -EINVAL;
2830         /*
2831          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2832          * reporting is disabled
2833          */
2834         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2835             vcpu->arch.mcg_ctl != ~(u64)0)
2836                 return 0;
2837         banks += 4 * mce->bank;
2838         /*
2839          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2840          * reporting is disabled for the bank
2841          */
2842         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2843                 return 0;
2844         if (mce->status & MCI_STATUS_UC) {
2845                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2846                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2847                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2848                         return 0;
2849                 }
2850                 if (banks[1] & MCI_STATUS_VAL)
2851                         mce->status |= MCI_STATUS_OVER;
2852                 banks[2] = mce->addr;
2853                 banks[3] = mce->misc;
2854                 vcpu->arch.mcg_status = mce->mcg_status;
2855                 banks[1] = mce->status;
2856                 kvm_queue_exception(vcpu, MC_VECTOR);
2857         } else if (!(banks[1] & MCI_STATUS_VAL)
2858                    || !(banks[1] & MCI_STATUS_UC)) {
2859                 if (banks[1] & MCI_STATUS_VAL)
2860                         mce->status |= MCI_STATUS_OVER;
2861                 banks[2] = mce->addr;
2862                 banks[3] = mce->misc;
2863                 banks[1] = mce->status;
2864         } else
2865                 banks[1] |= MCI_STATUS_OVER;
2866         return 0;
2867 }
2868
2869 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2870                                                struct kvm_vcpu_events *events)
2871 {
2872         process_nmi(vcpu);
2873         events->exception.injected =
2874                 vcpu->arch.exception.pending &&
2875                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2876         events->exception.nr = vcpu->arch.exception.nr;
2877         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2878         events->exception.pad = 0;
2879         events->exception.error_code = vcpu->arch.exception.error_code;
2880
2881         events->interrupt.injected =
2882                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2883         events->interrupt.nr = vcpu->arch.interrupt.nr;
2884         events->interrupt.soft = 0;
2885         events->interrupt.shadow =
2886                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2887                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2888
2889         events->nmi.injected = vcpu->arch.nmi_injected;
2890         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2891         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2892         events->nmi.pad = 0;
2893
2894         events->sipi_vector = vcpu->arch.sipi_vector;
2895
2896         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2897                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2898                          | KVM_VCPUEVENT_VALID_SHADOW);
2899         memset(&events->reserved, 0, sizeof(events->reserved));
2900 }
2901
2902 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2903                                               struct kvm_vcpu_events *events)
2904 {
2905         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2906                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2907                               | KVM_VCPUEVENT_VALID_SHADOW))
2908                 return -EINVAL;
2909
2910         process_nmi(vcpu);
2911         vcpu->arch.exception.pending = events->exception.injected;
2912         vcpu->arch.exception.nr = events->exception.nr;
2913         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2914         vcpu->arch.exception.error_code = events->exception.error_code;
2915
2916         vcpu->arch.interrupt.pending = events->interrupt.injected;
2917         vcpu->arch.interrupt.nr = events->interrupt.nr;
2918         vcpu->arch.interrupt.soft = events->interrupt.soft;
2919         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2920                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2921                                                   events->interrupt.shadow);
2922
2923         vcpu->arch.nmi_injected = events->nmi.injected;
2924         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2925                 vcpu->arch.nmi_pending = events->nmi.pending;
2926         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2927
2928         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2929                 vcpu->arch.sipi_vector = events->sipi_vector;
2930
2931         kvm_make_request(KVM_REQ_EVENT, vcpu);
2932
2933         return 0;
2934 }
2935
2936 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2937                                              struct kvm_debugregs *dbgregs)
2938 {
2939         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2940         dbgregs->dr6 = vcpu->arch.dr6;
2941         dbgregs->dr7 = vcpu->arch.dr7;
2942         dbgregs->flags = 0;
2943         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2944 }
2945
2946 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2947                                             struct kvm_debugregs *dbgregs)
2948 {
2949         if (dbgregs->flags)
2950                 return -EINVAL;
2951
2952         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2953         vcpu->arch.dr6 = dbgregs->dr6;
2954         vcpu->arch.dr7 = dbgregs->dr7;
2955
2956         return 0;
2957 }
2958
2959 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2960                                          struct kvm_xsave *guest_xsave)
2961 {
2962         if (cpu_has_xsave)
2963                 memcpy(guest_xsave->region,
2964                         &vcpu->arch.guest_fpu.state->xsave,
2965                         xstate_size);
2966         else {
2967                 memcpy(guest_xsave->region,
2968                         &vcpu->arch.guest_fpu.state->fxsave,
2969                         sizeof(struct i387_fxsave_struct));
2970                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2971                         XSTATE_FPSSE;
2972         }
2973 }
2974
2975 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2976                                         struct kvm_xsave *guest_xsave)
2977 {
2978         u64 xstate_bv =
2979                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2980
2981         if (cpu_has_xsave)
2982                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2983                         guest_xsave->region, xstate_size);
2984         else {
2985                 if (xstate_bv & ~XSTATE_FPSSE)
2986                         return -EINVAL;
2987                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2988                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2989         }
2990         return 0;
2991 }
2992
2993 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2994                                         struct kvm_xcrs *guest_xcrs)
2995 {
2996         if (!cpu_has_xsave) {
2997                 guest_xcrs->nr_xcrs = 0;
2998                 return;
2999         }
3000
3001         guest_xcrs->nr_xcrs = 1;
3002         guest_xcrs->flags = 0;
3003         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3004         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3005 }
3006
3007 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3008                                        struct kvm_xcrs *guest_xcrs)
3009 {
3010         int i, r = 0;
3011
3012         if (!cpu_has_xsave)
3013                 return -EINVAL;
3014
3015         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3016                 return -EINVAL;
3017
3018         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3019                 /* Only support XCR0 currently */
3020                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3021                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3022                                 guest_xcrs->xcrs[0].value);
3023                         break;
3024                 }
3025         if (r)
3026                 r = -EINVAL;
3027         return r;
3028 }
3029
3030 long kvm_arch_vcpu_ioctl(struct file *filp,
3031                          unsigned int ioctl, unsigned long arg)
3032 {
3033         struct kvm_vcpu *vcpu = filp->private_data;
3034         void __user *argp = (void __user *)arg;
3035         int r;
3036         union {
3037                 struct kvm_lapic_state *lapic;
3038                 struct kvm_xsave *xsave;
3039                 struct kvm_xcrs *xcrs;
3040                 void *buffer;
3041         } u;
3042
3043         u.buffer = NULL;
3044         switch (ioctl) {
3045         case KVM_GET_LAPIC: {
3046                 r = -EINVAL;
3047                 if (!vcpu->arch.apic)
3048                         goto out;
3049                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3050
3051                 r = -ENOMEM;
3052                 if (!u.lapic)
3053                         goto out;
3054                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3055                 if (r)
3056                         goto out;
3057                 r = -EFAULT;
3058                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3059                         goto out;
3060                 r = 0;
3061                 break;
3062         }
3063         case KVM_SET_LAPIC: {
3064                 r = -EINVAL;
3065                 if (!vcpu->arch.apic)
3066                         goto out;
3067                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3068                 r = -ENOMEM;
3069                 if (!u.lapic)
3070                         goto out;
3071                 r = -EFAULT;
3072                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3073                         goto out;
3074                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3075                 if (r)
3076                         goto out;
3077                 r = 0;
3078                 break;
3079         }
3080         case KVM_INTERRUPT: {
3081                 struct kvm_interrupt irq;
3082
3083                 r = -EFAULT;
3084                 if (copy_from_user(&irq, argp, sizeof irq))
3085                         goto out;
3086                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3087                 if (r)
3088                         goto out;
3089                 r = 0;
3090                 break;
3091         }
3092         case KVM_NMI: {
3093                 r = kvm_vcpu_ioctl_nmi(vcpu);
3094                 if (r)
3095                         goto out;
3096                 r = 0;
3097                 break;
3098         }
3099         case KVM_SET_CPUID: {
3100                 struct kvm_cpuid __user *cpuid_arg = argp;
3101                 struct kvm_cpuid cpuid;
3102
3103                 r = -EFAULT;
3104                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3105                         goto out;
3106                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3107                 if (r)
3108                         goto out;
3109                 break;
3110         }
3111         case KVM_SET_CPUID2: {
3112                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3113                 struct kvm_cpuid2 cpuid;
3114
3115                 r = -EFAULT;
3116                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3117                         goto out;
3118                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3119                                               cpuid_arg->entries);
3120                 if (r)
3121                         goto out;
3122                 break;
3123         }
3124         case KVM_GET_CPUID2: {
3125                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3126                 struct kvm_cpuid2 cpuid;
3127
3128                 r = -EFAULT;
3129                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3130                         goto out;
3131                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3132                                               cpuid_arg->entries);
3133                 if (r)
3134                         goto out;
3135                 r = -EFAULT;
3136                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3137                         goto out;
3138                 r = 0;
3139                 break;
3140         }
3141         case KVM_GET_MSRS:
3142                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3143                 break;
3144         case KVM_SET_MSRS:
3145                 r = msr_io(vcpu, argp, do_set_msr, 0);
3146                 break;
3147         case KVM_TPR_ACCESS_REPORTING: {
3148                 struct kvm_tpr_access_ctl tac;
3149
3150                 r = -EFAULT;
3151                 if (copy_from_user(&tac, argp, sizeof tac))
3152                         goto out;
3153                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3154                 if (r)
3155                         goto out;
3156                 r = -EFAULT;
3157                 if (copy_to_user(argp, &tac, sizeof tac))
3158                         goto out;
3159                 r = 0;
3160                 break;
3161         };
3162         case KVM_SET_VAPIC_ADDR: {
3163                 struct kvm_vapic_addr va;
3164
3165                 r = -EINVAL;
3166                 if (!irqchip_in_kernel(vcpu->kvm))
3167                         goto out;
3168                 r = -EFAULT;
3169                 if (copy_from_user(&va, argp, sizeof va))
3170                         goto out;
3171                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3172                 break;
3173         }
3174         case KVM_X86_SETUP_MCE: {
3175                 u64 mcg_cap;
3176
3177                 r = -EFAULT;
3178                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3179                         goto out;
3180                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3181                 break;
3182         }
3183         case KVM_X86_SET_MCE: {
3184                 struct kvm_x86_mce mce;
3185
3186                 r = -EFAULT;
3187                 if (copy_from_user(&mce, argp, sizeof mce))
3188                         goto out;
3189                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3190                 break;
3191         }
3192         case KVM_GET_VCPU_EVENTS: {
3193                 struct kvm_vcpu_events events;
3194
3195                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3196
3197                 r = -EFAULT;
3198                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3199                         break;
3200                 r = 0;
3201                 break;
3202         }
3203         case KVM_SET_VCPU_EVENTS: {
3204                 struct kvm_vcpu_events events;
3205
3206                 r = -EFAULT;
3207                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3208                         break;
3209
3210                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3211                 break;
3212         }
3213         case KVM_GET_DEBUGREGS: {
3214                 struct kvm_debugregs dbgregs;
3215
3216                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3217
3218                 r = -EFAULT;
3219                 if (copy_to_user(argp, &dbgregs,
3220                                  sizeof(struct kvm_debugregs)))
3221                         break;
3222                 r = 0;
3223                 break;
3224         }
3225         case KVM_SET_DEBUGREGS: {
3226                 struct kvm_debugregs dbgregs;
3227
3228                 r = -EFAULT;
3229                 if (copy_from_user(&dbgregs, argp,
3230                                    sizeof(struct kvm_debugregs)))
3231                         break;
3232
3233                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3234                 break;
3235         }
3236         case KVM_GET_XSAVE: {
3237                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3238                 r = -ENOMEM;
3239                 if (!u.xsave)
3240                         break;
3241
3242                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3243
3244                 r = -EFAULT;
3245                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3246                         break;
3247                 r = 0;
3248                 break;
3249         }
3250         case KVM_SET_XSAVE: {
3251                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3252                 r = -ENOMEM;
3253                 if (!u.xsave)
3254                         break;
3255
3256                 r = -EFAULT;
3257                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3258                         break;
3259
3260                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3261                 break;
3262         }
3263         case KVM_GET_XCRS: {
3264                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3265                 r = -ENOMEM;
3266                 if (!u.xcrs)
3267                         break;
3268
3269                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3270
3271                 r = -EFAULT;
3272                 if (copy_to_user(argp, u.xcrs,
3273                                  sizeof(struct kvm_xcrs)))
3274                         break;
3275                 r = 0;
3276                 break;
3277         }
3278         case KVM_SET_XCRS: {
3279                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3280                 r = -ENOMEM;
3281                 if (!u.xcrs)
3282                         break;
3283
3284                 r = -EFAULT;
3285                 if (copy_from_user(u.xcrs, argp,
3286                                    sizeof(struct kvm_xcrs)))
3287                         break;
3288
3289                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3290                 break;
3291         }
3292         case KVM_SET_TSC_KHZ: {
3293                 u32 user_tsc_khz;
3294
3295                 r = -EINVAL;
3296                 if (!kvm_has_tsc_control)
3297                         break;
3298
3299                 user_tsc_khz = (u32)arg;
3300
3301                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3302                         goto out;
3303
3304                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3305
3306                 r = 0;
3307                 goto out;
3308         }
3309         case KVM_GET_TSC_KHZ: {
3310                 r = -EIO;
3311                 if (check_tsc_unstable())
3312                         goto out;
3313
3314                 r = vcpu_tsc_khz(vcpu);
3315
3316                 goto out;
3317         }
3318         default:
3319                 r = -EINVAL;
3320         }
3321 out:
3322         kfree(u.buffer);
3323         return r;
3324 }
3325
3326 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3327 {
3328         int ret;
3329
3330         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3331                 return -1;
3332         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3333         return ret;
3334 }
3335
3336 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3337                                               u64 ident_addr)
3338 {
3339         kvm->arch.ept_identity_map_addr = ident_addr;
3340         return 0;
3341 }
3342
3343 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3344                                           u32 kvm_nr_mmu_pages)
3345 {
3346         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3347                 return -EINVAL;
3348
3349         mutex_lock(&kvm->slots_lock);
3350         spin_lock(&kvm->mmu_lock);
3351
3352         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3353         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3354
3355         spin_unlock(&kvm->mmu_lock);
3356         mutex_unlock(&kvm->slots_lock);
3357         return 0;
3358 }
3359
3360 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3361 {
3362         return kvm->arch.n_max_mmu_pages;
3363 }
3364
3365 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3366 {
3367         int r;
3368
3369         r = 0;
3370         switch (chip->chip_id) {
3371         case KVM_IRQCHIP_PIC_MASTER:
3372                 memcpy(&chip->chip.pic,
3373                         &pic_irqchip(kvm)->pics[0],
3374                         sizeof(struct kvm_pic_state));
3375                 break;
3376         case KVM_IRQCHIP_PIC_SLAVE:
3377                 memcpy(&chip->chip.pic,
3378                         &pic_irqchip(kvm)->pics[1],
3379                         sizeof(struct kvm_pic_state));
3380                 break;
3381         case KVM_IRQCHIP_IOAPIC:
3382                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3383                 break;
3384         default:
3385                 r = -EINVAL;
3386                 break;
3387         }
3388         return r;
3389 }
3390
3391 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3392 {
3393         int r;
3394
3395         r = 0;
3396         switch (chip->chip_id) {
3397         case KVM_IRQCHIP_PIC_MASTER:
3398                 spin_lock(&pic_irqchip(kvm)->lock);
3399                 memcpy(&pic_irqchip(kvm)->pics[0],
3400                         &chip->chip.pic,
3401                         sizeof(struct kvm_pic_state));
3402                 spin_unlock(&pic_irqchip(kvm)->lock);
3403                 break;
3404         case KVM_IRQCHIP_PIC_SLAVE:
3405                 spin_lock(&pic_irqchip(kvm)->lock);
3406                 memcpy(&pic_irqchip(kvm)->pics[1],
3407                         &chip->chip.pic,
3408                         sizeof(struct kvm_pic_state));
3409                 spin_unlock(&pic_irqchip(kvm)->lock);
3410                 break;
3411         case KVM_IRQCHIP_IOAPIC:
3412                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3413                 break;
3414         default:
3415                 r = -EINVAL;
3416                 break;
3417         }
3418         kvm_pic_update_irq(pic_irqchip(kvm));
3419         return r;
3420 }
3421
3422 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3423 {
3424         int r = 0;
3425
3426         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3427         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3428         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3429         return r;
3430 }
3431
3432 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3433 {
3434         int r = 0;
3435
3436         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3437         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3438         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3439         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3440         return r;
3441 }
3442
3443 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3444 {
3445         int r = 0;
3446
3447         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3448         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3449                 sizeof(ps->channels));
3450         ps->flags = kvm->arch.vpit->pit_state.flags;
3451         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3452         memset(&ps->reserved, 0, sizeof(ps->reserved));
3453         return r;
3454 }
3455
3456 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3457 {
3458         int r = 0, start = 0;
3459         u32 prev_legacy, cur_legacy;
3460         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3461         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3462         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3463         if (!prev_legacy && cur_legacy)
3464                 start = 1;
3465         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3466                sizeof(kvm->arch.vpit->pit_state.channels));
3467         kvm->arch.vpit->pit_state.flags = ps->flags;
3468         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3469         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3470         return r;
3471 }
3472
3473 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3474                                  struct kvm_reinject_control *control)
3475 {
3476         if (!kvm->arch.vpit)
3477                 return -ENXIO;
3478         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3479         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3480         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3481         return 0;
3482 }
3483
3484 /*
3485  * Get (and clear) the dirty memory log for a memory slot.
3486  */
3487 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3488                                       struct kvm_dirty_log *log)
3489 {
3490         int r, i;
3491         struct kvm_memory_slot *memslot;
3492         unsigned long n;
3493         unsigned long is_dirty = 0;
3494
3495         mutex_lock(&kvm->slots_lock);
3496
3497         r = -EINVAL;
3498         if (log->slot >= KVM_MEMORY_SLOTS)
3499                 goto out;
3500
3501         memslot = &kvm->memslots->memslots[log->slot];
3502         r = -ENOENT;
3503         if (!memslot->dirty_bitmap)
3504                 goto out;
3505
3506         n = kvm_dirty_bitmap_bytes(memslot);
3507
3508         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3509                 is_dirty = memslot->dirty_bitmap[i];
3510
3511         /* If nothing is dirty, don't bother messing with page tables. */
3512         if (is_dirty) {
3513                 struct kvm_memslots *slots, *old_slots;
3514                 unsigned long *dirty_bitmap;
3515
3516                 dirty_bitmap = memslot->dirty_bitmap_head;
3517                 if (memslot->dirty_bitmap == dirty_bitmap)
3518                         dirty_bitmap += n / sizeof(long);
3519                 memset(dirty_bitmap, 0, n);
3520
3521                 r = -ENOMEM;
3522                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3523                 if (!slots)
3524                         goto out;
3525                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3526                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3527                 slots->generation++;
3528
3529                 old_slots = kvm->memslots;
3530                 rcu_assign_pointer(kvm->memslots, slots);
3531                 synchronize_srcu_expedited(&kvm->srcu);
3532                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3533                 kfree(old_slots);
3534
3535                 spin_lock(&kvm->mmu_lock);
3536                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3537                 spin_unlock(&kvm->mmu_lock);
3538
3539                 r = -EFAULT;
3540                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3541                         goto out;
3542         } else {
3543                 r = -EFAULT;
3544                 if (clear_user(log->dirty_bitmap, n))
3545                         goto out;
3546         }
3547
3548         r = 0;
3549 out:
3550         mutex_unlock(&kvm->slots_lock);
3551         return r;
3552 }
3553
3554 long kvm_arch_vm_ioctl(struct file *filp,
3555                        unsigned int ioctl, unsigned long arg)
3556 {
3557         struct kvm *kvm = filp->private_data;
3558         void __user *argp = (void __user *)arg;
3559         int r = -ENOTTY;
3560         /*
3561          * This union makes it completely explicit to gcc-3.x
3562          * that these two variables' stack usage should be
3563          * combined, not added together.
3564          */
3565         union {
3566                 struct kvm_pit_state ps;
3567                 struct kvm_pit_state2 ps2;
3568                 struct kvm_pit_config pit_config;
3569         } u;
3570
3571         switch (ioctl) {
3572         case KVM_SET_TSS_ADDR:
3573                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3574                 if (r < 0)
3575                         goto out;
3576                 break;
3577         case KVM_SET_IDENTITY_MAP_ADDR: {
3578                 u64 ident_addr;
3579
3580                 r = -EFAULT;
3581                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3582                         goto out;
3583                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3584                 if (r < 0)
3585                         goto out;
3586                 break;
3587         }
3588         case KVM_SET_NR_MMU_PAGES:
3589                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3590                 if (r)
3591                         goto out;
3592                 break;
3593         case KVM_GET_NR_MMU_PAGES:
3594                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3595                 break;
3596         case KVM_CREATE_IRQCHIP: {
3597                 struct kvm_pic *vpic;
3598
3599                 mutex_lock(&kvm->lock);
3600                 r = -EEXIST;
3601                 if (kvm->arch.vpic)
3602                         goto create_irqchip_unlock;
3603                 r = -EINVAL;
3604                 if (atomic_read(&kvm->online_vcpus))
3605                         goto create_irqchip_unlock;
3606                 r = -ENOMEM;
3607                 vpic = kvm_create_pic(kvm);
3608                 if (vpic) {
3609                         r = kvm_ioapic_init(kvm);
3610                         if (r) {
3611                                 mutex_lock(&kvm->slots_lock);
3612                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3613                                                           &vpic->dev_master);
3614                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3615                                                           &vpic->dev_slave);
3616                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3617                                                           &vpic->dev_eclr);
3618                                 mutex_unlock(&kvm->slots_lock);
3619                                 kfree(vpic);
3620                                 goto create_irqchip_unlock;
3621                         }
3622                 } else
3623                         goto create_irqchip_unlock;
3624                 smp_wmb();
3625                 kvm->arch.vpic = vpic;
3626                 smp_wmb();
3627                 r = kvm_setup_default_irq_routing(kvm);
3628                 if (r) {
3629                         mutex_lock(&kvm->slots_lock);
3630                         mutex_lock(&kvm->irq_lock);
3631                         kvm_ioapic_destroy(kvm);
3632                         kvm_destroy_pic(kvm);
3633                         mutex_unlock(&kvm->irq_lock);
3634                         mutex_unlock(&kvm->slots_lock);
3635                 }
3636         create_irqchip_unlock:
3637                 mutex_unlock(&kvm->lock);
3638                 break;
3639         }
3640         case KVM_CREATE_PIT:
3641                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3642                 goto create_pit;
3643         case KVM_CREATE_PIT2:
3644                 r = -EFAULT;
3645                 if (copy_from_user(&u.pit_config, argp,
3646                                    sizeof(struct kvm_pit_config)))
3647                         goto out;
3648         create_pit:
3649                 mutex_lock(&kvm->slots_lock);
3650                 r = -EEXIST;
3651                 if (kvm->arch.vpit)
3652                         goto create_pit_unlock;
3653                 r = -ENOMEM;
3654                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3655                 if (kvm->arch.vpit)
3656                         r = 0;
3657         create_pit_unlock:
3658                 mutex_unlock(&kvm->slots_lock);
3659                 break;
3660         case KVM_IRQ_LINE_STATUS:
3661         case KVM_IRQ_LINE: {
3662                 struct kvm_irq_level irq_event;
3663
3664                 r = -EFAULT;
3665                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3666                         goto out;
3667                 r = -ENXIO;
3668                 if (irqchip_in_kernel(kvm)) {
3669                         __s32 status;
3670                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3671                                         irq_event.irq, irq_event.level);
3672                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3673                                 r = -EFAULT;
3674                                 irq_event.status = status;
3675                                 if (copy_to_user(argp, &irq_event,
3676                                                         sizeof irq_event))
3677                                         goto out;
3678                         }
3679                         r = 0;
3680                 }
3681                 break;
3682         }
3683         case KVM_GET_IRQCHIP: {
3684                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3685                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3686
3687                 r = -ENOMEM;
3688                 if (!chip)
3689                         goto out;
3690                 r = -EFAULT;
3691                 if (copy_from_user(chip, argp, sizeof *chip))
3692                         goto get_irqchip_out;
3693                 r = -ENXIO;
3694                 if (!irqchip_in_kernel(kvm))
3695                         goto get_irqchip_out;
3696                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3697                 if (r)
3698                         goto get_irqchip_out;
3699                 r = -EFAULT;
3700                 if (copy_to_user(argp, chip, sizeof *chip))
3701                         goto get_irqchip_out;
3702                 r = 0;
3703         get_irqchip_out:
3704                 kfree(chip);
3705                 if (r)
3706                         goto out;
3707                 break;
3708         }
3709         case KVM_SET_IRQCHIP: {
3710                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3711                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3712
3713                 r = -ENOMEM;
3714                 if (!chip)
3715                         goto out;
3716                 r = -EFAULT;
3717                 if (copy_from_user(chip, argp, sizeof *chip))
3718                         goto set_irqchip_out;
3719                 r = -ENXIO;
3720                 if (!irqchip_in_kernel(kvm))
3721                         goto set_irqchip_out;
3722                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3723                 if (r)
3724                         goto set_irqchip_out;
3725                 r = 0;
3726         set_irqchip_out:
3727                 kfree(chip);
3728                 if (r)
3729                         goto out;
3730                 break;
3731         }
3732         case KVM_GET_PIT: {
3733                 r = -EFAULT;
3734                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3735                         goto out;
3736                 r = -ENXIO;
3737                 if (!kvm->arch.vpit)
3738                         goto out;
3739                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3740                 if (r)
3741                         goto out;
3742                 r = -EFAULT;
3743                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3744                         goto out;
3745                 r = 0;
3746                 break;
3747         }
3748         case KVM_SET_PIT: {
3749                 r = -EFAULT;
3750                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3751                         goto out;
3752                 r = -ENXIO;
3753                 if (!kvm->arch.vpit)
3754                         goto out;
3755                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3756                 if (r)
3757                         goto out;
3758                 r = 0;
3759                 break;
3760         }
3761         case KVM_GET_PIT2: {
3762                 r = -ENXIO;
3763                 if (!kvm->arch.vpit)
3764                         goto out;
3765                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3766                 if (r)
3767                         goto out;
3768                 r = -EFAULT;
3769                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3770                         goto out;
3771                 r = 0;
3772                 break;
3773         }
3774         case KVM_SET_PIT2: {
3775                 r = -EFAULT;
3776                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3777                         goto out;
3778                 r = -ENXIO;
3779                 if (!kvm->arch.vpit)
3780                         goto out;
3781                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3782                 if (r)
3783                         goto out;
3784                 r = 0;
3785                 break;
3786         }
3787         case KVM_REINJECT_CONTROL: {
3788                 struct kvm_reinject_control control;
3789                 r =  -EFAULT;
3790                 if (copy_from_user(&control, argp, sizeof(control)))
3791                         goto out;
3792                 r = kvm_vm_ioctl_reinject(kvm, &control);
3793                 if (r)
3794                         goto out;
3795                 r = 0;
3796                 break;
3797         }
3798         case KVM_XEN_HVM_CONFIG: {
3799                 r = -EFAULT;
3800                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3801                                    sizeof(struct kvm_xen_hvm_config)))
3802                         goto out;
3803                 r = -EINVAL;
3804                 if (kvm->arch.xen_hvm_config.flags)
3805                         goto out;
3806                 r = 0;
3807                 break;
3808         }
3809         case KVM_SET_CLOCK: {
3810                 struct kvm_clock_data user_ns;
3811                 u64 now_ns;
3812                 s64 delta;
3813
3814                 r = -EFAULT;
3815                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3816                         goto out;
3817
3818                 r = -EINVAL;
3819                 if (user_ns.flags)
3820                         goto out;
3821
3822                 r = 0;
3823                 local_irq_disable();
3824                 now_ns = get_kernel_ns();
3825                 delta = user_ns.clock - now_ns;
3826                 local_irq_enable();
3827                 kvm->arch.kvmclock_offset = delta;
3828                 break;
3829         }
3830         case KVM_GET_CLOCK: {
3831                 struct kvm_clock_data user_ns;
3832                 u64 now_ns;
3833
3834                 local_irq_disable();
3835                 now_ns = get_kernel_ns();
3836                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3837                 local_irq_enable();
3838                 user_ns.flags = 0;
3839                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3840
3841                 r = -EFAULT;
3842                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3843                         goto out;
3844                 r = 0;
3845                 break;
3846         }
3847
3848         default:
3849                 ;
3850         }
3851 out:
3852         return r;
3853 }
3854
3855 static void kvm_init_msr_list(void)
3856 {
3857         u32 dummy[2];
3858         unsigned i, j;
3859
3860         /* skip the first msrs in the list. KVM-specific */
3861         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3862                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3863                         continue;
3864                 if (j < i)
3865                         msrs_to_save[j] = msrs_to_save[i];
3866                 j++;
3867         }
3868         num_msrs_to_save = j;
3869 }
3870
3871 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3872                            const void *v)
3873 {
3874         int handled = 0;
3875         int n;
3876
3877         do {
3878                 n = min(len, 8);
3879                 if (!(vcpu->arch.apic &&
3880                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3881                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3882                         break;
3883                 handled += n;
3884                 addr += n;
3885                 len -= n;
3886                 v += n;
3887         } while (len);
3888
3889         return handled;
3890 }
3891
3892 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3893 {
3894         int handled = 0;
3895         int n;
3896
3897         do {
3898                 n = min(len, 8);
3899                 if (!(vcpu->arch.apic &&
3900                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3901                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3902                         break;
3903                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3904                 handled += n;
3905                 addr += n;
3906                 len -= n;
3907                 v += n;
3908         } while (len);
3909
3910         return handled;
3911 }
3912
3913 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3914                         struct kvm_segment *var, int seg)
3915 {
3916         kvm_x86_ops->set_segment(vcpu, var, seg);
3917 }
3918
3919 void kvm_get_segment(struct kvm_vcpu *vcpu,
3920                      struct kvm_segment *var, int seg)
3921 {
3922         kvm_x86_ops->get_segment(vcpu, var, seg);
3923 }
3924
3925 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3926 {
3927         return gpa;
3928 }
3929
3930 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3931 {
3932         gpa_t t_gpa;
3933         struct x86_exception exception;
3934
3935         BUG_ON(!mmu_is_nested(vcpu));
3936
3937         /* NPT walks are always user-walks */
3938         access |= PFERR_USER_MASK;
3939         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3940
3941         return t_gpa;
3942 }
3943
3944 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3945                               struct x86_exception *exception)
3946 {
3947         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3948         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3949 }
3950
3951  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3952                                 struct x86_exception *exception)
3953 {
3954         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3955         access |= PFERR_FETCH_MASK;
3956         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3957 }
3958
3959 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3960                                struct x86_exception *exception)
3961 {
3962         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3963         access |= PFERR_WRITE_MASK;
3964         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3965 }
3966
3967 /* uses this to access any guest's mapped memory without checking CPL */
3968 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3969                                 struct x86_exception *exception)
3970 {
3971         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3972 }
3973
3974 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3975                                       struct kvm_vcpu *vcpu, u32 access,
3976                                       struct x86_exception *exception)
3977 {
3978         void *data = val;
3979         int r = X86EMUL_CONTINUE;
3980
3981         while (bytes) {
3982                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3983                                                             exception);
3984                 unsigned offset = addr & (PAGE_SIZE-1);
3985                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3986                 int ret;
3987
3988                 if (gpa == UNMAPPED_GVA)
3989                         return X86EMUL_PROPAGATE_FAULT;
3990                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3991                 if (ret < 0) {
3992                         r = X86EMUL_IO_NEEDED;
3993                         goto out;
3994                 }
3995
3996                 bytes -= toread;
3997                 data += toread;
3998                 addr += toread;
3999         }
4000 out:
4001         return r;
4002 }
4003
4004 /* used for instruction fetching */
4005 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4006                                 gva_t addr, void *val, unsigned int bytes,
4007                                 struct x86_exception *exception)
4008 {
4009         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4010         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4011
4012         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4013                                           access | PFERR_FETCH_MASK,
4014                                           exception);
4015 }
4016
4017 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4018                                gva_t addr, void *val, unsigned int bytes,
4019                                struct x86_exception *exception)
4020 {
4021         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4022         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4023
4024         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4025                                           exception);
4026 }
4027 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4028
4029 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4030                                       gva_t addr, void *val, unsigned int bytes,
4031                                       struct x86_exception *exception)
4032 {
4033         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4034         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4035 }
4036
4037 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4038                                        gva_t addr, void *val,
4039                                        unsigned int bytes,
4040                                        struct x86_exception *exception)
4041 {
4042         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4043         void *data = val;
4044         int r = X86EMUL_CONTINUE;
4045
4046         while (bytes) {
4047                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4048                                                              PFERR_WRITE_MASK,
4049                                                              exception);
4050                 unsigned offset = addr & (PAGE_SIZE-1);
4051                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4052                 int ret;
4053
4054                 if (gpa == UNMAPPED_GVA)
4055                         return X86EMUL_PROPAGATE_FAULT;
4056                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4057                 if (ret < 0) {
4058                         r = X86EMUL_IO_NEEDED;
4059                         goto out;
4060                 }
4061
4062                 bytes -= towrite;
4063                 data += towrite;
4064                 addr += towrite;
4065         }
4066 out:
4067         return r;
4068 }
4069 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4070
4071 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4072                                 gpa_t *gpa, struct x86_exception *exception,
4073                                 bool write)
4074 {
4075         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4076
4077         if (vcpu_match_mmio_gva(vcpu, gva) &&
4078                   check_write_user_access(vcpu, write, access,
4079                   vcpu->arch.access)) {
4080                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4081                                         (gva & (PAGE_SIZE - 1));
4082                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4083                 return 1;
4084         }
4085
4086         if (write)
4087                 access |= PFERR_WRITE_MASK;
4088
4089         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4090
4091         if (*gpa == UNMAPPED_GVA)
4092                 return -1;
4093
4094         /* For APIC access vmexit */
4095         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4096                 return 1;
4097
4098         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4099                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4100                 return 1;
4101         }
4102
4103         return 0;
4104 }
4105
4106 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4107                         const void *val, int bytes)
4108 {
4109         int ret;
4110
4111         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4112         if (ret < 0)
4113                 return 0;
4114         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4115         return 1;
4116 }
4117
4118 struct read_write_emulator_ops {
4119         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4120                                   int bytes);
4121         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4122                                   void *val, int bytes);
4123         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4124                                int bytes, void *val);
4125         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4126                                     void *val, int bytes);
4127         bool write;
4128 };
4129
4130 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4131 {
4132         if (vcpu->mmio_read_completed) {
4133                 memcpy(val, vcpu->mmio_data, bytes);
4134                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4135                                vcpu->mmio_phys_addr, *(u64 *)val);
4136                 vcpu->mmio_read_completed = 0;
4137                 return 1;
4138         }
4139
4140         return 0;
4141 }
4142
4143 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4144                         void *val, int bytes)
4145 {
4146         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4147 }
4148
4149 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4150                          void *val, int bytes)
4151 {
4152         return emulator_write_phys(vcpu, gpa, val, bytes);
4153 }
4154
4155 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4156 {
4157         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4158         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4159 }
4160
4161 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4162                           void *val, int bytes)
4163 {
4164         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4165         return X86EMUL_IO_NEEDED;
4166 }
4167
4168 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4169                            void *val, int bytes)
4170 {
4171         memcpy(vcpu->mmio_data, val, bytes);
4172         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4173         return X86EMUL_CONTINUE;
4174 }
4175
4176 static struct read_write_emulator_ops read_emultor = {
4177         .read_write_prepare = read_prepare,
4178         .read_write_emulate = read_emulate,
4179         .read_write_mmio = vcpu_mmio_read,
4180         .read_write_exit_mmio = read_exit_mmio,
4181 };
4182
4183 static struct read_write_emulator_ops write_emultor = {
4184         .read_write_emulate = write_emulate,
4185         .read_write_mmio = write_mmio,
4186         .read_write_exit_mmio = write_exit_mmio,
4187         .write = true,
4188 };
4189
4190 static int emulator_read_write_onepage(unsigned long addr, void *val,
4191                                        unsigned int bytes,
4192                                        struct x86_exception *exception,
4193                                        struct kvm_vcpu *vcpu,
4194                                        struct read_write_emulator_ops *ops)
4195 {
4196         gpa_t gpa;
4197         int handled, ret;
4198         bool write = ops->write;
4199
4200         if (ops->read_write_prepare &&
4201                   ops->read_write_prepare(vcpu, val, bytes))
4202                 return X86EMUL_CONTINUE;
4203
4204         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4205
4206         if (ret < 0)
4207                 return X86EMUL_PROPAGATE_FAULT;
4208
4209         /* For APIC access vmexit */
4210         if (ret)
4211                 goto mmio;
4212
4213         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4214                 return X86EMUL_CONTINUE;
4215
4216 mmio:
4217         /*
4218          * Is this MMIO handled locally?
4219          */
4220         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4221         if (handled == bytes)
4222                 return X86EMUL_CONTINUE;
4223
4224         gpa += handled;
4225         bytes -= handled;
4226         val += handled;
4227
4228         vcpu->mmio_needed = 1;
4229         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4230         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4231         vcpu->mmio_size = bytes;
4232         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4233         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4234         vcpu->mmio_index = 0;
4235
4236         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4237 }
4238
4239 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4240                         void *val, unsigned int bytes,
4241                         struct x86_exception *exception,
4242                         struct read_write_emulator_ops *ops)
4243 {
4244         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4245
4246         /* Crossing a page boundary? */
4247         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4248                 int rc, now;
4249
4250                 now = -addr & ~PAGE_MASK;
4251                 rc = emulator_read_write_onepage(addr, val, now, exception,
4252                                                  vcpu, ops);
4253
4254                 if (rc != X86EMUL_CONTINUE)
4255                         return rc;
4256                 addr += now;
4257                 val += now;
4258                 bytes -= now;
4259         }
4260
4261         return emulator_read_write_onepage(addr, val, bytes, exception,
4262                                            vcpu, ops);
4263 }
4264
4265 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4266                                   unsigned long addr,
4267                                   void *val,
4268                                   unsigned int bytes,
4269                                   struct x86_exception *exception)
4270 {
4271         return emulator_read_write(ctxt, addr, val, bytes,
4272                                    exception, &read_emultor);
4273 }
4274
4275 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4276                             unsigned long addr,
4277                             const void *val,
4278                             unsigned int bytes,
4279                             struct x86_exception *exception)
4280 {
4281         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4282                                    exception, &write_emultor);
4283 }
4284
4285 #define CMPXCHG_TYPE(t, ptr, old, new) \
4286         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4287
4288 #ifdef CONFIG_X86_64
4289 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4290 #else
4291 #  define CMPXCHG64(ptr, old, new) \
4292         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4293 #endif
4294
4295 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4296                                      unsigned long addr,
4297                                      const void *old,
4298                                      const void *new,
4299                                      unsigned int bytes,
4300                                      struct x86_exception *exception)
4301 {
4302         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4303         gpa_t gpa;
4304         struct page *page;
4305         char *kaddr;
4306         bool exchanged;
4307
4308         /* guests cmpxchg8b have to be emulated atomically */
4309         if (bytes > 8 || (bytes & (bytes - 1)))
4310                 goto emul_write;
4311
4312         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4313
4314         if (gpa == UNMAPPED_GVA ||
4315             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4316                 goto emul_write;
4317
4318         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4319                 goto emul_write;
4320
4321         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4322         if (is_error_page(page)) {
4323                 kvm_release_page_clean(page);
4324                 goto emul_write;
4325         }
4326
4327         kaddr = kmap_atomic(page, KM_USER0);
4328         kaddr += offset_in_page(gpa);
4329         switch (bytes) {
4330         case 1:
4331                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4332                 break;
4333         case 2:
4334                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4335                 break;
4336         case 4:
4337                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4338                 break;
4339         case 8:
4340                 exchanged = CMPXCHG64(kaddr, old, new);
4341                 break;
4342         default:
4343                 BUG();
4344         }
4345         kunmap_atomic(kaddr, KM_USER0);
4346         kvm_release_page_dirty(page);
4347
4348         if (!exchanged)
4349                 return X86EMUL_CMPXCHG_FAILED;
4350
4351         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4352
4353         return X86EMUL_CONTINUE;
4354
4355 emul_write:
4356         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4357
4358         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4359 }
4360
4361 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4362 {
4363         /* TODO: String I/O for in kernel device */
4364         int r;
4365
4366         if (vcpu->arch.pio.in)
4367                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4368                                     vcpu->arch.pio.size, pd);
4369         else
4370                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4371                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4372                                      pd);
4373         return r;
4374 }
4375
4376
4377 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4378                                     int size, unsigned short port, void *val,
4379                                     unsigned int count)
4380 {
4381         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4382
4383         if (vcpu->arch.pio.count)
4384                 goto data_avail;
4385
4386         trace_kvm_pio(0, port, size, count);
4387
4388         vcpu->arch.pio.port = port;
4389         vcpu->arch.pio.in = 1;
4390         vcpu->arch.pio.count  = count;
4391         vcpu->arch.pio.size = size;
4392
4393         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4394         data_avail:
4395                 memcpy(val, vcpu->arch.pio_data, size * count);
4396                 vcpu->arch.pio.count = 0;
4397                 return 1;
4398         }
4399
4400         vcpu->run->exit_reason = KVM_EXIT_IO;
4401         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4402         vcpu->run->io.size = size;
4403         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4404         vcpu->run->io.count = count;
4405         vcpu->run->io.port = port;
4406
4407         return 0;
4408 }
4409
4410 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4411                                      int size, unsigned short port,
4412                                      const void *val, unsigned int count)
4413 {
4414         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4415
4416         trace_kvm_pio(1, port, size, count);
4417
4418         vcpu->arch.pio.port = port;
4419         vcpu->arch.pio.in = 0;
4420         vcpu->arch.pio.count = count;
4421         vcpu->arch.pio.size = size;
4422
4423         memcpy(vcpu->arch.pio_data, val, size * count);
4424
4425         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4426                 vcpu->arch.pio.count = 0;
4427                 return 1;
4428         }
4429
4430         vcpu->run->exit_reason = KVM_EXIT_IO;
4431         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4432         vcpu->run->io.size = size;
4433         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4434         vcpu->run->io.count = count;
4435         vcpu->run->io.port = port;
4436
4437         return 0;
4438 }
4439
4440 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4441 {
4442         return kvm_x86_ops->get_segment_base(vcpu, seg);
4443 }
4444
4445 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4446 {
4447         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4448 }
4449
4450 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4451 {
4452         if (!need_emulate_wbinvd(vcpu))
4453                 return X86EMUL_CONTINUE;
4454
4455         if (kvm_x86_ops->has_wbinvd_exit()) {
4456                 int cpu = get_cpu();
4457
4458                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4459                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4460                                 wbinvd_ipi, NULL, 1);
4461                 put_cpu();
4462                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4463         } else
4464                 wbinvd();
4465         return X86EMUL_CONTINUE;
4466 }
4467 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4468
4469 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4470 {
4471         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4472 }
4473
4474 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4475 {
4476         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4477 }
4478
4479 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4480 {
4481
4482         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4483 }
4484
4485 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4486 {
4487         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4488 }
4489
4490 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4491 {
4492         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4493         unsigned long value;
4494
4495         switch (cr) {
4496         case 0:
4497                 value = kvm_read_cr0(vcpu);
4498                 break;
4499         case 2:
4500                 value = vcpu->arch.cr2;
4501                 break;
4502         case 3:
4503                 value = kvm_read_cr3(vcpu);
4504                 break;
4505         case 4:
4506                 value = kvm_read_cr4(vcpu);
4507                 break;
4508         case 8:
4509                 value = kvm_get_cr8(vcpu);
4510                 break;
4511         default:
4512                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4513                 return 0;
4514         }
4515
4516         return value;
4517 }
4518
4519 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4520 {
4521         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4522         int res = 0;
4523
4524         switch (cr) {
4525         case 0:
4526                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4527                 break;
4528         case 2:
4529                 vcpu->arch.cr2 = val;
4530                 break;
4531         case 3:
4532                 res = kvm_set_cr3(vcpu, val);
4533                 break;
4534         case 4:
4535                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4536                 break;
4537         case 8:
4538                 res = kvm_set_cr8(vcpu, val);
4539                 break;
4540         default:
4541                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4542                 res = -1;
4543         }
4544
4545         return res;
4546 }
4547
4548 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4549 {
4550         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4551 }
4552
4553 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4554 {
4555         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4556 }
4557
4558 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4559 {
4560         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4561 }
4562
4563 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4564 {
4565         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4566 }
4567
4568 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4569 {
4570         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4571 }
4572
4573 static unsigned long emulator_get_cached_segment_base(
4574         struct x86_emulate_ctxt *ctxt, int seg)
4575 {
4576         return get_segment_base(emul_to_vcpu(ctxt), seg);
4577 }
4578
4579 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4580                                  struct desc_struct *desc, u32 *base3,
4581                                  int seg)
4582 {
4583         struct kvm_segment var;
4584
4585         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4586         *selector = var.selector;
4587
4588         if (var.unusable)
4589                 return false;
4590
4591         if (var.g)
4592                 var.limit >>= 12;
4593         set_desc_limit(desc, var.limit);
4594         set_desc_base(desc, (unsigned long)var.base);
4595 #ifdef CONFIG_X86_64
4596         if (base3)
4597                 *base3 = var.base >> 32;
4598 #endif
4599         desc->type = var.type;
4600         desc->s = var.s;
4601         desc->dpl = var.dpl;
4602         desc->p = var.present;
4603         desc->avl = var.avl;
4604         desc->l = var.l;
4605         desc->d = var.db;
4606         desc->g = var.g;
4607
4608         return true;
4609 }
4610
4611 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4612                                  struct desc_struct *desc, u32 base3,
4613                                  int seg)
4614 {
4615         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4616         struct kvm_segment var;
4617
4618         var.selector = selector;
4619         var.base = get_desc_base(desc);
4620 #ifdef CONFIG_X86_64
4621         var.base |= ((u64)base3) << 32;
4622 #endif
4623         var.limit = get_desc_limit(desc);
4624         if (desc->g)
4625                 var.limit = (var.limit << 12) | 0xfff;
4626         var.type = desc->type;
4627         var.present = desc->p;
4628         var.dpl = desc->dpl;
4629         var.db = desc->d;
4630         var.s = desc->s;
4631         var.l = desc->l;
4632         var.g = desc->g;
4633         var.avl = desc->avl;
4634         var.present = desc->p;
4635         var.unusable = !var.present;
4636         var.padding = 0;
4637
4638         kvm_set_segment(vcpu, &var, seg);
4639         return;
4640 }
4641
4642 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4643                             u32 msr_index, u64 *pdata)
4644 {
4645         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4646 }
4647
4648 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4649                             u32 msr_index, u64 data)
4650 {
4651         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4652 }
4653
4654 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4655 {
4656         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4657 }
4658
4659 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4660 {
4661         preempt_disable();
4662         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4663         /*
4664          * CR0.TS may reference the host fpu state, not the guest fpu state,
4665          * so it may be clear at this point.
4666          */
4667         clts();
4668 }
4669
4670 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4671 {
4672         preempt_enable();
4673 }
4674
4675 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4676                               struct x86_instruction_info *info,
4677                               enum x86_intercept_stage stage)
4678 {
4679         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4680 }
4681
4682 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4683                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4684 {
4685         struct kvm_cpuid_entry2 *cpuid = NULL;
4686
4687         if (eax && ecx)
4688                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4689                                             *eax, *ecx);
4690
4691         if (cpuid) {
4692                 *eax = cpuid->eax;
4693                 *ecx = cpuid->ecx;
4694                 if (ebx)
4695                         *ebx = cpuid->ebx;
4696                 if (edx)
4697                         *edx = cpuid->edx;
4698                 return true;
4699         }
4700
4701         return false;
4702 }
4703
4704 static struct x86_emulate_ops emulate_ops = {
4705         .read_std            = kvm_read_guest_virt_system,
4706         .write_std           = kvm_write_guest_virt_system,
4707         .fetch               = kvm_fetch_guest_virt,
4708         .read_emulated       = emulator_read_emulated,
4709         .write_emulated      = emulator_write_emulated,
4710         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4711         .invlpg              = emulator_invlpg,
4712         .pio_in_emulated     = emulator_pio_in_emulated,
4713         .pio_out_emulated    = emulator_pio_out_emulated,
4714         .get_segment         = emulator_get_segment,
4715         .set_segment         = emulator_set_segment,
4716         .get_cached_segment_base = emulator_get_cached_segment_base,
4717         .get_gdt             = emulator_get_gdt,
4718         .get_idt             = emulator_get_idt,
4719         .set_gdt             = emulator_set_gdt,
4720         .set_idt             = emulator_set_idt,
4721         .get_cr              = emulator_get_cr,
4722         .set_cr              = emulator_set_cr,
4723         .cpl                 = emulator_get_cpl,
4724         .get_dr              = emulator_get_dr,
4725         .set_dr              = emulator_set_dr,
4726         .set_msr             = emulator_set_msr,
4727         .get_msr             = emulator_get_msr,
4728         .halt                = emulator_halt,
4729         .wbinvd              = emulator_wbinvd,
4730         .fix_hypercall       = emulator_fix_hypercall,
4731         .get_fpu             = emulator_get_fpu,
4732         .put_fpu             = emulator_put_fpu,
4733         .intercept           = emulator_intercept,
4734         .get_cpuid           = emulator_get_cpuid,
4735 };
4736
4737 static void cache_all_regs(struct kvm_vcpu *vcpu)
4738 {
4739         kvm_register_read(vcpu, VCPU_REGS_RAX);
4740         kvm_register_read(vcpu, VCPU_REGS_RSP);
4741         kvm_register_read(vcpu, VCPU_REGS_RIP);
4742         vcpu->arch.regs_dirty = ~0;
4743 }
4744
4745 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4746 {
4747         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4748         /*
4749          * an sti; sti; sequence only disable interrupts for the first
4750          * instruction. So, if the last instruction, be it emulated or
4751          * not, left the system with the INT_STI flag enabled, it
4752          * means that the last instruction is an sti. We should not
4753          * leave the flag on in this case. The same goes for mov ss
4754          */
4755         if (!(int_shadow & mask))
4756                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4757 }
4758
4759 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4760 {
4761         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4762         if (ctxt->exception.vector == PF_VECTOR)
4763                 kvm_propagate_fault(vcpu, &ctxt->exception);
4764         else if (ctxt->exception.error_code_valid)
4765                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4766                                       ctxt->exception.error_code);
4767         else
4768                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4769 }
4770
4771 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4772                               const unsigned long *regs)
4773 {
4774         memset(&ctxt->twobyte, 0,
4775                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4776         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4777
4778         ctxt->fetch.start = 0;
4779         ctxt->fetch.end = 0;
4780         ctxt->io_read.pos = 0;
4781         ctxt->io_read.end = 0;
4782         ctxt->mem_read.pos = 0;
4783         ctxt->mem_read.end = 0;
4784 }
4785
4786 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4787 {
4788         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4789         int cs_db, cs_l;
4790
4791         /*
4792          * TODO: fix emulate.c to use guest_read/write_register
4793          * instead of direct ->regs accesses, can save hundred cycles
4794          * on Intel for instructions that don't read/change RSP, for
4795          * for example.
4796          */
4797         cache_all_regs(vcpu);
4798
4799         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4800
4801         ctxt->eflags = kvm_get_rflags(vcpu);
4802         ctxt->eip = kvm_rip_read(vcpu);
4803         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4804                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4805                      cs_l                               ? X86EMUL_MODE_PROT64 :
4806                      cs_db                              ? X86EMUL_MODE_PROT32 :
4807                                                           X86EMUL_MODE_PROT16;
4808         ctxt->guest_mode = is_guest_mode(vcpu);
4809
4810         init_decode_cache(ctxt, vcpu->arch.regs);
4811         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4812 }
4813
4814 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4815 {
4816         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4817         int ret;
4818
4819         init_emulate_ctxt(vcpu);
4820
4821         ctxt->op_bytes = 2;
4822         ctxt->ad_bytes = 2;
4823         ctxt->_eip = ctxt->eip + inc_eip;
4824         ret = emulate_int_real(ctxt, irq);
4825
4826         if (ret != X86EMUL_CONTINUE)
4827                 return EMULATE_FAIL;
4828
4829         ctxt->eip = ctxt->_eip;
4830         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4831         kvm_rip_write(vcpu, ctxt->eip);
4832         kvm_set_rflags(vcpu, ctxt->eflags);
4833
4834         if (irq == NMI_VECTOR)
4835                 vcpu->arch.nmi_pending = 0;
4836         else
4837                 vcpu->arch.interrupt.pending = false;
4838
4839         return EMULATE_DONE;
4840 }
4841 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4842
4843 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4844 {
4845         int r = EMULATE_DONE;
4846
4847         ++vcpu->stat.insn_emulation_fail;
4848         trace_kvm_emulate_insn_failed(vcpu);
4849         if (!is_guest_mode(vcpu)) {
4850                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4851                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4852                 vcpu->run->internal.ndata = 0;
4853                 r = EMULATE_FAIL;
4854         }
4855         kvm_queue_exception(vcpu, UD_VECTOR);
4856
4857         return r;
4858 }
4859
4860 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4861 {
4862         gpa_t gpa;
4863
4864         if (tdp_enabled)
4865                 return false;
4866
4867         /*
4868          * if emulation was due to access to shadowed page table
4869          * and it failed try to unshadow page and re-entetr the
4870          * guest to let CPU execute the instruction.
4871          */
4872         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4873                 return true;
4874
4875         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4876
4877         if (gpa == UNMAPPED_GVA)
4878                 return true; /* let cpu generate fault */
4879
4880         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4881                 return true;
4882
4883         return false;
4884 }
4885
4886 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4887                             unsigned long cr2,
4888                             int emulation_type,
4889                             void *insn,
4890                             int insn_len)
4891 {
4892         int r;
4893         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4894         bool writeback = true;
4895
4896         kvm_clear_exception_queue(vcpu);
4897
4898         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4899                 init_emulate_ctxt(vcpu);
4900                 ctxt->interruptibility = 0;
4901                 ctxt->have_exception = false;
4902                 ctxt->perm_ok = false;
4903
4904                 ctxt->only_vendor_specific_insn
4905                         = emulation_type & EMULTYPE_TRAP_UD;
4906
4907                 r = x86_decode_insn(ctxt, insn, insn_len);
4908
4909                 trace_kvm_emulate_insn_start(vcpu);
4910                 ++vcpu->stat.insn_emulation;
4911                 if (r != EMULATION_OK)  {
4912                         if (emulation_type & EMULTYPE_TRAP_UD)
4913                                 return EMULATE_FAIL;
4914                         if (reexecute_instruction(vcpu, cr2))
4915                                 return EMULATE_DONE;
4916                         if (emulation_type & EMULTYPE_SKIP)
4917                                 return EMULATE_FAIL;
4918                         return handle_emulation_failure(vcpu);
4919                 }
4920         }
4921
4922         if (emulation_type & EMULTYPE_SKIP) {
4923                 kvm_rip_write(vcpu, ctxt->_eip);
4924                 return EMULATE_DONE;
4925         }
4926
4927         /* this is needed for vmware backdoor interface to work since it
4928            changes registers values  during IO operation */
4929         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4930                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4931                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4932         }
4933
4934 restart:
4935         r = x86_emulate_insn(ctxt);
4936
4937         if (r == EMULATION_INTERCEPTED)
4938                 return EMULATE_DONE;
4939
4940         if (r == EMULATION_FAILED) {
4941                 if (reexecute_instruction(vcpu, cr2))
4942                         return EMULATE_DONE;
4943
4944                 return handle_emulation_failure(vcpu);
4945         }
4946
4947         if (ctxt->have_exception) {
4948                 inject_emulated_exception(vcpu);
4949                 r = EMULATE_DONE;
4950         } else if (vcpu->arch.pio.count) {
4951                 if (!vcpu->arch.pio.in)
4952                         vcpu->arch.pio.count = 0;
4953                 else
4954                         writeback = false;
4955                 r = EMULATE_DO_MMIO;
4956         } else if (vcpu->mmio_needed) {
4957                 if (!vcpu->mmio_is_write)
4958                         writeback = false;
4959                 r = EMULATE_DO_MMIO;
4960         } else if (r == EMULATION_RESTART)
4961                 goto restart;
4962         else
4963                 r = EMULATE_DONE;
4964
4965         if (writeback) {
4966                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4967                 kvm_set_rflags(vcpu, ctxt->eflags);
4968                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4969                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4970                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4971                 kvm_rip_write(vcpu, ctxt->eip);
4972         } else
4973                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4974
4975         return r;
4976 }
4977 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4978
4979 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4980 {
4981         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4982         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4983                                             size, port, &val, 1);
4984         /* do not return to emulator after return from userspace */
4985         vcpu->arch.pio.count = 0;
4986         return ret;
4987 }
4988 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4989
4990 static void tsc_bad(void *info)
4991 {
4992         __this_cpu_write(cpu_tsc_khz, 0);
4993 }
4994
4995 static void tsc_khz_changed(void *data)
4996 {
4997         struct cpufreq_freqs *freq = data;
4998         unsigned long khz = 0;
4999
5000         if (data)
5001                 khz = freq->new;
5002         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5003                 khz = cpufreq_quick_get(raw_smp_processor_id());
5004         if (!khz)
5005                 khz = tsc_khz;
5006         __this_cpu_write(cpu_tsc_khz, khz);
5007 }
5008
5009 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5010                                      void *data)
5011 {
5012         struct cpufreq_freqs *freq = data;
5013         struct kvm *kvm;
5014         struct kvm_vcpu *vcpu;
5015         int i, send_ipi = 0;
5016
5017         /*
5018          * We allow guests to temporarily run on slowing clocks,
5019          * provided we notify them after, or to run on accelerating
5020          * clocks, provided we notify them before.  Thus time never
5021          * goes backwards.
5022          *
5023          * However, we have a problem.  We can't atomically update
5024          * the frequency of a given CPU from this function; it is
5025          * merely a notifier, which can be called from any CPU.
5026          * Changing the TSC frequency at arbitrary points in time
5027          * requires a recomputation of local variables related to
5028          * the TSC for each VCPU.  We must flag these local variables
5029          * to be updated and be sure the update takes place with the
5030          * new frequency before any guests proceed.
5031          *
5032          * Unfortunately, the combination of hotplug CPU and frequency
5033          * change creates an intractable locking scenario; the order
5034          * of when these callouts happen is undefined with respect to
5035          * CPU hotplug, and they can race with each other.  As such,
5036          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5037          * undefined; you can actually have a CPU frequency change take
5038          * place in between the computation of X and the setting of the
5039          * variable.  To protect against this problem, all updates of
5040          * the per_cpu tsc_khz variable are done in an interrupt
5041          * protected IPI, and all callers wishing to update the value
5042          * must wait for a synchronous IPI to complete (which is trivial
5043          * if the caller is on the CPU already).  This establishes the
5044          * necessary total order on variable updates.
5045          *
5046          * Note that because a guest time update may take place
5047          * anytime after the setting of the VCPU's request bit, the
5048          * correct TSC value must be set before the request.  However,
5049          * to ensure the update actually makes it to any guest which
5050          * starts running in hardware virtualization between the set
5051          * and the acquisition of the spinlock, we must also ping the
5052          * CPU after setting the request bit.
5053          *
5054          */
5055
5056         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5057                 return 0;
5058         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5059                 return 0;
5060
5061         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5062
5063         raw_spin_lock(&kvm_lock);
5064         list_for_each_entry(kvm, &vm_list, vm_list) {
5065                 kvm_for_each_vcpu(i, vcpu, kvm) {
5066                         if (vcpu->cpu != freq->cpu)
5067                                 continue;
5068                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5069                         if (vcpu->cpu != smp_processor_id())
5070                                 send_ipi = 1;
5071                 }
5072         }
5073         raw_spin_unlock(&kvm_lock);
5074
5075         if (freq->old < freq->new && send_ipi) {
5076                 /*
5077                  * We upscale the frequency.  Must make the guest
5078                  * doesn't see old kvmclock values while running with
5079                  * the new frequency, otherwise we risk the guest sees
5080                  * time go backwards.
5081                  *
5082                  * In case we update the frequency for another cpu
5083                  * (which might be in guest context) send an interrupt
5084                  * to kick the cpu out of guest context.  Next time
5085                  * guest context is entered kvmclock will be updated,
5086                  * so the guest will not see stale values.
5087                  */
5088                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5089         }
5090         return 0;
5091 }
5092
5093 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5094         .notifier_call  = kvmclock_cpufreq_notifier
5095 };
5096
5097 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5098                                         unsigned long action, void *hcpu)
5099 {
5100         unsigned int cpu = (unsigned long)hcpu;
5101
5102         switch (action) {
5103                 case CPU_ONLINE:
5104                 case CPU_DOWN_FAILED:
5105                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5106                         break;
5107                 case CPU_DOWN_PREPARE:
5108                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5109                         break;
5110         }
5111         return NOTIFY_OK;
5112 }
5113
5114 static struct notifier_block kvmclock_cpu_notifier_block = {
5115         .notifier_call  = kvmclock_cpu_notifier,
5116         .priority = -INT_MAX
5117 };
5118
5119 static void kvm_timer_init(void)
5120 {
5121         int cpu;
5122
5123         max_tsc_khz = tsc_khz;
5124         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5125         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5126 #ifdef CONFIG_CPU_FREQ
5127                 struct cpufreq_policy policy;
5128                 memset(&policy, 0, sizeof(policy));
5129                 cpu = get_cpu();
5130                 cpufreq_get_policy(&policy, cpu);
5131                 if (policy.cpuinfo.max_freq)
5132                         max_tsc_khz = policy.cpuinfo.max_freq;
5133                 put_cpu();
5134 #endif
5135                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5136                                           CPUFREQ_TRANSITION_NOTIFIER);
5137         }
5138         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5139         for_each_online_cpu(cpu)
5140                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5141 }
5142
5143 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5144
5145 static int kvm_is_in_guest(void)
5146 {
5147         return percpu_read(current_vcpu) != NULL;
5148 }
5149
5150 static int kvm_is_user_mode(void)
5151 {
5152         int user_mode = 3;
5153
5154         if (percpu_read(current_vcpu))
5155                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5156
5157         return user_mode != 0;
5158 }
5159
5160 static unsigned long kvm_get_guest_ip(void)
5161 {
5162         unsigned long ip = 0;
5163
5164         if (percpu_read(current_vcpu))
5165                 ip = kvm_rip_read(percpu_read(current_vcpu));
5166
5167         return ip;
5168 }
5169
5170 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5171         .is_in_guest            = kvm_is_in_guest,
5172         .is_user_mode           = kvm_is_user_mode,
5173         .get_guest_ip           = kvm_get_guest_ip,
5174 };
5175
5176 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5177 {
5178         percpu_write(current_vcpu, vcpu);
5179 }
5180 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5181
5182 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5183 {
5184         percpu_write(current_vcpu, NULL);
5185 }
5186 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5187
5188 static void kvm_set_mmio_spte_mask(void)
5189 {
5190         u64 mask;
5191         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5192
5193         /*
5194          * Set the reserved bits and the present bit of an paging-structure
5195          * entry to generate page fault with PFER.RSV = 1.
5196          */
5197         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5198         mask |= 1ull;
5199
5200 #ifdef CONFIG_X86_64
5201         /*
5202          * If reserved bit is not supported, clear the present bit to disable
5203          * mmio page fault.
5204          */
5205         if (maxphyaddr == 52)
5206                 mask &= ~1ull;
5207 #endif
5208
5209         kvm_mmu_set_mmio_spte_mask(mask);
5210 }
5211
5212 int kvm_arch_init(void *opaque)
5213 {
5214         int r;
5215         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5216
5217         if (kvm_x86_ops) {
5218                 printk(KERN_ERR "kvm: already loaded the other module\n");
5219                 r = -EEXIST;
5220                 goto out;
5221         }
5222
5223         if (!ops->cpu_has_kvm_support()) {
5224                 printk(KERN_ERR "kvm: no hardware support\n");
5225                 r = -EOPNOTSUPP;
5226                 goto out;
5227         }
5228         if (ops->disabled_by_bios()) {
5229                 printk(KERN_ERR "kvm: disabled by bios\n");
5230                 r = -EOPNOTSUPP;
5231                 goto out;
5232         }
5233
5234         r = kvm_mmu_module_init();
5235         if (r)
5236                 goto out;
5237
5238         kvm_set_mmio_spte_mask();
5239         kvm_init_msr_list();
5240
5241         kvm_x86_ops = ops;
5242         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5243                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5244
5245         kvm_timer_init();
5246
5247         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5248
5249         if (cpu_has_xsave)
5250                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5251
5252         return 0;
5253
5254 out:
5255         return r;
5256 }
5257
5258 void kvm_arch_exit(void)
5259 {
5260         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5261
5262         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5263                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5264                                             CPUFREQ_TRANSITION_NOTIFIER);
5265         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5266         kvm_x86_ops = NULL;
5267         kvm_mmu_module_exit();
5268 }
5269
5270 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5271 {
5272         ++vcpu->stat.halt_exits;
5273         if (irqchip_in_kernel(vcpu->kvm)) {
5274                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5275                 return 1;
5276         } else {
5277                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5278                 return 0;
5279         }
5280 }
5281 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5282
5283 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5284                            unsigned long a1)
5285 {
5286         if (is_long_mode(vcpu))
5287                 return a0;
5288         else
5289                 return a0 | ((gpa_t)a1 << 32);
5290 }
5291
5292 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5293 {
5294         u64 param, ingpa, outgpa, ret;
5295         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5296         bool fast, longmode;
5297         int cs_db, cs_l;
5298
5299         /*
5300          * hypercall generates UD from non zero cpl and real mode
5301          * per HYPER-V spec
5302          */
5303         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5304                 kvm_queue_exception(vcpu, UD_VECTOR);
5305                 return 0;
5306         }
5307
5308         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5309         longmode = is_long_mode(vcpu) && cs_l == 1;
5310
5311         if (!longmode) {
5312                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5313                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5314                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5315                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5316                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5317                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5318         }
5319 #ifdef CONFIG_X86_64
5320         else {
5321                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5322                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5323                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5324         }
5325 #endif
5326
5327         code = param & 0xffff;
5328         fast = (param >> 16) & 0x1;
5329         rep_cnt = (param >> 32) & 0xfff;
5330         rep_idx = (param >> 48) & 0xfff;
5331
5332         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5333
5334         switch (code) {
5335         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5336                 kvm_vcpu_on_spin(vcpu);
5337                 break;
5338         default:
5339                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5340                 break;
5341         }
5342
5343         ret = res | (((u64)rep_done & 0xfff) << 32);
5344         if (longmode) {
5345                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5346         } else {
5347                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5348                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5349         }
5350
5351         return 1;
5352 }
5353
5354 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5355 {
5356         unsigned long nr, a0, a1, a2, a3, ret;
5357         int r = 1;
5358
5359         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5360                 return kvm_hv_hypercall(vcpu);
5361
5362         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5363         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5364         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5365         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5366         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5367
5368         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5369
5370         if (!is_long_mode(vcpu)) {
5371                 nr &= 0xFFFFFFFF;
5372                 a0 &= 0xFFFFFFFF;
5373                 a1 &= 0xFFFFFFFF;
5374                 a2 &= 0xFFFFFFFF;
5375                 a3 &= 0xFFFFFFFF;
5376         }
5377
5378         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5379                 ret = -KVM_EPERM;
5380                 goto out;
5381         }
5382
5383         switch (nr) {
5384         case KVM_HC_VAPIC_POLL_IRQ:
5385                 ret = 0;
5386                 break;
5387         case KVM_HC_MMU_OP:
5388                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5389                 break;
5390         default:
5391                 ret = -KVM_ENOSYS;
5392                 break;
5393         }
5394 out:
5395         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5396         ++vcpu->stat.hypercalls;
5397         return r;
5398 }
5399 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5400
5401 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5402 {
5403         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5404         char instruction[3];
5405         unsigned long rip = kvm_rip_read(vcpu);
5406
5407         /*
5408          * Blow out the MMU to ensure that no other VCPU has an active mapping
5409          * to ensure that the updated hypercall appears atomically across all
5410          * VCPUs.
5411          */
5412         kvm_mmu_zap_all(vcpu->kvm);
5413
5414         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5415
5416         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5417 }
5418
5419 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5420 {
5421         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5422         int j, nent = vcpu->arch.cpuid_nent;
5423
5424         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5425         /* when no next entry is found, the current entry[i] is reselected */
5426         for (j = i + 1; ; j = (j + 1) % nent) {
5427                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5428                 if (ej->function == e->function) {
5429                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5430                         return j;
5431                 }
5432         }
5433         return 0; /* silence gcc, even though control never reaches here */
5434 }
5435
5436 /* find an entry with matching function, matching index (if needed), and that
5437  * should be read next (if it's stateful) */
5438 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5439         u32 function, u32 index)
5440 {
5441         if (e->function != function)
5442                 return 0;
5443         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5444                 return 0;
5445         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5446             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5447                 return 0;
5448         return 1;
5449 }
5450
5451 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5452                                               u32 function, u32 index)
5453 {
5454         int i;
5455         struct kvm_cpuid_entry2 *best = NULL;
5456
5457         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5458                 struct kvm_cpuid_entry2 *e;
5459
5460                 e = &vcpu->arch.cpuid_entries[i];
5461                 if (is_matching_cpuid_entry(e, function, index)) {
5462                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5463                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5464                         best = e;
5465                         break;
5466                 }
5467         }
5468         return best;
5469 }
5470 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5471
5472 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5473 {
5474         struct kvm_cpuid_entry2 *best;
5475
5476         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5477         if (!best || best->eax < 0x80000008)
5478                 goto not_found;
5479         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5480         if (best)
5481                 return best->eax & 0xff;
5482 not_found:
5483         return 36;
5484 }
5485
5486 /*
5487  * If no match is found, check whether we exceed the vCPU's limit
5488  * and return the content of the highest valid _standard_ leaf instead.
5489  * This is to satisfy the CPUID specification.
5490  */
5491 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5492                                                   u32 function, u32 index)
5493 {
5494         struct kvm_cpuid_entry2 *maxlevel;
5495
5496         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5497         if (!maxlevel || maxlevel->eax >= function)
5498                 return NULL;
5499         if (function & 0x80000000) {
5500                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5501                 if (!maxlevel)
5502                         return NULL;
5503         }
5504         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5505 }
5506
5507 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5508 {
5509         u32 function, index;
5510         struct kvm_cpuid_entry2 *best;
5511
5512         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5513         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5514         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5515         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5516         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5517         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5518         best = kvm_find_cpuid_entry(vcpu, function, index);
5519
5520         if (!best)
5521                 best = check_cpuid_limit(vcpu, function, index);
5522
5523         if (best) {
5524                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5525                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5526                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5527                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5528         }
5529         kvm_x86_ops->skip_emulated_instruction(vcpu);
5530         trace_kvm_cpuid(function,
5531                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5532                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5533                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5534                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5535 }
5536 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5537
5538 /*
5539  * Check if userspace requested an interrupt window, and that the
5540  * interrupt window is open.
5541  *
5542  * No need to exit to userspace if we already have an interrupt queued.
5543  */
5544 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5545 {
5546         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5547                 vcpu->run->request_interrupt_window &&
5548                 kvm_arch_interrupt_allowed(vcpu));
5549 }
5550
5551 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5552 {
5553         struct kvm_run *kvm_run = vcpu->run;
5554
5555         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5556         kvm_run->cr8 = kvm_get_cr8(vcpu);
5557         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5558         if (irqchip_in_kernel(vcpu->kvm))
5559                 kvm_run->ready_for_interrupt_injection = 1;
5560         else
5561                 kvm_run->ready_for_interrupt_injection =
5562                         kvm_arch_interrupt_allowed(vcpu) &&
5563                         !kvm_cpu_has_interrupt(vcpu) &&
5564                         !kvm_event_needs_reinjection(vcpu);
5565 }
5566
5567 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5568 {
5569         int max_irr, tpr;
5570
5571         if (!kvm_x86_ops->update_cr8_intercept)
5572                 return;
5573
5574         if (!vcpu->arch.apic)
5575                 return;
5576
5577         if (!vcpu->arch.apic->vapic_addr)
5578                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5579         else
5580                 max_irr = -1;
5581
5582         if (max_irr != -1)
5583                 max_irr >>= 4;
5584
5585         tpr = kvm_lapic_get_cr8(vcpu);
5586
5587         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5588 }
5589
5590 static void inject_pending_event(struct kvm_vcpu *vcpu)
5591 {
5592         /* try to reinject previous events if any */
5593         if (vcpu->arch.exception.pending) {
5594                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5595                                         vcpu->arch.exception.has_error_code,
5596                                         vcpu->arch.exception.error_code);
5597                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5598                                           vcpu->arch.exception.has_error_code,
5599                                           vcpu->arch.exception.error_code,
5600                                           vcpu->arch.exception.reinject);
5601                 return;
5602         }
5603
5604         if (vcpu->arch.nmi_injected) {
5605                 kvm_x86_ops->set_nmi(vcpu);
5606                 return;
5607         }
5608
5609         if (vcpu->arch.interrupt.pending) {
5610                 kvm_x86_ops->set_irq(vcpu);
5611                 return;
5612         }
5613
5614         /* try to inject new event if pending */
5615         if (vcpu->arch.nmi_pending) {
5616                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5617                         --vcpu->arch.nmi_pending;
5618                         vcpu->arch.nmi_injected = true;
5619                         kvm_x86_ops->set_nmi(vcpu);
5620                 }
5621         } else if (kvm_cpu_has_interrupt(vcpu)) {
5622                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5623                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5624                                             false);
5625                         kvm_x86_ops->set_irq(vcpu);
5626                 }
5627         }
5628 }
5629
5630 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5631 {
5632         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5633                         !vcpu->guest_xcr0_loaded) {
5634                 /* kvm_set_xcr() also depends on this */
5635                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5636                 vcpu->guest_xcr0_loaded = 1;
5637         }
5638 }
5639
5640 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5641 {
5642         if (vcpu->guest_xcr0_loaded) {
5643                 if (vcpu->arch.xcr0 != host_xcr0)
5644                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5645                 vcpu->guest_xcr0_loaded = 0;
5646         }
5647 }
5648
5649 static void process_nmi(struct kvm_vcpu *vcpu)
5650 {
5651         unsigned limit = 2;
5652
5653         /*
5654          * x86 is limited to one NMI running, and one NMI pending after it.
5655          * If an NMI is already in progress, limit further NMIs to just one.
5656          * Otherwise, allow two (and we'll inject the first one immediately).
5657          */
5658         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5659                 limit = 1;
5660
5661         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5662         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5663         kvm_make_request(KVM_REQ_EVENT, vcpu);
5664 }
5665
5666 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5667 {
5668         int r;
5669         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5670                 vcpu->run->request_interrupt_window;
5671
5672         if (vcpu->requests) {
5673                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5674                         kvm_mmu_unload(vcpu);
5675                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5676                         __kvm_migrate_timers(vcpu);
5677                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5678                         r = kvm_guest_time_update(vcpu);
5679                         if (unlikely(r))
5680                                 goto out;
5681                 }
5682                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5683                         kvm_mmu_sync_roots(vcpu);
5684                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5685                         kvm_x86_ops->tlb_flush(vcpu);
5686                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5687                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5688                         r = 0;
5689                         goto out;
5690                 }
5691                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5692                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5693                         r = 0;
5694                         goto out;
5695                 }
5696                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5697                         vcpu->fpu_active = 0;
5698                         kvm_x86_ops->fpu_deactivate(vcpu);
5699                 }
5700                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5701                         /* Page is swapped out. Do synthetic halt */
5702                         vcpu->arch.apf.halted = true;
5703                         r = 1;
5704                         goto out;
5705                 }
5706                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5707                         record_steal_time(vcpu);
5708                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5709                         process_nmi(vcpu);
5710
5711         }
5712
5713         r = kvm_mmu_reload(vcpu);
5714         if (unlikely(r))
5715                 goto out;
5716
5717         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5718                 inject_pending_event(vcpu);
5719
5720                 /* enable NMI/IRQ window open exits if needed */
5721                 if (vcpu->arch.nmi_pending)
5722                         kvm_x86_ops->enable_nmi_window(vcpu);
5723                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5724                         kvm_x86_ops->enable_irq_window(vcpu);
5725
5726                 if (kvm_lapic_enabled(vcpu)) {
5727                         update_cr8_intercept(vcpu);
5728                         kvm_lapic_sync_to_vapic(vcpu);
5729                 }
5730         }
5731
5732         preempt_disable();
5733
5734         kvm_x86_ops->prepare_guest_switch(vcpu);
5735         if (vcpu->fpu_active)
5736                 kvm_load_guest_fpu(vcpu);
5737         kvm_load_guest_xcr0(vcpu);
5738
5739         vcpu->mode = IN_GUEST_MODE;
5740
5741         /* We should set ->mode before check ->requests,
5742          * see the comment in make_all_cpus_request.
5743          */
5744         smp_mb();
5745
5746         local_irq_disable();
5747
5748         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5749             || need_resched() || signal_pending(current)) {
5750                 vcpu->mode = OUTSIDE_GUEST_MODE;
5751                 smp_wmb();
5752                 local_irq_enable();
5753                 preempt_enable();
5754                 kvm_x86_ops->cancel_injection(vcpu);
5755                 r = 1;
5756                 goto out;
5757         }
5758
5759         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5760
5761         kvm_guest_enter();
5762
5763         if (unlikely(vcpu->arch.switch_db_regs)) {
5764                 set_debugreg(0, 7);
5765                 set_debugreg(vcpu->arch.eff_db[0], 0);
5766                 set_debugreg(vcpu->arch.eff_db[1], 1);
5767                 set_debugreg(vcpu->arch.eff_db[2], 2);
5768                 set_debugreg(vcpu->arch.eff_db[3], 3);
5769         }
5770
5771         trace_kvm_entry(vcpu->vcpu_id);
5772         kvm_x86_ops->run(vcpu);
5773
5774         /*
5775          * If the guest has used debug registers, at least dr7
5776          * will be disabled while returning to the host.
5777          * If we don't have active breakpoints in the host, we don't
5778          * care about the messed up debug address registers. But if
5779          * we have some of them active, restore the old state.
5780          */
5781         if (hw_breakpoint_active())
5782                 hw_breakpoint_restore();
5783
5784         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5785
5786         vcpu->mode = OUTSIDE_GUEST_MODE;
5787         smp_wmb();
5788         local_irq_enable();
5789
5790         ++vcpu->stat.exits;
5791
5792         /*
5793          * We must have an instruction between local_irq_enable() and
5794          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5795          * the interrupt shadow.  The stat.exits increment will do nicely.
5796          * But we need to prevent reordering, hence this barrier():
5797          */
5798         barrier();
5799
5800         kvm_guest_exit();
5801
5802         preempt_enable();
5803
5804         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5805
5806         /*
5807          * Profile KVM exit RIPs:
5808          */
5809         if (unlikely(prof_on == KVM_PROFILING)) {
5810                 unsigned long rip = kvm_rip_read(vcpu);
5811                 profile_hit(KVM_PROFILING, (void *)rip);
5812         }
5813
5814
5815         kvm_lapic_sync_from_vapic(vcpu);
5816
5817         r = kvm_x86_ops->handle_exit(vcpu);
5818 out:
5819         return r;
5820 }
5821
5822
5823 static int __vcpu_run(struct kvm_vcpu *vcpu)
5824 {
5825         int r;
5826         struct kvm *kvm = vcpu->kvm;
5827
5828         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5829                 pr_debug("vcpu %d received sipi with vector # %x\n",
5830                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5831                 kvm_lapic_reset(vcpu);
5832                 r = kvm_arch_vcpu_reset(vcpu);
5833                 if (r)
5834                         return r;
5835                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5836         }
5837
5838         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5839
5840         r = 1;
5841         while (r > 0) {
5842                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5843                     !vcpu->arch.apf.halted)
5844                         r = vcpu_enter_guest(vcpu);
5845                 else {
5846                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5847                         kvm_vcpu_block(vcpu);
5848                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5849                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5850                         {
5851                                 switch(vcpu->arch.mp_state) {
5852                                 case KVM_MP_STATE_HALTED:
5853                                         vcpu->arch.mp_state =
5854                                                 KVM_MP_STATE_RUNNABLE;
5855                                 case KVM_MP_STATE_RUNNABLE:
5856                                         vcpu->arch.apf.halted = false;
5857                                         break;
5858                                 case KVM_MP_STATE_SIPI_RECEIVED:
5859                                 default:
5860                                         r = -EINTR;
5861                                         break;
5862                                 }
5863                         }
5864                 }
5865
5866                 if (r <= 0)
5867                         break;
5868
5869                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5870                 if (kvm_cpu_has_pending_timer(vcpu))
5871                         kvm_inject_pending_timer_irqs(vcpu);
5872
5873                 if (dm_request_for_irq_injection(vcpu)) {
5874                         r = -EINTR;
5875                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5876                         ++vcpu->stat.request_irq_exits;
5877                 }
5878
5879                 kvm_check_async_pf_completion(vcpu);
5880
5881                 if (signal_pending(current)) {
5882                         r = -EINTR;
5883                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5884                         ++vcpu->stat.signal_exits;
5885                 }
5886                 if (need_resched()) {
5887                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5888                         kvm_resched(vcpu);
5889                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5890                 }
5891         }
5892
5893         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5894
5895         return r;
5896 }
5897
5898 static int complete_mmio(struct kvm_vcpu *vcpu)
5899 {
5900         struct kvm_run *run = vcpu->run;
5901         int r;
5902
5903         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5904                 return 1;
5905
5906         if (vcpu->mmio_needed) {
5907                 vcpu->mmio_needed = 0;
5908                 if (!vcpu->mmio_is_write)
5909                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5910                                run->mmio.data, 8);
5911                 vcpu->mmio_index += 8;
5912                 if (vcpu->mmio_index < vcpu->mmio_size) {
5913                         run->exit_reason = KVM_EXIT_MMIO;
5914                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5915                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5916                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5917                         run->mmio.is_write = vcpu->mmio_is_write;
5918                         vcpu->mmio_needed = 1;
5919                         return 0;
5920                 }
5921                 if (vcpu->mmio_is_write)
5922                         return 1;
5923                 vcpu->mmio_read_completed = 1;
5924         }
5925         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5926         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5927         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5928         if (r != EMULATE_DONE)
5929                 return 0;
5930         return 1;
5931 }
5932
5933 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5934 {
5935         int r;
5936         sigset_t sigsaved;
5937
5938         if (!tsk_used_math(current) && init_fpu(current))
5939                 return -ENOMEM;
5940
5941         if (vcpu->sigset_active)
5942                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5943
5944         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5945                 kvm_vcpu_block(vcpu);
5946                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5947                 r = -EAGAIN;
5948                 goto out;
5949         }
5950
5951         /* re-sync apic's tpr */
5952         if (!irqchip_in_kernel(vcpu->kvm)) {
5953                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5954                         r = -EINVAL;
5955                         goto out;
5956                 }
5957         }
5958
5959         r = complete_mmio(vcpu);
5960         if (r <= 0)
5961                 goto out;
5962
5963         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5964                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5965                                      kvm_run->hypercall.ret);
5966
5967         r = __vcpu_run(vcpu);
5968
5969 out:
5970         post_kvm_run_save(vcpu);
5971         if (vcpu->sigset_active)
5972                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5973
5974         return r;
5975 }
5976
5977 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5978 {
5979         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5980                 /*
5981                  * We are here if userspace calls get_regs() in the middle of
5982                  * instruction emulation. Registers state needs to be copied
5983                  * back from emulation context to vcpu. Usrapace shouldn't do
5984                  * that usually, but some bad designed PV devices (vmware
5985                  * backdoor interface) need this to work
5986                  */
5987                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5988                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5989                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5990         }
5991         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5992         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5993         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5994         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5995         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5996         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5997         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5998         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5999 #ifdef CONFIG_X86_64
6000         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6001         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6002         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6003         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6004         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6005         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6006         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6007         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6008 #endif
6009
6010         regs->rip = kvm_rip_read(vcpu);
6011         regs->rflags = kvm_get_rflags(vcpu);
6012
6013         return 0;
6014 }
6015
6016 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6017 {
6018         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6019         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6020
6021         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6022         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6023         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6024         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6025         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6026         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6027         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6028         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6029 #ifdef CONFIG_X86_64
6030         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6031         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6032         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6033         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6034         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6035         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6036         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6037         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6038 #endif
6039
6040         kvm_rip_write(vcpu, regs->rip);
6041         kvm_set_rflags(vcpu, regs->rflags);
6042
6043         vcpu->arch.exception.pending = false;
6044
6045         kvm_make_request(KVM_REQ_EVENT, vcpu);
6046
6047         return 0;
6048 }
6049
6050 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6051 {
6052         struct kvm_segment cs;
6053
6054         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6055         *db = cs.db;
6056         *l = cs.l;
6057 }
6058 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6059
6060 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6061                                   struct kvm_sregs *sregs)
6062 {
6063         struct desc_ptr dt;
6064
6065         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6066         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6067         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6068         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6069         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6070         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6071
6072         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6073         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6074
6075         kvm_x86_ops->get_idt(vcpu, &dt);
6076         sregs->idt.limit = dt.size;
6077         sregs->idt.base = dt.address;
6078         kvm_x86_ops->get_gdt(vcpu, &dt);
6079         sregs->gdt.limit = dt.size;
6080         sregs->gdt.base = dt.address;
6081
6082         sregs->cr0 = kvm_read_cr0(vcpu);
6083         sregs->cr2 = vcpu->arch.cr2;
6084         sregs->cr3 = kvm_read_cr3(vcpu);
6085         sregs->cr4 = kvm_read_cr4(vcpu);
6086         sregs->cr8 = kvm_get_cr8(vcpu);
6087         sregs->efer = vcpu->arch.efer;
6088         sregs->apic_base = kvm_get_apic_base(vcpu);
6089
6090         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6091
6092         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6093                 set_bit(vcpu->arch.interrupt.nr,
6094                         (unsigned long *)sregs->interrupt_bitmap);
6095
6096         return 0;
6097 }
6098
6099 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6100                                     struct kvm_mp_state *mp_state)
6101 {
6102         mp_state->mp_state = vcpu->arch.mp_state;
6103         return 0;
6104 }
6105
6106 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6107                                     struct kvm_mp_state *mp_state)
6108 {
6109         vcpu->arch.mp_state = mp_state->mp_state;
6110         kvm_make_request(KVM_REQ_EVENT, vcpu);
6111         return 0;
6112 }
6113
6114 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6115                     bool has_error_code, u32 error_code)
6116 {
6117         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6118         int ret;
6119
6120         init_emulate_ctxt(vcpu);
6121
6122         ret = emulator_task_switch(ctxt, tss_selector, reason,
6123                                    has_error_code, error_code);
6124
6125         if (ret)
6126                 return EMULATE_FAIL;
6127
6128         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6129         kvm_rip_write(vcpu, ctxt->eip);
6130         kvm_set_rflags(vcpu, ctxt->eflags);
6131         kvm_make_request(KVM_REQ_EVENT, vcpu);
6132         return EMULATE_DONE;
6133 }
6134 EXPORT_SYMBOL_GPL(kvm_task_switch);
6135
6136 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6137                                   struct kvm_sregs *sregs)
6138 {
6139         int mmu_reset_needed = 0;
6140         int pending_vec, max_bits, idx;
6141         struct desc_ptr dt;
6142
6143         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6144                 return -EINVAL;
6145
6146         dt.size = sregs->idt.limit;
6147         dt.address = sregs->idt.base;
6148         kvm_x86_ops->set_idt(vcpu, &dt);
6149         dt.size = sregs->gdt.limit;
6150         dt.address = sregs->gdt.base;
6151         kvm_x86_ops->set_gdt(vcpu, &dt);
6152
6153         vcpu->arch.cr2 = sregs->cr2;
6154         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6155         vcpu->arch.cr3 = sregs->cr3;
6156         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6157
6158         kvm_set_cr8(vcpu, sregs->cr8);
6159
6160         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6161         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6162         kvm_set_apic_base(vcpu, sregs->apic_base);
6163
6164         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6165         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6166         vcpu->arch.cr0 = sregs->cr0;
6167
6168         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6169         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6170         if (sregs->cr4 & X86_CR4_OSXSAVE)
6171                 update_cpuid(vcpu);
6172
6173         idx = srcu_read_lock(&vcpu->kvm->srcu);
6174         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6175                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6176                 mmu_reset_needed = 1;
6177         }
6178         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6179
6180         if (mmu_reset_needed)
6181                 kvm_mmu_reset_context(vcpu);
6182
6183         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6184         pending_vec = find_first_bit(
6185                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6186         if (pending_vec < max_bits) {
6187                 kvm_queue_interrupt(vcpu, pending_vec, false);
6188                 pr_debug("Set back pending irq %d\n", pending_vec);
6189         }
6190
6191         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6192         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6193         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6194         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6195         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6196         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6197
6198         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6199         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6200
6201         update_cr8_intercept(vcpu);
6202
6203         /* Older userspace won't unhalt the vcpu on reset. */
6204         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6205             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6206             !is_protmode(vcpu))
6207                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6208
6209         kvm_make_request(KVM_REQ_EVENT, vcpu);
6210
6211         return 0;
6212 }
6213
6214 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6215                                         struct kvm_guest_debug *dbg)
6216 {
6217         unsigned long rflags;
6218         int i, r;
6219
6220         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6221                 r = -EBUSY;
6222                 if (vcpu->arch.exception.pending)
6223                         goto out;
6224                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6225                         kvm_queue_exception(vcpu, DB_VECTOR);
6226                 else
6227                         kvm_queue_exception(vcpu, BP_VECTOR);
6228         }
6229
6230         /*
6231          * Read rflags as long as potentially injected trace flags are still
6232          * filtered out.
6233          */
6234         rflags = kvm_get_rflags(vcpu);
6235
6236         vcpu->guest_debug = dbg->control;
6237         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6238                 vcpu->guest_debug = 0;
6239
6240         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6241                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6242                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6243                 vcpu->arch.switch_db_regs =
6244                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6245         } else {
6246                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6247                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6248                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6249         }
6250
6251         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6252                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6253                         get_segment_base(vcpu, VCPU_SREG_CS);
6254
6255         /*
6256          * Trigger an rflags update that will inject or remove the trace
6257          * flags.
6258          */
6259         kvm_set_rflags(vcpu, rflags);
6260
6261         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6262
6263         r = 0;
6264
6265 out:
6266
6267         return r;
6268 }
6269
6270 /*
6271  * Translate a guest virtual address to a guest physical address.
6272  */
6273 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6274                                     struct kvm_translation *tr)
6275 {
6276         unsigned long vaddr = tr->linear_address;
6277         gpa_t gpa;
6278         int idx;
6279
6280         idx = srcu_read_lock(&vcpu->kvm->srcu);
6281         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6282         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6283         tr->physical_address = gpa;
6284         tr->valid = gpa != UNMAPPED_GVA;
6285         tr->writeable = 1;
6286         tr->usermode = 0;
6287
6288         return 0;
6289 }
6290
6291 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6292 {
6293         struct i387_fxsave_struct *fxsave =
6294                         &vcpu->arch.guest_fpu.state->fxsave;
6295
6296         memcpy(fpu->fpr, fxsave->st_space, 128);
6297         fpu->fcw = fxsave->cwd;
6298         fpu->fsw = fxsave->swd;
6299         fpu->ftwx = fxsave->twd;
6300         fpu->last_opcode = fxsave->fop;
6301         fpu->last_ip = fxsave->rip;
6302         fpu->last_dp = fxsave->rdp;
6303         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6304
6305         return 0;
6306 }
6307
6308 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6309 {
6310         struct i387_fxsave_struct *fxsave =
6311                         &vcpu->arch.guest_fpu.state->fxsave;
6312
6313         memcpy(fxsave->st_space, fpu->fpr, 128);
6314         fxsave->cwd = fpu->fcw;
6315         fxsave->swd = fpu->fsw;
6316         fxsave->twd = fpu->ftwx;
6317         fxsave->fop = fpu->last_opcode;
6318         fxsave->rip = fpu->last_ip;
6319         fxsave->rdp = fpu->last_dp;
6320         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6321
6322         return 0;
6323 }
6324
6325 int fx_init(struct kvm_vcpu *vcpu)
6326 {
6327         int err;
6328
6329         err = fpu_alloc(&vcpu->arch.guest_fpu);
6330         if (err)
6331                 return err;
6332
6333         fpu_finit(&vcpu->arch.guest_fpu);
6334
6335         /*
6336          * Ensure guest xcr0 is valid for loading
6337          */
6338         vcpu->arch.xcr0 = XSTATE_FP;
6339
6340         vcpu->arch.cr0 |= X86_CR0_ET;
6341
6342         return 0;
6343 }
6344 EXPORT_SYMBOL_GPL(fx_init);
6345
6346 static void fx_free(struct kvm_vcpu *vcpu)
6347 {
6348         fpu_free(&vcpu->arch.guest_fpu);
6349 }
6350
6351 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6352 {
6353         if (vcpu->guest_fpu_loaded)
6354                 return;
6355
6356         /*
6357          * Restore all possible states in the guest,
6358          * and assume host would use all available bits.
6359          * Guest xcr0 would be loaded later.
6360          */
6361         kvm_put_guest_xcr0(vcpu);
6362         vcpu->guest_fpu_loaded = 1;
6363         unlazy_fpu(current);
6364         fpu_restore_checking(&vcpu->arch.guest_fpu);
6365         trace_kvm_fpu(1);
6366 }
6367
6368 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6369 {
6370         kvm_put_guest_xcr0(vcpu);
6371
6372         if (!vcpu->guest_fpu_loaded)
6373                 return;
6374
6375         vcpu->guest_fpu_loaded = 0;
6376         fpu_save_init(&vcpu->arch.guest_fpu);
6377         ++vcpu->stat.fpu_reload;
6378         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6379         trace_kvm_fpu(0);
6380 }
6381
6382 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6383 {
6384         kvmclock_reset(vcpu);
6385
6386         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6387         fx_free(vcpu);
6388         kvm_x86_ops->vcpu_free(vcpu);
6389 }
6390
6391 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6392                                                 unsigned int id)
6393 {
6394         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6395                 printk_once(KERN_WARNING
6396                 "kvm: SMP vm created on host with unstable TSC; "
6397                 "guest TSC will not be reliable\n");
6398         return kvm_x86_ops->vcpu_create(kvm, id);
6399 }
6400
6401 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6402 {
6403         int r;
6404
6405         vcpu->arch.mtrr_state.have_fixed = 1;
6406         vcpu_load(vcpu);
6407         r = kvm_arch_vcpu_reset(vcpu);
6408         if (r == 0)
6409                 r = kvm_mmu_setup(vcpu);
6410         vcpu_put(vcpu);
6411
6412         return r;
6413 }
6414
6415 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6416 {
6417         vcpu->arch.apf.msr_val = 0;
6418
6419         vcpu_load(vcpu);
6420         kvm_mmu_unload(vcpu);
6421         vcpu_put(vcpu);
6422
6423         fx_free(vcpu);
6424         kvm_x86_ops->vcpu_free(vcpu);
6425 }
6426
6427 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6428 {
6429         atomic_set(&vcpu->arch.nmi_queued, 0);
6430         vcpu->arch.nmi_pending = 0;
6431         vcpu->arch.nmi_injected = false;
6432
6433         vcpu->arch.switch_db_regs = 0;
6434         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6435         vcpu->arch.dr6 = DR6_FIXED_1;
6436         vcpu->arch.dr7 = DR7_FIXED_1;
6437
6438         kvm_make_request(KVM_REQ_EVENT, vcpu);
6439         vcpu->arch.apf.msr_val = 0;
6440         vcpu->arch.st.msr_val = 0;
6441
6442         kvmclock_reset(vcpu);
6443
6444         kvm_clear_async_pf_completion_queue(vcpu);
6445         kvm_async_pf_hash_reset(vcpu);
6446         vcpu->arch.apf.halted = false;
6447
6448         return kvm_x86_ops->vcpu_reset(vcpu);
6449 }
6450
6451 int kvm_arch_hardware_enable(void *garbage)
6452 {
6453         struct kvm *kvm;
6454         struct kvm_vcpu *vcpu;
6455         int i;
6456
6457         kvm_shared_msr_cpu_online();
6458         list_for_each_entry(kvm, &vm_list, vm_list)
6459                 kvm_for_each_vcpu(i, vcpu, kvm)
6460                         if (vcpu->cpu == smp_processor_id())
6461                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6462         return kvm_x86_ops->hardware_enable(garbage);
6463 }
6464
6465 void kvm_arch_hardware_disable(void *garbage)
6466 {
6467         kvm_x86_ops->hardware_disable(garbage);
6468         drop_user_return_notifiers(garbage);
6469 }
6470
6471 int kvm_arch_hardware_setup(void)
6472 {
6473         return kvm_x86_ops->hardware_setup();
6474 }
6475
6476 void kvm_arch_hardware_unsetup(void)
6477 {
6478         kvm_x86_ops->hardware_unsetup();
6479 }
6480
6481 void kvm_arch_check_processor_compat(void *rtn)
6482 {
6483         kvm_x86_ops->check_processor_compatibility(rtn);
6484 }
6485
6486 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6487 {
6488         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6489 }
6490
6491 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6492 {
6493         struct page *page;
6494         struct kvm *kvm;
6495         int r;
6496
6497         BUG_ON(vcpu->kvm == NULL);
6498         kvm = vcpu->kvm;
6499
6500         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6501         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6502         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6503         vcpu->arch.mmu.translate_gpa = translate_gpa;
6504         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6505         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6506                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6507         else
6508                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6509
6510         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6511         if (!page) {
6512                 r = -ENOMEM;
6513                 goto fail;
6514         }
6515         vcpu->arch.pio_data = page_address(page);
6516
6517         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6518
6519         r = kvm_mmu_create(vcpu);
6520         if (r < 0)
6521                 goto fail_free_pio_data;
6522
6523         if (irqchip_in_kernel(kvm)) {
6524                 r = kvm_create_lapic(vcpu);
6525                 if (r < 0)
6526                         goto fail_mmu_destroy;
6527         }
6528
6529         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6530                                        GFP_KERNEL);
6531         if (!vcpu->arch.mce_banks) {
6532                 r = -ENOMEM;
6533                 goto fail_free_lapic;
6534         }
6535         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6536
6537         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6538                 goto fail_free_mce_banks;
6539
6540         vcpu->arch.pv_time_enabled = false;
6541         kvm_async_pf_hash_reset(vcpu);
6542
6543         return 0;
6544 fail_free_mce_banks:
6545         kfree(vcpu->arch.mce_banks);
6546 fail_free_lapic:
6547         kvm_free_lapic(vcpu);
6548 fail_mmu_destroy:
6549         kvm_mmu_destroy(vcpu);
6550 fail_free_pio_data:
6551         free_page((unsigned long)vcpu->arch.pio_data);
6552 fail:
6553         return r;
6554 }
6555
6556 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6557 {
6558         int idx;
6559
6560         kfree(vcpu->arch.mce_banks);
6561         kvm_free_lapic(vcpu);
6562         idx = srcu_read_lock(&vcpu->kvm->srcu);
6563         kvm_mmu_destroy(vcpu);
6564         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6565         free_page((unsigned long)vcpu->arch.pio_data);
6566 }
6567
6568 int kvm_arch_init_vm(struct kvm *kvm)
6569 {
6570         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6571         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6572
6573         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6574         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6575
6576         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6577
6578         return 0;
6579 }
6580
6581 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6582 {
6583         vcpu_load(vcpu);
6584         kvm_mmu_unload(vcpu);
6585         vcpu_put(vcpu);
6586 }
6587
6588 static void kvm_free_vcpus(struct kvm *kvm)
6589 {
6590         unsigned int i;
6591         struct kvm_vcpu *vcpu;
6592
6593         /*
6594          * Unpin any mmu pages first.
6595          */
6596         kvm_for_each_vcpu(i, vcpu, kvm) {
6597                 kvm_clear_async_pf_completion_queue(vcpu);
6598                 kvm_unload_vcpu_mmu(vcpu);
6599         }
6600         kvm_for_each_vcpu(i, vcpu, kvm)
6601                 kvm_arch_vcpu_free(vcpu);
6602
6603         mutex_lock(&kvm->lock);
6604         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6605                 kvm->vcpus[i] = NULL;
6606
6607         atomic_set(&kvm->online_vcpus, 0);
6608         mutex_unlock(&kvm->lock);
6609 }
6610
6611 void kvm_arch_sync_events(struct kvm *kvm)
6612 {
6613         kvm_free_all_assigned_devices(kvm);
6614         kvm_free_pit(kvm);
6615 }
6616
6617 void kvm_arch_destroy_vm(struct kvm *kvm)
6618 {
6619         kvm_iommu_unmap_guest(kvm);
6620         kfree(kvm->arch.vpic);
6621         kfree(kvm->arch.vioapic);
6622         kvm_free_vcpus(kvm);
6623         if (kvm->arch.apic_access_page)
6624                 put_page(kvm->arch.apic_access_page);
6625         if (kvm->arch.ept_identity_pagetable)
6626                 put_page(kvm->arch.ept_identity_pagetable);
6627 }
6628
6629 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6630                                 struct kvm_memory_slot *memslot,
6631                                 struct kvm_memory_slot old,
6632                                 struct kvm_userspace_memory_region *mem,
6633                                 int user_alloc)
6634 {
6635         int npages = memslot->npages;
6636         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6637
6638         /* Prevent internal slot pages from being moved by fork()/COW. */
6639         if (memslot->id >= KVM_MEMORY_SLOTS)
6640                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6641
6642         /*To keep backward compatibility with older userspace,
6643          *x86 needs to hanlde !user_alloc case.
6644          */
6645         if (!user_alloc) {
6646                 if (npages && !old.rmap) {
6647                         unsigned long userspace_addr;
6648
6649                         down_write(&current->mm->mmap_sem);
6650                         userspace_addr = do_mmap(NULL, 0,
6651                                                  npages * PAGE_SIZE,
6652                                                  PROT_READ | PROT_WRITE,
6653                                                  map_flags,
6654                                                  0);
6655                         up_write(&current->mm->mmap_sem);
6656
6657                         if (IS_ERR((void *)userspace_addr))
6658                                 return PTR_ERR((void *)userspace_addr);
6659
6660                         memslot->userspace_addr = userspace_addr;
6661                 }
6662         }
6663
6664
6665         return 0;
6666 }
6667
6668 void kvm_arch_commit_memory_region(struct kvm *kvm,
6669                                 struct kvm_userspace_memory_region *mem,
6670                                 struct kvm_memory_slot old,
6671                                 int user_alloc)
6672 {
6673
6674         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6675
6676         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6677                 int ret;
6678
6679                 down_write(&current->mm->mmap_sem);
6680                 ret = do_munmap(current->mm, old.userspace_addr,
6681                                 old.npages * PAGE_SIZE);
6682                 up_write(&current->mm->mmap_sem);
6683                 if (ret < 0)
6684                         printk(KERN_WARNING
6685                                "kvm_vm_ioctl_set_memory_region: "
6686                                "failed to munmap memory\n");
6687         }
6688
6689         if (!kvm->arch.n_requested_mmu_pages)
6690                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6691
6692         spin_lock(&kvm->mmu_lock);
6693         if (nr_mmu_pages)
6694                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6695         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6696         spin_unlock(&kvm->mmu_lock);
6697 }
6698
6699 void kvm_arch_flush_shadow(struct kvm *kvm)
6700 {
6701         kvm_mmu_zap_all(kvm);
6702         kvm_reload_remote_mmus(kvm);
6703 }
6704
6705 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6706 {
6707         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6708                 !vcpu->arch.apf.halted)
6709                 || !list_empty_careful(&vcpu->async_pf.done)
6710                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6711                 || atomic_read(&vcpu->arch.nmi_queued) ||
6712                 (kvm_arch_interrupt_allowed(vcpu) &&
6713                  kvm_cpu_has_interrupt(vcpu));
6714 }
6715
6716 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6717 {
6718         int me;
6719         int cpu = vcpu->cpu;
6720
6721         if (waitqueue_active(&vcpu->wq)) {
6722                 wake_up_interruptible(&vcpu->wq);
6723                 ++vcpu->stat.halt_wakeup;
6724         }
6725
6726         me = get_cpu();
6727         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6728                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6729                         smp_send_reschedule(cpu);
6730         put_cpu();
6731 }
6732
6733 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6734 {
6735         return kvm_x86_ops->interrupt_allowed(vcpu);
6736 }
6737
6738 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6739 {
6740         unsigned long current_rip = kvm_rip_read(vcpu) +
6741                 get_segment_base(vcpu, VCPU_SREG_CS);
6742
6743         return current_rip == linear_rip;
6744 }
6745 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6746
6747 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6748 {
6749         unsigned long rflags;
6750
6751         rflags = kvm_x86_ops->get_rflags(vcpu);
6752         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6753                 rflags &= ~X86_EFLAGS_TF;
6754         return rflags;
6755 }
6756 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6757
6758 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6759 {
6760         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6761             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6762                 rflags |= X86_EFLAGS_TF;
6763         kvm_x86_ops->set_rflags(vcpu, rflags);
6764         kvm_make_request(KVM_REQ_EVENT, vcpu);
6765 }
6766 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6767
6768 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6769 {
6770         int r;
6771
6772         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6773               is_error_page(work->page))
6774                 return;
6775
6776         r = kvm_mmu_reload(vcpu);
6777         if (unlikely(r))
6778                 return;
6779
6780         if (!vcpu->arch.mmu.direct_map &&
6781               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6782                 return;
6783
6784         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6785 }
6786
6787 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6788 {
6789         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6790 }
6791
6792 static inline u32 kvm_async_pf_next_probe(u32 key)
6793 {
6794         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6795 }
6796
6797 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6798 {
6799         u32 key = kvm_async_pf_hash_fn(gfn);
6800
6801         while (vcpu->arch.apf.gfns[key] != ~0)
6802                 key = kvm_async_pf_next_probe(key);
6803
6804         vcpu->arch.apf.gfns[key] = gfn;
6805 }
6806
6807 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6808 {
6809         int i;
6810         u32 key = kvm_async_pf_hash_fn(gfn);
6811
6812         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6813                      (vcpu->arch.apf.gfns[key] != gfn &&
6814                       vcpu->arch.apf.gfns[key] != ~0); i++)
6815                 key = kvm_async_pf_next_probe(key);
6816
6817         return key;
6818 }
6819
6820 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6821 {
6822         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6823 }
6824
6825 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6826 {
6827         u32 i, j, k;
6828
6829         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6830         while (true) {
6831                 vcpu->arch.apf.gfns[i] = ~0;
6832                 do {
6833                         j = kvm_async_pf_next_probe(j);
6834                         if (vcpu->arch.apf.gfns[j] == ~0)
6835                                 return;
6836                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6837                         /*
6838                          * k lies cyclically in ]i,j]
6839                          * |    i.k.j |
6840                          * |....j i.k.| or  |.k..j i...|
6841                          */
6842                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6843                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6844                 i = j;
6845         }
6846 }
6847
6848 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6849 {
6850
6851         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6852                                       sizeof(val));
6853 }
6854
6855 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6856                                      struct kvm_async_pf *work)
6857 {
6858         struct x86_exception fault;
6859
6860         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6861         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6862
6863         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6864             (vcpu->arch.apf.send_user_only &&
6865              kvm_x86_ops->get_cpl(vcpu) == 0))
6866                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6867         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6868                 fault.vector = PF_VECTOR;
6869                 fault.error_code_valid = true;
6870                 fault.error_code = 0;
6871                 fault.nested_page_fault = false;
6872                 fault.address = work->arch.token;
6873                 kvm_inject_page_fault(vcpu, &fault);
6874         }
6875 }
6876
6877 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6878                                  struct kvm_async_pf *work)
6879 {
6880         struct x86_exception fault;
6881
6882         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6883         if (is_error_page(work->page))
6884                 work->arch.token = ~0; /* broadcast wakeup */
6885         else
6886                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6887
6888         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6889             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6890                 fault.vector = PF_VECTOR;
6891                 fault.error_code_valid = true;
6892                 fault.error_code = 0;
6893                 fault.nested_page_fault = false;
6894                 fault.address = work->arch.token;
6895                 kvm_inject_page_fault(vcpu, &fault);
6896         }
6897         vcpu->arch.apf.halted = false;
6898 }
6899
6900 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6901 {
6902         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6903                 return true;
6904         else
6905                 return !kvm_event_needs_reinjection(vcpu) &&
6906                         kvm_x86_ops->interrupt_allowed(vcpu);
6907 }
6908
6909 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6910 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6911 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6912 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6917 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6918 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6919 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6920 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);