2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
117 unsigned long segment_base(u16 selector)
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
130 if (selector & 4) { /* from ldt */
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
145 EXPORT_SYMBOL_GPL(segment_base);
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
152 return vcpu->arch.apic_base;
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
162 vcpu->arch.apic_base = data;
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
178 ++vcpu->stat.pf_guest;
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
198 vcpu->arch.nmi_pending = 1;
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
212 static void __queue_exception(struct kvm_vcpu *vcpu)
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
220 * Load the pae pdptrs. Return true is they are all valid.
222 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
224 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
225 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
228 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
230 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
231 offset * sizeof(u64), sizeof(pdpte));
236 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
237 if (is_present_pte(pdpte[i]) &&
238 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
245 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
250 EXPORT_SYMBOL_GPL(load_pdptrs);
252 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
254 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
258 if (is_long_mode(vcpu) || !is_pae(vcpu))
261 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
264 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
270 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
272 if (cr0 & CR0_RESERVED_BITS) {
273 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
274 cr0, vcpu->arch.cr0);
275 kvm_inject_gp(vcpu, 0);
279 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
280 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
281 kvm_inject_gp(vcpu, 0);
285 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
286 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
287 "and a clear PE flag\n");
288 kvm_inject_gp(vcpu, 0);
292 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
294 if ((vcpu->arch.shadow_efer & EFER_LME)) {
298 printk(KERN_DEBUG "set_cr0: #GP, start paging "
299 "in long mode while PAE is disabled\n");
300 kvm_inject_gp(vcpu, 0);
303 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
305 printk(KERN_DEBUG "set_cr0: #GP, start paging "
306 "in long mode while CS.L == 1\n");
307 kvm_inject_gp(vcpu, 0);
313 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
314 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
316 kvm_inject_gp(vcpu, 0);
322 kvm_x86_ops->set_cr0(vcpu, cr0);
323 vcpu->arch.cr0 = cr0;
325 kvm_mmu_sync_global(vcpu);
326 kvm_mmu_reset_context(vcpu);
329 EXPORT_SYMBOL_GPL(kvm_set_cr0);
331 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
333 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
334 KVMTRACE_1D(LMSW, vcpu,
335 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
338 EXPORT_SYMBOL_GPL(kvm_lmsw);
340 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
342 unsigned long old_cr4 = vcpu->arch.cr4;
343 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
345 if (cr4 & CR4_RESERVED_BITS) {
346 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
347 kvm_inject_gp(vcpu, 0);
351 if (is_long_mode(vcpu)) {
352 if (!(cr4 & X86_CR4_PAE)) {
353 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
355 kvm_inject_gp(vcpu, 0);
358 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
359 && ((cr4 ^ old_cr4) & pdptr_bits)
360 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
361 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
362 kvm_inject_gp(vcpu, 0);
366 if (cr4 & X86_CR4_VMXE) {
367 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
368 kvm_inject_gp(vcpu, 0);
371 kvm_x86_ops->set_cr4(vcpu, cr4);
372 vcpu->arch.cr4 = cr4;
373 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
374 kvm_mmu_sync_global(vcpu);
375 kvm_mmu_reset_context(vcpu);
377 EXPORT_SYMBOL_GPL(kvm_set_cr4);
379 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
381 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
382 kvm_mmu_sync_roots(vcpu);
383 kvm_mmu_flush_tlb(vcpu);
387 if (is_long_mode(vcpu)) {
388 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
389 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
390 kvm_inject_gp(vcpu, 0);
395 if (cr3 & CR3_PAE_RESERVED_BITS) {
397 "set_cr3: #GP, reserved bits\n");
398 kvm_inject_gp(vcpu, 0);
401 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
402 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
404 kvm_inject_gp(vcpu, 0);
409 * We don't check reserved bits in nonpae mode, because
410 * this isn't enforced, and VMware depends on this.
415 * Does the new cr3 value map to physical memory? (Note, we
416 * catch an invalid cr3 even in real-mode, because it would
417 * cause trouble later on when we turn on paging anyway.)
419 * A real CPU would silently accept an invalid cr3 and would
420 * attempt to use it - with largely undefined (and often hard
421 * to debug) behavior on the guest side.
423 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
424 kvm_inject_gp(vcpu, 0);
426 vcpu->arch.cr3 = cr3;
427 vcpu->arch.mmu.new_cr3(vcpu);
430 EXPORT_SYMBOL_GPL(kvm_set_cr3);
432 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
434 if (cr8 & CR8_RESERVED_BITS) {
435 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
436 kvm_inject_gp(vcpu, 0);
439 if (irqchip_in_kernel(vcpu->kvm))
440 kvm_lapic_set_tpr(vcpu, cr8);
442 vcpu->arch.cr8 = cr8;
444 EXPORT_SYMBOL_GPL(kvm_set_cr8);
446 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
448 if (irqchip_in_kernel(vcpu->kvm))
449 return kvm_lapic_get_cr8(vcpu);
451 return vcpu->arch.cr8;
453 EXPORT_SYMBOL_GPL(kvm_get_cr8);
455 static inline u32 bit(int bitno)
457 return 1 << (bitno & 31);
461 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
462 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
464 * This list is modified at module load time to reflect the
465 * capabilities of the host cpu.
467 static u32 msrs_to_save[] = {
468 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
471 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
473 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
474 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
477 static unsigned num_msrs_to_save;
479 static u32 emulated_msrs[] = {
480 MSR_IA32_MISC_ENABLE,
483 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
485 if (efer & efer_reserved_bits) {
486 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
488 kvm_inject_gp(vcpu, 0);
493 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
494 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
495 kvm_inject_gp(vcpu, 0);
499 if (efer & EFER_FFXSR) {
500 struct kvm_cpuid_entry2 *feat;
502 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
503 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
504 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
505 kvm_inject_gp(vcpu, 0);
510 if (efer & EFER_SVME) {
511 struct kvm_cpuid_entry2 *feat;
513 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
514 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
515 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
516 kvm_inject_gp(vcpu, 0);
521 kvm_x86_ops->set_efer(vcpu, efer);
524 efer |= vcpu->arch.shadow_efer & EFER_LMA;
526 vcpu->arch.shadow_efer = efer;
528 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
529 kvm_mmu_reset_context(vcpu);
532 void kvm_enable_efer_bits(u64 mask)
534 efer_reserved_bits &= ~mask;
536 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
540 * Writes msr value into into the appropriate "register".
541 * Returns 0 on success, non-0 otherwise.
542 * Assumes vcpu_load() was already called.
544 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
546 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
550 * Adapt set_msr() to msr_io()'s calling convention
552 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
554 return kvm_set_msr(vcpu, index, *data);
557 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
560 struct pvclock_wall_clock wc;
561 struct timespec now, sys, boot;
568 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
571 * The guest calculates current wall clock time by adding
572 * system time (updated by kvm_write_guest_time below) to the
573 * wall clock specified here. guest system time equals host
574 * system time for us, thus we must fill in host boot time here.
576 now = current_kernel_time();
578 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
580 wc.sec = boot.tv_sec;
581 wc.nsec = boot.tv_nsec;
582 wc.version = version;
584 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
587 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
590 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
592 uint32_t quotient, remainder;
594 /* Don't try to replace with do_div(), this one calculates
595 * "(dividend << 32) / divisor" */
597 : "=a" (quotient), "=d" (remainder)
598 : "0" (0), "1" (dividend), "r" (divisor) );
602 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
604 uint64_t nsecs = 1000000000LL;
609 tps64 = tsc_khz * 1000LL;
610 while (tps64 > nsecs*2) {
615 tps32 = (uint32_t)tps64;
616 while (tps32 <= (uint32_t)nsecs) {
621 hv_clock->tsc_shift = shift;
622 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
624 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
625 __func__, tsc_khz, hv_clock->tsc_shift,
626 hv_clock->tsc_to_system_mul);
629 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
631 static void kvm_write_guest_time(struct kvm_vcpu *v)
635 struct kvm_vcpu_arch *vcpu = &v->arch;
638 if ((!vcpu->time_page))
642 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
643 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
644 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
648 /* Keep irq disabled to prevent changes to the clock */
649 local_irq_save(flags);
650 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
651 &vcpu->hv_clock.tsc_timestamp);
653 local_irq_restore(flags);
655 /* With all the info we got, fill in the values */
657 vcpu->hv_clock.system_time = ts.tv_nsec +
658 (NSEC_PER_SEC * (u64)ts.tv_sec);
660 * The interface expects us to write an even number signaling that the
661 * update is finished. Since the guest won't see the intermediate
662 * state, we just increase by 2 at the end.
664 vcpu->hv_clock.version += 2;
666 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
668 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
669 sizeof(vcpu->hv_clock));
671 kunmap_atomic(shared_kaddr, KM_USER0);
673 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
676 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
678 struct kvm_vcpu_arch *vcpu = &v->arch;
680 if (!vcpu->time_page)
682 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
686 static bool msr_mtrr_valid(unsigned msr)
689 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
690 case MSR_MTRRfix64K_00000:
691 case MSR_MTRRfix16K_80000:
692 case MSR_MTRRfix16K_A0000:
693 case MSR_MTRRfix4K_C0000:
694 case MSR_MTRRfix4K_C8000:
695 case MSR_MTRRfix4K_D0000:
696 case MSR_MTRRfix4K_D8000:
697 case MSR_MTRRfix4K_E0000:
698 case MSR_MTRRfix4K_E8000:
699 case MSR_MTRRfix4K_F0000:
700 case MSR_MTRRfix4K_F8000:
701 case MSR_MTRRdefType:
702 case MSR_IA32_CR_PAT:
710 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
712 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
714 if (!msr_mtrr_valid(msr))
717 if (msr == MSR_MTRRdefType) {
718 vcpu->arch.mtrr_state.def_type = data;
719 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
720 } else if (msr == MSR_MTRRfix64K_00000)
722 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
723 p[1 + msr - MSR_MTRRfix16K_80000] = data;
724 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
725 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
726 else if (msr == MSR_IA32_CR_PAT)
727 vcpu->arch.pat = data;
728 else { /* Variable MTRRs */
729 int idx, is_mtrr_mask;
732 idx = (msr - 0x200) / 2;
733 is_mtrr_mask = msr - 0x200 - 2 * idx;
736 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
739 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
743 kvm_mmu_reset_context(vcpu);
747 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
751 set_efer(vcpu, data);
753 case MSR_IA32_MC0_STATUS:
754 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
757 case MSR_IA32_MCG_STATUS:
758 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
761 case MSR_IA32_MCG_CTL:
762 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
765 case MSR_IA32_DEBUGCTLMSR:
767 /* We support the non-activated case already */
769 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
770 /* Values other than LBR and BTF are vendor-specific,
771 thus reserved and should throw a #GP */
774 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
777 case MSR_IA32_UCODE_REV:
778 case MSR_IA32_UCODE_WRITE:
779 case MSR_VM_HSAVE_PA:
781 case 0x200 ... 0x2ff:
782 return set_msr_mtrr(vcpu, msr, data);
783 case MSR_IA32_APICBASE:
784 kvm_set_apic_base(vcpu, data);
786 case MSR_IA32_MISC_ENABLE:
787 vcpu->arch.ia32_misc_enable_msr = data;
789 case MSR_KVM_WALL_CLOCK:
790 vcpu->kvm->arch.wall_clock = data;
791 kvm_write_wall_clock(vcpu->kvm, data);
793 case MSR_KVM_SYSTEM_TIME: {
794 if (vcpu->arch.time_page) {
795 kvm_release_page_dirty(vcpu->arch.time_page);
796 vcpu->arch.time_page = NULL;
799 vcpu->arch.time = data;
801 /* we verify if the enable bit is set... */
805 /* ...but clean it before doing the actual write */
806 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
808 vcpu->arch.time_page =
809 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
811 if (is_error_page(vcpu->arch.time_page)) {
812 kvm_release_page_clean(vcpu->arch.time_page);
813 vcpu->arch.time_page = NULL;
816 kvm_request_guest_time_update(vcpu);
820 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
825 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
829 * Reads an msr value (of 'msr_index') into 'pdata'.
830 * Returns 0 on success, non-0 otherwise.
831 * Assumes vcpu_load() was already called.
833 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
835 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
838 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
840 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
842 if (!msr_mtrr_valid(msr))
845 if (msr == MSR_MTRRdefType)
846 *pdata = vcpu->arch.mtrr_state.def_type +
847 (vcpu->arch.mtrr_state.enabled << 10);
848 else if (msr == MSR_MTRRfix64K_00000)
850 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
851 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
852 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
853 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
854 else if (msr == MSR_IA32_CR_PAT)
855 *pdata = vcpu->arch.pat;
856 else { /* Variable MTRRs */
857 int idx, is_mtrr_mask;
860 idx = (msr - 0x200) / 2;
861 is_mtrr_mask = msr - 0x200 - 2 * idx;
864 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
867 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
874 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
879 case 0xc0010010: /* SYSCFG */
880 case 0xc0010015: /* HWCR */
881 case MSR_IA32_PLATFORM_ID:
882 case MSR_IA32_P5_MC_ADDR:
883 case MSR_IA32_P5_MC_TYPE:
884 case MSR_IA32_MC0_CTL:
885 case MSR_IA32_MCG_STATUS:
886 case MSR_IA32_MCG_CAP:
887 case MSR_IA32_MCG_CTL:
888 case MSR_IA32_MC0_MISC:
889 case MSR_IA32_MC0_MISC+4:
890 case MSR_IA32_MC0_MISC+8:
891 case MSR_IA32_MC0_MISC+12:
892 case MSR_IA32_MC0_MISC+16:
893 case MSR_IA32_MC0_MISC+20:
894 case MSR_IA32_UCODE_REV:
895 case MSR_IA32_EBL_CR_POWERON:
896 case MSR_IA32_DEBUGCTLMSR:
897 case MSR_IA32_LASTBRANCHFROMIP:
898 case MSR_IA32_LASTBRANCHTOIP:
899 case MSR_IA32_LASTINTFROMIP:
900 case MSR_IA32_LASTINTTOIP:
901 case MSR_VM_HSAVE_PA:
902 case MSR_P6_EVNTSEL0:
903 case MSR_P6_EVNTSEL1:
907 data = 0x500 | KVM_NR_VAR_MTRR;
909 case 0x200 ... 0x2ff:
910 return get_msr_mtrr(vcpu, msr, pdata);
911 case 0xcd: /* fsb frequency */
914 case MSR_IA32_APICBASE:
915 data = kvm_get_apic_base(vcpu);
917 case MSR_IA32_MISC_ENABLE:
918 data = vcpu->arch.ia32_misc_enable_msr;
920 case MSR_IA32_PERF_STATUS:
921 /* TSC increment by tick */
924 data |= (((uint64_t)4ULL) << 40);
927 data = vcpu->arch.shadow_efer;
929 case MSR_KVM_WALL_CLOCK:
930 data = vcpu->kvm->arch.wall_clock;
932 case MSR_KVM_SYSTEM_TIME:
933 data = vcpu->arch.time;
936 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
942 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
945 * Read or write a bunch of msrs. All parameters are kernel addresses.
947 * @return number of msrs set successfully.
949 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
950 struct kvm_msr_entry *entries,
951 int (*do_msr)(struct kvm_vcpu *vcpu,
952 unsigned index, u64 *data))
958 down_read(&vcpu->kvm->slots_lock);
959 for (i = 0; i < msrs->nmsrs; ++i)
960 if (do_msr(vcpu, entries[i].index, &entries[i].data))
962 up_read(&vcpu->kvm->slots_lock);
970 * Read or write a bunch of msrs. Parameters are user addresses.
972 * @return number of msrs set successfully.
974 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
975 int (*do_msr)(struct kvm_vcpu *vcpu,
976 unsigned index, u64 *data),
979 struct kvm_msrs msrs;
980 struct kvm_msr_entry *entries;
985 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
989 if (msrs.nmsrs >= MAX_IO_MSRS)
993 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
994 entries = vmalloc(size);
999 if (copy_from_user(entries, user_msrs->entries, size))
1002 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1007 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1018 int kvm_dev_ioctl_check_extension(long ext)
1023 case KVM_CAP_IRQCHIP:
1025 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1026 case KVM_CAP_SET_TSS_ADDR:
1027 case KVM_CAP_EXT_CPUID:
1028 case KVM_CAP_CLOCKSOURCE:
1030 case KVM_CAP_NOP_IO_DELAY:
1031 case KVM_CAP_MP_STATE:
1032 case KVM_CAP_SYNC_MMU:
1033 case KVM_CAP_REINJECT_CONTROL:
1034 case KVM_CAP_IRQ_INJECT_STATUS:
1035 case KVM_CAP_ASSIGN_DEV_IRQ:
1038 case KVM_CAP_COALESCED_MMIO:
1039 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1042 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1044 case KVM_CAP_NR_VCPUS:
1047 case KVM_CAP_NR_MEMSLOTS:
1048 r = KVM_MEMORY_SLOTS;
1050 case KVM_CAP_PV_MMU:
1064 long kvm_arch_dev_ioctl(struct file *filp,
1065 unsigned int ioctl, unsigned long arg)
1067 void __user *argp = (void __user *)arg;
1071 case KVM_GET_MSR_INDEX_LIST: {
1072 struct kvm_msr_list __user *user_msr_list = argp;
1073 struct kvm_msr_list msr_list;
1077 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1080 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1081 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1084 if (n < num_msrs_to_save)
1087 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1088 num_msrs_to_save * sizeof(u32)))
1090 if (copy_to_user(user_msr_list->indices
1091 + num_msrs_to_save * sizeof(u32),
1093 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1098 case KVM_GET_SUPPORTED_CPUID: {
1099 struct kvm_cpuid2 __user *cpuid_arg = argp;
1100 struct kvm_cpuid2 cpuid;
1103 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1105 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1106 cpuid_arg->entries);
1111 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1123 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1125 kvm_x86_ops->vcpu_load(vcpu, cpu);
1126 kvm_request_guest_time_update(vcpu);
1129 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1131 kvm_x86_ops->vcpu_put(vcpu);
1132 kvm_put_guest_fpu(vcpu);
1135 static int is_efer_nx(void)
1137 unsigned long long efer = 0;
1139 rdmsrl_safe(MSR_EFER, &efer);
1140 return efer & EFER_NX;
1143 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1146 struct kvm_cpuid_entry2 *e, *entry;
1149 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1150 e = &vcpu->arch.cpuid_entries[i];
1151 if (e->function == 0x80000001) {
1156 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1157 entry->edx &= ~(1 << 20);
1158 printk(KERN_INFO "kvm: guest NX capability removed\n");
1162 /* when an old userspace process fills a new kernel module */
1163 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1164 struct kvm_cpuid *cpuid,
1165 struct kvm_cpuid_entry __user *entries)
1168 struct kvm_cpuid_entry *cpuid_entries;
1171 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1174 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1178 if (copy_from_user(cpuid_entries, entries,
1179 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1181 for (i = 0; i < cpuid->nent; i++) {
1182 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1183 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1184 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1185 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1186 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1187 vcpu->arch.cpuid_entries[i].index = 0;
1188 vcpu->arch.cpuid_entries[i].flags = 0;
1189 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1190 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1191 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1193 vcpu->arch.cpuid_nent = cpuid->nent;
1194 cpuid_fix_nx_cap(vcpu);
1198 vfree(cpuid_entries);
1203 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1204 struct kvm_cpuid2 *cpuid,
1205 struct kvm_cpuid_entry2 __user *entries)
1210 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1213 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1214 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1216 vcpu->arch.cpuid_nent = cpuid->nent;
1223 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1224 struct kvm_cpuid2 *cpuid,
1225 struct kvm_cpuid_entry2 __user *entries)
1230 if (cpuid->nent < vcpu->arch.cpuid_nent)
1233 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1234 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1239 cpuid->nent = vcpu->arch.cpuid_nent;
1243 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1246 entry->function = function;
1247 entry->index = index;
1248 cpuid_count(entry->function, entry->index,
1249 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1253 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1254 u32 index, int *nent, int maxnent)
1256 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1257 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1258 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1259 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1260 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1261 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1262 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1263 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1264 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1265 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1266 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1267 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1268 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1269 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1270 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1271 bit(X86_FEATURE_PGE) |
1272 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1273 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1274 bit(X86_FEATURE_SYSCALL) |
1275 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1276 #ifdef CONFIG_X86_64
1277 bit(X86_FEATURE_LM) |
1279 bit(X86_FEATURE_FXSR_OPT) |
1280 bit(X86_FEATURE_MMXEXT) |
1281 bit(X86_FEATURE_3DNOWEXT) |
1282 bit(X86_FEATURE_3DNOW);
1283 const u32 kvm_supported_word3_x86_features =
1284 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1285 const u32 kvm_supported_word6_x86_features =
1286 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1287 bit(X86_FEATURE_SVM);
1289 /* all calls to cpuid_count() should be made on the same cpu */
1291 do_cpuid_1_ent(entry, function, index);
1296 entry->eax = min(entry->eax, (u32)0xb);
1299 entry->edx &= kvm_supported_word0_x86_features;
1300 entry->ecx &= kvm_supported_word3_x86_features;
1302 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1303 * may return different values. This forces us to get_cpu() before
1304 * issuing the first command, and also to emulate this annoying behavior
1305 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1307 int t, times = entry->eax & 0xff;
1309 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1310 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1311 for (t = 1; t < times && *nent < maxnent; ++t) {
1312 do_cpuid_1_ent(&entry[t], function, 0);
1313 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1318 /* function 4 and 0xb have additional index. */
1322 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1323 /* read more entries until cache_type is zero */
1324 for (i = 1; *nent < maxnent; ++i) {
1325 cache_type = entry[i - 1].eax & 0x1f;
1328 do_cpuid_1_ent(&entry[i], function, i);
1330 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1338 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1339 /* read more entries until level_type is zero */
1340 for (i = 1; *nent < maxnent; ++i) {
1341 level_type = entry[i - 1].ecx & 0xff00;
1344 do_cpuid_1_ent(&entry[i], function, i);
1346 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1352 entry->eax = min(entry->eax, 0x8000001a);
1355 entry->edx &= kvm_supported_word1_x86_features;
1356 entry->ecx &= kvm_supported_word6_x86_features;
1362 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1363 struct kvm_cpuid_entry2 __user *entries)
1365 struct kvm_cpuid_entry2 *cpuid_entries;
1366 int limit, nent = 0, r = -E2BIG;
1369 if (cpuid->nent < 1)
1372 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1376 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1377 limit = cpuid_entries[0].eax;
1378 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1379 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1380 &nent, cpuid->nent);
1382 if (nent >= cpuid->nent)
1385 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1386 limit = cpuid_entries[nent - 1].eax;
1387 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1388 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1389 &nent, cpuid->nent);
1391 if (copy_to_user(entries, cpuid_entries,
1392 nent * sizeof(struct kvm_cpuid_entry2)))
1398 vfree(cpuid_entries);
1403 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1404 struct kvm_lapic_state *s)
1407 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1413 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1414 struct kvm_lapic_state *s)
1417 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1418 kvm_apic_post_state_restore(vcpu);
1424 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1425 struct kvm_interrupt *irq)
1427 if (irq->irq < 0 || irq->irq >= 256)
1429 if (irqchip_in_kernel(vcpu->kvm))
1433 set_bit(irq->irq, vcpu->arch.irq_pending);
1434 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1441 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1444 kvm_inject_nmi(vcpu);
1450 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1451 struct kvm_tpr_access_ctl *tac)
1455 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1459 long kvm_arch_vcpu_ioctl(struct file *filp,
1460 unsigned int ioctl, unsigned long arg)
1462 struct kvm_vcpu *vcpu = filp->private_data;
1463 void __user *argp = (void __user *)arg;
1465 struct kvm_lapic_state *lapic = NULL;
1468 case KVM_GET_LAPIC: {
1469 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1474 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1478 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1483 case KVM_SET_LAPIC: {
1484 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1489 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1491 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1497 case KVM_INTERRUPT: {
1498 struct kvm_interrupt irq;
1501 if (copy_from_user(&irq, argp, sizeof irq))
1503 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1510 r = kvm_vcpu_ioctl_nmi(vcpu);
1516 case KVM_SET_CPUID: {
1517 struct kvm_cpuid __user *cpuid_arg = argp;
1518 struct kvm_cpuid cpuid;
1521 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1523 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1528 case KVM_SET_CPUID2: {
1529 struct kvm_cpuid2 __user *cpuid_arg = argp;
1530 struct kvm_cpuid2 cpuid;
1533 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1535 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1536 cpuid_arg->entries);
1541 case KVM_GET_CPUID2: {
1542 struct kvm_cpuid2 __user *cpuid_arg = argp;
1543 struct kvm_cpuid2 cpuid;
1546 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1548 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1549 cpuid_arg->entries);
1553 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1559 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1562 r = msr_io(vcpu, argp, do_set_msr, 0);
1564 case KVM_TPR_ACCESS_REPORTING: {
1565 struct kvm_tpr_access_ctl tac;
1568 if (copy_from_user(&tac, argp, sizeof tac))
1570 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1574 if (copy_to_user(argp, &tac, sizeof tac))
1579 case KVM_SET_VAPIC_ADDR: {
1580 struct kvm_vapic_addr va;
1583 if (!irqchip_in_kernel(vcpu->kvm))
1586 if (copy_from_user(&va, argp, sizeof va))
1589 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1600 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1604 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1606 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1610 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1611 u32 kvm_nr_mmu_pages)
1613 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1616 down_write(&kvm->slots_lock);
1618 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1619 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1621 up_write(&kvm->slots_lock);
1625 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1627 return kvm->arch.n_alloc_mmu_pages;
1630 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1633 struct kvm_mem_alias *alias;
1635 for (i = 0; i < kvm->arch.naliases; ++i) {
1636 alias = &kvm->arch.aliases[i];
1637 if (gfn >= alias->base_gfn
1638 && gfn < alias->base_gfn + alias->npages)
1639 return alias->target_gfn + gfn - alias->base_gfn;
1645 * Set a new alias region. Aliases map a portion of physical memory into
1646 * another portion. This is useful for memory windows, for example the PC
1649 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1650 struct kvm_memory_alias *alias)
1653 struct kvm_mem_alias *p;
1656 /* General sanity checks */
1657 if (alias->memory_size & (PAGE_SIZE - 1))
1659 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1661 if (alias->slot >= KVM_ALIAS_SLOTS)
1663 if (alias->guest_phys_addr + alias->memory_size
1664 < alias->guest_phys_addr)
1666 if (alias->target_phys_addr + alias->memory_size
1667 < alias->target_phys_addr)
1670 down_write(&kvm->slots_lock);
1671 spin_lock(&kvm->mmu_lock);
1673 p = &kvm->arch.aliases[alias->slot];
1674 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1675 p->npages = alias->memory_size >> PAGE_SHIFT;
1676 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1678 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1679 if (kvm->arch.aliases[n - 1].npages)
1681 kvm->arch.naliases = n;
1683 spin_unlock(&kvm->mmu_lock);
1684 kvm_mmu_zap_all(kvm);
1686 up_write(&kvm->slots_lock);
1694 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1699 switch (chip->chip_id) {
1700 case KVM_IRQCHIP_PIC_MASTER:
1701 memcpy(&chip->chip.pic,
1702 &pic_irqchip(kvm)->pics[0],
1703 sizeof(struct kvm_pic_state));
1705 case KVM_IRQCHIP_PIC_SLAVE:
1706 memcpy(&chip->chip.pic,
1707 &pic_irqchip(kvm)->pics[1],
1708 sizeof(struct kvm_pic_state));
1710 case KVM_IRQCHIP_IOAPIC:
1711 memcpy(&chip->chip.ioapic,
1712 ioapic_irqchip(kvm),
1713 sizeof(struct kvm_ioapic_state));
1722 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1727 switch (chip->chip_id) {
1728 case KVM_IRQCHIP_PIC_MASTER:
1729 memcpy(&pic_irqchip(kvm)->pics[0],
1731 sizeof(struct kvm_pic_state));
1733 case KVM_IRQCHIP_PIC_SLAVE:
1734 memcpy(&pic_irqchip(kvm)->pics[1],
1736 sizeof(struct kvm_pic_state));
1738 case KVM_IRQCHIP_IOAPIC:
1739 memcpy(ioapic_irqchip(kvm),
1741 sizeof(struct kvm_ioapic_state));
1747 kvm_pic_update_irq(pic_irqchip(kvm));
1751 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1755 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1759 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1763 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1764 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1768 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1769 struct kvm_reinject_control *control)
1771 if (!kvm->arch.vpit)
1773 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1778 * Get (and clear) the dirty memory log for a memory slot.
1780 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1781 struct kvm_dirty_log *log)
1785 struct kvm_memory_slot *memslot;
1788 down_write(&kvm->slots_lock);
1790 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1794 /* If nothing is dirty, don't bother messing with page tables. */
1796 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1797 kvm_flush_remote_tlbs(kvm);
1798 memslot = &kvm->memslots[log->slot];
1799 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1800 memset(memslot->dirty_bitmap, 0, n);
1804 up_write(&kvm->slots_lock);
1808 long kvm_arch_vm_ioctl(struct file *filp,
1809 unsigned int ioctl, unsigned long arg)
1811 struct kvm *kvm = filp->private_data;
1812 void __user *argp = (void __user *)arg;
1815 * This union makes it completely explicit to gcc-3.x
1816 * that these two variables' stack usage should be
1817 * combined, not added together.
1820 struct kvm_pit_state ps;
1821 struct kvm_memory_alias alias;
1825 case KVM_SET_TSS_ADDR:
1826 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1830 case KVM_SET_MEMORY_REGION: {
1831 struct kvm_memory_region kvm_mem;
1832 struct kvm_userspace_memory_region kvm_userspace_mem;
1835 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1837 kvm_userspace_mem.slot = kvm_mem.slot;
1838 kvm_userspace_mem.flags = kvm_mem.flags;
1839 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1840 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1841 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1846 case KVM_SET_NR_MMU_PAGES:
1847 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1851 case KVM_GET_NR_MMU_PAGES:
1852 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1854 case KVM_SET_MEMORY_ALIAS:
1856 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1858 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1862 case KVM_CREATE_IRQCHIP:
1864 kvm->arch.vpic = kvm_create_pic(kvm);
1865 if (kvm->arch.vpic) {
1866 r = kvm_ioapic_init(kvm);
1868 kfree(kvm->arch.vpic);
1869 kvm->arch.vpic = NULL;
1874 r = kvm_setup_default_irq_routing(kvm);
1876 kfree(kvm->arch.vpic);
1877 kfree(kvm->arch.vioapic);
1881 case KVM_CREATE_PIT:
1882 mutex_lock(&kvm->lock);
1885 goto create_pit_unlock;
1887 kvm->arch.vpit = kvm_create_pit(kvm);
1891 mutex_unlock(&kvm->lock);
1893 case KVM_IRQ_LINE_STATUS:
1894 case KVM_IRQ_LINE: {
1895 struct kvm_irq_level irq_event;
1898 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1900 if (irqchip_in_kernel(kvm)) {
1902 mutex_lock(&kvm->lock);
1903 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1904 irq_event.irq, irq_event.level);
1905 mutex_unlock(&kvm->lock);
1906 if (ioctl == KVM_IRQ_LINE_STATUS) {
1907 irq_event.status = status;
1908 if (copy_to_user(argp, &irq_event,
1916 case KVM_GET_IRQCHIP: {
1917 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1918 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1924 if (copy_from_user(chip, argp, sizeof *chip))
1925 goto get_irqchip_out;
1927 if (!irqchip_in_kernel(kvm))
1928 goto get_irqchip_out;
1929 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1931 goto get_irqchip_out;
1933 if (copy_to_user(argp, chip, sizeof *chip))
1934 goto get_irqchip_out;
1942 case KVM_SET_IRQCHIP: {
1943 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1944 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1950 if (copy_from_user(chip, argp, sizeof *chip))
1951 goto set_irqchip_out;
1953 if (!irqchip_in_kernel(kvm))
1954 goto set_irqchip_out;
1955 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1957 goto set_irqchip_out;
1967 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1970 if (!kvm->arch.vpit)
1972 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1976 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1983 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1986 if (!kvm->arch.vpit)
1988 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1994 case KVM_REINJECT_CONTROL: {
1995 struct kvm_reinject_control control;
1997 if (copy_from_user(&control, argp, sizeof(control)))
1999 r = kvm_vm_ioctl_reinject(kvm, &control);
2012 static void kvm_init_msr_list(void)
2017 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2018 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2021 msrs_to_save[j] = msrs_to_save[i];
2024 num_msrs_to_save = j;
2028 * Only apic need an MMIO device hook, so shortcut now..
2030 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2031 gpa_t addr, int len,
2034 struct kvm_io_device *dev;
2036 if (vcpu->arch.apic) {
2037 dev = &vcpu->arch.apic->dev;
2038 if (dev->in_range(dev, addr, len, is_write))
2045 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2046 gpa_t addr, int len,
2049 struct kvm_io_device *dev;
2051 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2053 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2058 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2059 struct kvm_vcpu *vcpu)
2062 int r = X86EMUL_CONTINUE;
2065 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2066 unsigned offset = addr & (PAGE_SIZE-1);
2067 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2070 if (gpa == UNMAPPED_GVA) {
2071 r = X86EMUL_PROPAGATE_FAULT;
2074 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2076 r = X86EMUL_UNHANDLEABLE;
2088 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2089 struct kvm_vcpu *vcpu)
2092 int r = X86EMUL_CONTINUE;
2095 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2096 unsigned offset = addr & (PAGE_SIZE-1);
2097 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2100 if (gpa == UNMAPPED_GVA) {
2101 r = X86EMUL_PROPAGATE_FAULT;
2104 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2106 r = X86EMUL_UNHANDLEABLE;
2119 static int emulator_read_emulated(unsigned long addr,
2122 struct kvm_vcpu *vcpu)
2124 struct kvm_io_device *mmio_dev;
2127 if (vcpu->mmio_read_completed) {
2128 memcpy(val, vcpu->mmio_data, bytes);
2129 vcpu->mmio_read_completed = 0;
2130 return X86EMUL_CONTINUE;
2133 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2135 /* For APIC access vmexit */
2136 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2139 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2140 == X86EMUL_CONTINUE)
2141 return X86EMUL_CONTINUE;
2142 if (gpa == UNMAPPED_GVA)
2143 return X86EMUL_PROPAGATE_FAULT;
2147 * Is this MMIO handled locally?
2149 mutex_lock(&vcpu->kvm->lock);
2150 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2152 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2153 mutex_unlock(&vcpu->kvm->lock);
2154 return X86EMUL_CONTINUE;
2156 mutex_unlock(&vcpu->kvm->lock);
2158 vcpu->mmio_needed = 1;
2159 vcpu->mmio_phys_addr = gpa;
2160 vcpu->mmio_size = bytes;
2161 vcpu->mmio_is_write = 0;
2163 return X86EMUL_UNHANDLEABLE;
2166 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2167 const void *val, int bytes)
2171 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2174 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2178 static int emulator_write_emulated_onepage(unsigned long addr,
2181 struct kvm_vcpu *vcpu)
2183 struct kvm_io_device *mmio_dev;
2186 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2188 if (gpa == UNMAPPED_GVA) {
2189 kvm_inject_page_fault(vcpu, addr, 2);
2190 return X86EMUL_PROPAGATE_FAULT;
2193 /* For APIC access vmexit */
2194 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2197 if (emulator_write_phys(vcpu, gpa, val, bytes))
2198 return X86EMUL_CONTINUE;
2202 * Is this MMIO handled locally?
2204 mutex_lock(&vcpu->kvm->lock);
2205 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2207 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2208 mutex_unlock(&vcpu->kvm->lock);
2209 return X86EMUL_CONTINUE;
2211 mutex_unlock(&vcpu->kvm->lock);
2213 vcpu->mmio_needed = 1;
2214 vcpu->mmio_phys_addr = gpa;
2215 vcpu->mmio_size = bytes;
2216 vcpu->mmio_is_write = 1;
2217 memcpy(vcpu->mmio_data, val, bytes);
2219 return X86EMUL_CONTINUE;
2222 int emulator_write_emulated(unsigned long addr,
2225 struct kvm_vcpu *vcpu)
2227 /* Crossing a page boundary? */
2228 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2231 now = -addr & ~PAGE_MASK;
2232 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2233 if (rc != X86EMUL_CONTINUE)
2239 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2241 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2243 static int emulator_cmpxchg_emulated(unsigned long addr,
2247 struct kvm_vcpu *vcpu)
2249 static int reported;
2253 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2255 #ifndef CONFIG_X86_64
2256 /* guests cmpxchg8b have to be emulated atomically */
2263 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2265 if (gpa == UNMAPPED_GVA ||
2266 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2269 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2274 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2276 kaddr = kmap_atomic(page, KM_USER0);
2277 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2278 kunmap_atomic(kaddr, KM_USER0);
2279 kvm_release_page_dirty(page);
2284 return emulator_write_emulated(addr, new, bytes, vcpu);
2287 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2289 return kvm_x86_ops->get_segment_base(vcpu, seg);
2292 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2294 kvm_mmu_invlpg(vcpu, address);
2295 return X86EMUL_CONTINUE;
2298 int emulate_clts(struct kvm_vcpu *vcpu)
2300 KVMTRACE_0D(CLTS, vcpu, handler);
2301 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2302 return X86EMUL_CONTINUE;
2305 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2307 struct kvm_vcpu *vcpu = ctxt->vcpu;
2311 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2312 return X86EMUL_CONTINUE;
2314 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2315 return X86EMUL_UNHANDLEABLE;
2319 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2321 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2324 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2326 /* FIXME: better handling */
2327 return X86EMUL_UNHANDLEABLE;
2329 return X86EMUL_CONTINUE;
2332 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2335 unsigned long rip = kvm_rip_read(vcpu);
2336 unsigned long rip_linear;
2338 if (!printk_ratelimit())
2341 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2343 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2345 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2346 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2348 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2350 static struct x86_emulate_ops emulate_ops = {
2351 .read_std = kvm_read_guest_virt,
2352 .read_emulated = emulator_read_emulated,
2353 .write_emulated = emulator_write_emulated,
2354 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2357 static void cache_all_regs(struct kvm_vcpu *vcpu)
2359 kvm_register_read(vcpu, VCPU_REGS_RAX);
2360 kvm_register_read(vcpu, VCPU_REGS_RSP);
2361 kvm_register_read(vcpu, VCPU_REGS_RIP);
2362 vcpu->arch.regs_dirty = ~0;
2365 int emulate_instruction(struct kvm_vcpu *vcpu,
2366 struct kvm_run *run,
2372 struct decode_cache *c;
2374 kvm_clear_exception_queue(vcpu);
2375 vcpu->arch.mmio_fault_cr2 = cr2;
2377 * TODO: fix x86_emulate.c to use guest_read/write_register
2378 * instead of direct ->regs accesses, can save hundred cycles
2379 * on Intel for instructions that don't read/change RSP, for
2382 cache_all_regs(vcpu);
2384 vcpu->mmio_is_write = 0;
2385 vcpu->arch.pio.string = 0;
2387 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2389 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2391 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2392 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2393 vcpu->arch.emulate_ctxt.mode =
2394 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2395 ? X86EMUL_MODE_REAL : cs_l
2396 ? X86EMUL_MODE_PROT64 : cs_db
2397 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2399 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2401 /* Reject the instructions other than VMCALL/VMMCALL when
2402 * try to emulate invalid opcode */
2403 c = &vcpu->arch.emulate_ctxt.decode;
2404 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2405 (!(c->twobyte && c->b == 0x01 &&
2406 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2407 c->modrm_mod == 3 && c->modrm_rm == 1)))
2408 return EMULATE_FAIL;
2410 ++vcpu->stat.insn_emulation;
2412 ++vcpu->stat.insn_emulation_fail;
2413 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2414 return EMULATE_DONE;
2415 return EMULATE_FAIL;
2419 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2421 if (vcpu->arch.pio.string)
2422 return EMULATE_DO_MMIO;
2424 if ((r || vcpu->mmio_is_write) && run) {
2425 run->exit_reason = KVM_EXIT_MMIO;
2426 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2427 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2428 run->mmio.len = vcpu->mmio_size;
2429 run->mmio.is_write = vcpu->mmio_is_write;
2433 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2434 return EMULATE_DONE;
2435 if (!vcpu->mmio_needed) {
2436 kvm_report_emulation_failure(vcpu, "mmio");
2437 return EMULATE_FAIL;
2439 return EMULATE_DO_MMIO;
2442 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2444 if (vcpu->mmio_is_write) {
2445 vcpu->mmio_needed = 0;
2446 return EMULATE_DO_MMIO;
2449 return EMULATE_DONE;
2451 EXPORT_SYMBOL_GPL(emulate_instruction);
2453 static int pio_copy_data(struct kvm_vcpu *vcpu)
2455 void *p = vcpu->arch.pio_data;
2456 gva_t q = vcpu->arch.pio.guest_gva;
2460 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2461 if (vcpu->arch.pio.in)
2462 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2464 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2468 int complete_pio(struct kvm_vcpu *vcpu)
2470 struct kvm_pio_request *io = &vcpu->arch.pio;
2477 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2478 memcpy(&val, vcpu->arch.pio_data, io->size);
2479 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2483 r = pio_copy_data(vcpu);
2490 delta *= io->cur_count;
2492 * The size of the register should really depend on
2493 * current address size.
2495 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2497 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2503 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2505 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2507 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2509 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2513 io->count -= io->cur_count;
2519 static void kernel_pio(struct kvm_io_device *pio_dev,
2520 struct kvm_vcpu *vcpu,
2523 /* TODO: String I/O for in kernel device */
2525 mutex_lock(&vcpu->kvm->lock);
2526 if (vcpu->arch.pio.in)
2527 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2528 vcpu->arch.pio.size,
2531 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2532 vcpu->arch.pio.size,
2534 mutex_unlock(&vcpu->kvm->lock);
2537 static void pio_string_write(struct kvm_io_device *pio_dev,
2538 struct kvm_vcpu *vcpu)
2540 struct kvm_pio_request *io = &vcpu->arch.pio;
2541 void *pd = vcpu->arch.pio_data;
2544 mutex_lock(&vcpu->kvm->lock);
2545 for (i = 0; i < io->cur_count; i++) {
2546 kvm_iodevice_write(pio_dev, io->port,
2551 mutex_unlock(&vcpu->kvm->lock);
2554 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2555 gpa_t addr, int len,
2558 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2561 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2562 int size, unsigned port)
2564 struct kvm_io_device *pio_dev;
2567 vcpu->run->exit_reason = KVM_EXIT_IO;
2568 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2569 vcpu->run->io.size = vcpu->arch.pio.size = size;
2570 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2571 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2572 vcpu->run->io.port = vcpu->arch.pio.port = port;
2573 vcpu->arch.pio.in = in;
2574 vcpu->arch.pio.string = 0;
2575 vcpu->arch.pio.down = 0;
2576 vcpu->arch.pio.rep = 0;
2578 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2579 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2582 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2585 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2586 memcpy(vcpu->arch.pio_data, &val, 4);
2588 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2590 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2596 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2598 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2599 int size, unsigned long count, int down,
2600 gva_t address, int rep, unsigned port)
2602 unsigned now, in_page;
2604 struct kvm_io_device *pio_dev;
2606 vcpu->run->exit_reason = KVM_EXIT_IO;
2607 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2608 vcpu->run->io.size = vcpu->arch.pio.size = size;
2609 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2610 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2611 vcpu->run->io.port = vcpu->arch.pio.port = port;
2612 vcpu->arch.pio.in = in;
2613 vcpu->arch.pio.string = 1;
2614 vcpu->arch.pio.down = down;
2615 vcpu->arch.pio.rep = rep;
2617 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2618 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2621 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2625 kvm_x86_ops->skip_emulated_instruction(vcpu);
2630 in_page = PAGE_SIZE - offset_in_page(address);
2632 in_page = offset_in_page(address) + size;
2633 now = min(count, (unsigned long)in_page / size);
2638 * String I/O in reverse. Yuck. Kill the guest, fix later.
2640 pr_unimpl(vcpu, "guest string pio down\n");
2641 kvm_inject_gp(vcpu, 0);
2644 vcpu->run->io.count = now;
2645 vcpu->arch.pio.cur_count = now;
2647 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2648 kvm_x86_ops->skip_emulated_instruction(vcpu);
2650 vcpu->arch.pio.guest_gva = address;
2652 pio_dev = vcpu_find_pio_dev(vcpu, port,
2653 vcpu->arch.pio.cur_count,
2654 !vcpu->arch.pio.in);
2655 if (!vcpu->arch.pio.in) {
2656 /* string PIO write */
2657 ret = pio_copy_data(vcpu);
2658 if (ret == X86EMUL_PROPAGATE_FAULT) {
2659 kvm_inject_gp(vcpu, 0);
2662 if (ret == 0 && pio_dev) {
2663 pio_string_write(pio_dev, vcpu);
2665 if (vcpu->arch.pio.count == 0)
2669 pr_unimpl(vcpu, "no string pio read support yet, "
2670 "port %x size %d count %ld\n",
2675 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2677 static void bounce_off(void *info)
2682 static unsigned int ref_freq;
2683 static unsigned long tsc_khz_ref;
2685 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2688 struct cpufreq_freqs *freq = data;
2690 struct kvm_vcpu *vcpu;
2691 int i, send_ipi = 0;
2694 ref_freq = freq->old;
2696 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2698 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2700 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2702 spin_lock(&kvm_lock);
2703 list_for_each_entry(kvm, &vm_list, vm_list) {
2704 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2705 vcpu = kvm->vcpus[i];
2708 if (vcpu->cpu != freq->cpu)
2710 if (!kvm_request_guest_time_update(vcpu))
2712 if (vcpu->cpu != smp_processor_id())
2716 spin_unlock(&kvm_lock);
2718 if (freq->old < freq->new && send_ipi) {
2720 * We upscale the frequency. Must make the guest
2721 * doesn't see old kvmclock values while running with
2722 * the new frequency, otherwise we risk the guest sees
2723 * time go backwards.
2725 * In case we update the frequency for another cpu
2726 * (which might be in guest context) send an interrupt
2727 * to kick the cpu out of guest context. Next time
2728 * guest context is entered kvmclock will be updated,
2729 * so the guest will not see stale values.
2731 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2736 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2737 .notifier_call = kvmclock_cpufreq_notifier
2740 int kvm_arch_init(void *opaque)
2743 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2746 printk(KERN_ERR "kvm: already loaded the other module\n");
2751 if (!ops->cpu_has_kvm_support()) {
2752 printk(KERN_ERR "kvm: no hardware support\n");
2756 if (ops->disabled_by_bios()) {
2757 printk(KERN_ERR "kvm: disabled by bios\n");
2762 r = kvm_mmu_module_init();
2766 kvm_init_msr_list();
2769 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2770 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2771 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2772 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2774 for_each_possible_cpu(cpu)
2775 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2776 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2777 tsc_khz_ref = tsc_khz;
2778 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2779 CPUFREQ_TRANSITION_NOTIFIER);
2788 void kvm_arch_exit(void)
2790 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2791 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2792 CPUFREQ_TRANSITION_NOTIFIER);
2794 kvm_mmu_module_exit();
2797 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2799 ++vcpu->stat.halt_exits;
2800 KVMTRACE_0D(HLT, vcpu, handler);
2801 if (irqchip_in_kernel(vcpu->kvm)) {
2802 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2805 vcpu->run->exit_reason = KVM_EXIT_HLT;
2809 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2811 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2814 if (is_long_mode(vcpu))
2817 return a0 | ((gpa_t)a1 << 32);
2820 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2822 unsigned long nr, a0, a1, a2, a3, ret;
2825 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2826 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2827 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2828 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2829 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2831 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2833 if (!is_long_mode(vcpu)) {
2842 case KVM_HC_VAPIC_POLL_IRQ:
2846 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2852 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2853 ++vcpu->stat.hypercalls;
2856 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2858 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2860 char instruction[3];
2862 unsigned long rip = kvm_rip_read(vcpu);
2866 * Blow out the MMU to ensure that no other VCPU has an active mapping
2867 * to ensure that the updated hypercall appears atomically across all
2870 kvm_mmu_zap_all(vcpu->kvm);
2872 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2873 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2874 != X86EMUL_CONTINUE)
2880 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2882 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2885 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2887 struct descriptor_table dt = { limit, base };
2889 kvm_x86_ops->set_gdt(vcpu, &dt);
2892 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2894 struct descriptor_table dt = { limit, base };
2896 kvm_x86_ops->set_idt(vcpu, &dt);
2899 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2900 unsigned long *rflags)
2902 kvm_lmsw(vcpu, msw);
2903 *rflags = kvm_x86_ops->get_rflags(vcpu);
2906 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2908 unsigned long value;
2910 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2913 value = vcpu->arch.cr0;
2916 value = vcpu->arch.cr2;
2919 value = vcpu->arch.cr3;
2922 value = vcpu->arch.cr4;
2925 value = kvm_get_cr8(vcpu);
2928 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2931 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2932 (u32)((u64)value >> 32), handler);
2937 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2938 unsigned long *rflags)
2940 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2941 (u32)((u64)val >> 32), handler);
2945 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2946 *rflags = kvm_x86_ops->get_rflags(vcpu);
2949 vcpu->arch.cr2 = val;
2952 kvm_set_cr3(vcpu, val);
2955 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2958 kvm_set_cr8(vcpu, val & 0xfUL);
2961 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2965 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2967 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2968 int j, nent = vcpu->arch.cpuid_nent;
2970 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2971 /* when no next entry is found, the current entry[i] is reselected */
2972 for (j = i + 1; ; j = (j + 1) % nent) {
2973 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2974 if (ej->function == e->function) {
2975 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2979 return 0; /* silence gcc, even though control never reaches here */
2982 /* find an entry with matching function, matching index (if needed), and that
2983 * should be read next (if it's stateful) */
2984 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2985 u32 function, u32 index)
2987 if (e->function != function)
2989 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2991 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2992 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2997 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
2998 u32 function, u32 index)
3001 struct kvm_cpuid_entry2 *best = NULL;
3003 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3004 struct kvm_cpuid_entry2 *e;
3006 e = &vcpu->arch.cpuid_entries[i];
3007 if (is_matching_cpuid_entry(e, function, index)) {
3008 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3009 move_to_next_stateful_cpuid_entry(vcpu, i);
3014 * Both basic or both extended?
3016 if (((e->function ^ function) & 0x80000000) == 0)
3017 if (!best || e->function > best->function)
3023 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3025 struct kvm_cpuid_entry2 *best;
3027 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3029 return best->eax & 0xff;
3033 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3035 u32 function, index;
3036 struct kvm_cpuid_entry2 *best;
3038 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3039 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3040 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3041 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3042 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3043 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3044 best = kvm_find_cpuid_entry(vcpu, function, index);
3046 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3047 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3048 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3049 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3051 kvm_x86_ops->skip_emulated_instruction(vcpu);
3052 KVMTRACE_5D(CPUID, vcpu, function,
3053 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3054 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3055 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3056 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3058 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3061 * Check if userspace requested an interrupt window, and that the
3062 * interrupt window is open.
3064 * No need to exit to userspace if we already have an interrupt queued.
3066 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3067 struct kvm_run *kvm_run)
3069 return (!vcpu->arch.irq_summary &&
3070 kvm_run->request_interrupt_window &&
3071 vcpu->arch.interrupt_window_open &&
3072 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3075 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3076 struct kvm_run *kvm_run)
3078 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3079 kvm_run->cr8 = kvm_get_cr8(vcpu);
3080 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3081 if (irqchip_in_kernel(vcpu->kvm))
3082 kvm_run->ready_for_interrupt_injection = 1;
3084 kvm_run->ready_for_interrupt_injection =
3085 (vcpu->arch.interrupt_window_open &&
3086 vcpu->arch.irq_summary == 0);
3089 static void vapic_enter(struct kvm_vcpu *vcpu)
3091 struct kvm_lapic *apic = vcpu->arch.apic;
3094 if (!apic || !apic->vapic_addr)
3097 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3099 vcpu->arch.apic->vapic_page = page;
3102 static void vapic_exit(struct kvm_vcpu *vcpu)
3104 struct kvm_lapic *apic = vcpu->arch.apic;
3106 if (!apic || !apic->vapic_addr)
3109 down_read(&vcpu->kvm->slots_lock);
3110 kvm_release_page_dirty(apic->vapic_page);
3111 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3112 up_read(&vcpu->kvm->slots_lock);
3115 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3120 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3121 kvm_mmu_unload(vcpu);
3123 r = kvm_mmu_reload(vcpu);
3127 if (vcpu->requests) {
3128 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3129 __kvm_migrate_timers(vcpu);
3130 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3131 kvm_write_guest_time(vcpu);
3132 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3133 kvm_mmu_sync_roots(vcpu);
3134 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3135 kvm_x86_ops->tlb_flush(vcpu);
3136 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3138 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3142 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3143 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3151 kvm_x86_ops->prepare_guest_switch(vcpu);
3152 kvm_load_guest_fpu(vcpu);
3154 local_irq_disable();
3156 if (vcpu->requests || need_resched() || signal_pending(current)) {
3163 vcpu->guest_mode = 1;
3165 * Make sure that guest_mode assignment won't happen after
3166 * testing the pending IRQ vector bitmap.
3170 if (vcpu->arch.exception.pending)
3171 __queue_exception(vcpu);
3172 else if (irqchip_in_kernel(vcpu->kvm))
3173 kvm_x86_ops->inject_pending_irq(vcpu);
3175 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3177 kvm_lapic_sync_to_vapic(vcpu);
3179 up_read(&vcpu->kvm->slots_lock);
3183 get_debugreg(vcpu->arch.host_dr6, 6);
3184 get_debugreg(vcpu->arch.host_dr7, 7);
3185 if (unlikely(vcpu->arch.switch_db_regs)) {
3186 get_debugreg(vcpu->arch.host_db[0], 0);
3187 get_debugreg(vcpu->arch.host_db[1], 1);
3188 get_debugreg(vcpu->arch.host_db[2], 2);
3189 get_debugreg(vcpu->arch.host_db[3], 3);
3192 set_debugreg(vcpu->arch.eff_db[0], 0);
3193 set_debugreg(vcpu->arch.eff_db[1], 1);
3194 set_debugreg(vcpu->arch.eff_db[2], 2);
3195 set_debugreg(vcpu->arch.eff_db[3], 3);
3198 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3199 kvm_x86_ops->run(vcpu, kvm_run);
3201 if (unlikely(vcpu->arch.switch_db_regs)) {
3203 set_debugreg(vcpu->arch.host_db[0], 0);
3204 set_debugreg(vcpu->arch.host_db[1], 1);
3205 set_debugreg(vcpu->arch.host_db[2], 2);
3206 set_debugreg(vcpu->arch.host_db[3], 3);
3208 set_debugreg(vcpu->arch.host_dr6, 6);
3209 set_debugreg(vcpu->arch.host_dr7, 7);
3211 vcpu->guest_mode = 0;
3217 * We must have an instruction between local_irq_enable() and
3218 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3219 * the interrupt shadow. The stat.exits increment will do nicely.
3220 * But we need to prevent reordering, hence this barrier():
3228 down_read(&vcpu->kvm->slots_lock);
3231 * Profile KVM exit RIPs:
3233 if (unlikely(prof_on == KVM_PROFILING)) {
3234 unsigned long rip = kvm_rip_read(vcpu);
3235 profile_hit(KVM_PROFILING, (void *)rip);
3238 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3239 vcpu->arch.exception.pending = false;
3241 kvm_lapic_sync_from_vapic(vcpu);
3243 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3249 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3253 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3254 pr_debug("vcpu %d received sipi with vector # %x\n",
3255 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3256 kvm_lapic_reset(vcpu);
3257 r = kvm_arch_vcpu_reset(vcpu);
3260 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3263 down_read(&vcpu->kvm->slots_lock);
3268 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3269 r = vcpu_enter_guest(vcpu, kvm_run);
3271 up_read(&vcpu->kvm->slots_lock);
3272 kvm_vcpu_block(vcpu);
3273 down_read(&vcpu->kvm->slots_lock);
3274 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3276 switch(vcpu->arch.mp_state) {
3277 case KVM_MP_STATE_HALTED:
3278 vcpu->arch.mp_state =
3279 KVM_MP_STATE_RUNNABLE;
3280 case KVM_MP_STATE_RUNNABLE:
3282 case KVM_MP_STATE_SIPI_RECEIVED:
3293 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3294 if (kvm_cpu_has_pending_timer(vcpu))
3295 kvm_inject_pending_timer_irqs(vcpu);
3297 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3299 kvm_run->exit_reason = KVM_EXIT_INTR;
3300 ++vcpu->stat.request_irq_exits;
3302 if (signal_pending(current)) {
3304 kvm_run->exit_reason = KVM_EXIT_INTR;
3305 ++vcpu->stat.signal_exits;
3307 if (need_resched()) {
3308 up_read(&vcpu->kvm->slots_lock);
3310 down_read(&vcpu->kvm->slots_lock);
3314 up_read(&vcpu->kvm->slots_lock);
3315 post_kvm_run_save(vcpu, kvm_run);
3322 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3329 if (vcpu->sigset_active)
3330 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3332 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3333 kvm_vcpu_block(vcpu);
3334 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3339 /* re-sync apic's tpr */
3340 if (!irqchip_in_kernel(vcpu->kvm))
3341 kvm_set_cr8(vcpu, kvm_run->cr8);
3343 if (vcpu->arch.pio.cur_count) {
3344 r = complete_pio(vcpu);
3348 #if CONFIG_HAS_IOMEM
3349 if (vcpu->mmio_needed) {
3350 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3351 vcpu->mmio_read_completed = 1;
3352 vcpu->mmio_needed = 0;
3354 down_read(&vcpu->kvm->slots_lock);
3355 r = emulate_instruction(vcpu, kvm_run,
3356 vcpu->arch.mmio_fault_cr2, 0,
3357 EMULTYPE_NO_DECODE);
3358 up_read(&vcpu->kvm->slots_lock);
3359 if (r == EMULATE_DO_MMIO) {
3361 * Read-modify-write. Back to userspace.
3368 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3369 kvm_register_write(vcpu, VCPU_REGS_RAX,
3370 kvm_run->hypercall.ret);
3372 r = __vcpu_run(vcpu, kvm_run);
3375 if (vcpu->sigset_active)
3376 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3382 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3386 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3387 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3388 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3389 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3390 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3391 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3392 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3393 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3394 #ifdef CONFIG_X86_64
3395 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3396 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3397 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3398 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3399 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3400 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3401 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3402 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3405 regs->rip = kvm_rip_read(vcpu);
3406 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3409 * Don't leak debug flags in case they were set for guest debugging
3411 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3412 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3419 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3423 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3424 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3425 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3426 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3427 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3428 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3429 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3430 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3431 #ifdef CONFIG_X86_64
3432 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3433 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3434 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3435 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3436 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3437 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3438 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3439 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3443 kvm_rip_write(vcpu, regs->rip);
3444 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3447 vcpu->arch.exception.pending = false;
3454 void kvm_get_segment(struct kvm_vcpu *vcpu,
3455 struct kvm_segment *var, int seg)
3457 kvm_x86_ops->get_segment(vcpu, var, seg);
3460 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3462 struct kvm_segment cs;
3464 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3468 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3470 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3471 struct kvm_sregs *sregs)
3473 struct descriptor_table dt;
3478 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3479 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3480 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3481 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3482 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3483 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3485 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3486 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3488 kvm_x86_ops->get_idt(vcpu, &dt);
3489 sregs->idt.limit = dt.limit;
3490 sregs->idt.base = dt.base;
3491 kvm_x86_ops->get_gdt(vcpu, &dt);
3492 sregs->gdt.limit = dt.limit;
3493 sregs->gdt.base = dt.base;
3495 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3496 sregs->cr0 = vcpu->arch.cr0;
3497 sregs->cr2 = vcpu->arch.cr2;
3498 sregs->cr3 = vcpu->arch.cr3;
3499 sregs->cr4 = vcpu->arch.cr4;
3500 sregs->cr8 = kvm_get_cr8(vcpu);
3501 sregs->efer = vcpu->arch.shadow_efer;
3502 sregs->apic_base = kvm_get_apic_base(vcpu);
3504 if (irqchip_in_kernel(vcpu->kvm)) {
3505 memset(sregs->interrupt_bitmap, 0,
3506 sizeof sregs->interrupt_bitmap);
3507 pending_vec = kvm_x86_ops->get_irq(vcpu);
3508 if (pending_vec >= 0)
3509 set_bit(pending_vec,
3510 (unsigned long *)sregs->interrupt_bitmap);
3512 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3513 sizeof sregs->interrupt_bitmap);
3520 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3521 struct kvm_mp_state *mp_state)
3524 mp_state->mp_state = vcpu->arch.mp_state;
3529 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3530 struct kvm_mp_state *mp_state)
3533 vcpu->arch.mp_state = mp_state->mp_state;
3538 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3539 struct kvm_segment *var, int seg)
3541 kvm_x86_ops->set_segment(vcpu, var, seg);
3544 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3545 struct kvm_segment *kvm_desct)
3547 kvm_desct->base = seg_desc->base0;
3548 kvm_desct->base |= seg_desc->base1 << 16;
3549 kvm_desct->base |= seg_desc->base2 << 24;
3550 kvm_desct->limit = seg_desc->limit0;
3551 kvm_desct->limit |= seg_desc->limit << 16;
3553 kvm_desct->limit <<= 12;
3554 kvm_desct->limit |= 0xfff;
3556 kvm_desct->selector = selector;
3557 kvm_desct->type = seg_desc->type;
3558 kvm_desct->present = seg_desc->p;
3559 kvm_desct->dpl = seg_desc->dpl;
3560 kvm_desct->db = seg_desc->d;
3561 kvm_desct->s = seg_desc->s;
3562 kvm_desct->l = seg_desc->l;
3563 kvm_desct->g = seg_desc->g;
3564 kvm_desct->avl = seg_desc->avl;
3566 kvm_desct->unusable = 1;
3568 kvm_desct->unusable = 0;
3569 kvm_desct->padding = 0;
3572 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3574 struct descriptor_table *dtable)
3576 if (selector & 1 << 2) {
3577 struct kvm_segment kvm_seg;
3579 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3581 if (kvm_seg.unusable)
3584 dtable->limit = kvm_seg.limit;
3585 dtable->base = kvm_seg.base;
3588 kvm_x86_ops->get_gdt(vcpu, dtable);
3591 /* allowed just for 8 bytes segments */
3592 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3593 struct desc_struct *seg_desc)
3596 struct descriptor_table dtable;
3597 u16 index = selector >> 3;
3599 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3601 if (dtable.limit < index * 8 + 7) {
3602 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3605 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3607 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3610 /* allowed just for 8 bytes segments */
3611 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3612 struct desc_struct *seg_desc)
3615 struct descriptor_table dtable;
3616 u16 index = selector >> 3;
3618 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3620 if (dtable.limit < index * 8 + 7)
3622 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3624 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3627 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3628 struct desc_struct *seg_desc)
3632 base_addr = seg_desc->base0;
3633 base_addr |= (seg_desc->base1 << 16);
3634 base_addr |= (seg_desc->base2 << 24);
3636 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3639 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3641 struct kvm_segment kvm_seg;
3643 kvm_get_segment(vcpu, &kvm_seg, seg);
3644 return kvm_seg.selector;
3647 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3649 struct kvm_segment *kvm_seg)
3651 struct desc_struct seg_desc;
3653 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3655 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3659 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3661 struct kvm_segment segvar = {
3662 .base = selector << 4,
3664 .selector = selector,
3675 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3679 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3680 int type_bits, int seg)
3682 struct kvm_segment kvm_seg;
3684 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3685 return kvm_load_realmode_segment(vcpu, selector, seg);
3686 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3688 kvm_seg.type |= type_bits;
3690 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3691 seg != VCPU_SREG_LDTR)
3693 kvm_seg.unusable = 1;
3695 kvm_set_segment(vcpu, &kvm_seg, seg);
3699 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3700 struct tss_segment_32 *tss)
3702 tss->cr3 = vcpu->arch.cr3;
3703 tss->eip = kvm_rip_read(vcpu);
3704 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3705 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3706 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3707 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3708 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3709 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3710 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3711 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3712 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3713 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3714 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3715 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3716 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3717 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3718 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3719 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3720 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3723 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3724 struct tss_segment_32 *tss)
3726 kvm_set_cr3(vcpu, tss->cr3);
3728 kvm_rip_write(vcpu, tss->eip);
3729 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3731 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3732 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3733 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3734 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3735 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3736 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3737 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3738 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3740 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3743 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3746 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3749 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3752 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3755 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3758 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3763 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3764 struct tss_segment_16 *tss)
3766 tss->ip = kvm_rip_read(vcpu);
3767 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3768 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3769 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3770 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3771 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3772 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3773 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3774 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3775 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3777 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3778 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3779 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3780 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3781 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3782 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3785 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3786 struct tss_segment_16 *tss)
3788 kvm_rip_write(vcpu, tss->ip);
3789 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3790 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3791 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3792 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3793 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3794 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3795 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3796 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3797 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3799 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3802 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3805 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3808 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3811 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3816 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3818 struct desc_struct *nseg_desc)
3820 struct tss_segment_16 tss_segment_16;
3823 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3824 sizeof tss_segment_16))
3827 save_state_to_tss16(vcpu, &tss_segment_16);
3829 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3830 sizeof tss_segment_16))
3833 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3834 &tss_segment_16, sizeof tss_segment_16))
3837 if (load_state_from_tss16(vcpu, &tss_segment_16))
3845 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3847 struct desc_struct *nseg_desc)
3849 struct tss_segment_32 tss_segment_32;
3852 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3853 sizeof tss_segment_32))
3856 save_state_to_tss32(vcpu, &tss_segment_32);
3858 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3859 sizeof tss_segment_32))
3862 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3863 &tss_segment_32, sizeof tss_segment_32))
3866 if (load_state_from_tss32(vcpu, &tss_segment_32))
3874 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3876 struct kvm_segment tr_seg;
3877 struct desc_struct cseg_desc;
3878 struct desc_struct nseg_desc;
3880 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3881 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3883 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3885 /* FIXME: Handle errors. Failure to read either TSS or their
3886 * descriptors should generate a pagefault.
3888 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3891 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3894 if (reason != TASK_SWITCH_IRET) {
3897 cpl = kvm_x86_ops->get_cpl(vcpu);
3898 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3899 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3904 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3905 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3909 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3910 cseg_desc.type &= ~(1 << 1); //clear the B flag
3911 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3914 if (reason == TASK_SWITCH_IRET) {
3915 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3916 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3919 kvm_x86_ops->skip_emulated_instruction(vcpu);
3921 if (nseg_desc.type & 8)
3922 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3925 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3928 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3929 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3930 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3933 if (reason != TASK_SWITCH_IRET) {
3934 nseg_desc.type |= (1 << 1);
3935 save_guest_segment_descriptor(vcpu, tss_selector,
3939 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3940 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3942 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3946 EXPORT_SYMBOL_GPL(kvm_task_switch);
3948 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3949 struct kvm_sregs *sregs)
3951 int mmu_reset_needed = 0;
3952 int i, pending_vec, max_bits;
3953 struct descriptor_table dt;
3957 dt.limit = sregs->idt.limit;
3958 dt.base = sregs->idt.base;
3959 kvm_x86_ops->set_idt(vcpu, &dt);
3960 dt.limit = sregs->gdt.limit;
3961 dt.base = sregs->gdt.base;
3962 kvm_x86_ops->set_gdt(vcpu, &dt);
3964 vcpu->arch.cr2 = sregs->cr2;
3965 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3966 vcpu->arch.cr3 = sregs->cr3;
3968 kvm_set_cr8(vcpu, sregs->cr8);
3970 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3971 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3972 kvm_set_apic_base(vcpu, sregs->apic_base);
3974 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3976 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3977 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3978 vcpu->arch.cr0 = sregs->cr0;
3980 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3981 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3982 if (!is_long_mode(vcpu) && is_pae(vcpu))
3983 load_pdptrs(vcpu, vcpu->arch.cr3);
3985 if (mmu_reset_needed)
3986 kvm_mmu_reset_context(vcpu);
3988 if (!irqchip_in_kernel(vcpu->kvm)) {
3989 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3990 sizeof vcpu->arch.irq_pending);
3991 vcpu->arch.irq_summary = 0;
3992 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3993 if (vcpu->arch.irq_pending[i])
3994 __set_bit(i, &vcpu->arch.irq_summary);
3996 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3997 pending_vec = find_first_bit(
3998 (const unsigned long *)sregs->interrupt_bitmap,
4000 /* Only pending external irq is handled here */
4001 if (pending_vec < max_bits) {
4002 kvm_x86_ops->set_irq(vcpu, pending_vec);
4003 pr_debug("Set back pending irq %d\n",
4006 kvm_pic_clear_isr_ack(vcpu->kvm);
4009 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4010 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4011 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4012 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4013 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4014 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4016 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4017 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4019 /* Older userspace won't unhalt the vcpu on reset. */
4020 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4021 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4022 !(vcpu->arch.cr0 & X86_CR0_PE))
4023 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4030 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4031 struct kvm_guest_debug *dbg)
4037 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4038 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4039 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4040 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4041 vcpu->arch.switch_db_regs =
4042 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4044 for (i = 0; i < KVM_NR_DB_REGS; i++)
4045 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4046 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4049 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4051 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4052 kvm_queue_exception(vcpu, DB_VECTOR);
4053 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4054 kvm_queue_exception(vcpu, BP_VECTOR);
4062 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4063 * we have asm/x86/processor.h
4074 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4075 #ifdef CONFIG_X86_64
4076 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4078 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4083 * Translate a guest virtual address to a guest physical address.
4085 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4086 struct kvm_translation *tr)
4088 unsigned long vaddr = tr->linear_address;
4092 down_read(&vcpu->kvm->slots_lock);
4093 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4094 up_read(&vcpu->kvm->slots_lock);
4095 tr->physical_address = gpa;
4096 tr->valid = gpa != UNMAPPED_GVA;
4104 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4106 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4110 memcpy(fpu->fpr, fxsave->st_space, 128);
4111 fpu->fcw = fxsave->cwd;
4112 fpu->fsw = fxsave->swd;
4113 fpu->ftwx = fxsave->twd;
4114 fpu->last_opcode = fxsave->fop;
4115 fpu->last_ip = fxsave->rip;
4116 fpu->last_dp = fxsave->rdp;
4117 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4124 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4126 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4130 memcpy(fxsave->st_space, fpu->fpr, 128);
4131 fxsave->cwd = fpu->fcw;
4132 fxsave->swd = fpu->fsw;
4133 fxsave->twd = fpu->ftwx;
4134 fxsave->fop = fpu->last_opcode;
4135 fxsave->rip = fpu->last_ip;
4136 fxsave->rdp = fpu->last_dp;
4137 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4144 void fx_init(struct kvm_vcpu *vcpu)
4146 unsigned after_mxcsr_mask;
4149 * Touch the fpu the first time in non atomic context as if
4150 * this is the first fpu instruction the exception handler
4151 * will fire before the instruction returns and it'll have to
4152 * allocate ram with GFP_KERNEL.
4155 kvm_fx_save(&vcpu->arch.host_fx_image);
4157 /* Initialize guest FPU by resetting ours and saving into guest's */
4159 kvm_fx_save(&vcpu->arch.host_fx_image);
4161 kvm_fx_save(&vcpu->arch.guest_fx_image);
4162 kvm_fx_restore(&vcpu->arch.host_fx_image);
4165 vcpu->arch.cr0 |= X86_CR0_ET;
4166 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4167 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4168 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4169 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4171 EXPORT_SYMBOL_GPL(fx_init);
4173 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4175 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4178 vcpu->guest_fpu_loaded = 1;
4179 kvm_fx_save(&vcpu->arch.host_fx_image);
4180 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4182 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4184 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4186 if (!vcpu->guest_fpu_loaded)
4189 vcpu->guest_fpu_loaded = 0;
4190 kvm_fx_save(&vcpu->arch.guest_fx_image);
4191 kvm_fx_restore(&vcpu->arch.host_fx_image);
4192 ++vcpu->stat.fpu_reload;
4194 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4196 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4198 if (vcpu->arch.time_page) {
4199 kvm_release_page_dirty(vcpu->arch.time_page);
4200 vcpu->arch.time_page = NULL;
4203 kvm_x86_ops->vcpu_free(vcpu);
4206 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4209 return kvm_x86_ops->vcpu_create(kvm, id);
4212 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4216 /* We do fxsave: this must be aligned. */
4217 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4219 vcpu->arch.mtrr_state.have_fixed = 1;
4221 r = kvm_arch_vcpu_reset(vcpu);
4223 r = kvm_mmu_setup(vcpu);
4230 kvm_x86_ops->vcpu_free(vcpu);
4234 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4237 kvm_mmu_unload(vcpu);
4240 kvm_x86_ops->vcpu_free(vcpu);
4243 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4245 vcpu->arch.nmi_pending = false;
4246 vcpu->arch.nmi_injected = false;
4248 vcpu->arch.switch_db_regs = 0;
4249 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4250 vcpu->arch.dr6 = DR6_FIXED_1;
4251 vcpu->arch.dr7 = DR7_FIXED_1;
4253 return kvm_x86_ops->vcpu_reset(vcpu);
4256 void kvm_arch_hardware_enable(void *garbage)
4258 kvm_x86_ops->hardware_enable(garbage);
4261 void kvm_arch_hardware_disable(void *garbage)
4263 kvm_x86_ops->hardware_disable(garbage);
4266 int kvm_arch_hardware_setup(void)
4268 return kvm_x86_ops->hardware_setup();
4271 void kvm_arch_hardware_unsetup(void)
4273 kvm_x86_ops->hardware_unsetup();
4276 void kvm_arch_check_processor_compat(void *rtn)
4278 kvm_x86_ops->check_processor_compatibility(rtn);
4281 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4287 BUG_ON(vcpu->kvm == NULL);
4290 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4291 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4292 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4294 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4296 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4301 vcpu->arch.pio_data = page_address(page);
4303 r = kvm_mmu_create(vcpu);
4305 goto fail_free_pio_data;
4307 if (irqchip_in_kernel(kvm)) {
4308 r = kvm_create_lapic(vcpu);
4310 goto fail_mmu_destroy;
4316 kvm_mmu_destroy(vcpu);
4318 free_page((unsigned long)vcpu->arch.pio_data);
4323 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4325 kvm_free_lapic(vcpu);
4326 down_read(&vcpu->kvm->slots_lock);
4327 kvm_mmu_destroy(vcpu);
4328 up_read(&vcpu->kvm->slots_lock);
4329 free_page((unsigned long)vcpu->arch.pio_data);
4332 struct kvm *kvm_arch_create_vm(void)
4334 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4337 return ERR_PTR(-ENOMEM);
4339 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4340 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4341 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4343 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4344 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4346 rdtscll(kvm->arch.vm_init_tsc);
4351 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4354 kvm_mmu_unload(vcpu);
4358 static void kvm_free_vcpus(struct kvm *kvm)
4363 * Unpin any mmu pages first.
4365 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4367 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4368 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4369 if (kvm->vcpus[i]) {
4370 kvm_arch_vcpu_free(kvm->vcpus[i]);
4371 kvm->vcpus[i] = NULL;
4377 void kvm_arch_sync_events(struct kvm *kvm)
4379 kvm_free_all_assigned_devices(kvm);
4382 void kvm_arch_destroy_vm(struct kvm *kvm)
4384 kvm_iommu_unmap_guest(kvm);
4386 kfree(kvm->arch.vpic);
4387 kfree(kvm->arch.vioapic);
4388 kvm_free_vcpus(kvm);
4389 kvm_free_physmem(kvm);
4390 if (kvm->arch.apic_access_page)
4391 put_page(kvm->arch.apic_access_page);
4392 if (kvm->arch.ept_identity_pagetable)
4393 put_page(kvm->arch.ept_identity_pagetable);
4397 int kvm_arch_set_memory_region(struct kvm *kvm,
4398 struct kvm_userspace_memory_region *mem,
4399 struct kvm_memory_slot old,
4402 int npages = mem->memory_size >> PAGE_SHIFT;
4403 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4405 /*To keep backward compatibility with older userspace,
4406 *x86 needs to hanlde !user_alloc case.
4409 if (npages && !old.rmap) {
4410 unsigned long userspace_addr;
4412 down_write(¤t->mm->mmap_sem);
4413 userspace_addr = do_mmap(NULL, 0,
4415 PROT_READ | PROT_WRITE,
4416 MAP_PRIVATE | MAP_ANONYMOUS,
4418 up_write(¤t->mm->mmap_sem);
4420 if (IS_ERR((void *)userspace_addr))
4421 return PTR_ERR((void *)userspace_addr);
4423 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4424 spin_lock(&kvm->mmu_lock);
4425 memslot->userspace_addr = userspace_addr;
4426 spin_unlock(&kvm->mmu_lock);
4428 if (!old.user_alloc && old.rmap) {
4431 down_write(¤t->mm->mmap_sem);
4432 ret = do_munmap(current->mm, old.userspace_addr,
4433 old.npages * PAGE_SIZE);
4434 up_write(¤t->mm->mmap_sem);
4437 "kvm_vm_ioctl_set_memory_region: "
4438 "failed to munmap memory\n");
4443 if (!kvm->arch.n_requested_mmu_pages) {
4444 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4445 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4448 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4449 kvm_flush_remote_tlbs(kvm);
4454 void kvm_arch_flush_shadow(struct kvm *kvm)
4456 kvm_mmu_zap_all(kvm);
4459 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4461 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4462 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4463 || vcpu->arch.nmi_pending;
4466 static void vcpu_kick_intr(void *info)
4469 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4470 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4474 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4476 int ipi_pcpu = vcpu->cpu;
4477 int cpu = get_cpu();
4479 if (waitqueue_active(&vcpu->wq)) {
4480 wake_up_interruptible(&vcpu->wq);
4481 ++vcpu->stat.halt_wakeup;
4484 * We may be called synchronously with irqs disabled in guest mode,
4485 * So need not to call smp_call_function_single() in that case.
4487 if (vcpu->guest_mode && vcpu->cpu != cpu)
4488 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4492 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4494 return kvm_x86_ops->interrupt_allowed(vcpu);