arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 338 {
 339         unsigned error_code = vcpu->arch.fault.error_code;
 340
 341         ++vcpu->stat.pf_guest;
 342         vcpu->arch.cr2 = vcpu->arch.fault.address;
 343         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 344 }
 345
 346 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 347 {
 348         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
 349                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 350         else
 351                 vcpu->arch.mmu.inject_page_fault(vcpu);
 352
 353         vcpu->arch.fault.nested = false;
 354 }
 355
 356 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 357 {
 358         kvm_make_request(KVM_REQ_EVENT, vcpu);
 359         vcpu->arch.nmi_pending = 1;
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 362
 363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 364 {
 365         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 368
 369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 374
 375 /*
 376  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 377  * a #GP and return false.
 378  */
 379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 380 {
 381         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 382                 return true;
 383         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 384         return false;
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 387
 388 /*
 389  * This function will be used to read from the physical memory of the currently
 390  * running guest. The difference to kvm_read_guest_page is that this function
 391  * can read from guest physical or from the guest's guest physical memory.
 392  */
 393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 394                             gfn_t ngfn, void *data, int offset, int len,
 395                             u32 access)
 396 {
 397         gfn_t real_gfn;
 398         gpa_t ngpa;
 399
 400         ngpa     = gfn_to_gpa(ngfn);
 401         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 402         if (real_gfn == UNMAPPED_GVA)
 403                 return -EFAULT;
 404
 405         real_gfn = gpa_to_gfn(real_gfn);
 406
 407         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 410
 411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 412                                void *data, int offset, int len, u32 access)
 413 {
 414         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 415                                        data, offset, len, access);
 416 }
 417
 418 /*
 419  * Load the pae pdptrs.  Return true is they are all valid.
 420  */
 421 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 422 {
 423         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 424         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 425         int i;
 426         int ret;
 427         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 428
 429         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 430                                       offset * sizeof(u64), sizeof(pdpte),
 431                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 432         if (ret < 0) {
 433                 ret = 0;
 434                 goto out;
 435         }
 436         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 437                 if (is_present_gpte(pdpte[i]) &&
 438                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 439                         ret = 0;
 440                         goto out;
 441                 }
 442         }
 443         ret = 1;
 444
 445         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 446         __set_bit(VCPU_EXREG_PDPTR,
 447                   (unsigned long *)&vcpu->arch.regs_avail);
 448         __set_bit(VCPU_EXREG_PDPTR,
 449                   (unsigned long *)&vcpu->arch.regs_dirty);
 450 out:
 451
 452         return ret;
 453 }
 454 EXPORT_SYMBOL_GPL(load_pdptrs);
 455
 456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 457 {
 458         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 459         bool changed = true;
 460         int offset;
 461         gfn_t gfn;
 462         int r;
 463
 464         if (is_long_mode(vcpu) || !is_pae(vcpu))
 465                 return false;
 466
 467         if (!test_bit(VCPU_EXREG_PDPTR,
 468                       (unsigned long *)&vcpu->arch.regs_avail))
 469                 return true;
 470
 471         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 472         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 473         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 474                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 475         if (r < 0)
 476                 goto out;
 477         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 478 out:
 479
 480         return changed;
 481 }
 482
 483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 484 {
 485         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 486         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 487                                     X86_CR0_CD | X86_CR0_NW;
 488
 489         cr0 |= X86_CR0_ET;
 490
 491 #ifdef CONFIG_X86_64
 492         if (cr0 & 0xffffffff00000000UL)
 493                 return 1;
 494 #endif
 495
 496         cr0 &= ~CR0_RESERVED_BITS;
 497
 498         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 499                 return 1;
 500
 501         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 502                 return 1;
 503
 504         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 505 #ifdef CONFIG_X86_64
 506                 if ((vcpu->arch.efer & EFER_LME)) {
 507                         int cs_db, cs_l;
 508
 509                         if (!is_pae(vcpu))
 510                                 return 1;
 511                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 512                         if (cs_l)
 513                                 return 1;
 514                 } else
 515 #endif
 516                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 517                                                  vcpu->arch.cr3))
 518                         return 1;
 519         }
 520
 521         kvm_x86_ops->set_cr0(vcpu, cr0);
 522
 523         if ((cr0 ^ old_cr0) & X86_CR0_PG)
 524                 kvm_clear_async_pf_completion_queue(vcpu);
 525
 526         if ((cr0 ^ old_cr0) & update_bits)
 527                 kvm_mmu_reset_context(vcpu);
 528         return 0;
 529 }
 530 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 531
 532 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 533 {
 534         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 535 }
 536 EXPORT_SYMBOL_GPL(kvm_lmsw);
 537
 538 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 539 {
 540         u64 xcr0;
 541
 542         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 543         if (index != XCR_XFEATURE_ENABLED_MASK)
 544                 return 1;
 545         xcr0 = xcr;
 546         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 547                 return 1;
 548         if (!(xcr0 & XSTATE_FP))
 549                 return 1;
 550         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 551                 return 1;
 552         if (xcr0 & ~host_xcr0)
 553                 return 1;
 554         vcpu->arch.xcr0 = xcr0;
 555         vcpu->guest_xcr0_loaded = 0;
 556         return 0;
 557 }
 558
 559 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 560 {
 561         if (__kvm_set_xcr(vcpu, index, xcr)) {
 562                 kvm_inject_gp(vcpu, 0);
 563                 return 1;
 564         }
 565         return 0;
 566 }
 567 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 568
 569 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 570 {
 571         struct kvm_cpuid_entry2 *best;
 572
 573         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 574         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 575 }
 576
 577 static void update_cpuid(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 582         if (!best)
 583                 return;
 584
 585         /* Update OSXSAVE bit */
 586         if (cpu_has_xsave && best->function == 0x1) {
 587                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 588                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 589                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 590         }
 591 }
 592
 593 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 594 {
 595         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 596         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 597
 598         if (cr4 & CR4_RESERVED_BITS)
 599                 return 1;
 600
 601         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 602                 return 1;
 603
 604         if (is_long_mode(vcpu)) {
 605                 if (!(cr4 & X86_CR4_PAE))
 606                         return 1;
 607         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 608                    && ((cr4 ^ old_cr4) & pdptr_bits)
 609                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 610                 return 1;
 611
 612         if (cr4 & X86_CR4_VMXE)
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr4(vcpu, cr4);
 616
 617         if ((cr4 ^ old_cr4) & pdptr_bits)
 618                 kvm_mmu_reset_context(vcpu);
 619
 620         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 621                 update_cpuid(vcpu);
 622
 623         return 0;
 624 }
 625 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 626
 627 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 628 {
 629         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 630                 kvm_mmu_sync_roots(vcpu);
 631                 kvm_mmu_flush_tlb(vcpu);
 632                 return 0;
 633         }
 634
 635         if (is_long_mode(vcpu)) {
 636                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 637                         return 1;
 638         } else {
 639                 if (is_pae(vcpu)) {
 640                         if (cr3 & CR3_PAE_RESERVED_BITS)
 641                                 return 1;
 642                         if (is_paging(vcpu) &&
 643                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 644                                 return 1;
 645                 }
 646                 /*
 647                  * We don't check reserved bits in nonpae mode, because
 648                  * this isn't enforced, and VMware depends on this.
 649                  */
 650         }
 651
 652         /*
 653          * Does the new cr3 value map to physical memory? (Note, we
 654          * catch an invalid cr3 even in real-mode, because it would
 655          * cause trouble later on when we turn on paging anyway.)
 656          *
 657          * A real CPU would silently accept an invalid cr3 and would
 658          * attempt to use it - with largely undefined (and often hard
 659          * to debug) behavior on the guest side.
 660          */
 661         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 662                 return 1;
 663         vcpu->arch.cr3 = cr3;
 664         vcpu->arch.mmu.new_cr3(vcpu);
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 668
 669 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 670 {
 671         if (cr8 & CR8_RESERVED_BITS)
 672                 return 1;
 673         if (irqchip_in_kernel(vcpu->kvm))
 674                 kvm_lapic_set_tpr(vcpu, cr8);
 675         else
 676                 vcpu->arch.cr8 = cr8;
 677         return 0;
 678 }
 679
 680 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 681 {
 682         if (__kvm_set_cr8(vcpu, cr8))
 683                 kvm_inject_gp(vcpu, 0);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 686
 687 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 688 {
 689         if (irqchip_in_kernel(vcpu->kvm))
 690                 return kvm_lapic_get_cr8(vcpu);
 691         else
 692                 return vcpu->arch.cr8;
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 695
 696 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 697 {
 698         switch (dr) {
 699         case 0 ... 3:
 700                 vcpu->arch.db[dr] = val;
 701                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 702                         vcpu->arch.eff_db[dr] = val;
 703                 break;
 704         case 4:
 705                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 706                         return 1; /* #UD */
 707                 /* fall through */
 708         case 6:
 709                 if (val & 0xffffffff00000000ULL)
 710                         return -1; /* #GP */
 711                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 712                 break;
 713         case 5:
 714                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 715                         return 1; /* #UD */
 716                 /* fall through */
 717         default: /* 7 */
 718                 if (val & 0xffffffff00000000ULL)
 719                         return -1; /* #GP */
 720                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 721                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 722                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 723                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 724                 }
 725                 break;
 726         }
 727
 728         return 0;
 729 }
 730
 731 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 732 {
 733         int res;
 734
 735         res = __kvm_set_dr(vcpu, dr, val);
 736         if (res > 0)
 737                 kvm_queue_exception(vcpu, UD_VECTOR);
 738         else if (res < 0)
 739                 kvm_inject_gp(vcpu, 0);
 740
 741         return res;
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_set_dr);
 744
 745 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 746 {
 747         switch (dr) {
 748         case 0 ... 3:
 749                 *val = vcpu->arch.db[dr];
 750                 break;
 751         case 4:
 752                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 753                         return 1;
 754                 /* fall through */
 755         case 6:
 756                 *val = vcpu->arch.dr6;
 757                 break;
 758         case 5:
 759                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 760                         return 1;
 761                 /* fall through */
 762         default: /* 7 */
 763                 *val = vcpu->arch.dr7;
 764                 break;
 765         }
 766
 767         return 0;
 768 }
 769
 770 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 771 {
 772         if (_kvm_get_dr(vcpu, dr, val)) {
 773                 kvm_queue_exception(vcpu, UD_VECTOR);
 774                 return 1;
 775         }
 776         return 0;
 777 }
 778 EXPORT_SYMBOL_GPL(kvm_get_dr);
 779
 780 /*
 781  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 782  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 783  *
 784  * This list is modified at module load time to reflect the
 785  * capabilities of the host cpu. This capabilities test skips MSRs that are
 786  * kvm-specific. Those are put in the beginning of the list.
 787  */
 788
 789 #define KVM_SAVE_MSRS_BEGIN     8
 790 static u32 msrs_to_save[] = {
 791         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 792         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 793         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 794         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 795         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 796         MSR_STAR,
 797 #ifdef CONFIG_X86_64
 798         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 799 #endif
 800         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 801 };
 802
 803 static unsigned num_msrs_to_save;
 804
 805 static u32 emulated_msrs[] = {
 806         MSR_IA32_MISC_ENABLE,
 807         MSR_IA32_MCG_STATUS,
 808         MSR_IA32_MCG_CTL,
 809 };
 810
 811 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 812 {
 813         u64 old_efer = vcpu->arch.efer;
 814
 815         if (efer & efer_reserved_bits)
 816                 return 1;
 817
 818         if (is_paging(vcpu)
 819             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 820                 return 1;
 821
 822         if (efer & EFER_FFXSR) {
 823                 struct kvm_cpuid_entry2 *feat;
 824
 825                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 826                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 827                         return 1;
 828         }
 829
 830         if (efer & EFER_SVME) {
 831                 struct kvm_cpuid_entry2 *feat;
 832
 833                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 834                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 835                         return 1;
 836         }
 837
 838         efer &= ~EFER_LMA;
 839         efer |= vcpu->arch.efer & EFER_LMA;
 840
 841         kvm_x86_ops->set_efer(vcpu, efer);
 842
 843         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 844
 845         /* Update reserved bits */
 846         if ((efer ^ old_efer) & EFER_NX)
 847                 kvm_mmu_reset_context(vcpu);
 848
 849         return 0;
 850 }
 851
 852 void kvm_enable_efer_bits(u64 mask)
 853 {
 854        efer_reserved_bits &= ~mask;
 855 }
 856 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 857
 858
 859 /*
 860  * Writes msr value into into the appropriate "register".
 861  * Returns 0 on success, non-0 otherwise.
 862  * Assumes vcpu_load() was already called.
 863  */
 864 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 865 {
 866         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 867 }
 868
 869 /*
 870  * Adapt set_msr() to msr_io()'s calling convention
 871  */
 872 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 873 {
 874         return kvm_set_msr(vcpu, index, *data);
 875 }
 876
 877 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 878 {
 879         int version;
 880         int r;
 881         struct pvclock_wall_clock wc;
 882         struct timespec boot;
 883
 884         if (!wall_clock)
 885                 return;
 886
 887         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 888         if (r)
 889                 return;
 890
 891         if (version & 1)
 892                 ++version;  /* first time write, random junk */
 893
 894         ++version;
 895
 896         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 897
 898         /*
 899          * The guest calculates current wall clock time by adding
 900          * system time (updated by kvm_guest_time_update below) to the
 901          * wall clock specified here.  guest system time equals host
 902          * system time for us, thus we must fill in host boot time here.
 903          */
 904         getboottime(&boot);
 905
 906         wc.sec = boot.tv_sec;
 907         wc.nsec = boot.tv_nsec;
 908         wc.version = version;
 909
 910         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 911
 912         version++;
 913         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 914 }
 915
 916 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 917 {
 918         uint32_t quotient, remainder;
 919
 920         /* Don't try to replace with do_div(), this one calculates
 921          * "(dividend << 32) / divisor" */
 922         __asm__ ( "divl %4"
 923                   : "=a" (quotient), "=d" (remainder)
 924                   : "0" (0), "1" (dividend), "r" (divisor) );
 925         return quotient;
 926 }
 927
 928 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 929                                s8 *pshift, u32 *pmultiplier)
 930 {
 931         uint64_t scaled64;
 932         int32_t  shift = 0;
 933         uint64_t tps64;
 934         uint32_t tps32;
 935
 936         tps64 = base_khz * 1000LL;
 937         scaled64 = scaled_khz * 1000LL;
 938         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 939                 tps64 >>= 1;
 940                 shift--;
 941         }
 942
 943         tps32 = (uint32_t)tps64;
 944         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 945                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 946                         scaled64 >>= 1;
 947                 else
 948                         tps32 <<= 1;
 949                 shift++;
 950         }
 951
 952         *pshift = shift;
 953         *pmultiplier = div_frac(scaled64, tps32);
 954
 955         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 956                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 957 }
 958
 959 static inline u64 get_kernel_ns(void)
 960 {
 961         struct timespec ts;
 962
 963         WARN_ON(preemptible());
 964         ktime_get_ts(&ts);
 965         monotonic_to_bootbased(&ts);
 966         return timespec_to_ns(&ts);
 967 }
 968
 969 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 970 unsigned long max_tsc_khz;
 971
 972 static inline int kvm_tsc_changes_freq(void)
 973 {
 974         int cpu = get_cpu();
 975         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 976                   cpufreq_quick_get(cpu) != 0;
 977         put_cpu();
 978         return ret;
 979 }
 980
 981 static inline u64 nsec_to_cycles(u64 nsec)
 982 {
 983         u64 ret;
 984
 985         WARN_ON(preemptible());
 986         if (kvm_tsc_changes_freq())
 987                 printk_once(KERN_WARNING
 988                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 989         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 990         do_div(ret, USEC_PER_SEC);
 991         return ret;
 992 }
 993
 994 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 995 {
 996         /* Compute a scale to convert nanoseconds in TSC cycles */
 997         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 998                            &kvm->arch.virtual_tsc_shift,
 999                            &kvm->arch.virtual_tsc_mult);
1000         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1001 }
1002
1003 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1004 {
1005         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1006                                       vcpu->kvm->arch.virtual_tsc_mult,
1007                                       vcpu->kvm->arch.virtual_tsc_shift);
1008         tsc += vcpu->arch.last_tsc_write;
1009         return tsc;
1010 }
1011
1012 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1013 {
1014         struct kvm *kvm = vcpu->kvm;
1015         u64 offset, ns, elapsed;
1016         unsigned long flags;
1017         s64 sdiff;
1018
1019         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1020         offset = data - native_read_tsc();
1021         ns = get_kernel_ns();
1022         elapsed = ns - kvm->arch.last_tsc_nsec;
1023         sdiff = data - kvm->arch.last_tsc_write;
1024         if (sdiff < 0)
1025                 sdiff = -sdiff;
1026
1027         /*
1028          * Special case: close write to TSC within 5 seconds of
1029          * another CPU is interpreted as an attempt to synchronize
1030          * The 5 seconds is to accomodate host load / swapping as
1031          * well as any reset of TSC during the boot process.
1032          *
1033          * In that case, for a reliable TSC, we can match TSC offsets,
1034          * or make a best guest using elapsed value.
1035          */
1036         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1037             elapsed < 5ULL * NSEC_PER_SEC) {
1038                 if (!check_tsc_unstable()) {
1039                         offset = kvm->arch.last_tsc_offset;
1040                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1041                 } else {
1042                         u64 delta = nsec_to_cycles(elapsed);
1043                         offset += delta;
1044                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1045                 }
1046                 ns = kvm->arch.last_tsc_nsec;
1047         }
1048         kvm->arch.last_tsc_nsec = ns;
1049         kvm->arch.last_tsc_write = data;
1050         kvm->arch.last_tsc_offset = offset;
1051         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1052         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1053
1054         /* Reset of TSC must disable overshoot protection below */
1055         vcpu->arch.hv_clock.tsc_timestamp = 0;
1056         vcpu->arch.last_tsc_write = data;
1057         vcpu->arch.last_tsc_nsec = ns;
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1060
1061 static int kvm_guest_time_update(struct kvm_vcpu *v)
1062 {
1063         unsigned long flags;
1064         struct kvm_vcpu_arch *vcpu = &v->arch;
1065         void *shared_kaddr;
1066         unsigned long this_tsc_khz;
1067         s64 kernel_ns, max_kernel_ns;
1068         u64 tsc_timestamp;
1069
1070         /* Keep irq disabled to prevent changes to the clock */
1071         local_irq_save(flags);
1072         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1073         kernel_ns = get_kernel_ns();
1074         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1075
1076         if (unlikely(this_tsc_khz == 0)) {
1077                 local_irq_restore(flags);
1078                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1079                 return 1;
1080         }
1081
1082         /*
1083          * We may have to catch up the TSC to match elapsed wall clock
1084          * time for two reasons, even if kvmclock is used.
1085          *   1) CPU could have been running below the maximum TSC rate
1086          *   2) Broken TSC compensation resets the base at each VCPU
1087          *      entry to avoid unknown leaps of TSC even when running
1088          *      again on the same CPU.  This may cause apparent elapsed
1089          *      time to disappear, and the guest to stand still or run
1090          *      very slowly.
1091          */
1092         if (vcpu->tsc_catchup) {
1093                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1094                 if (tsc > tsc_timestamp) {
1095                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1096                         tsc_timestamp = tsc;
1097                 }
1098         }
1099
1100         local_irq_restore(flags);
1101
1102         if (!vcpu->time_page)
1103                 return 0;
1104
1105         /*
1106          * Time as measured by the TSC may go backwards when resetting the base
1107          * tsc_timestamp.  The reason for this is that the TSC resolution is
1108          * higher than the resolution of the other clock scales.  Thus, many
1109          * possible measurments of the TSC correspond to one measurement of any
1110          * other clock, and so a spread of values is possible.  This is not a
1111          * problem for the computation of the nanosecond clock; with TSC rates
1112          * around 1GHZ, there can only be a few cycles which correspond to one
1113          * nanosecond value, and any path through this code will inevitably
1114          * take longer than that.  However, with the kernel_ns value itself,
1115          * the precision may be much lower, down to HZ granularity.  If the
1116          * first sampling of TSC against kernel_ns ends in the low part of the
1117          * range, and the second in the high end of the range, we can get:
1118          *
1119          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1120          *
1121          * As the sampling errors potentially range in the thousands of cycles,
1122          * it is possible such a time value has already been observed by the
1123          * guest.  To protect against this, we must compute the system time as
1124          * observed by the guest and ensure the new system time is greater.
1125          */
1126         max_kernel_ns = 0;
1127         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1128                 max_kernel_ns = vcpu->last_guest_tsc -
1129                                 vcpu->hv_clock.tsc_timestamp;
1130                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1131                                     vcpu->hv_clock.tsc_to_system_mul,
1132                                     vcpu->hv_clock.tsc_shift);
1133                 max_kernel_ns += vcpu->last_kernel_ns;
1134         }
1135
1136         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1137                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1138                                    &vcpu->hv_clock.tsc_shift,
1139                                    &vcpu->hv_clock.tsc_to_system_mul);
1140                 vcpu->hw_tsc_khz = this_tsc_khz;
1141         }
1142
1143         if (max_kernel_ns > kernel_ns)
1144                 kernel_ns = max_kernel_ns;
1145
1146         /* With all the info we got, fill in the values */
1147         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1148         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1149         vcpu->last_kernel_ns = kernel_ns;
1150         vcpu->last_guest_tsc = tsc_timestamp;
1151         vcpu->hv_clock.flags = 0;
1152
1153         /*
1154          * The interface expects us to write an even number signaling that the
1155          * update is finished. Since the guest won't see the intermediate
1156          * state, we just increase by 2 at the end.
1157          */
1158         vcpu->hv_clock.version += 2;
1159
1160         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1161
1162         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1163                sizeof(vcpu->hv_clock));
1164
1165         kunmap_atomic(shared_kaddr, KM_USER0);
1166
1167         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1168         return 0;
1169 }
1170
1171 static bool msr_mtrr_valid(unsigned msr)
1172 {
1173         switch (msr) {
1174         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1175         case MSR_MTRRfix64K_00000:
1176         case MSR_MTRRfix16K_80000:
1177         case MSR_MTRRfix16K_A0000:
1178         case MSR_MTRRfix4K_C0000:
1179         case MSR_MTRRfix4K_C8000:
1180         case MSR_MTRRfix4K_D0000:
1181         case MSR_MTRRfix4K_D8000:
1182         case MSR_MTRRfix4K_E0000:
1183         case MSR_MTRRfix4K_E8000:
1184         case MSR_MTRRfix4K_F0000:
1185         case MSR_MTRRfix4K_F8000:
1186         case MSR_MTRRdefType:
1187         case MSR_IA32_CR_PAT:
1188                 return true;
1189         case 0x2f8:
1190                 return true;
1191         }
1192         return false;
1193 }
1194
1195 static bool valid_pat_type(unsigned t)
1196 {
1197         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1198 }
1199
1200 static bool valid_mtrr_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1203 }
1204
1205 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1206 {
1207         int i;
1208
1209         if (!msr_mtrr_valid(msr))
1210                 return false;
1211
1212         if (msr == MSR_IA32_CR_PAT) {
1213                 for (i = 0; i < 8; i++)
1214                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1215                                 return false;
1216                 return true;
1217         } else if (msr == MSR_MTRRdefType) {
1218                 if (data & ~0xcff)
1219                         return false;
1220                 return valid_mtrr_type(data & 0xff);
1221         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1222                 for (i = 0; i < 8 ; i++)
1223                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1224                                 return false;
1225                 return true;
1226         }
1227
1228         /* variable MTRRs */
1229         return valid_mtrr_type(data & 0xff);
1230 }
1231
1232 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1233 {
1234         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1235
1236         if (!mtrr_valid(vcpu, msr, data))
1237                 return 1;
1238
1239         if (msr == MSR_MTRRdefType) {
1240                 vcpu->arch.mtrr_state.def_type = data;
1241                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1242         } else if (msr == MSR_MTRRfix64K_00000)
1243                 p[0] = data;
1244         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1245                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1246         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1247                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1248         else if (msr == MSR_IA32_CR_PAT)
1249                 vcpu->arch.pat = data;
1250         else {  /* Variable MTRRs */
1251                 int idx, is_mtrr_mask;
1252                 u64 *pt;
1253
1254                 idx = (msr - 0x200) / 2;
1255                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1256                 if (!is_mtrr_mask)
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1259                 else
1260                         pt =
1261                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1262                 *pt = data;
1263         }
1264
1265         kvm_mmu_reset_context(vcpu);
1266         return 0;
1267 }
1268
1269 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1270 {
1271         u64 mcg_cap = vcpu->arch.mcg_cap;
1272         unsigned bank_num = mcg_cap & 0xff;
1273
1274         switch (msr) {
1275         case MSR_IA32_MCG_STATUS:
1276                 vcpu->arch.mcg_status = data;
1277                 break;
1278         case MSR_IA32_MCG_CTL:
1279                 if (!(mcg_cap & MCG_CTL_P))
1280                         return 1;
1281                 if (data != 0 && data != ~(u64)0)
1282                         return -1;
1283                 vcpu->arch.mcg_ctl = data;
1284                 break;
1285         default:
1286                 if (msr >= MSR_IA32_MC0_CTL &&
1287                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1288                         u32 offset = msr - MSR_IA32_MC0_CTL;
1289                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1290                          * some Linux kernels though clear bit 10 in bank 4 to
1291                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1292                          * this to avoid an uncatched #GP in the guest
1293                          */
1294                         if ((offset & 0x3) == 0 &&
1295                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1296                                 return -1;
1297                         vcpu->arch.mce_banks[offset] = data;
1298                         break;
1299                 }
1300                 return 1;
1301         }
1302         return 0;
1303 }
1304
1305 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1306 {
1307         struct kvm *kvm = vcpu->kvm;
1308         int lm = is_long_mode(vcpu);
1309         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1310                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1311         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1312                 : kvm->arch.xen_hvm_config.blob_size_32;
1313         u32 page_num = data & ~PAGE_MASK;
1314         u64 page_addr = data & PAGE_MASK;
1315         u8 *page;
1316         int r;
1317
1318         r = -E2BIG;
1319         if (page_num >= blob_size)
1320                 goto out;
1321         r = -ENOMEM;
1322         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1323         if (!page)
1324                 goto out;
1325         r = -EFAULT;
1326         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1327                 goto out_free;
1328         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1329                 goto out_free;
1330         r = 0;
1331 out_free:
1332         kfree(page);
1333 out:
1334         return r;
1335 }
1336
1337 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1338 {
1339         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1340 }
1341
1342 static bool kvm_hv_msr_partition_wide(u32 msr)
1343 {
1344         bool r = false;
1345         switch (msr) {
1346         case HV_X64_MSR_GUEST_OS_ID:
1347         case HV_X64_MSR_HYPERCALL:
1348                 r = true;
1349                 break;
1350         }
1351
1352         return r;
1353 }
1354
1355 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1356 {
1357         struct kvm *kvm = vcpu->kvm;
1358
1359         switch (msr) {
1360         case HV_X64_MSR_GUEST_OS_ID:
1361                 kvm->arch.hv_guest_os_id = data;
1362                 /* setting guest os id to zero disables hypercall page */
1363                 if (!kvm->arch.hv_guest_os_id)
1364                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1365                 break;
1366         case HV_X64_MSR_HYPERCALL: {
1367                 u64 gfn;
1368                 unsigned long addr;
1369                 u8 instructions[4];
1370
1371                 /* if guest os id is not set hypercall should remain disabled */
1372                 if (!kvm->arch.hv_guest_os_id)
1373                         break;
1374                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1375                         kvm->arch.hv_hypercall = data;
1376                         break;
1377                 }
1378                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1379                 addr = gfn_to_hva(kvm, gfn);
1380                 if (kvm_is_error_hva(addr))
1381                         return 1;
1382                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1383                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1384                 if (copy_to_user((void __user *)addr, instructions, 4))
1385                         return 1;
1386                 kvm->arch.hv_hypercall = data;
1387                 break;
1388         }
1389         default:
1390                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1391                           "data 0x%llx\n", msr, data);
1392                 return 1;
1393         }
1394         return 0;
1395 }
1396
1397 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1398 {
1399         switch (msr) {
1400         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1401                 unsigned long addr;
1402
1403                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1404                         vcpu->arch.hv_vapic = data;
1405                         break;
1406                 }
1407                 addr = gfn_to_hva(vcpu->kvm, data >>
1408                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1409                 if (kvm_is_error_hva(addr))
1410                         return 1;
1411                 if (clear_user((void __user *)addr, PAGE_SIZE))
1412                         return 1;
1413                 vcpu->arch.hv_vapic = data;
1414                 break;
1415         }
1416         case HV_X64_MSR_EOI:
1417                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1418         case HV_X64_MSR_ICR:
1419                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1420         case HV_X64_MSR_TPR:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1422         default:
1423                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1424                           "data 0x%llx\n", msr, data);
1425                 return 1;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1432 {
1433         gpa_t gpa = data & ~0x3f;
1434
1435         /* Bits 2:5 are resrved, Should be zero */
1436         if (data & 0x3c)
1437                 return 1;
1438
1439         vcpu->arch.apf.msr_val = data;
1440
1441         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1442                 kvm_clear_async_pf_completion_queue(vcpu);
1443                 kvm_async_pf_hash_reset(vcpu);
1444                 return 0;
1445         }
1446
1447         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1448                 return 1;
1449
1450         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1451         kvm_async_pf_wakeup_all(vcpu);
1452         return 0;
1453 }
1454
1455 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1456 {
1457         switch (msr) {
1458         case MSR_EFER:
1459                 return set_efer(vcpu, data);
1460         case MSR_K7_HWCR:
1461                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1462                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1463                 if (data != 0) {
1464                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1465                                 data);
1466                         return 1;
1467                 }
1468                 break;
1469         case MSR_FAM10H_MMIO_CONF_BASE:
1470                 if (data != 0) {
1471                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1472                                 "0x%llx\n", data);
1473                         return 1;
1474                 }
1475                 break;
1476         case MSR_AMD64_NB_CFG:
1477                 break;
1478         case MSR_IA32_DEBUGCTLMSR:
1479                 if (!data) {
1480                         /* We support the non-activated case already */
1481                         break;
1482                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1483                         /* Values other than LBR and BTF are vendor-specific,
1484                            thus reserved and should throw a #GP */
1485                         return 1;
1486                 }
1487                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1488                         __func__, data);
1489                 break;
1490         case MSR_IA32_UCODE_REV:
1491         case MSR_IA32_UCODE_WRITE:
1492         case MSR_VM_HSAVE_PA:
1493         case MSR_AMD64_PATCH_LOADER:
1494                 break;
1495         case 0x200 ... 0x2ff:
1496                 return set_msr_mtrr(vcpu, msr, data);
1497         case MSR_IA32_APICBASE:
1498                 kvm_set_apic_base(vcpu, data);
1499                 break;
1500         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1501                 return kvm_x2apic_msr_write(vcpu, msr, data);
1502         case MSR_IA32_MISC_ENABLE:
1503                 vcpu->arch.ia32_misc_enable_msr = data;
1504                 break;
1505         case MSR_KVM_WALL_CLOCK_NEW:
1506         case MSR_KVM_WALL_CLOCK:
1507                 vcpu->kvm->arch.wall_clock = data;
1508                 kvm_write_wall_clock(vcpu->kvm, data);
1509                 break;
1510         case MSR_KVM_SYSTEM_TIME_NEW:
1511         case MSR_KVM_SYSTEM_TIME: {
1512                 if (vcpu->arch.time_page) {
1513                         kvm_release_page_dirty(vcpu->arch.time_page);
1514                         vcpu->arch.time_page = NULL;
1515                 }
1516
1517                 vcpu->arch.time = data;
1518                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1519
1520                 /* we verify if the enable bit is set... */
1521                 if (!(data & 1))
1522                         break;
1523
1524                 /* ...but clean it before doing the actual write */
1525                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1526
1527                 vcpu->arch.time_page =
1528                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1529
1530                 if (is_error_page(vcpu->arch.time_page)) {
1531                         kvm_release_page_clean(vcpu->arch.time_page);
1532                         vcpu->arch.time_page = NULL;
1533                 }
1534                 break;
1535         }
1536         case MSR_KVM_ASYNC_PF_EN:
1537                 if (kvm_pv_enable_async_pf(vcpu, data))
1538                         return 1;
1539                 break;
1540         case MSR_IA32_MCG_CTL:
1541         case MSR_IA32_MCG_STATUS:
1542         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1543                 return set_msr_mce(vcpu, msr, data);
1544
1545         /* Performance counters are not protected by a CPUID bit,
1546          * so we should check all of them in the generic path for the sake of
1547          * cross vendor migration.
1548          * Writing a zero into the event select MSRs disables them,
1549          * which we perfectly emulate ;-). Any other value should be at least
1550          * reported, some guests depend on them.
1551          */
1552         case MSR_P6_EVNTSEL0:
1553         case MSR_P6_EVNTSEL1:
1554         case MSR_K7_EVNTSEL0:
1555         case MSR_K7_EVNTSEL1:
1556         case MSR_K7_EVNTSEL2:
1557         case MSR_K7_EVNTSEL3:
1558                 if (data != 0)
1559                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1560                                 "0x%x data 0x%llx\n", msr, data);
1561                 break;
1562         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1563          * so we ignore writes to make it happy.
1564          */
1565         case MSR_P6_PERFCTR0:
1566         case MSR_P6_PERFCTR1:
1567         case MSR_K7_PERFCTR0:
1568         case MSR_K7_PERFCTR1:
1569         case MSR_K7_PERFCTR2:
1570         case MSR_K7_PERFCTR3:
1571                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1572                         "0x%x data 0x%llx\n", msr, data);
1573                 break;
1574         case MSR_K7_CLK_CTL:
1575                 /*
1576                  * Ignore all writes to this no longer documented MSR.
1577                  * Writes are only relevant for old K7 processors,
1578                  * all pre-dating SVM, but a recommended workaround from
1579                  * AMD for these chips. It is possible to speicify the
1580                  * affected processor models on the command line, hence
1581                  * the need to ignore the workaround.
1582                  */
1583                 break;
1584         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1585                 if (kvm_hv_msr_partition_wide(msr)) {
1586                         int r;
1587                         mutex_lock(&vcpu->kvm->lock);
1588                         r = set_msr_hyperv_pw(vcpu, msr, data);
1589                         mutex_unlock(&vcpu->kvm->lock);
1590                         return r;
1591                 } else
1592                         return set_msr_hyperv(vcpu, msr, data);
1593                 break;
1594         default:
1595                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1596                         return xen_hvm_config(vcpu, data);
1597                 if (!ignore_msrs) {
1598                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         return 1;
1601                 } else {
1602                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1603                                 msr, data);
1604                         break;
1605                 }
1606         }
1607         return 0;
1608 }
1609 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1610
1611
1612 /*
1613  * Reads an msr value (of 'msr_index') into 'pdata'.
1614  * Returns 0 on success, non-0 otherwise.
1615  * Assumes vcpu_load() was already called.
1616  */
1617 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1618 {
1619         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1620 }
1621
1622 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1623 {
1624         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1625
1626         if (!msr_mtrr_valid(msr))
1627                 return 1;
1628
1629         if (msr == MSR_MTRRdefType)
1630                 *pdata = vcpu->arch.mtrr_state.def_type +
1631                          (vcpu->arch.mtrr_state.enabled << 10);
1632         else if (msr == MSR_MTRRfix64K_00000)
1633                 *pdata = p[0];
1634         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1635                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1636         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1637                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1638         else if (msr == MSR_IA32_CR_PAT)
1639                 *pdata = vcpu->arch.pat;
1640         else {  /* Variable MTRRs */
1641                 int idx, is_mtrr_mask;
1642                 u64 *pt;
1643
1644                 idx = (msr - 0x200) / 2;
1645                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1646                 if (!is_mtrr_mask)
1647                         pt =
1648                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1649                 else
1650                         pt =
1651                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1652                 *pdata = *pt;
1653         }
1654
1655         return 0;
1656 }
1657
1658 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1659 {
1660         u64 data;
1661         u64 mcg_cap = vcpu->arch.mcg_cap;
1662         unsigned bank_num = mcg_cap & 0xff;
1663
1664         switch (msr) {
1665         case MSR_IA32_P5_MC_ADDR:
1666         case MSR_IA32_P5_MC_TYPE:
1667                 data = 0;
1668                 break;
1669         case MSR_IA32_MCG_CAP:
1670                 data = vcpu->arch.mcg_cap;
1671                 break;
1672         case MSR_IA32_MCG_CTL:
1673                 if (!(mcg_cap & MCG_CTL_P))
1674                         return 1;
1675                 data = vcpu->arch.mcg_ctl;
1676                 break;
1677         case MSR_IA32_MCG_STATUS:
1678                 data = vcpu->arch.mcg_status;
1679                 break;
1680         default:
1681                 if (msr >= MSR_IA32_MC0_CTL &&
1682                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1683                         u32 offset = msr - MSR_IA32_MC0_CTL;
1684                         data = vcpu->arch.mce_banks[offset];
1685                         break;
1686                 }
1687                 return 1;
1688         }
1689         *pdata = data;
1690         return 0;
1691 }
1692
1693 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1694 {
1695         u64 data = 0;
1696         struct kvm *kvm = vcpu->kvm;
1697
1698         switch (msr) {
1699         case HV_X64_MSR_GUEST_OS_ID:
1700                 data = kvm->arch.hv_guest_os_id;
1701                 break;
1702         case HV_X64_MSR_HYPERCALL:
1703                 data = kvm->arch.hv_hypercall;
1704                 break;
1705         default:
1706                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1707                 return 1;
1708         }
1709
1710         *pdata = data;
1711         return 0;
1712 }
1713
1714 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1715 {
1716         u64 data = 0;
1717
1718         switch (msr) {
1719         case HV_X64_MSR_VP_INDEX: {
1720                 int r;
1721                 struct kvm_vcpu *v;
1722                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1723                         if (v == vcpu)
1724                                 data = r;
1725                 break;
1726         }
1727         case HV_X64_MSR_EOI:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1729         case HV_X64_MSR_ICR:
1730                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1731         case HV_X64_MSR_TPR:
1732                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1733         default:
1734                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1735                 return 1;
1736         }
1737         *pdata = data;
1738         return 0;
1739 }
1740
1741 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1742 {
1743         u64 data;
1744
1745         switch (msr) {
1746         case MSR_IA32_PLATFORM_ID:
1747         case MSR_IA32_UCODE_REV:
1748         case MSR_IA32_EBL_CR_POWERON:
1749         case MSR_IA32_DEBUGCTLMSR:
1750         case MSR_IA32_LASTBRANCHFROMIP:
1751         case MSR_IA32_LASTBRANCHTOIP:
1752         case MSR_IA32_LASTINTFROMIP:
1753         case MSR_IA32_LASTINTTOIP:
1754         case MSR_K8_SYSCFG:
1755         case MSR_K7_HWCR:
1756         case MSR_VM_HSAVE_PA:
1757         case MSR_P6_PERFCTR0:
1758         case MSR_P6_PERFCTR1:
1759         case MSR_P6_EVNTSEL0:
1760         case MSR_P6_EVNTSEL1:
1761         case MSR_K7_EVNTSEL0:
1762         case MSR_K7_PERFCTR0:
1763         case MSR_K8_INT_PENDING_MSG:
1764         case MSR_AMD64_NB_CFG:
1765         case MSR_FAM10H_MMIO_CONF_BASE:
1766                 data = 0;
1767                 break;
1768         case MSR_MTRRcap:
1769                 data = 0x500 | KVM_NR_VAR_MTRR;
1770                 break;
1771         case 0x200 ... 0x2ff:
1772                 return get_msr_mtrr(vcpu, msr, pdata);
1773         case 0xcd: /* fsb frequency */
1774                 data = 3;
1775                 break;
1776                 /*
1777                  * MSR_EBC_FREQUENCY_ID
1778                  * Conservative value valid for even the basic CPU models.
1779                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1780                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1781                  * and 266MHz for model 3, or 4. Set Core Clock
1782                  * Frequency to System Bus Frequency Ratio to 1 (bits
1783                  * 31:24) even though these are only valid for CPU
1784                  * models > 2, however guests may end up dividing or
1785                  * multiplying by zero otherwise.
1786                  */
1787         case MSR_EBC_FREQUENCY_ID:
1788                 data = 1 << 24;
1789                 break;
1790         case MSR_IA32_APICBASE:
1791                 data = kvm_get_apic_base(vcpu);
1792                 break;
1793         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1794                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1795                 break;
1796         case MSR_IA32_MISC_ENABLE:
1797                 data = vcpu->arch.ia32_misc_enable_msr;
1798                 break;
1799         case MSR_IA32_PERF_STATUS:
1800                 /* TSC increment by tick */
1801                 data = 1000ULL;
1802                 /* CPU multiplier */
1803                 data |= (((uint64_t)4ULL) << 40);
1804                 break;
1805         case MSR_EFER:
1806                 data = vcpu->arch.efer;
1807                 break;
1808         case MSR_KVM_WALL_CLOCK:
1809         case MSR_KVM_WALL_CLOCK_NEW:
1810                 data = vcpu->kvm->arch.wall_clock;
1811                 break;
1812         case MSR_KVM_SYSTEM_TIME:
1813         case MSR_KVM_SYSTEM_TIME_NEW:
1814                 data = vcpu->arch.time;
1815                 break;
1816         case MSR_KVM_ASYNC_PF_EN:
1817                 data = vcpu->arch.apf.msr_val;
1818                 break;
1819         case MSR_IA32_P5_MC_ADDR:
1820         case MSR_IA32_P5_MC_TYPE:
1821         case MSR_IA32_MCG_CAP:
1822         case MSR_IA32_MCG_CTL:
1823         case MSR_IA32_MCG_STATUS:
1824         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1825                 return get_msr_mce(vcpu, msr, pdata);
1826         case MSR_K7_CLK_CTL:
1827                 /*
1828                  * Provide expected ramp-up count for K7. All other
1829                  * are set to zero, indicating minimum divisors for
1830                  * every field.
1831                  *
1832                  * This prevents guest kernels on AMD host with CPU
1833                  * type 6, model 8 and higher from exploding due to
1834                  * the rdmsr failing.
1835                  */
1836                 data = 0x20000000;
1837                 break;
1838         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1839                 if (kvm_hv_msr_partition_wide(msr)) {
1840                         int r;
1841                         mutex_lock(&vcpu->kvm->lock);
1842                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1843                         mutex_unlock(&vcpu->kvm->lock);
1844                         return r;
1845                 } else
1846                         return get_msr_hyperv(vcpu, msr, pdata);
1847                 break;
1848         default:
1849                 if (!ignore_msrs) {
1850                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1851                         return 1;
1852                 } else {
1853                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1854                         data = 0;
1855                 }
1856                 break;
1857         }
1858         *pdata = data;
1859         return 0;
1860 }
1861 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1862
1863 /*
1864  * Read or write a bunch of msrs. All parameters are kernel addresses.
1865  *
1866  * @return number of msrs set successfully.
1867  */
1868 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1869                     struct kvm_msr_entry *entries,
1870                     int (*do_msr)(struct kvm_vcpu *vcpu,
1871                                   unsigned index, u64 *data))
1872 {
1873         int i, idx;
1874
1875         idx = srcu_read_lock(&vcpu->kvm->srcu);
1876         for (i = 0; i < msrs->nmsrs; ++i)
1877                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1878                         break;
1879         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1880
1881         return i;
1882 }
1883
1884 /*
1885  * Read or write a bunch of msrs. Parameters are user addresses.
1886  *
1887  * @return number of msrs set successfully.
1888  */
1889 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1890                   int (*do_msr)(struct kvm_vcpu *vcpu,
1891                                 unsigned index, u64 *data),
1892                   int writeback)
1893 {
1894         struct kvm_msrs msrs;
1895         struct kvm_msr_entry *entries;
1896         int r, n;
1897         unsigned size;
1898
1899         r = -EFAULT;
1900         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1901                 goto out;
1902
1903         r = -E2BIG;
1904         if (msrs.nmsrs >= MAX_IO_MSRS)
1905                 goto out;
1906
1907         r = -ENOMEM;
1908         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1909         entries = kmalloc(size, GFP_KERNEL);
1910         if (!entries)
1911                 goto out;
1912
1913         r = -EFAULT;
1914         if (copy_from_user(entries, user_msrs->entries, size))
1915                 goto out_free;
1916
1917         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1918         if (r < 0)
1919                 goto out_free;
1920
1921         r = -EFAULT;
1922         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1923                 goto out_free;
1924
1925         r = n;
1926
1927 out_free:
1928         kfree(entries);
1929 out:
1930         return r;
1931 }
1932
1933 int kvm_dev_ioctl_check_extension(long ext)
1934 {
1935         int r;
1936
1937         switch (ext) {
1938         case KVM_CAP_IRQCHIP:
1939         case KVM_CAP_HLT:
1940         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1941         case KVM_CAP_SET_TSS_ADDR:
1942         case KVM_CAP_EXT_CPUID:
1943         case KVM_CAP_CLOCKSOURCE:
1944         case KVM_CAP_PIT:
1945         case KVM_CAP_NOP_IO_DELAY:
1946         case KVM_CAP_MP_STATE:
1947         case KVM_CAP_SYNC_MMU:
1948         case KVM_CAP_REINJECT_CONTROL:
1949         case KVM_CAP_IRQ_INJECT_STATUS:
1950         case KVM_CAP_ASSIGN_DEV_IRQ:
1951         case KVM_CAP_IRQFD:
1952         case KVM_CAP_IOEVENTFD:
1953         case KVM_CAP_PIT2:
1954         case KVM_CAP_PIT_STATE2:
1955         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1956         case KVM_CAP_XEN_HVM:
1957         case KVM_CAP_ADJUST_CLOCK:
1958         case KVM_CAP_VCPU_EVENTS:
1959         case KVM_CAP_HYPERV:
1960         case KVM_CAP_HYPERV_VAPIC:
1961         case KVM_CAP_HYPERV_SPIN:
1962         case KVM_CAP_PCI_SEGMENT:
1963         case KVM_CAP_DEBUGREGS:
1964         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1965         case KVM_CAP_XSAVE:
1966         case KVM_CAP_ASYNC_PF:
1967                 r = 1;
1968                 break;
1969         case KVM_CAP_COALESCED_MMIO:
1970                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1971                 break;
1972         case KVM_CAP_VAPIC:
1973                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1974                 break;
1975         case KVM_CAP_NR_VCPUS:
1976                 r = KVM_MAX_VCPUS;
1977                 break;
1978         case KVM_CAP_NR_MEMSLOTS:
1979                 r = KVM_MEMORY_SLOTS;
1980                 break;
1981         case KVM_CAP_PV_MMU:    /* obsolete */
1982                 r = 0;
1983                 break;
1984         case KVM_CAP_IOMMU:
1985                 r = iommu_found();
1986                 break;
1987         case KVM_CAP_MCE:
1988                 r = KVM_MAX_MCE_BANKS;
1989                 break;
1990         case KVM_CAP_XCRS:
1991                 r = cpu_has_xsave;
1992                 break;
1993         default:
1994                 r = 0;
1995                 break;
1996         }
1997         return r;
1998
1999 }
2000
2001 long kvm_arch_dev_ioctl(struct file *filp,
2002                         unsigned int ioctl, unsigned long arg)
2003 {
2004         void __user *argp = (void __user *)arg;
2005         long r;
2006
2007         switch (ioctl) {
2008         case KVM_GET_MSR_INDEX_LIST: {
2009                 struct kvm_msr_list __user *user_msr_list = argp;
2010                 struct kvm_msr_list msr_list;
2011                 unsigned n;
2012
2013                 r = -EFAULT;
2014                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2015                         goto out;
2016                 n = msr_list.nmsrs;
2017                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2018                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2019                         goto out;
2020                 r = -E2BIG;
2021                 if (n < msr_list.nmsrs)
2022                         goto out;
2023                 r = -EFAULT;
2024                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2025                                  num_msrs_to_save * sizeof(u32)))
2026                         goto out;
2027                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2028                                  &emulated_msrs,
2029                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2030                         goto out;
2031                 r = 0;
2032                 break;
2033         }
2034         case KVM_GET_SUPPORTED_CPUID: {
2035                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2036                 struct kvm_cpuid2 cpuid;
2037
2038                 r = -EFAULT;
2039                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2040                         goto out;
2041                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2042                                                       cpuid_arg->entries);
2043                 if (r)
2044                         goto out;
2045
2046                 r = -EFAULT;
2047                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2048                         goto out;
2049                 r = 0;
2050                 break;
2051         }
2052         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2053                 u64 mce_cap;
2054
2055                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2056                 r = -EFAULT;
2057                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2058                         goto out;
2059                 r = 0;
2060                 break;
2061         }
2062         default:
2063                 r = -EINVAL;
2064         }
2065 out:
2066         return r;
2067 }
2068
2069 static void wbinvd_ipi(void *garbage)
2070 {
2071         wbinvd();
2072 }
2073
2074 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2075 {
2076         return vcpu->kvm->arch.iommu_domain &&
2077                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2078 }
2079
2080 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2081 {
2082         /* Address WBINVD may be executed by guest */
2083         if (need_emulate_wbinvd(vcpu)) {
2084                 if (kvm_x86_ops->has_wbinvd_exit())
2085                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2086                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2087                         smp_call_function_single(vcpu->cpu,
2088                                         wbinvd_ipi, NULL, 1);
2089         }
2090
2091         kvm_x86_ops->vcpu_load(vcpu, cpu);
2092         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2093                 /* Make sure TSC doesn't go backwards */
2094                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2095                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2096                 if (tsc_delta < 0)
2097                         mark_tsc_unstable("KVM discovered backwards TSC");
2098                 if (check_tsc_unstable()) {
2099                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2100                         vcpu->arch.tsc_catchup = 1;
2101                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2102                 }
2103                 if (vcpu->cpu != cpu)
2104                         kvm_migrate_timers(vcpu);
2105                 vcpu->cpu = cpu;
2106         }
2107 }
2108
2109 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2110 {
2111         kvm_x86_ops->vcpu_put(vcpu);
2112         kvm_put_guest_fpu(vcpu);
2113         vcpu->arch.last_host_tsc = native_read_tsc();
2114 }
2115
2116 static int is_efer_nx(void)
2117 {
2118         unsigned long long efer = 0;
2119
2120         rdmsrl_safe(MSR_EFER, &efer);
2121         return efer & EFER_NX;
2122 }
2123
2124 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2125 {
2126         int i;
2127         struct kvm_cpuid_entry2 *e, *entry;
2128
2129         entry = NULL;
2130         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2131                 e = &vcpu->arch.cpuid_entries[i];
2132                 if (e->function == 0x80000001) {
2133                         entry = e;
2134                         break;
2135                 }
2136         }
2137         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2138                 entry->edx &= ~(1 << 20);
2139                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2140         }
2141 }
2142
2143 /* when an old userspace process fills a new kernel module */
2144 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2145                                     struct kvm_cpuid *cpuid,
2146                                     struct kvm_cpuid_entry __user *entries)
2147 {
2148         int r, i;
2149         struct kvm_cpuid_entry *cpuid_entries;
2150
2151         r = -E2BIG;
2152         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2153                 goto out;
2154         r = -ENOMEM;
2155         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2156         if (!cpuid_entries)
2157                 goto out;
2158         r = -EFAULT;
2159         if (copy_from_user(cpuid_entries, entries,
2160                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2161                 goto out_free;
2162         for (i = 0; i < cpuid->nent; i++) {
2163                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2164                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2165                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2166                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2167                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2168                 vcpu->arch.cpuid_entries[i].index = 0;
2169                 vcpu->arch.cpuid_entries[i].flags = 0;
2170                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2171                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2172                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2173         }
2174         vcpu->arch.cpuid_nent = cpuid->nent;
2175         cpuid_fix_nx_cap(vcpu);
2176         r = 0;
2177         kvm_apic_set_version(vcpu);
2178         kvm_x86_ops->cpuid_update(vcpu);
2179         update_cpuid(vcpu);
2180
2181 out_free:
2182         vfree(cpuid_entries);
2183 out:
2184         return r;
2185 }
2186
2187 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2188                                      struct kvm_cpuid2 *cpuid,
2189                                      struct kvm_cpuid_entry2 __user *entries)
2190 {
2191         int r;
2192
2193         r = -E2BIG;
2194         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2195                 goto out;
2196         r = -EFAULT;
2197         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2198                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2199                 goto out;
2200         vcpu->arch.cpuid_nent = cpuid->nent;
2201         kvm_apic_set_version(vcpu);
2202         kvm_x86_ops->cpuid_update(vcpu);
2203         update_cpuid(vcpu);
2204         return 0;
2205
2206 out:
2207         return r;
2208 }
2209
2210 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2211                                      struct kvm_cpuid2 *cpuid,
2212                                      struct kvm_cpuid_entry2 __user *entries)
2213 {
2214         int r;
2215
2216         r = -E2BIG;
2217         if (cpuid->nent < vcpu->arch.cpuid_nent)
2218                 goto out;
2219         r = -EFAULT;
2220         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2221                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2222                 goto out;
2223         return 0;
2224
2225 out:
2226         cpuid->nent = vcpu->arch.cpuid_nent;
2227         return r;
2228 }
2229
2230 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2231                            u32 index)
2232 {
2233         entry->function = function;
2234         entry->index = index;
2235         cpuid_count(entry->function, entry->index,
2236                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2237         entry->flags = 0;
2238 }
2239
2240 #define F(x) bit(X86_FEATURE_##x)
2241
2242 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2243                          u32 index, int *nent, int maxnent)
2244 {
2245         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2246 #ifdef CONFIG_X86_64
2247         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2248                                 ? F(GBPAGES) : 0;
2249         unsigned f_lm = F(LM);
2250 #else
2251         unsigned f_gbpages = 0;
2252         unsigned f_lm = 0;
2253 #endif
2254         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2255
2256         /* cpuid 1.edx */
2257         const u32 kvm_supported_word0_x86_features =
2258                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2259                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2260                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2261                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2262                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2263                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2264                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2265                 0 /* HTT, TM, Reserved, PBE */;
2266         /* cpuid 0x80000001.edx */
2267         const u32 kvm_supported_word1_x86_features =
2268                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2269                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2270                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2271                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2272                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2273                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2274                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2275                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2276         /* cpuid 1.ecx */
2277         const u32 kvm_supported_word4_x86_features =
2278                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2279                 0 /* DS-CPL, VMX, SMX, EST */ |
2280                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2281                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2282                 0 /* Reserved, DCA */ | F(XMM4_1) |
2283                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2284                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2285                 F(F16C);
2286         /* cpuid 0x80000001.ecx */
2287         const u32 kvm_supported_word6_x86_features =
2288                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2289                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2290                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2291                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2292
2293         /* all calls to cpuid_count() should be made on the same cpu */
2294         get_cpu();
2295         do_cpuid_1_ent(entry, function, index);
2296         ++*nent;
2297
2298         switch (function) {
2299         case 0:
2300                 entry->eax = min(entry->eax, (u32)0xd);
2301                 break;
2302         case 1:
2303                 entry->edx &= kvm_supported_word0_x86_features;
2304                 entry->ecx &= kvm_supported_word4_x86_features;
2305                 /* we support x2apic emulation even if host does not support
2306                  * it since we emulate x2apic in software */
2307                 entry->ecx |= F(X2APIC);
2308                 break;
2309         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2310          * may return different values. This forces us to get_cpu() before
2311          * issuing the first command, and also to emulate this annoying behavior
2312          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2313         case 2: {
2314                 int t, times = entry->eax & 0xff;
2315
2316                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2317                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2318                 for (t = 1; t < times && *nent < maxnent; ++t) {
2319                         do_cpuid_1_ent(&entry[t], function, 0);
2320                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2321                         ++*nent;
2322                 }
2323                 break;
2324         }
2325         /* function 4 and 0xb have additional index. */
2326         case 4: {
2327                 int i, cache_type;
2328
2329                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2330                 /* read more entries until cache_type is zero */
2331                 for (i = 1; *nent < maxnent; ++i) {
2332                         cache_type = entry[i - 1].eax & 0x1f;
2333                         if (!cache_type)
2334                                 break;
2335                         do_cpuid_1_ent(&entry[i], function, i);
2336                         entry[i].flags |=
2337                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2338                         ++*nent;
2339                 }
2340                 break;
2341         }
2342         case 0xb: {
2343                 int i, level_type;
2344
2345                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2346                 /* read more entries until level_type is zero */
2347                 for (i = 1; *nent < maxnent; ++i) {
2348                         level_type = entry[i - 1].ecx & 0xff00;
2349                         if (!level_type)
2350                                 break;
2351                         do_cpuid_1_ent(&entry[i], function, i);
2352                         entry[i].flags |=
2353                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2354                         ++*nent;
2355                 }
2356                 break;
2357         }
2358         case 0xd: {
2359                 int i;
2360
2361                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2362                 for (i = 1; *nent < maxnent; ++i) {
2363                         if (entry[i - 1].eax == 0 && i != 2)
2364                                 break;
2365                         do_cpuid_1_ent(&entry[i], function, i);
2366                         entry[i].flags |=
2367                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2368                         ++*nent;
2369                 }
2370                 break;
2371         }
2372         case KVM_CPUID_SIGNATURE: {
2373                 char signature[12] = "KVMKVMKVM\0\0";
2374                 u32 *sigptr = (u32 *)signature;
2375                 entry->eax = 0;
2376                 entry->ebx = sigptr[0];
2377                 entry->ecx = sigptr[1];
2378                 entry->edx = sigptr[2];
2379                 break;
2380         }
2381         case KVM_CPUID_FEATURES:
2382                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2383                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2384                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2385                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2386                 entry->ebx = 0;
2387                 entry->ecx = 0;
2388                 entry->edx = 0;
2389                 break;
2390         case 0x80000000:
2391                 entry->eax = min(entry->eax, 0x8000001a);
2392                 break;
2393         case 0x80000001:
2394                 entry->edx &= kvm_supported_word1_x86_features;
2395                 entry->ecx &= kvm_supported_word6_x86_features;
2396                 break;
2397         }
2398
2399         kvm_x86_ops->set_supported_cpuid(function, entry);
2400
2401         put_cpu();
2402 }
2403
2404 #undef F
2405
2406 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2407                                      struct kvm_cpuid_entry2 __user *entries)
2408 {
2409         struct kvm_cpuid_entry2 *cpuid_entries;
2410         int limit, nent = 0, r = -E2BIG;
2411         u32 func;
2412
2413         if (cpuid->nent < 1)
2414                 goto out;
2415         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2416                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2417         r = -ENOMEM;
2418         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2419         if (!cpuid_entries)
2420                 goto out;
2421
2422         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2423         limit = cpuid_entries[0].eax;
2424         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2425                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2426                              &nent, cpuid->nent);
2427         r = -E2BIG;
2428         if (nent >= cpuid->nent)
2429                 goto out_free;
2430
2431         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2432         limit = cpuid_entries[nent - 1].eax;
2433         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2434                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2435                              &nent, cpuid->nent);
2436
2437
2438
2439         r = -E2BIG;
2440         if (nent >= cpuid->nent)
2441                 goto out_free;
2442
2443         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2444                      cpuid->nent);
2445
2446         r = -E2BIG;
2447         if (nent >= cpuid->nent)
2448                 goto out_free;
2449
2450         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2451                      cpuid->nent);
2452
2453         r = -E2BIG;
2454         if (nent >= cpuid->nent)
2455                 goto out_free;
2456
2457         r = -EFAULT;
2458         if (copy_to_user(entries, cpuid_entries,
2459                          nent * sizeof(struct kvm_cpuid_entry2)))
2460                 goto out_free;
2461         cpuid->nent = nent;
2462         r = 0;
2463
2464 out_free:
2465         vfree(cpuid_entries);
2466 out:
2467         return r;
2468 }
2469
2470 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2471                                     struct kvm_lapic_state *s)
2472 {
2473         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2474
2475         return 0;
2476 }
2477
2478 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2479                                     struct kvm_lapic_state *s)
2480 {
2481         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2482         kvm_apic_post_state_restore(vcpu);
2483         update_cr8_intercept(vcpu);
2484
2485         return 0;
2486 }
2487
2488 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2489                                     struct kvm_interrupt *irq)
2490 {
2491         if (irq->irq < 0 || irq->irq >= 256)
2492                 return -EINVAL;
2493         if (irqchip_in_kernel(vcpu->kvm))
2494                 return -ENXIO;
2495
2496         kvm_queue_interrupt(vcpu, irq->irq, false);
2497         kvm_make_request(KVM_REQ_EVENT, vcpu);
2498
2499         return 0;
2500 }
2501
2502 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2503 {
2504         kvm_inject_nmi(vcpu);
2505
2506         return 0;
2507 }
2508
2509 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2510                                            struct kvm_tpr_access_ctl *tac)
2511 {
2512         if (tac->flags)
2513                 return -EINVAL;
2514         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2515         return 0;
2516 }
2517
2518 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2519                                         u64 mcg_cap)
2520 {
2521         int r;
2522         unsigned bank_num = mcg_cap & 0xff, bank;
2523
2524         r = -EINVAL;
2525         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2526                 goto out;
2527         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2528                 goto out;
2529         r = 0;
2530         vcpu->arch.mcg_cap = mcg_cap;
2531         /* Init IA32_MCG_CTL to all 1s */
2532         if (mcg_cap & MCG_CTL_P)
2533                 vcpu->arch.mcg_ctl = ~(u64)0;
2534         /* Init IA32_MCi_CTL to all 1s */
2535         for (bank = 0; bank < bank_num; bank++)
2536                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2537 out:
2538         return r;
2539 }
2540
2541 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2542                                       struct kvm_x86_mce *mce)
2543 {
2544         u64 mcg_cap = vcpu->arch.mcg_cap;
2545         unsigned bank_num = mcg_cap & 0xff;
2546         u64 *banks = vcpu->arch.mce_banks;
2547
2548         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2549                 return -EINVAL;
2550         /*
2551          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2552          * reporting is disabled
2553          */
2554         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2555             vcpu->arch.mcg_ctl != ~(u64)0)
2556                 return 0;
2557         banks += 4 * mce->bank;
2558         /*
2559          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2560          * reporting is disabled for the bank
2561          */
2562         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2563                 return 0;
2564         if (mce->status & MCI_STATUS_UC) {
2565                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2566                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2567                         printk(KERN_DEBUG "kvm: set_mce: "
2568                                "injects mce exception while "
2569                                "previous one is in progress!\n");
2570                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2571                         return 0;
2572                 }
2573                 if (banks[1] & MCI_STATUS_VAL)
2574                         mce->status |= MCI_STATUS_OVER;
2575                 banks[2] = mce->addr;
2576                 banks[3] = mce->misc;
2577                 vcpu->arch.mcg_status = mce->mcg_status;
2578                 banks[1] = mce->status;
2579                 kvm_queue_exception(vcpu, MC_VECTOR);
2580         } else if (!(banks[1] & MCI_STATUS_VAL)
2581                    || !(banks[1] & MCI_STATUS_UC)) {
2582                 if (banks[1] & MCI_STATUS_VAL)
2583                         mce->status |= MCI_STATUS_OVER;
2584                 banks[2] = mce->addr;
2585                 banks[3] = mce->misc;
2586                 banks[1] = mce->status;
2587         } else
2588                 banks[1] |= MCI_STATUS_OVER;
2589         return 0;
2590 }
2591
2592 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2593                                                struct kvm_vcpu_events *events)
2594 {
2595         events->exception.injected =
2596                 vcpu->arch.exception.pending &&
2597                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2598         events->exception.nr = vcpu->arch.exception.nr;
2599         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2600         events->exception.pad = 0;
2601         events->exception.error_code = vcpu->arch.exception.error_code;
2602
2603         events->interrupt.injected =
2604                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2605         events->interrupt.nr = vcpu->arch.interrupt.nr;
2606         events->interrupt.soft = 0;
2607         events->interrupt.shadow =
2608                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2609                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2610
2611         events->nmi.injected = vcpu->arch.nmi_injected;
2612         events->nmi.pending = vcpu->arch.nmi_pending;
2613         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2614         events->nmi.pad = 0;
2615
2616         events->sipi_vector = vcpu->arch.sipi_vector;
2617
2618         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2619                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2620                          | KVM_VCPUEVENT_VALID_SHADOW);
2621         memset(&events->reserved, 0, sizeof(events->reserved));
2622 }
2623
2624 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2625                                               struct kvm_vcpu_events *events)
2626 {
2627         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2628                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2629                               | KVM_VCPUEVENT_VALID_SHADOW))
2630                 return -EINVAL;
2631
2632         vcpu->arch.exception.pending = events->exception.injected;
2633         vcpu->arch.exception.nr = events->exception.nr;
2634         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2635         vcpu->arch.exception.error_code = events->exception.error_code;
2636
2637         vcpu->arch.interrupt.pending = events->interrupt.injected;
2638         vcpu->arch.interrupt.nr = events->interrupt.nr;
2639         vcpu->arch.interrupt.soft = events->interrupt.soft;
2640         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2641                 kvm_pic_clear_isr_ack(vcpu->kvm);
2642         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2643                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2644                                                   events->interrupt.shadow);
2645
2646         vcpu->arch.nmi_injected = events->nmi.injected;
2647         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2648                 vcpu->arch.nmi_pending = events->nmi.pending;
2649         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2650
2651         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2652                 vcpu->arch.sipi_vector = events->sipi_vector;
2653
2654         kvm_make_request(KVM_REQ_EVENT, vcpu);
2655
2656         return 0;
2657 }
2658
2659 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2660                                              struct kvm_debugregs *dbgregs)
2661 {
2662         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2663         dbgregs->dr6 = vcpu->arch.dr6;
2664         dbgregs->dr7 = vcpu->arch.dr7;
2665         dbgregs->flags = 0;
2666         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2667 }
2668
2669 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2670                                             struct kvm_debugregs *dbgregs)
2671 {
2672         if (dbgregs->flags)
2673                 return -EINVAL;
2674
2675         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2676         vcpu->arch.dr6 = dbgregs->dr6;
2677         vcpu->arch.dr7 = dbgregs->dr7;
2678
2679         return 0;
2680 }
2681
2682 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2683                                          struct kvm_xsave *guest_xsave)
2684 {
2685         if (cpu_has_xsave)
2686                 memcpy(guest_xsave->region,
2687                         &vcpu->arch.guest_fpu.state->xsave,
2688                         xstate_size);
2689         else {
2690                 memcpy(guest_xsave->region,
2691                         &vcpu->arch.guest_fpu.state->fxsave,
2692                         sizeof(struct i387_fxsave_struct));
2693                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2694                         XSTATE_FPSSE;
2695         }
2696 }
2697
2698 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2699                                         struct kvm_xsave *guest_xsave)
2700 {
2701         u64 xstate_bv =
2702                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2703
2704         if (cpu_has_xsave)
2705                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2706                         guest_xsave->region, xstate_size);
2707         else {
2708                 if (xstate_bv & ~XSTATE_FPSSE)
2709                         return -EINVAL;
2710                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2711                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2712         }
2713         return 0;
2714 }
2715
2716 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2717                                         struct kvm_xcrs *guest_xcrs)
2718 {
2719         if (!cpu_has_xsave) {
2720                 guest_xcrs->nr_xcrs = 0;
2721                 return;
2722         }
2723
2724         guest_xcrs->nr_xcrs = 1;
2725         guest_xcrs->flags = 0;
2726         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2727         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2728 }
2729
2730 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2731                                        struct kvm_xcrs *guest_xcrs)
2732 {
2733         int i, r = 0;
2734
2735         if (!cpu_has_xsave)
2736                 return -EINVAL;
2737
2738         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2739                 return -EINVAL;
2740
2741         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2742                 /* Only support XCR0 currently */
2743                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2744                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2745                                 guest_xcrs->xcrs[0].value);
2746                         break;
2747                 }
2748         if (r)
2749                 r = -EINVAL;
2750         return r;
2751 }
2752
2753 long kvm_arch_vcpu_ioctl(struct file *filp,
2754                          unsigned int ioctl, unsigned long arg)
2755 {
2756         struct kvm_vcpu *vcpu = filp->private_data;
2757         void __user *argp = (void __user *)arg;
2758         int r;
2759         union {
2760                 struct kvm_lapic_state *lapic;
2761                 struct kvm_xsave *xsave;
2762                 struct kvm_xcrs *xcrs;
2763                 void *buffer;
2764         } u;
2765
2766         u.buffer = NULL;
2767         switch (ioctl) {
2768         case KVM_GET_LAPIC: {
2769                 r = -EINVAL;
2770                 if (!vcpu->arch.apic)
2771                         goto out;
2772                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2773
2774                 r = -ENOMEM;
2775                 if (!u.lapic)
2776                         goto out;
2777                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2778                 if (r)
2779                         goto out;
2780                 r = -EFAULT;
2781                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2782                         goto out;
2783                 r = 0;
2784                 break;
2785         }
2786         case KVM_SET_LAPIC: {
2787                 r = -EINVAL;
2788                 if (!vcpu->arch.apic)
2789                         goto out;
2790                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2791                 r = -ENOMEM;
2792                 if (!u.lapic)
2793                         goto out;
2794                 r = -EFAULT;
2795                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2796                         goto out;
2797                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2798                 if (r)
2799                         goto out;
2800                 r = 0;
2801                 break;
2802         }
2803         case KVM_INTERRUPT: {
2804                 struct kvm_interrupt irq;
2805
2806                 r = -EFAULT;
2807                 if (copy_from_user(&irq, argp, sizeof irq))
2808                         goto out;
2809                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2810                 if (r)
2811                         goto out;
2812                 r = 0;
2813                 break;
2814         }
2815         case KVM_NMI: {
2816                 r = kvm_vcpu_ioctl_nmi(vcpu);
2817                 if (r)
2818                         goto out;
2819                 r = 0;
2820                 break;
2821         }
2822         case KVM_SET_CPUID: {
2823                 struct kvm_cpuid __user *cpuid_arg = argp;
2824                 struct kvm_cpuid cpuid;
2825
2826                 r = -EFAULT;
2827                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2828                         goto out;
2829                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2830                 if (r)
2831                         goto out;
2832                 break;
2833         }
2834         case KVM_SET_CPUID2: {
2835                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2836                 struct kvm_cpuid2 cpuid;
2837
2838                 r = -EFAULT;
2839                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2840                         goto out;
2841                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2842                                               cpuid_arg->entries);
2843                 if (r)
2844                         goto out;
2845                 break;
2846         }
2847         case KVM_GET_CPUID2: {
2848                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2849                 struct kvm_cpuid2 cpuid;
2850
2851                 r = -EFAULT;
2852                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2853                         goto out;
2854                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2855                                               cpuid_arg->entries);
2856                 if (r)
2857                         goto out;
2858                 r = -EFAULT;
2859                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2860                         goto out;
2861                 r = 0;
2862                 break;
2863         }
2864         case KVM_GET_MSRS:
2865                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2866                 break;
2867         case KVM_SET_MSRS:
2868                 r = msr_io(vcpu, argp, do_set_msr, 0);
2869                 break;
2870         case KVM_TPR_ACCESS_REPORTING: {
2871                 struct kvm_tpr_access_ctl tac;
2872
2873                 r = -EFAULT;
2874                 if (copy_from_user(&tac, argp, sizeof tac))
2875                         goto out;
2876                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2877                 if (r)
2878                         goto out;
2879                 r = -EFAULT;
2880                 if (copy_to_user(argp, &tac, sizeof tac))
2881                         goto out;
2882                 r = 0;
2883                 break;
2884         };
2885         case KVM_SET_VAPIC_ADDR: {
2886                 struct kvm_vapic_addr va;
2887
2888                 r = -EINVAL;
2889                 if (!irqchip_in_kernel(vcpu->kvm))
2890                         goto out;
2891                 r = -EFAULT;
2892                 if (copy_from_user(&va, argp, sizeof va))
2893                         goto out;
2894                 r = 0;
2895                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2896                 break;
2897         }
2898         case KVM_X86_SETUP_MCE: {
2899                 u64 mcg_cap;
2900
2901                 r = -EFAULT;
2902                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2903                         goto out;
2904                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2905                 break;
2906         }
2907         case KVM_X86_SET_MCE: {
2908                 struct kvm_x86_mce mce;
2909
2910                 r = -EFAULT;
2911                 if (copy_from_user(&mce, argp, sizeof mce))
2912                         goto out;
2913                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2914                 break;
2915         }
2916         case KVM_GET_VCPU_EVENTS: {
2917                 struct kvm_vcpu_events events;
2918
2919                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2920
2921                 r = -EFAULT;
2922                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2923                         break;
2924                 r = 0;
2925                 break;
2926         }
2927         case KVM_SET_VCPU_EVENTS: {
2928                 struct kvm_vcpu_events events;
2929
2930                 r = -EFAULT;
2931                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2932                         break;
2933
2934                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2935                 break;
2936         }
2937         case KVM_GET_DEBUGREGS: {
2938                 struct kvm_debugregs dbgregs;
2939
2940                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2941
2942                 r = -EFAULT;
2943                 if (copy_to_user(argp, &dbgregs,
2944                                  sizeof(struct kvm_debugregs)))
2945                         break;
2946                 r = 0;
2947                 break;
2948         }
2949         case KVM_SET_DEBUGREGS: {
2950                 struct kvm_debugregs dbgregs;
2951
2952                 r = -EFAULT;
2953                 if (copy_from_user(&dbgregs, argp,
2954                                    sizeof(struct kvm_debugregs)))
2955                         break;
2956
2957                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2958                 break;
2959         }
2960         case KVM_GET_XSAVE: {
2961                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2962                 r = -ENOMEM;
2963                 if (!u.xsave)
2964                         break;
2965
2966                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2967
2968                 r = -EFAULT;
2969                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2970                         break;
2971                 r = 0;
2972                 break;
2973         }
2974         case KVM_SET_XSAVE: {
2975                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2976                 r = -ENOMEM;
2977                 if (!u.xsave)
2978                         break;
2979
2980                 r = -EFAULT;
2981                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2982                         break;
2983
2984                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2985                 break;
2986         }
2987         case KVM_GET_XCRS: {
2988                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2989                 r = -ENOMEM;
2990                 if (!u.xcrs)
2991                         break;
2992
2993                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2994
2995                 r = -EFAULT;
2996                 if (copy_to_user(argp, u.xcrs,
2997                                  sizeof(struct kvm_xcrs)))
2998                         break;
2999                 r = 0;
3000                 break;
3001         }
3002         case KVM_SET_XCRS: {
3003                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3004                 r = -ENOMEM;
3005                 if (!u.xcrs)
3006                         break;
3007
3008                 r = -EFAULT;
3009                 if (copy_from_user(u.xcrs, argp,
3010                                    sizeof(struct kvm_xcrs)))
3011                         break;
3012
3013                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3014                 break;
3015         }
3016         default:
3017                 r = -EINVAL;
3018         }
3019 out:
3020         kfree(u.buffer);
3021         return r;
3022 }
3023
3024 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3025 {
3026         int ret;
3027
3028         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3029                 return -1;
3030         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3031         return ret;
3032 }
3033
3034 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3035                                               u64 ident_addr)
3036 {
3037         kvm->arch.ept_identity_map_addr = ident_addr;
3038         return 0;
3039 }
3040
3041 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3042                                           u32 kvm_nr_mmu_pages)
3043 {
3044         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3045                 return -EINVAL;
3046
3047         mutex_lock(&kvm->slots_lock);
3048         spin_lock(&kvm->mmu_lock);
3049
3050         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3051         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3052
3053         spin_unlock(&kvm->mmu_lock);
3054         mutex_unlock(&kvm->slots_lock);
3055         return 0;
3056 }
3057
3058 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3059 {
3060         return kvm->arch.n_max_mmu_pages;
3061 }
3062
3063 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3064 {
3065         int r;
3066
3067         r = 0;
3068         switch (chip->chip_id) {
3069         case KVM_IRQCHIP_PIC_MASTER:
3070                 memcpy(&chip->chip.pic,
3071                         &pic_irqchip(kvm)->pics[0],
3072                         sizeof(struct kvm_pic_state));
3073                 break;
3074         case KVM_IRQCHIP_PIC_SLAVE:
3075                 memcpy(&chip->chip.pic,
3076                         &pic_irqchip(kvm)->pics[1],
3077                         sizeof(struct kvm_pic_state));
3078                 break;
3079         case KVM_IRQCHIP_IOAPIC:
3080                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3081                 break;
3082         default:
3083                 r = -EINVAL;
3084                 break;
3085         }
3086         return r;
3087 }
3088
3089 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3090 {
3091         int r;
3092
3093         r = 0;
3094         switch (chip->chip_id) {
3095         case KVM_IRQCHIP_PIC_MASTER:
3096                 spin_lock(&pic_irqchip(kvm)->lock);
3097                 memcpy(&pic_irqchip(kvm)->pics[0],
3098                         &chip->chip.pic,
3099                         sizeof(struct kvm_pic_state));
3100                 spin_unlock(&pic_irqchip(kvm)->lock);
3101                 break;
3102         case KVM_IRQCHIP_PIC_SLAVE:
3103                 spin_lock(&pic_irqchip(kvm)->lock);
3104                 memcpy(&pic_irqchip(kvm)->pics[1],
3105                         &chip->chip.pic,
3106                         sizeof(struct kvm_pic_state));
3107                 spin_unlock(&pic_irqchip(kvm)->lock);
3108                 break;
3109         case KVM_IRQCHIP_IOAPIC:
3110                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3111                 break;
3112         default:
3113                 r = -EINVAL;
3114                 break;
3115         }
3116         kvm_pic_update_irq(pic_irqchip(kvm));
3117         return r;
3118 }
3119
3120 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3121 {
3122         int r = 0;
3123
3124         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3125         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3126         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3127         return r;
3128 }
3129
3130 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3131 {
3132         int r = 0;
3133
3134         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3135         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3136         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3137         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3138         return r;
3139 }
3140
3141 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3142 {
3143         int r = 0;
3144
3145         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3146         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3147                 sizeof(ps->channels));
3148         ps->flags = kvm->arch.vpit->pit_state.flags;
3149         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3150         memset(&ps->reserved, 0, sizeof(ps->reserved));
3151         return r;
3152 }
3153
3154 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3155 {
3156         int r = 0, start = 0;
3157         u32 prev_legacy, cur_legacy;
3158         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3159         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3160         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3161         if (!prev_legacy && cur_legacy)
3162                 start = 1;
3163         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3164                sizeof(kvm->arch.vpit->pit_state.channels));
3165         kvm->arch.vpit->pit_state.flags = ps->flags;
3166         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3167         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3168         return r;
3169 }
3170
3171 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3172                                  struct kvm_reinject_control *control)
3173 {
3174         if (!kvm->arch.vpit)
3175                 return -ENXIO;
3176         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3177         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3178         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3179         return 0;
3180 }
3181
3182 /*
3183  * Get (and clear) the dirty memory log for a memory slot.
3184  */
3185 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3186                                       struct kvm_dirty_log *log)
3187 {
3188         int r, i;
3189         struct kvm_memory_slot *memslot;
3190         unsigned long n;
3191         unsigned long is_dirty = 0;
3192
3193         mutex_lock(&kvm->slots_lock);
3194
3195         r = -EINVAL;
3196         if (log->slot >= KVM_MEMORY_SLOTS)
3197                 goto out;
3198
3199         memslot = &kvm->memslots->memslots[log->slot];
3200         r = -ENOENT;
3201         if (!memslot->dirty_bitmap)
3202                 goto out;
3203
3204         n = kvm_dirty_bitmap_bytes(memslot);
3205
3206         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3207                 is_dirty = memslot->dirty_bitmap[i];
3208
3209         /* If nothing is dirty, don't bother messing with page tables. */
3210         if (is_dirty) {
3211                 struct kvm_memslots *slots, *old_slots;
3212                 unsigned long *dirty_bitmap;
3213
3214                 dirty_bitmap = memslot->dirty_bitmap_head;
3215                 if (memslot->dirty_bitmap == dirty_bitmap)
3216                         dirty_bitmap += n / sizeof(long);
3217                 memset(dirty_bitmap, 0, n);
3218
3219                 r = -ENOMEM;
3220                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3221                 if (!slots)
3222                         goto out;
3223                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3224                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3225                 slots->generation++;
3226
3227                 old_slots = kvm->memslots;
3228                 rcu_assign_pointer(kvm->memslots, slots);
3229                 synchronize_srcu_expedited(&kvm->srcu);
3230                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3231                 kfree(old_slots);
3232
3233                 spin_lock(&kvm->mmu_lock);
3234                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3235                 spin_unlock(&kvm->mmu_lock);
3236
3237                 r = -EFAULT;
3238                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3239                         goto out;
3240         } else {
3241                 r = -EFAULT;
3242                 if (clear_user(log->dirty_bitmap, n))
3243                         goto out;
3244         }
3245
3246         r = 0;
3247 out:
3248         mutex_unlock(&kvm->slots_lock);
3249         return r;
3250 }
3251
3252 long kvm_arch_vm_ioctl(struct file *filp,
3253                        unsigned int ioctl, unsigned long arg)
3254 {
3255         struct kvm *kvm = filp->private_data;
3256         void __user *argp = (void __user *)arg;
3257         int r = -ENOTTY;
3258         /*
3259          * This union makes it completely explicit to gcc-3.x
3260          * that these two variables' stack usage should be
3261          * combined, not added together.
3262          */
3263         union {
3264                 struct kvm_pit_state ps;
3265                 struct kvm_pit_state2 ps2;
3266                 struct kvm_pit_config pit_config;
3267         } u;
3268
3269         switch (ioctl) {
3270         case KVM_SET_TSS_ADDR:
3271                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3272                 if (r < 0)
3273                         goto out;
3274                 break;
3275         case KVM_SET_IDENTITY_MAP_ADDR: {
3276                 u64 ident_addr;
3277
3278                 r = -EFAULT;
3279                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3280                         goto out;
3281                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3282                 if (r < 0)
3283                         goto out;
3284                 break;
3285         }
3286         case KVM_SET_NR_MMU_PAGES:
3287                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3288                 if (r)
3289                         goto out;
3290                 break;
3291         case KVM_GET_NR_MMU_PAGES:
3292                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3293                 break;
3294         case KVM_CREATE_IRQCHIP: {
3295                 struct kvm_pic *vpic;
3296
3297                 mutex_lock(&kvm->lock);
3298                 r = -EEXIST;
3299                 if (kvm->arch.vpic)
3300                         goto create_irqchip_unlock;
3301                 r = -ENOMEM;
3302                 vpic = kvm_create_pic(kvm);
3303                 if (vpic) {
3304                         r = kvm_ioapic_init(kvm);
3305                         if (r) {
3306                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3307                                                           &vpic->dev);
3308                                 kfree(vpic);
3309                                 goto create_irqchip_unlock;
3310                         }
3311                 } else
3312                         goto create_irqchip_unlock;
3313                 smp_wmb();
3314                 kvm->arch.vpic = vpic;
3315                 smp_wmb();
3316                 r = kvm_setup_default_irq_routing(kvm);
3317                 if (r) {
3318                         mutex_lock(&kvm->irq_lock);
3319                         kvm_ioapic_destroy(kvm);
3320                         kvm_destroy_pic(kvm);
3321                         mutex_unlock(&kvm->irq_lock);
3322                 }
3323         create_irqchip_unlock:
3324                 mutex_unlock(&kvm->lock);
3325                 break;
3326         }
3327         case KVM_CREATE_PIT:
3328                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3329                 goto create_pit;
3330         case KVM_CREATE_PIT2:
3331                 r = -EFAULT;
3332                 if (copy_from_user(&u.pit_config, argp,
3333                                    sizeof(struct kvm_pit_config)))
3334                         goto out;
3335         create_pit:
3336                 mutex_lock(&kvm->slots_lock);
3337                 r = -EEXIST;
3338                 if (kvm->arch.vpit)
3339                         goto create_pit_unlock;
3340                 r = -ENOMEM;
3341                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3342                 if (kvm->arch.vpit)
3343                         r = 0;
3344         create_pit_unlock:
3345                 mutex_unlock(&kvm->slots_lock);
3346                 break;
3347         case KVM_IRQ_LINE_STATUS:
3348         case KVM_IRQ_LINE: {
3349                 struct kvm_irq_level irq_event;
3350
3351                 r = -EFAULT;
3352                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3353                         goto out;
3354                 r = -ENXIO;
3355                 if (irqchip_in_kernel(kvm)) {
3356                         __s32 status;
3357                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3358                                         irq_event.irq, irq_event.level);
3359                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3360                                 r = -EFAULT;
3361                                 irq_event.status = status;
3362                                 if (copy_to_user(argp, &irq_event,
3363                                                         sizeof irq_event))
3364                                         goto out;
3365                         }
3366                         r = 0;
3367                 }
3368                 break;
3369         }
3370         case KVM_GET_IRQCHIP: {
3371                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3372                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3373
3374                 r = -ENOMEM;
3375                 if (!chip)
3376                         goto out;
3377                 r = -EFAULT;
3378                 if (copy_from_user(chip, argp, sizeof *chip))
3379                         goto get_irqchip_out;
3380                 r = -ENXIO;
3381                 if (!irqchip_in_kernel(kvm))
3382                         goto get_irqchip_out;
3383                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3384                 if (r)
3385                         goto get_irqchip_out;
3386                 r = -EFAULT;
3387                 if (copy_to_user(argp, chip, sizeof *chip))
3388                         goto get_irqchip_out;
3389                 r = 0;
3390         get_irqchip_out:
3391                 kfree(chip);
3392                 if (r)
3393                         goto out;
3394                 break;
3395         }
3396         case KVM_SET_IRQCHIP: {
3397                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3398                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3399
3400                 r = -ENOMEM;
3401                 if (!chip)
3402                         goto out;
3403                 r = -EFAULT;
3404                 if (copy_from_user(chip, argp, sizeof *chip))
3405                         goto set_irqchip_out;
3406                 r = -ENXIO;
3407                 if (!irqchip_in_kernel(kvm))
3408                         goto set_irqchip_out;
3409                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3410                 if (r)
3411                         goto set_irqchip_out;
3412                 r = 0;
3413         set_irqchip_out:
3414                 kfree(chip);
3415                 if (r)
3416                         goto out;
3417                 break;
3418         }
3419         case KVM_GET_PIT: {
3420                 r = -EFAULT;
3421                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3422                         goto out;
3423                 r = -ENXIO;
3424                 if (!kvm->arch.vpit)
3425                         goto out;
3426                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3427                 if (r)
3428                         goto out;
3429                 r = -EFAULT;
3430                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3431                         goto out;
3432                 r = 0;
3433                 break;
3434         }
3435         case KVM_SET_PIT: {
3436                 r = -EFAULT;
3437                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3438                         goto out;
3439                 r = -ENXIO;
3440                 if (!kvm->arch.vpit)
3441                         goto out;
3442                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3443                 if (r)
3444                         goto out;
3445                 r = 0;
3446                 break;
3447         }
3448         case KVM_GET_PIT2: {
3449                 r = -ENXIO;
3450                 if (!kvm->arch.vpit)
3451                         goto out;
3452                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3453                 if (r)
3454                         goto out;
3455                 r = -EFAULT;
3456                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3457                         goto out;
3458                 r = 0;
3459                 break;
3460         }
3461         case KVM_SET_PIT2: {
3462                 r = -EFAULT;
3463                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3464                         goto out;
3465                 r = -ENXIO;
3466                 if (!kvm->arch.vpit)
3467                         goto out;
3468                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3469                 if (r)
3470                         goto out;
3471                 r = 0;
3472                 break;
3473         }
3474         case KVM_REINJECT_CONTROL: {
3475                 struct kvm_reinject_control control;
3476                 r =  -EFAULT;
3477                 if (copy_from_user(&control, argp, sizeof(control)))
3478                         goto out;
3479                 r = kvm_vm_ioctl_reinject(kvm, &control);
3480                 if (r)
3481                         goto out;
3482                 r = 0;
3483                 break;
3484         }
3485         case KVM_XEN_HVM_CONFIG: {
3486                 r = -EFAULT;
3487                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3488                                    sizeof(struct kvm_xen_hvm_config)))
3489                         goto out;
3490                 r = -EINVAL;
3491                 if (kvm->arch.xen_hvm_config.flags)
3492                         goto out;
3493                 r = 0;
3494                 break;
3495         }
3496         case KVM_SET_CLOCK: {
3497                 struct kvm_clock_data user_ns;
3498                 u64 now_ns;
3499                 s64 delta;
3500
3501                 r = -EFAULT;
3502                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3503                         goto out;
3504
3505                 r = -EINVAL;
3506                 if (user_ns.flags)
3507                         goto out;
3508
3509                 r = 0;
3510                 local_irq_disable();
3511                 now_ns = get_kernel_ns();
3512                 delta = user_ns.clock - now_ns;
3513                 local_irq_enable();
3514                 kvm->arch.kvmclock_offset = delta;
3515                 break;
3516         }
3517         case KVM_GET_CLOCK: {
3518                 struct kvm_clock_data user_ns;
3519                 u64 now_ns;
3520
3521                 local_irq_disable();
3522                 now_ns = get_kernel_ns();
3523                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3524                 local_irq_enable();
3525                 user_ns.flags = 0;
3526                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3527
3528                 r = -EFAULT;
3529                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3530                         goto out;
3531                 r = 0;
3532                 break;
3533         }
3534
3535         default:
3536                 ;
3537         }
3538 out:
3539         return r;
3540 }
3541
3542 static void kvm_init_msr_list(void)
3543 {
3544         u32 dummy[2];
3545         unsigned i, j;
3546
3547         /* skip the first msrs in the list. KVM-specific */
3548         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3549                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3550                         continue;
3551                 if (j < i)
3552                         msrs_to_save[j] = msrs_to_save[i];
3553                 j++;
3554         }
3555         num_msrs_to_save = j;
3556 }
3557
3558 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3559                            const void *v)
3560 {
3561         if (vcpu->arch.apic &&
3562             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3563                 return 0;
3564
3565         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3566 }
3567
3568 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3569 {
3570         if (vcpu->arch.apic &&
3571             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3572                 return 0;
3573
3574         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3575 }
3576
3577 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3578                         struct kvm_segment *var, int seg)
3579 {
3580         kvm_x86_ops->set_segment(vcpu, var, seg);
3581 }
3582
3583 void kvm_get_segment(struct kvm_vcpu *vcpu,
3584                      struct kvm_segment *var, int seg)
3585 {
3586         kvm_x86_ops->get_segment(vcpu, var, seg);
3587 }
3588
3589 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3590 {
3591         return gpa;
3592 }
3593
3594 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3595 {
3596         gpa_t t_gpa;
3597         u32 error;
3598
3599         BUG_ON(!mmu_is_nested(vcpu));
3600
3601         /* NPT walks are always user-walks */
3602         access |= PFERR_USER_MASK;
3603         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3604         if (t_gpa == UNMAPPED_GVA)
3605                 vcpu->arch.fault.nested = true;
3606
3607         return t_gpa;
3608 }
3609
3610 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3611 {
3612         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3613         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3614 }
3615
3616  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3617 {
3618         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3619         access |= PFERR_FETCH_MASK;
3620         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3621 }
3622
3623 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3624 {
3625         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3626         access |= PFERR_WRITE_MASK;
3627         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3628 }
3629
3630 /* uses this to access any guest's mapped memory without checking CPL */
3631 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3632 {
3633         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3634 }
3635
3636 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3637                                       struct kvm_vcpu *vcpu, u32 access,
3638                                       u32 *error)
3639 {
3640         void *data = val;
3641         int r = X86EMUL_CONTINUE;
3642
3643         while (bytes) {
3644                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3645                                                             error);
3646                 unsigned offset = addr & (PAGE_SIZE-1);
3647                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3648                 int ret;
3649
3650                 if (gpa == UNMAPPED_GVA) {
3651                         r = X86EMUL_PROPAGATE_FAULT;
3652                         goto out;
3653                 }
3654                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3655                 if (ret < 0) {
3656                         r = X86EMUL_IO_NEEDED;
3657                         goto out;
3658                 }
3659
3660                 bytes -= toread;
3661                 data += toread;
3662                 addr += toread;
3663         }
3664 out:
3665         return r;
3666 }
3667
3668 /* used for instruction fetching */
3669 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3670                                 struct kvm_vcpu *vcpu, u32 *error)
3671 {
3672         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3673         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3674                                           access | PFERR_FETCH_MASK, error);
3675 }
3676
3677 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3678                                struct kvm_vcpu *vcpu, u32 *error)
3679 {
3680         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3681         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3682                                           error);
3683 }
3684
3685 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3686                                struct kvm_vcpu *vcpu, u32 *error)
3687 {
3688         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3689 }
3690
3691 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3692                                        unsigned int bytes,
3693                                        struct kvm_vcpu *vcpu,
3694                                        u32 *error)
3695 {
3696         void *data = val;
3697         int r = X86EMUL_CONTINUE;
3698
3699         while (bytes) {
3700                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3701                                                              PFERR_WRITE_MASK,
3702                                                              error);
3703                 unsigned offset = addr & (PAGE_SIZE-1);
3704                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3705                 int ret;
3706
3707                 if (gpa == UNMAPPED_GVA) {
3708                         r = X86EMUL_PROPAGATE_FAULT;
3709                         goto out;
3710                 }
3711                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3712                 if (ret < 0) {
3713                         r = X86EMUL_IO_NEEDED;
3714                         goto out;
3715                 }
3716
3717                 bytes -= towrite;
3718                 data += towrite;
3719                 addr += towrite;
3720         }
3721 out:
3722         return r;
3723 }
3724
3725 static int emulator_read_emulated(unsigned long addr,
3726                                   void *val,
3727                                   unsigned int bytes,
3728                                   unsigned int *error_code,
3729                                   struct kvm_vcpu *vcpu)
3730 {
3731         gpa_t                 gpa;
3732
3733         if (vcpu->mmio_read_completed) {
3734                 memcpy(val, vcpu->mmio_data, bytes);
3735                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3736                                vcpu->mmio_phys_addr, *(u64 *)val);
3737                 vcpu->mmio_read_completed = 0;
3738                 return X86EMUL_CONTINUE;
3739         }
3740
3741         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3742
3743         if (gpa == UNMAPPED_GVA)
3744                 return X86EMUL_PROPAGATE_FAULT;
3745
3746         /* For APIC access vmexit */
3747         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3748                 goto mmio;
3749
3750         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3751                                 == X86EMUL_CONTINUE)
3752                 return X86EMUL_CONTINUE;
3753
3754 mmio:
3755         /*
3756          * Is this MMIO handled locally?
3757          */
3758         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3759                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3760                 return X86EMUL_CONTINUE;
3761         }
3762
3763         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3764
3765         vcpu->mmio_needed = 1;
3766         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3767         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3768         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3769         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3770
3771         return X86EMUL_IO_NEEDED;
3772 }
3773
3774 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3775                           const void *val, int bytes)
3776 {
3777         int ret;
3778
3779         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3780         if (ret < 0)
3781                 return 0;
3782         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3783         return 1;
3784 }
3785
3786 static int emulator_write_emulated_onepage(unsigned long addr,
3787                                            const void *val,
3788                                            unsigned int bytes,
3789                                            unsigned int *error_code,
3790                                            struct kvm_vcpu *vcpu)
3791 {
3792         gpa_t                 gpa;
3793
3794         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3795
3796         if (gpa == UNMAPPED_GVA)
3797                 return X86EMUL_PROPAGATE_FAULT;
3798
3799         /* For APIC access vmexit */
3800         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3801                 goto mmio;
3802
3803         if (emulator_write_phys(vcpu, gpa, val, bytes))
3804                 return X86EMUL_CONTINUE;
3805
3806 mmio:
3807         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3808         /*
3809          * Is this MMIO handled locally?
3810          */
3811         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3812                 return X86EMUL_CONTINUE;
3813
3814         vcpu->mmio_needed = 1;
3815         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3816         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3817         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3818         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3819         memcpy(vcpu->run->mmio.data, val, bytes);
3820
3821         return X86EMUL_CONTINUE;
3822 }
3823
3824 int emulator_write_emulated(unsigned long addr,
3825                             const void *val,
3826                             unsigned int bytes,
3827                             unsigned int *error_code,
3828                             struct kvm_vcpu *vcpu)
3829 {
3830         /* Crossing a page boundary? */
3831         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3832                 int rc, now;
3833
3834                 now = -addr & ~PAGE_MASK;
3835                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3836                                                      vcpu);
3837                 if (rc != X86EMUL_CONTINUE)
3838                         return rc;
3839                 addr += now;
3840                 val += now;
3841                 bytes -= now;
3842         }
3843         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3844                                                vcpu);
3845 }
3846
3847 #define CMPXCHG_TYPE(t, ptr, old, new) \
3848         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3849
3850 #ifdef CONFIG_X86_64
3851 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3852 #else
3853 #  define CMPXCHG64(ptr, old, new) \
3854         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3855 #endif
3856
3857 static int emulator_cmpxchg_emulated(unsigned long addr,
3858                                      const void *old,
3859                                      const void *new,
3860                                      unsigned int bytes,
3861                                      unsigned int *error_code,
3862                                      struct kvm_vcpu *vcpu)
3863 {
3864         gpa_t gpa;
3865         struct page *page;
3866         char *kaddr;
3867         bool exchanged;
3868
3869         /* guests cmpxchg8b have to be emulated atomically */
3870         if (bytes > 8 || (bytes & (bytes - 1)))
3871                 goto emul_write;
3872
3873         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3874
3875         if (gpa == UNMAPPED_GVA ||
3876             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3877                 goto emul_write;
3878
3879         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3880                 goto emul_write;
3881
3882         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3883         if (is_error_page(page)) {
3884                 kvm_release_page_clean(page);
3885                 goto emul_write;
3886         }
3887
3888         kaddr = kmap_atomic(page, KM_USER0);
3889         kaddr += offset_in_page(gpa);
3890         switch (bytes) {
3891         case 1:
3892                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3893                 break;
3894         case 2:
3895                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3896                 break;
3897         case 4:
3898                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3899                 break;
3900         case 8:
3901                 exchanged = CMPXCHG64(kaddr, old, new);
3902                 break;
3903         default:
3904                 BUG();
3905         }
3906         kunmap_atomic(kaddr, KM_USER0);
3907         kvm_release_page_dirty(page);
3908
3909         if (!exchanged)
3910                 return X86EMUL_CMPXCHG_FAILED;
3911
3912         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3913
3914         return X86EMUL_CONTINUE;
3915
3916 emul_write:
3917         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3918
3919         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3920 }
3921
3922 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3923 {
3924         /* TODO: String I/O for in kernel device */
3925         int r;
3926
3927         if (vcpu->arch.pio.in)
3928                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3929                                     vcpu->arch.pio.size, pd);
3930         else
3931                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3932                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3933                                      pd);
3934         return r;
3935 }
3936
3937
3938 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3939                              unsigned int count, struct kvm_vcpu *vcpu)
3940 {
3941         if (vcpu->arch.pio.count)
3942                 goto data_avail;
3943
3944         trace_kvm_pio(0, port, size, 1);
3945
3946         vcpu->arch.pio.port = port;
3947         vcpu->arch.pio.in = 1;
3948         vcpu->arch.pio.count  = count;
3949         vcpu->arch.pio.size = size;
3950
3951         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3952         data_avail:
3953                 memcpy(val, vcpu->arch.pio_data, size * count);
3954                 vcpu->arch.pio.count = 0;
3955                 return 1;
3956         }
3957
3958         vcpu->run->exit_reason = KVM_EXIT_IO;
3959         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3960         vcpu->run->io.size = size;
3961         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3962         vcpu->run->io.count = count;
3963         vcpu->run->io.port = port;
3964
3965         return 0;
3966 }
3967
3968 static int emulator_pio_out_emulated(int size, unsigned short port,
3969                               const void *val, unsigned int count,
3970                               struct kvm_vcpu *vcpu)
3971 {
3972         trace_kvm_pio(1, port, size, 1);
3973
3974         vcpu->arch.pio.port = port;
3975         vcpu->arch.pio.in = 0;
3976         vcpu->arch.pio.count = count;
3977         vcpu->arch.pio.size = size;
3978
3979         memcpy(vcpu->arch.pio_data, val, size * count);
3980
3981         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3982                 vcpu->arch.pio.count = 0;
3983                 return 1;
3984         }
3985
3986         vcpu->run->exit_reason = KVM_EXIT_IO;
3987         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3988         vcpu->run->io.size = size;
3989         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3990         vcpu->run->io.count = count;
3991         vcpu->run->io.port = port;
3992
3993         return 0;
3994 }
3995
3996 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3997 {
3998         return kvm_x86_ops->get_segment_base(vcpu, seg);
3999 }
4000
4001 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4002 {
4003         kvm_mmu_invlpg(vcpu, address);
4004         return X86EMUL_CONTINUE;
4005 }
4006
4007 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4008 {
4009         if (!need_emulate_wbinvd(vcpu))
4010                 return X86EMUL_CONTINUE;
4011
4012         if (kvm_x86_ops->has_wbinvd_exit()) {
4013                 int cpu = get_cpu();
4014
4015                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4016                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4017                                 wbinvd_ipi, NULL, 1);
4018                 put_cpu();
4019                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4020         } else
4021                 wbinvd();
4022         return X86EMUL_CONTINUE;
4023 }
4024 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4025
4026 int emulate_clts(struct kvm_vcpu *vcpu)
4027 {
4028         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4029         kvm_x86_ops->fpu_activate(vcpu);
4030         return X86EMUL_CONTINUE;
4031 }
4032
4033 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4034 {
4035         return _kvm_get_dr(vcpu, dr, dest);
4036 }
4037
4038 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4039 {
4040
4041         return __kvm_set_dr(vcpu, dr, value);
4042 }
4043
4044 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4045 {
4046         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4047 }
4048
4049 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4050 {
4051         unsigned long value;
4052
4053         switch (cr) {
4054         case 0:
4055                 value = kvm_read_cr0(vcpu);
4056                 break;
4057         case 2:
4058                 value = vcpu->arch.cr2;
4059                 break;
4060         case 3:
4061                 value = vcpu->arch.cr3;
4062                 break;
4063         case 4:
4064                 value = kvm_read_cr4(vcpu);
4065                 break;
4066         case 8:
4067                 value = kvm_get_cr8(vcpu);
4068                 break;
4069         default:
4070                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4071                 return 0;
4072         }
4073
4074         return value;
4075 }
4076
4077 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4078 {
4079         int res = 0;
4080
4081         switch (cr) {
4082         case 0:
4083                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4084                 break;
4085         case 2:
4086                 vcpu->arch.cr2 = val;
4087                 break;
4088         case 3:
4089                 res = kvm_set_cr3(vcpu, val);
4090                 break;
4091         case 4:
4092                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4093                 break;
4094         case 8:
4095                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4096                 break;
4097         default:
4098                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4099                 res = -1;
4100         }
4101
4102         return res;
4103 }
4104
4105 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4106 {
4107         return kvm_x86_ops->get_cpl(vcpu);
4108 }
4109
4110 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4111 {
4112         kvm_x86_ops->get_gdt(vcpu, dt);
4113 }
4114
4115 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4116 {
4117         kvm_x86_ops->get_idt(vcpu, dt);
4118 }
4119
4120 static unsigned long emulator_get_cached_segment_base(int seg,
4121                                                       struct kvm_vcpu *vcpu)
4122 {
4123         return get_segment_base(vcpu, seg);
4124 }
4125
4126 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4127                                            struct kvm_vcpu *vcpu)
4128 {
4129         struct kvm_segment var;
4130
4131         kvm_get_segment(vcpu, &var, seg);
4132
4133         if (var.unusable)
4134                 return false;
4135
4136         if (var.g)
4137                 var.limit >>= 12;
4138         set_desc_limit(desc, var.limit);
4139         set_desc_base(desc, (unsigned long)var.base);
4140         desc->type = var.type;
4141         desc->s = var.s;
4142         desc->dpl = var.dpl;
4143         desc->p = var.present;
4144         desc->avl = var.avl;
4145         desc->l = var.l;
4146         desc->d = var.db;
4147         desc->g = var.g;
4148
4149         return true;
4150 }
4151
4152 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4153                                            struct kvm_vcpu *vcpu)
4154 {
4155         struct kvm_segment var;
4156
4157         /* needed to preserve selector */
4158         kvm_get_segment(vcpu, &var, seg);
4159
4160         var.base = get_desc_base(desc);
4161         var.limit = get_desc_limit(desc);
4162         if (desc->g)
4163                 var.limit = (var.limit << 12) | 0xfff;
4164         var.type = desc->type;
4165         var.present = desc->p;
4166         var.dpl = desc->dpl;
4167         var.db = desc->d;
4168         var.s = desc->s;
4169         var.l = desc->l;
4170         var.g = desc->g;
4171         var.avl = desc->avl;
4172         var.present = desc->p;
4173         var.unusable = !var.present;
4174         var.padding = 0;
4175
4176         kvm_set_segment(vcpu, &var, seg);
4177         return;
4178 }
4179
4180 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4181 {
4182         struct kvm_segment kvm_seg;
4183
4184         kvm_get_segment(vcpu, &kvm_seg, seg);
4185         return kvm_seg.selector;
4186 }
4187
4188 static void emulator_set_segment_selector(u16 sel, int seg,
4189                                           struct kvm_vcpu *vcpu)
4190 {
4191         struct kvm_segment kvm_seg;
4192
4193         kvm_get_segment(vcpu, &kvm_seg, seg);
4194         kvm_seg.selector = sel;
4195         kvm_set_segment(vcpu, &kvm_seg, seg);
4196 }
4197
4198 static struct x86_emulate_ops emulate_ops = {
4199         .read_std            = kvm_read_guest_virt_system,
4200         .write_std           = kvm_write_guest_virt_system,
4201         .fetch               = kvm_fetch_guest_virt,
4202         .read_emulated       = emulator_read_emulated,
4203         .write_emulated      = emulator_write_emulated,
4204         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4205         .pio_in_emulated     = emulator_pio_in_emulated,
4206         .pio_out_emulated    = emulator_pio_out_emulated,
4207         .get_cached_descriptor = emulator_get_cached_descriptor,
4208         .set_cached_descriptor = emulator_set_cached_descriptor,
4209         .get_segment_selector = emulator_get_segment_selector,
4210         .set_segment_selector = emulator_set_segment_selector,
4211         .get_cached_segment_base = emulator_get_cached_segment_base,
4212         .get_gdt             = emulator_get_gdt,
4213         .get_idt             = emulator_get_idt,
4214         .get_cr              = emulator_get_cr,
4215         .set_cr              = emulator_set_cr,
4216         .cpl                 = emulator_get_cpl,
4217         .get_dr              = emulator_get_dr,
4218         .set_dr              = emulator_set_dr,
4219         .set_msr             = kvm_set_msr,
4220         .get_msr             = kvm_get_msr,
4221 };
4222
4223 static void cache_all_regs(struct kvm_vcpu *vcpu)
4224 {
4225         kvm_register_read(vcpu, VCPU_REGS_RAX);
4226         kvm_register_read(vcpu, VCPU_REGS_RSP);
4227         kvm_register_read(vcpu, VCPU_REGS_RIP);
4228         vcpu->arch.regs_dirty = ~0;
4229 }
4230
4231 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4232 {
4233         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4234         /*
4235          * an sti; sti; sequence only disable interrupts for the first
4236          * instruction. So, if the last instruction, be it emulated or
4237          * not, left the system with the INT_STI flag enabled, it
4238          * means that the last instruction is an sti. We should not
4239          * leave the flag on in this case. The same goes for mov ss
4240          */
4241         if (!(int_shadow & mask))
4242                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4243 }
4244
4245 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4246 {
4247         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4248         if (ctxt->exception == PF_VECTOR)
4249                 kvm_propagate_fault(vcpu);
4250         else if (ctxt->error_code_valid)
4251                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4252         else
4253                 kvm_queue_exception(vcpu, ctxt->exception);
4254 }
4255
4256 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4257 {
4258         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4259         int cs_db, cs_l;
4260
4261         cache_all_regs(vcpu);
4262
4263         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4264
4265         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4266         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4267         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4268         vcpu->arch.emulate_ctxt.mode =
4269                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4270                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4271                 ? X86EMUL_MODE_VM86 : cs_l
4272                 ? X86EMUL_MODE_PROT64 : cs_db
4273                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4274         memset(c, 0, sizeof(struct decode_cache));
4275         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4276 }
4277
4278 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4279 {
4280         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4281         int ret;
4282
4283         init_emulate_ctxt(vcpu);
4284
4285         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4286         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4287         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4288         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4289
4290         if (ret != X86EMUL_CONTINUE)
4291                 return EMULATE_FAIL;
4292
4293         vcpu->arch.emulate_ctxt.eip = c->eip;
4294         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4295         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4296         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4297
4298         if (irq == NMI_VECTOR)
4299                 vcpu->arch.nmi_pending = false;
4300         else
4301                 vcpu->arch.interrupt.pending = false;
4302
4303         return EMULATE_DONE;
4304 }
4305 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4306
4307 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4308 {
4309         ++vcpu->stat.insn_emulation_fail;
4310         trace_kvm_emulate_insn_failed(vcpu);
4311         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4312         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4313         vcpu->run->internal.ndata = 0;
4314         kvm_queue_exception(vcpu, UD_VECTOR);
4315         return EMULATE_FAIL;
4316 }
4317
4318 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4319 {
4320         gpa_t gpa;
4321
4322         if (tdp_enabled)
4323                 return false;
4324
4325         /*
4326          * if emulation was due to access to shadowed page table
4327          * and it failed try to unshadow page and re-entetr the
4328          * guest to let CPU execute the instruction.
4329          */
4330         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4331                 return true;
4332
4333         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4334
4335         if (gpa == UNMAPPED_GVA)
4336                 return true; /* let cpu generate fault */
4337
4338         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4339                 return true;
4340
4341         return false;
4342 }
4343
4344 int emulate_instruction(struct kvm_vcpu *vcpu,
4345                         unsigned long cr2,
4346                         u16 error_code,
4347                         int emulation_type)
4348 {
4349         int r;
4350         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4351
4352         kvm_clear_exception_queue(vcpu);
4353         vcpu->arch.mmio_fault_cr2 = cr2;
4354         /*
4355          * TODO: fix emulate.c to use guest_read/write_register
4356          * instead of direct ->regs accesses, can save hundred cycles
4357          * on Intel for instructions that don't read/change RSP, for
4358          * for example.
4359          */
4360         cache_all_regs(vcpu);
4361
4362         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4363                 init_emulate_ctxt(vcpu);
4364                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4365                 vcpu->arch.emulate_ctxt.exception = -1;
4366                 vcpu->arch.emulate_ctxt.perm_ok = false;
4367
4368                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4369                 if (r == X86EMUL_PROPAGATE_FAULT)
4370                         goto done;
4371
4372                 trace_kvm_emulate_insn_start(vcpu);
4373
4374                 /* Only allow emulation of specific instructions on #UD
4375                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4376                 if (emulation_type & EMULTYPE_TRAP_UD) {
4377                         if (!c->twobyte)
4378                                 return EMULATE_FAIL;
4379                         switch (c->b) {
4380                         case 0x01: /* VMMCALL */
4381                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4382                                         return EMULATE_FAIL;
4383                                 break;
4384                         case 0x34: /* sysenter */
4385                         case 0x35: /* sysexit */
4386                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4387                                         return EMULATE_FAIL;
4388                                 break;
4389                         case 0x05: /* syscall */
4390                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4391                                         return EMULATE_FAIL;
4392                                 break;
4393                         default:
4394                                 return EMULATE_FAIL;
4395                         }
4396
4397                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4398                                 return EMULATE_FAIL;
4399                 }
4400
4401                 ++vcpu->stat.insn_emulation;
4402                 if (r)  {
4403                         if (reexecute_instruction(vcpu, cr2))
4404                                 return EMULATE_DONE;
4405                         if (emulation_type & EMULTYPE_SKIP)
4406                                 return EMULATE_FAIL;
4407                         return handle_emulation_failure(vcpu);
4408                 }
4409         }
4410
4411         if (emulation_type & EMULTYPE_SKIP) {
4412                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4413                 return EMULATE_DONE;
4414         }
4415
4416         /* this is needed for vmware backdor interface to work since it
4417            changes registers values  during IO operation */
4418         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4419
4420 restart:
4421         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4422
4423         if (r == EMULATION_FAILED) {
4424                 if (reexecute_instruction(vcpu, cr2))
4425                         return EMULATE_DONE;
4426
4427                 return handle_emulation_failure(vcpu);
4428         }
4429
4430 done:
4431         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4432                 inject_emulated_exception(vcpu);
4433                 r = EMULATE_DONE;
4434         } else if (vcpu->arch.pio.count) {
4435                 if (!vcpu->arch.pio.in)
4436                         vcpu->arch.pio.count = 0;
4437                 r = EMULATE_DO_MMIO;
4438         } else if (vcpu->mmio_needed) {
4439                 if (vcpu->mmio_is_write)
4440                         vcpu->mmio_needed = 0;
4441                 r = EMULATE_DO_MMIO;
4442         } else if (r == EMULATION_RESTART)
4443                 goto restart;
4444         else
4445                 r = EMULATE_DONE;
4446
4447         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4448         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4449         kvm_make_request(KVM_REQ_EVENT, vcpu);
4450         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4451         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4452
4453         return r;
4454 }
4455 EXPORT_SYMBOL_GPL(emulate_instruction);
4456
4457 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4458 {
4459         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4460         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4461         /* do not return to emulator after return from userspace */
4462         vcpu->arch.pio.count = 0;
4463         return ret;
4464 }
4465 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4466
4467 static void tsc_bad(void *info)
4468 {
4469         __get_cpu_var(cpu_tsc_khz) = 0;
4470 }
4471
4472 static void tsc_khz_changed(void *data)
4473 {
4474         struct cpufreq_freqs *freq = data;
4475         unsigned long khz = 0;
4476
4477         if (data)
4478                 khz = freq->new;
4479         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4480                 khz = cpufreq_quick_get(raw_smp_processor_id());
4481         if (!khz)
4482                 khz = tsc_khz;
4483         __get_cpu_var(cpu_tsc_khz) = khz;
4484 }
4485
4486 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4487                                      void *data)
4488 {
4489         struct cpufreq_freqs *freq = data;
4490         struct kvm *kvm;
4491         struct kvm_vcpu *vcpu;
4492         int i, send_ipi = 0;
4493
4494         /*
4495          * We allow guests to temporarily run on slowing clocks,
4496          * provided we notify them after, or to run on accelerating
4497          * clocks, provided we notify them before.  Thus time never
4498          * goes backwards.
4499          *
4500          * However, we have a problem.  We can't atomically update
4501          * the frequency of a given CPU from this function; it is
4502          * merely a notifier, which can be called from any CPU.
4503          * Changing the TSC frequency at arbitrary points in time
4504          * requires a recomputation of local variables related to
4505          * the TSC for each VCPU.  We must flag these local variables
4506          * to be updated and be sure the update takes place with the
4507          * new frequency before any guests proceed.
4508          *
4509          * Unfortunately, the combination of hotplug CPU and frequency
4510          * change creates an intractable locking scenario; the order
4511          * of when these callouts happen is undefined with respect to
4512          * CPU hotplug, and they can race with each other.  As such,
4513          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4514          * undefined; you can actually have a CPU frequency change take
4515          * place in between the computation of X and the setting of the
4516          * variable.  To protect against this problem, all updates of
4517          * the per_cpu tsc_khz variable are done in an interrupt
4518          * protected IPI, and all callers wishing to update the value
4519          * must wait for a synchronous IPI to complete (which is trivial
4520          * if the caller is on the CPU already).  This establishes the
4521          * necessary total order on variable updates.
4522          *
4523          * Note that because a guest time update may take place
4524          * anytime after the setting of the VCPU's request bit, the
4525          * correct TSC value must be set before the request.  However,
4526          * to ensure the update actually makes it to any guest which
4527          * starts running in hardware virtualization between the set
4528          * and the acquisition of the spinlock, we must also ping the
4529          * CPU after setting the request bit.
4530          *
4531          */
4532
4533         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4534                 return 0;
4535         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4536                 return 0;
4537
4538         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4539
4540         spin_lock(&kvm_lock);
4541         list_for_each_entry(kvm, &vm_list, vm_list) {
4542                 kvm_for_each_vcpu(i, vcpu, kvm) {
4543                         if (vcpu->cpu != freq->cpu)
4544                                 continue;
4545                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4546                         if (vcpu->cpu != smp_processor_id())
4547                                 send_ipi = 1;
4548                 }
4549         }
4550         spin_unlock(&kvm_lock);
4551
4552         if (freq->old < freq->new && send_ipi) {
4553                 /*
4554                  * We upscale the frequency.  Must make the guest
4555                  * doesn't see old kvmclock values while running with
4556                  * the new frequency, otherwise we risk the guest sees
4557                  * time go backwards.
4558                  *
4559                  * In case we update the frequency for another cpu
4560                  * (which might be in guest context) send an interrupt
4561                  * to kick the cpu out of guest context.  Next time
4562                  * guest context is entered kvmclock will be updated,
4563                  * so the guest will not see stale values.
4564                  */
4565                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4566         }
4567         return 0;
4568 }
4569
4570 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4571         .notifier_call  = kvmclock_cpufreq_notifier
4572 };
4573
4574 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4575                                         unsigned long action, void *hcpu)
4576 {
4577         unsigned int cpu = (unsigned long)hcpu;
4578
4579         switch (action) {
4580                 case CPU_ONLINE:
4581                 case CPU_DOWN_FAILED:
4582                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4583                         break;
4584                 case CPU_DOWN_PREPARE:
4585                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4586                         break;
4587         }
4588         return NOTIFY_OK;
4589 }
4590
4591 static struct notifier_block kvmclock_cpu_notifier_block = {
4592         .notifier_call  = kvmclock_cpu_notifier,
4593         .priority = -INT_MAX
4594 };
4595
4596 static void kvm_timer_init(void)
4597 {
4598         int cpu;
4599
4600         max_tsc_khz = tsc_khz;
4601         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4602         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4603 #ifdef CONFIG_CPU_FREQ
4604                 struct cpufreq_policy policy;
4605                 memset(&policy, 0, sizeof(policy));
4606                 cpu = get_cpu();
4607                 cpufreq_get_policy(&policy, cpu);
4608                 if (policy.cpuinfo.max_freq)
4609                         max_tsc_khz = policy.cpuinfo.max_freq;
4610                 put_cpu();
4611 #endif
4612                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4613                                           CPUFREQ_TRANSITION_NOTIFIER);
4614         }
4615         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4616         for_each_online_cpu(cpu)
4617                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4618 }
4619
4620 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4621
4622 static int kvm_is_in_guest(void)
4623 {
4624         return percpu_read(current_vcpu) != NULL;
4625 }
4626
4627 static int kvm_is_user_mode(void)
4628 {
4629         int user_mode = 3;
4630
4631         if (percpu_read(current_vcpu))
4632                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4633
4634         return user_mode != 0;
4635 }
4636
4637 static unsigned long kvm_get_guest_ip(void)
4638 {
4639         unsigned long ip = 0;
4640
4641         if (percpu_read(current_vcpu))
4642                 ip = kvm_rip_read(percpu_read(current_vcpu));
4643
4644         return ip;
4645 }
4646
4647 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4648         .is_in_guest            = kvm_is_in_guest,
4649         .is_user_mode           = kvm_is_user_mode,
4650         .get_guest_ip           = kvm_get_guest_ip,
4651 };
4652
4653 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4654 {
4655         percpu_write(current_vcpu, vcpu);
4656 }
4657 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4658
4659 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4660 {
4661         percpu_write(current_vcpu, NULL);
4662 }
4663 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4664
4665 int kvm_arch_init(void *opaque)
4666 {
4667         int r;
4668         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4669
4670         if (kvm_x86_ops) {
4671                 printk(KERN_ERR "kvm: already loaded the other module\n");
4672                 r = -EEXIST;
4673                 goto out;
4674         }
4675
4676         if (!ops->cpu_has_kvm_support()) {
4677                 printk(KERN_ERR "kvm: no hardware support\n");
4678                 r = -EOPNOTSUPP;
4679                 goto out;
4680         }
4681         if (ops->disabled_by_bios()) {
4682                 printk(KERN_ERR "kvm: disabled by bios\n");
4683                 r = -EOPNOTSUPP;
4684                 goto out;
4685         }
4686
4687         r = kvm_mmu_module_init();
4688         if (r)
4689                 goto out;
4690
4691         kvm_init_msr_list();
4692
4693         kvm_x86_ops = ops;
4694         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4695         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4696                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4697
4698         kvm_timer_init();
4699
4700         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4701
4702         if (cpu_has_xsave)
4703                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4704
4705         return 0;
4706
4707 out:
4708         return r;
4709 }
4710
4711 void kvm_arch_exit(void)
4712 {
4713         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4714
4715         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4716                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4717                                             CPUFREQ_TRANSITION_NOTIFIER);
4718         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4719         kvm_x86_ops = NULL;
4720         kvm_mmu_module_exit();
4721 }
4722
4723 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4724 {
4725         ++vcpu->stat.halt_exits;
4726         if (irqchip_in_kernel(vcpu->kvm)) {
4727                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4728                 return 1;
4729         } else {
4730                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4731                 return 0;
4732         }
4733 }
4734 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4735
4736 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4737                            unsigned long a1)
4738 {
4739         if (is_long_mode(vcpu))
4740                 return a0;
4741         else
4742                 return a0 | ((gpa_t)a1 << 32);
4743 }
4744
4745 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4746 {
4747         u64 param, ingpa, outgpa, ret;
4748         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4749         bool fast, longmode;
4750         int cs_db, cs_l;
4751
4752         /*
4753          * hypercall generates UD from non zero cpl and real mode
4754          * per HYPER-V spec
4755          */
4756         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4757                 kvm_queue_exception(vcpu, UD_VECTOR);
4758                 return 0;
4759         }
4760
4761         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4762         longmode = is_long_mode(vcpu) && cs_l == 1;
4763
4764         if (!longmode) {
4765                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4766                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4767                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4768                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4769                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4770                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4771         }
4772 #ifdef CONFIG_X86_64
4773         else {
4774                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4775                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4776                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4777         }
4778 #endif
4779
4780         code = param & 0xffff;
4781         fast = (param >> 16) & 0x1;
4782         rep_cnt = (param >> 32) & 0xfff;
4783         rep_idx = (param >> 48) & 0xfff;
4784
4785         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4786
4787         switch (code) {
4788         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4789                 kvm_vcpu_on_spin(vcpu);
4790                 break;
4791         default:
4792                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4793                 break;
4794         }
4795
4796         ret = res | (((u64)rep_done & 0xfff) << 32);
4797         if (longmode) {
4798                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4799         } else {
4800                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4801                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4802         }
4803
4804         return 1;
4805 }
4806
4807 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4808 {
4809         unsigned long nr, a0, a1, a2, a3, ret;
4810         int r = 1;
4811
4812         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4813                 return kvm_hv_hypercall(vcpu);
4814
4815         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4816         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4817         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4818         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4819         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4820
4821         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4822
4823         if (!is_long_mode(vcpu)) {
4824                 nr &= 0xFFFFFFFF;
4825                 a0 &= 0xFFFFFFFF;
4826                 a1 &= 0xFFFFFFFF;
4827                 a2 &= 0xFFFFFFFF;
4828                 a3 &= 0xFFFFFFFF;
4829         }
4830
4831         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4832                 ret = -KVM_EPERM;
4833                 goto out;
4834         }
4835
4836         switch (nr) {
4837         case KVM_HC_VAPIC_POLL_IRQ:
4838                 ret = 0;
4839                 break;
4840         case KVM_HC_MMU_OP:
4841                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4842                 break;
4843         default:
4844                 ret = -KVM_ENOSYS;
4845                 break;
4846         }
4847 out:
4848         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4849         ++vcpu->stat.hypercalls;
4850         return r;
4851 }
4852 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4853
4854 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4855 {
4856         char instruction[3];
4857         unsigned long rip = kvm_rip_read(vcpu);
4858
4859         /*
4860          * Blow out the MMU to ensure that no other VCPU has an active mapping
4861          * to ensure that the updated hypercall appears atomically across all
4862          * VCPUs.
4863          */
4864         kvm_mmu_zap_all(vcpu->kvm);
4865
4866         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4867
4868         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4869 }
4870
4871 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4872 {
4873         struct desc_ptr dt = { limit, base };
4874
4875         kvm_x86_ops->set_gdt(vcpu, &dt);
4876 }
4877
4878 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4879 {
4880         struct desc_ptr dt = { limit, base };
4881
4882         kvm_x86_ops->set_idt(vcpu, &dt);
4883 }
4884
4885 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4886 {
4887         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4888         int j, nent = vcpu->arch.cpuid_nent;
4889
4890         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4891         /* when no next entry is found, the current entry[i] is reselected */
4892         for (j = i + 1; ; j = (j + 1) % nent) {
4893                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4894                 if (ej->function == e->function) {
4895                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4896                         return j;
4897                 }
4898         }
4899         return 0; /* silence gcc, even though control never reaches here */
4900 }
4901
4902 /* find an entry with matching function, matching index (if needed), and that
4903  * should be read next (if it's stateful) */
4904 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4905         u32 function, u32 index)
4906 {
4907         if (e->function != function)
4908                 return 0;
4909         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4910                 return 0;
4911         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4912             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4913                 return 0;
4914         return 1;
4915 }
4916
4917 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4918                                               u32 function, u32 index)
4919 {
4920         int i;
4921         struct kvm_cpuid_entry2 *best = NULL;
4922
4923         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4924                 struct kvm_cpuid_entry2 *e;
4925
4926                 e = &vcpu->arch.cpuid_entries[i];
4927                 if (is_matching_cpuid_entry(e, function, index)) {
4928                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4929                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4930                         best = e;
4931                         break;
4932                 }
4933                 /*
4934                  * Both basic or both extended?
4935                  */
4936                 if (((e->function ^ function) & 0x80000000) == 0)
4937                         if (!best || e->function > best->function)
4938                                 best = e;
4939         }
4940         return best;
4941 }
4942 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4943
4944 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4945 {
4946         struct kvm_cpuid_entry2 *best;
4947
4948         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4949         if (!best || best->eax < 0x80000008)
4950                 goto not_found;
4951         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4952         if (best)
4953                 return best->eax & 0xff;
4954 not_found:
4955         return 36;
4956 }
4957
4958 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4959 {
4960         u32 function, index;
4961         struct kvm_cpuid_entry2 *best;
4962
4963         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4964         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4965         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4966         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4967         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4968         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4969         best = kvm_find_cpuid_entry(vcpu, function, index);
4970         if (best) {
4971                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4972                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4973                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4974                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4975         }
4976         kvm_x86_ops->skip_emulated_instruction(vcpu);
4977         trace_kvm_cpuid(function,
4978                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4979                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4980                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4981                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4982 }
4983 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4984
4985 /*
4986  * Check if userspace requested an interrupt window, and that the
4987  * interrupt window is open.
4988  *
4989  * No need to exit to userspace if we already have an interrupt queued.
4990  */
4991 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4992 {
4993         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4994                 vcpu->run->request_interrupt_window &&
4995                 kvm_arch_interrupt_allowed(vcpu));
4996 }
4997
4998 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4999 {
5000         struct kvm_run *kvm_run = vcpu->run;
5001
5002         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5003         kvm_run->cr8 = kvm_get_cr8(vcpu);
5004         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5005         if (irqchip_in_kernel(vcpu->kvm))
5006                 kvm_run->ready_for_interrupt_injection = 1;
5007         else
5008                 kvm_run->ready_for_interrupt_injection =
5009                         kvm_arch_interrupt_allowed(vcpu) &&
5010                         !kvm_cpu_has_interrupt(vcpu) &&
5011                         !kvm_event_needs_reinjection(vcpu);
5012 }
5013
5014 static void vapic_enter(struct kvm_vcpu *vcpu)
5015 {
5016         struct kvm_lapic *apic = vcpu->arch.apic;
5017         struct page *page;
5018
5019         if (!apic || !apic->vapic_addr)
5020                 return;
5021
5022         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5023
5024         vcpu->arch.apic->vapic_page = page;
5025 }
5026
5027 static void vapic_exit(struct kvm_vcpu *vcpu)
5028 {
5029         struct kvm_lapic *apic = vcpu->arch.apic;
5030         int idx;
5031
5032         if (!apic || !apic->vapic_addr)
5033                 return;
5034
5035         idx = srcu_read_lock(&vcpu->kvm->srcu);
5036         kvm_release_page_dirty(apic->vapic_page);
5037         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5038         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5039 }
5040
5041 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5042 {
5043         int max_irr, tpr;
5044
5045         if (!kvm_x86_ops->update_cr8_intercept)
5046                 return;
5047
5048         if (!vcpu->arch.apic)
5049                 return;
5050
5051         if (!vcpu->arch.apic->vapic_addr)
5052                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5053         else
5054                 max_irr = -1;
5055
5056         if (max_irr != -1)
5057                 max_irr >>= 4;
5058
5059         tpr = kvm_lapic_get_cr8(vcpu);
5060
5061         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5062 }
5063
5064 static void inject_pending_event(struct kvm_vcpu *vcpu)
5065 {
5066         /* try to reinject previous events if any */
5067         if (vcpu->arch.exception.pending) {
5068                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5069                                         vcpu->arch.exception.has_error_code,
5070                                         vcpu->arch.exception.error_code);
5071                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5072                                           vcpu->arch.exception.has_error_code,
5073                                           vcpu->arch.exception.error_code,
5074                                           vcpu->arch.exception.reinject);
5075                 return;
5076         }
5077
5078         if (vcpu->arch.nmi_injected) {
5079                 kvm_x86_ops->set_nmi(vcpu);
5080                 return;
5081         }
5082
5083         if (vcpu->arch.interrupt.pending) {
5084                 kvm_x86_ops->set_irq(vcpu);
5085                 return;
5086         }
5087
5088         /* try to inject new event if pending */
5089         if (vcpu->arch.nmi_pending) {
5090                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5091                         vcpu->arch.nmi_pending = false;
5092                         vcpu->arch.nmi_injected = true;
5093                         kvm_x86_ops->set_nmi(vcpu);
5094                 }
5095         } else if (kvm_cpu_has_interrupt(vcpu)) {
5096                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5097                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5098                                             false);
5099                         kvm_x86_ops->set_irq(vcpu);
5100                 }
5101         }
5102 }
5103
5104 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5105 {
5106         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5107                         !vcpu->guest_xcr0_loaded) {
5108                 /* kvm_set_xcr() also depends on this */
5109                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5110                 vcpu->guest_xcr0_loaded = 1;
5111         }
5112 }
5113
5114 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5115 {
5116         if (vcpu->guest_xcr0_loaded) {
5117                 if (vcpu->arch.xcr0 != host_xcr0)
5118                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5119                 vcpu->guest_xcr0_loaded = 0;
5120         }
5121 }
5122
5123 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5124 {
5125         int r;
5126         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5127                 vcpu->run->request_interrupt_window;
5128
5129         if (vcpu->requests) {
5130                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5131                         kvm_mmu_unload(vcpu);
5132                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5133                         __kvm_migrate_timers(vcpu);
5134                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5135                         r = kvm_guest_time_update(vcpu);
5136                         if (unlikely(r))
5137                                 goto out;
5138                 }
5139                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5140                         kvm_mmu_sync_roots(vcpu);
5141                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5142                         kvm_x86_ops->tlb_flush(vcpu);
5143                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5144                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5145                         r = 0;
5146                         goto out;
5147                 }
5148                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5149                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5150                         r = 0;
5151                         goto out;
5152                 }
5153                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5154                         vcpu->fpu_active = 0;
5155                         kvm_x86_ops->fpu_deactivate(vcpu);
5156                 }
5157                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5158                         /* Page is swapped out. Do synthetic halt */
5159                         vcpu->arch.apf.halted = true;
5160                         r = 1;
5161                         goto out;
5162                 }
5163         }
5164
5165         r = kvm_mmu_reload(vcpu);
5166         if (unlikely(r))
5167                 goto out;
5168
5169         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5170                 inject_pending_event(vcpu);
5171
5172                 /* enable NMI/IRQ window open exits if needed */
5173                 if (vcpu->arch.nmi_pending)
5174                         kvm_x86_ops->enable_nmi_window(vcpu);
5175                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5176                         kvm_x86_ops->enable_irq_window(vcpu);
5177
5178                 if (kvm_lapic_enabled(vcpu)) {
5179                         update_cr8_intercept(vcpu);
5180                         kvm_lapic_sync_to_vapic(vcpu);
5181                 }
5182         }
5183
5184         preempt_disable();
5185
5186         kvm_x86_ops->prepare_guest_switch(vcpu);
5187         if (vcpu->fpu_active)
5188                 kvm_load_guest_fpu(vcpu);
5189         kvm_load_guest_xcr0(vcpu);
5190
5191         atomic_set(&vcpu->guest_mode, 1);
5192         smp_wmb();
5193
5194         local_irq_disable();
5195
5196         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5197             || need_resched() || signal_pending(current)) {
5198                 atomic_set(&vcpu->guest_mode, 0);
5199                 smp_wmb();
5200                 local_irq_enable();
5201                 preempt_enable();
5202                 kvm_x86_ops->cancel_injection(vcpu);
5203                 r = 1;
5204                 goto out;
5205         }
5206
5207         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5208
5209         kvm_guest_enter();
5210
5211         if (unlikely(vcpu->arch.switch_db_regs)) {
5212                 set_debugreg(0, 7);
5213                 set_debugreg(vcpu->arch.eff_db[0], 0);
5214                 set_debugreg(vcpu->arch.eff_db[1], 1);
5215                 set_debugreg(vcpu->arch.eff_db[2], 2);
5216                 set_debugreg(vcpu->arch.eff_db[3], 3);
5217         }
5218
5219         trace_kvm_entry(vcpu->vcpu_id);
5220         kvm_x86_ops->run(vcpu);
5221
5222         /*
5223          * If the guest has used debug registers, at least dr7
5224          * will be disabled while returning to the host.
5225          * If we don't have active breakpoints in the host, we don't
5226          * care about the messed up debug address registers. But if
5227          * we have some of them active, restore the old state.
5228          */
5229         if (hw_breakpoint_active())
5230                 hw_breakpoint_restore();
5231
5232         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5233
5234         atomic_set(&vcpu->guest_mode, 0);
5235         smp_wmb();
5236         local_irq_enable();
5237
5238         ++vcpu->stat.exits;
5239
5240         /*
5241          * We must have an instruction between local_irq_enable() and
5242          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5243          * the interrupt shadow.  The stat.exits increment will do nicely.
5244          * But we need to prevent reordering, hence this barrier():
5245          */
5246         barrier();
5247
5248         kvm_guest_exit();
5249
5250         preempt_enable();
5251
5252         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5253
5254         /*
5255          * Profile KVM exit RIPs:
5256          */
5257         if (unlikely(prof_on == KVM_PROFILING)) {
5258                 unsigned long rip = kvm_rip_read(vcpu);
5259                 profile_hit(KVM_PROFILING, (void *)rip);
5260         }
5261
5262
5263         kvm_lapic_sync_from_vapic(vcpu);
5264
5265         r = kvm_x86_ops->handle_exit(vcpu);
5266 out:
5267         return r;
5268 }
5269
5270
5271 static int __vcpu_run(struct kvm_vcpu *vcpu)
5272 {
5273         int r;
5274         struct kvm *kvm = vcpu->kvm;
5275
5276         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5277                 pr_debug("vcpu %d received sipi with vector # %x\n",
5278                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5279                 kvm_lapic_reset(vcpu);
5280                 r = kvm_arch_vcpu_reset(vcpu);
5281                 if (r)
5282                         return r;
5283                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5284         }
5285
5286         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5287         vapic_enter(vcpu);
5288
5289         r = 1;
5290         while (r > 0) {
5291                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5292                     !vcpu->arch.apf.halted)
5293                         r = vcpu_enter_guest(vcpu);
5294                 else {
5295                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5296                         kvm_vcpu_block(vcpu);
5297                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5298                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5299                         {
5300                                 switch(vcpu->arch.mp_state) {
5301                                 case KVM_MP_STATE_HALTED:
5302                                         vcpu->arch.mp_state =
5303                                                 KVM_MP_STATE_RUNNABLE;
5304                                 case KVM_MP_STATE_RUNNABLE:
5305                                         vcpu->arch.apf.halted = false;
5306                                         break;
5307                                 case KVM_MP_STATE_SIPI_RECEIVED:
5308                                 default:
5309                                         r = -EINTR;
5310                                         break;
5311                                 }
5312                         }
5313                 }
5314
5315                 if (r <= 0)
5316                         break;
5317
5318                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5319                 if (kvm_cpu_has_pending_timer(vcpu))
5320                         kvm_inject_pending_timer_irqs(vcpu);
5321
5322                 if (dm_request_for_irq_injection(vcpu)) {
5323                         r = -EINTR;
5324                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5325                         ++vcpu->stat.request_irq_exits;
5326                 }
5327
5328                 kvm_check_async_pf_completion(vcpu);
5329
5330                 if (signal_pending(current)) {
5331                         r = -EINTR;
5332                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5333                         ++vcpu->stat.signal_exits;
5334                 }
5335                 if (need_resched()) {
5336                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5337                         kvm_resched(vcpu);
5338                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5339                 }
5340         }
5341
5342         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5343
5344         vapic_exit(vcpu);
5345
5346         return r;
5347 }
5348
5349 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5350 {
5351         int r;
5352         sigset_t sigsaved;
5353
5354         if (vcpu->sigset_active)
5355                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5356
5357         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5358                 kvm_vcpu_block(vcpu);
5359                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5360                 r = -EAGAIN;
5361                 goto out;
5362         }
5363
5364         /* re-sync apic's tpr */
5365         if (!irqchip_in_kernel(vcpu->kvm))
5366                 kvm_set_cr8(vcpu, kvm_run->cr8);
5367
5368         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5369                 if (vcpu->mmio_needed) {
5370                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5371                         vcpu->mmio_read_completed = 1;
5372                         vcpu->mmio_needed = 0;
5373                 }
5374                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5375                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5376                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5377                 if (r != EMULATE_DONE) {
5378                         r = 0;
5379                         goto out;
5380                 }
5381         }
5382         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5383                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5384                                      kvm_run->hypercall.ret);
5385
5386         r = __vcpu_run(vcpu);
5387
5388 out:
5389         post_kvm_run_save(vcpu);
5390         if (vcpu->sigset_active)
5391                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5392
5393         return r;
5394 }
5395
5396 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5397 {
5398         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5399         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5400         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5401         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5402         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5403         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5404         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5405         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5406 #ifdef CONFIG_X86_64
5407         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5408         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5409         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5410         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5411         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5412         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5413         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5414         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5415 #endif
5416
5417         regs->rip = kvm_rip_read(vcpu);
5418         regs->rflags = kvm_get_rflags(vcpu);
5419
5420         return 0;
5421 }
5422
5423 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5424 {
5425         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5426         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5427         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5428         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5429         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5430         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5431         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5432         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5433 #ifdef CONFIG_X86_64
5434         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5435         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5436         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5437         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5438         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5439         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5440         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5441         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5442 #endif
5443
5444         kvm_rip_write(vcpu, regs->rip);
5445         kvm_set_rflags(vcpu, regs->rflags);
5446
5447         vcpu->arch.exception.pending = false;
5448
5449         kvm_make_request(KVM_REQ_EVENT, vcpu);
5450
5451         return 0;
5452 }
5453
5454 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5455 {
5456         struct kvm_segment cs;
5457
5458         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5459         *db = cs.db;
5460         *l = cs.l;
5461 }
5462 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5463
5464 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5465                                   struct kvm_sregs *sregs)
5466 {
5467         struct desc_ptr dt;
5468
5469         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5470         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5471         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5472         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5473         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5474         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5475
5476         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5477         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5478
5479         kvm_x86_ops->get_idt(vcpu, &dt);
5480         sregs->idt.limit = dt.size;
5481         sregs->idt.base = dt.address;
5482         kvm_x86_ops->get_gdt(vcpu, &dt);
5483         sregs->gdt.limit = dt.size;
5484         sregs->gdt.base = dt.address;
5485
5486         sregs->cr0 = kvm_read_cr0(vcpu);
5487         sregs->cr2 = vcpu->arch.cr2;
5488         sregs->cr3 = vcpu->arch.cr3;
5489         sregs->cr4 = kvm_read_cr4(vcpu);
5490         sregs->cr8 = kvm_get_cr8(vcpu);
5491         sregs->efer = vcpu->arch.efer;
5492         sregs->apic_base = kvm_get_apic_base(vcpu);
5493
5494         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5495
5496         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5497                 set_bit(vcpu->arch.interrupt.nr,
5498                         (unsigned long *)sregs->interrupt_bitmap);
5499
5500         return 0;
5501 }
5502
5503 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5504                                     struct kvm_mp_state *mp_state)
5505 {
5506         mp_state->mp_state = vcpu->arch.mp_state;
5507         return 0;
5508 }
5509
5510 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5511                                     struct kvm_mp_state *mp_state)
5512 {
5513         vcpu->arch.mp_state = mp_state->mp_state;
5514         kvm_make_request(KVM_REQ_EVENT, vcpu);
5515         return 0;
5516 }
5517
5518 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5519                     bool has_error_code, u32 error_code)
5520 {
5521         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5522         int ret;
5523
5524         init_emulate_ctxt(vcpu);
5525
5526         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5527                                    tss_selector, reason, has_error_code,
5528                                    error_code);
5529
5530         if (ret)
5531                 return EMULATE_FAIL;
5532
5533         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5534         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5535         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5536         kvm_make_request(KVM_REQ_EVENT, vcpu);
5537         return EMULATE_DONE;
5538 }
5539 EXPORT_SYMBOL_GPL(kvm_task_switch);
5540
5541 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5542                                   struct kvm_sregs *sregs)
5543 {
5544         int mmu_reset_needed = 0;
5545         int pending_vec, max_bits;
5546         struct desc_ptr dt;
5547
5548         dt.size = sregs->idt.limit;
5549         dt.address = sregs->idt.base;
5550         kvm_x86_ops->set_idt(vcpu, &dt);
5551         dt.size = sregs->gdt.limit;
5552         dt.address = sregs->gdt.base;
5553         kvm_x86_ops->set_gdt(vcpu, &dt);
5554
5555         vcpu->arch.cr2 = sregs->cr2;
5556         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5557         vcpu->arch.cr3 = sregs->cr3;
5558
5559         kvm_set_cr8(vcpu, sregs->cr8);
5560
5561         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5562         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5563         kvm_set_apic_base(vcpu, sregs->apic_base);
5564
5565         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5566         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5567         vcpu->arch.cr0 = sregs->cr0;
5568
5569         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5570         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5571         if (sregs->cr4 & X86_CR4_OSXSAVE)
5572                 update_cpuid(vcpu);
5573         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5574                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5575                 mmu_reset_needed = 1;
5576         }
5577
5578         if (mmu_reset_needed)
5579                 kvm_mmu_reset_context(vcpu);
5580
5581         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5582         pending_vec = find_first_bit(
5583                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5584         if (pending_vec < max_bits) {
5585                 kvm_queue_interrupt(vcpu, pending_vec, false);
5586                 pr_debug("Set back pending irq %d\n", pending_vec);
5587                 if (irqchip_in_kernel(vcpu->kvm))
5588                         kvm_pic_clear_isr_ack(vcpu->kvm);
5589         }
5590
5591         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5592         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5593         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5594         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5595         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5596         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5597
5598         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5599         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5600
5601         update_cr8_intercept(vcpu);
5602
5603         /* Older userspace won't unhalt the vcpu on reset. */
5604         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5605             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5606             !is_protmode(vcpu))
5607                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5608
5609         kvm_make_request(KVM_REQ_EVENT, vcpu);
5610
5611         return 0;
5612 }
5613
5614 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5615                                         struct kvm_guest_debug *dbg)
5616 {
5617         unsigned long rflags;
5618         int i, r;
5619
5620         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5621                 r = -EBUSY;
5622                 if (vcpu->arch.exception.pending)
5623                         goto out;
5624                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5625                         kvm_queue_exception(vcpu, DB_VECTOR);
5626                 else
5627                         kvm_queue_exception(vcpu, BP_VECTOR);
5628         }
5629
5630         /*
5631          * Read rflags as long as potentially injected trace flags are still
5632          * filtered out.
5633          */
5634         rflags = kvm_get_rflags(vcpu);
5635
5636         vcpu->guest_debug = dbg->control;
5637         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5638                 vcpu->guest_debug = 0;
5639
5640         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5641                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5642                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5643                 vcpu->arch.switch_db_regs =
5644                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5645         } else {
5646                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5647                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5648                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5649         }
5650
5651         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5652                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5653                         get_segment_base(vcpu, VCPU_SREG_CS);
5654
5655         /*
5656          * Trigger an rflags update that will inject or remove the trace
5657          * flags.
5658          */
5659         kvm_set_rflags(vcpu, rflags);
5660
5661         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5662
5663         r = 0;
5664
5665 out:
5666
5667         return r;
5668 }
5669
5670 /*
5671  * Translate a guest virtual address to a guest physical address.
5672  */
5673 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5674                                     struct kvm_translation *tr)
5675 {
5676         unsigned long vaddr = tr->linear_address;
5677         gpa_t gpa;
5678         int idx;
5679
5680         idx = srcu_read_lock(&vcpu->kvm->srcu);
5681         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5682         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5683         tr->physical_address = gpa;
5684         tr->valid = gpa != UNMAPPED_GVA;
5685         tr->writeable = 1;
5686         tr->usermode = 0;
5687
5688         return 0;
5689 }
5690
5691 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5692 {
5693         struct i387_fxsave_struct *fxsave =
5694                         &vcpu->arch.guest_fpu.state->fxsave;
5695
5696         memcpy(fpu->fpr, fxsave->st_space, 128);
5697         fpu->fcw = fxsave->cwd;
5698         fpu->fsw = fxsave->swd;
5699         fpu->ftwx = fxsave->twd;
5700         fpu->last_opcode = fxsave->fop;
5701         fpu->last_ip = fxsave->rip;
5702         fpu->last_dp = fxsave->rdp;
5703         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5704
5705         return 0;
5706 }
5707
5708 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5709 {
5710         struct i387_fxsave_struct *fxsave =
5711                         &vcpu->arch.guest_fpu.state->fxsave;
5712
5713         memcpy(fxsave->st_space, fpu->fpr, 128);
5714         fxsave->cwd = fpu->fcw;
5715         fxsave->swd = fpu->fsw;
5716         fxsave->twd = fpu->ftwx;
5717         fxsave->fop = fpu->last_opcode;
5718         fxsave->rip = fpu->last_ip;
5719         fxsave->rdp = fpu->last_dp;
5720         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5721
5722         return 0;
5723 }
5724
5725 int fx_init(struct kvm_vcpu *vcpu)
5726 {
5727         int err;
5728
5729         err = fpu_alloc(&vcpu->arch.guest_fpu);
5730         if (err)
5731                 return err;
5732
5733         fpu_finit(&vcpu->arch.guest_fpu);
5734
5735         /*
5736          * Ensure guest xcr0 is valid for loading
5737          */
5738         vcpu->arch.xcr0 = XSTATE_FP;
5739
5740         vcpu->arch.cr0 |= X86_CR0_ET;
5741
5742         return 0;
5743 }
5744 EXPORT_SYMBOL_GPL(fx_init);
5745
5746 static void fx_free(struct kvm_vcpu *vcpu)
5747 {
5748         fpu_free(&vcpu->arch.guest_fpu);
5749 }
5750
5751 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5752 {
5753         if (vcpu->guest_fpu_loaded)
5754                 return;
5755
5756         /*
5757          * Restore all possible states in the guest,
5758          * and assume host would use all available bits.
5759          * Guest xcr0 would be loaded later.
5760          */
5761         kvm_put_guest_xcr0(vcpu);
5762         vcpu->guest_fpu_loaded = 1;
5763         unlazy_fpu(current);
5764         fpu_restore_checking(&vcpu->arch.guest_fpu);
5765         trace_kvm_fpu(1);
5766 }
5767
5768 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5769 {
5770         kvm_put_guest_xcr0(vcpu);
5771
5772         if (!vcpu->guest_fpu_loaded)
5773                 return;
5774
5775         vcpu->guest_fpu_loaded = 0;
5776         fpu_save_init(&vcpu->arch.guest_fpu);
5777         ++vcpu->stat.fpu_reload;
5778         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5779         trace_kvm_fpu(0);
5780 }
5781
5782 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5783 {
5784         if (vcpu->arch.time_page) {
5785                 kvm_release_page_dirty(vcpu->arch.time_page);
5786                 vcpu->arch.time_page = NULL;
5787         }
5788
5789         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5790         fx_free(vcpu);
5791         kvm_x86_ops->vcpu_free(vcpu);
5792 }
5793
5794 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5795                                                 unsigned int id)
5796 {
5797         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5798                 printk_once(KERN_WARNING
5799                 "kvm: SMP vm created on host with unstable TSC; "
5800                 "guest TSC will not be reliable\n");
5801         return kvm_x86_ops->vcpu_create(kvm, id);
5802 }
5803
5804 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5805 {
5806         int r;
5807
5808         vcpu->arch.mtrr_state.have_fixed = 1;
5809         vcpu_load(vcpu);
5810         r = kvm_arch_vcpu_reset(vcpu);
5811         if (r == 0)
5812                 r = kvm_mmu_setup(vcpu);
5813         vcpu_put(vcpu);
5814         if (r < 0)
5815                 goto free_vcpu;
5816
5817         return 0;
5818 free_vcpu:
5819         kvm_x86_ops->vcpu_free(vcpu);
5820         return r;
5821 }
5822
5823 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5824 {
5825         vcpu->arch.apf.msr_val = 0;
5826
5827         vcpu_load(vcpu);
5828         kvm_mmu_unload(vcpu);
5829         vcpu_put(vcpu);
5830
5831         fx_free(vcpu);
5832         kvm_x86_ops->vcpu_free(vcpu);
5833 }
5834
5835 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5836 {
5837         vcpu->arch.nmi_pending = false;
5838         vcpu->arch.nmi_injected = false;
5839
5840         vcpu->arch.switch_db_regs = 0;
5841         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5842         vcpu->arch.dr6 = DR6_FIXED_1;
5843         vcpu->arch.dr7 = DR7_FIXED_1;
5844
5845         kvm_make_request(KVM_REQ_EVENT, vcpu);
5846         vcpu->arch.apf.msr_val = 0;
5847
5848         kvm_clear_async_pf_completion_queue(vcpu);
5849         kvm_async_pf_hash_reset(vcpu);
5850         vcpu->arch.apf.halted = false;
5851
5852         return kvm_x86_ops->vcpu_reset(vcpu);
5853 }
5854
5855 int kvm_arch_hardware_enable(void *garbage)
5856 {
5857         struct kvm *kvm;
5858         struct kvm_vcpu *vcpu;
5859         int i;
5860
5861         kvm_shared_msr_cpu_online();
5862         list_for_each_entry(kvm, &vm_list, vm_list)
5863                 kvm_for_each_vcpu(i, vcpu, kvm)
5864                         if (vcpu->cpu == smp_processor_id())
5865                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5866         return kvm_x86_ops->hardware_enable(garbage);
5867 }
5868
5869 void kvm_arch_hardware_disable(void *garbage)
5870 {
5871         kvm_x86_ops->hardware_disable(garbage);
5872         drop_user_return_notifiers(garbage);
5873 }
5874
5875 int kvm_arch_hardware_setup(void)
5876 {
5877         return kvm_x86_ops->hardware_setup();
5878 }
5879
5880 void kvm_arch_hardware_unsetup(void)
5881 {
5882         kvm_x86_ops->hardware_unsetup();
5883 }
5884
5885 void kvm_arch_check_processor_compat(void *rtn)
5886 {
5887         kvm_x86_ops->check_processor_compatibility(rtn);
5888 }
5889
5890 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5891 {
5892         struct page *page;
5893         struct kvm *kvm;
5894         int r;
5895
5896         BUG_ON(vcpu->kvm == NULL);
5897         kvm = vcpu->kvm;
5898
5899         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5900         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5901         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5902         vcpu->arch.mmu.translate_gpa = translate_gpa;
5903         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5904         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5905                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5906         else
5907                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5908
5909         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5910         if (!page) {
5911                 r = -ENOMEM;
5912                 goto fail;
5913         }
5914         vcpu->arch.pio_data = page_address(page);
5915
5916         if (!kvm->arch.virtual_tsc_khz)
5917                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5918
5919         r = kvm_mmu_create(vcpu);
5920         if (r < 0)
5921                 goto fail_free_pio_data;
5922
5923         if (irqchip_in_kernel(kvm)) {
5924                 r = kvm_create_lapic(vcpu);
5925                 if (r < 0)
5926                         goto fail_mmu_destroy;
5927         }
5928
5929         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5930                                        GFP_KERNEL);
5931         if (!vcpu->arch.mce_banks) {
5932                 r = -ENOMEM;
5933                 goto fail_free_lapic;
5934         }
5935         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5936
5937         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5938                 goto fail_free_mce_banks;
5939
5940         kvm_async_pf_hash_reset(vcpu);
5941
5942         return 0;
5943 fail_free_mce_banks:
5944         kfree(vcpu->arch.mce_banks);
5945 fail_free_lapic:
5946         kvm_free_lapic(vcpu);
5947 fail_mmu_destroy:
5948         kvm_mmu_destroy(vcpu);
5949 fail_free_pio_data:
5950         free_page((unsigned long)vcpu->arch.pio_data);
5951 fail:
5952         return r;
5953 }
5954
5955 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5956 {
5957         int idx;
5958
5959         kfree(vcpu->arch.mce_banks);
5960         kvm_free_lapic(vcpu);
5961         idx = srcu_read_lock(&vcpu->kvm->srcu);
5962         kvm_mmu_destroy(vcpu);
5963         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5964         free_page((unsigned long)vcpu->arch.pio_data);
5965 }
5966
5967 int kvm_arch_init_vm(struct kvm *kvm)
5968 {
5969         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5970         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5971
5972         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5973         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5974
5975         spin_lock_init(&kvm->arch.tsc_write_lock);
5976
5977         return 0;
5978 }
5979
5980 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5981 {
5982         vcpu_load(vcpu);
5983         kvm_mmu_unload(vcpu);
5984         vcpu_put(vcpu);
5985 }
5986
5987 static void kvm_free_vcpus(struct kvm *kvm)
5988 {
5989         unsigned int i;
5990         struct kvm_vcpu *vcpu;
5991
5992         /*
5993          * Unpin any mmu pages first.
5994          */
5995         kvm_for_each_vcpu(i, vcpu, kvm) {
5996                 kvm_clear_async_pf_completion_queue(vcpu);
5997                 kvm_unload_vcpu_mmu(vcpu);
5998         }
5999         kvm_for_each_vcpu(i, vcpu, kvm)
6000                 kvm_arch_vcpu_free(vcpu);
6001
6002         mutex_lock(&kvm->lock);
6003         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6004                 kvm->vcpus[i] = NULL;
6005
6006         atomic_set(&kvm->online_vcpus, 0);
6007         mutex_unlock(&kvm->lock);
6008 }
6009
6010 void kvm_arch_sync_events(struct kvm *kvm)
6011 {
6012         kvm_free_all_assigned_devices(kvm);
6013         kvm_free_pit(kvm);
6014 }
6015
6016 void kvm_arch_destroy_vm(struct kvm *kvm)
6017 {
6018         kvm_iommu_unmap_guest(kvm);
6019         kfree(kvm->arch.vpic);
6020         kfree(kvm->arch.vioapic);
6021         kvm_free_vcpus(kvm);
6022         if (kvm->arch.apic_access_page)
6023                 put_page(kvm->arch.apic_access_page);
6024         if (kvm->arch.ept_identity_pagetable)
6025                 put_page(kvm->arch.ept_identity_pagetable);
6026 }
6027
6028 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6029                                 struct kvm_memory_slot *memslot,
6030                                 struct kvm_memory_slot old,
6031                                 struct kvm_userspace_memory_region *mem,
6032                                 int user_alloc)
6033 {
6034         int npages = memslot->npages;
6035         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6036
6037         /* Prevent internal slot pages from being moved by fork()/COW. */
6038         if (memslot->id >= KVM_MEMORY_SLOTS)
6039                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6040
6041         /*To keep backward compatibility with older userspace,
6042          *x86 needs to hanlde !user_alloc case.
6043          */
6044         if (!user_alloc) {
6045                 if (npages && !old.rmap) {
6046                         unsigned long userspace_addr;
6047
6048                         down_write(&current->mm->mmap_sem);
6049                         userspace_addr = do_mmap(NULL, 0,
6050                                                  npages * PAGE_SIZE,
6051                                                  PROT_READ | PROT_WRITE,
6052                                                  map_flags,
6053                                                  0);
6054                         up_write(&current->mm->mmap_sem);
6055
6056                         if (IS_ERR((void *)userspace_addr))
6057                                 return PTR_ERR((void *)userspace_addr);
6058
6059                         memslot->userspace_addr = userspace_addr;
6060                 }
6061         }
6062
6063
6064         return 0;
6065 }
6066
6067 void kvm_arch_commit_memory_region(struct kvm *kvm,
6068                                 struct kvm_userspace_memory_region *mem,
6069                                 struct kvm_memory_slot old,
6070                                 int user_alloc)
6071 {
6072
6073         int npages = mem->memory_size >> PAGE_SHIFT;
6074
6075         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6076                 int ret;
6077
6078                 down_write(&current->mm->mmap_sem);
6079                 ret = do_munmap(current->mm, old.userspace_addr,
6080                                 old.npages * PAGE_SIZE);
6081                 up_write(&current->mm->mmap_sem);
6082                 if (ret < 0)
6083                         printk(KERN_WARNING
6084                                "kvm_vm_ioctl_set_memory_region: "
6085                                "failed to munmap memory\n");
6086         }
6087
6088         spin_lock(&kvm->mmu_lock);
6089         if (!kvm->arch.n_requested_mmu_pages) {
6090                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6091                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6092         }
6093
6094         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6095         spin_unlock(&kvm->mmu_lock);
6096 }
6097
6098 void kvm_arch_flush_shadow(struct kvm *kvm)
6099 {
6100         kvm_mmu_zap_all(kvm);
6101         kvm_reload_remote_mmus(kvm);
6102 }
6103
6104 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6105 {
6106         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6107                 !vcpu->arch.apf.halted)
6108                 || !list_empty_careful(&vcpu->async_pf.done)
6109                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6110                 || vcpu->arch.nmi_pending ||
6111                 (kvm_arch_interrupt_allowed(vcpu) &&
6112                  kvm_cpu_has_interrupt(vcpu));
6113 }
6114
6115 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6116 {
6117         int me;
6118         int cpu = vcpu->cpu;
6119
6120         if (waitqueue_active(&vcpu->wq)) {
6121                 wake_up_interruptible(&vcpu->wq);
6122                 ++vcpu->stat.halt_wakeup;
6123         }
6124
6125         me = get_cpu();
6126         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6127                 if (atomic_xchg(&vcpu->guest_mode, 0))
6128                         smp_send_reschedule(cpu);
6129         put_cpu();
6130 }
6131
6132 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6133 {
6134         return kvm_x86_ops->interrupt_allowed(vcpu);
6135 }
6136
6137 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6138 {
6139         unsigned long current_rip = kvm_rip_read(vcpu) +
6140                 get_segment_base(vcpu, VCPU_SREG_CS);
6141
6142         return current_rip == linear_rip;
6143 }
6144 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6145
6146 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6147 {
6148         unsigned long rflags;
6149
6150         rflags = kvm_x86_ops->get_rflags(vcpu);
6151         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6152                 rflags &= ~X86_EFLAGS_TF;
6153         return rflags;
6154 }
6155 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6156
6157 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6158 {
6159         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6160             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6161                 rflags |= X86_EFLAGS_TF;
6162         kvm_x86_ops->set_rflags(vcpu, rflags);
6163         kvm_make_request(KVM_REQ_EVENT, vcpu);
6164 }
6165 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6166
6167 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6168 {
6169         int r;
6170
6171         if (!vcpu->arch.mmu.direct_map || is_error_page(work->page))
6172                 return;
6173
6174         r = kvm_mmu_reload(vcpu);
6175         if (unlikely(r))
6176                 return;
6177
6178         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6179 }
6180
6181 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6182 {
6183         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6184 }
6185
6186 static inline u32 kvm_async_pf_next_probe(u32 key)
6187 {
6188         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6189 }
6190
6191 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6192 {
6193         u32 key = kvm_async_pf_hash_fn(gfn);
6194
6195         while (vcpu->arch.apf.gfns[key] != ~0)
6196                 key = kvm_async_pf_next_probe(key);
6197
6198         vcpu->arch.apf.gfns[key] = gfn;
6199 }
6200
6201 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6202 {
6203         int i;
6204         u32 key = kvm_async_pf_hash_fn(gfn);
6205
6206         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6207                      (vcpu->arch.apf.gfns[key] != gfn &&
6208                       vcpu->arch.apf.gfns[key] != ~0); i++)
6209                 key = kvm_async_pf_next_probe(key);
6210
6211         return key;
6212 }
6213
6214 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6215 {
6216         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6217 }
6218
6219 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6220 {
6221         u32 i, j, k;
6222
6223         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6224         while (true) {
6225                 vcpu->arch.apf.gfns[i] = ~0;
6226                 do {
6227                         j = kvm_async_pf_next_probe(j);
6228                         if (vcpu->arch.apf.gfns[j] == ~0)
6229                                 return;
6230                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6231                         /*
6232                          * k lies cyclically in ]i,j]
6233                          * |    i.k.j |
6234                          * |....j i.k.| or  |.k..j i...|
6235                          */
6236                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6237                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6238                 i = j;
6239         }
6240 }
6241
6242 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6243 {
6244
6245         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6246                                       sizeof(val));
6247 }
6248
6249 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6250                                      struct kvm_async_pf *work)
6251 {
6252         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6253         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6254
6255         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6256             (vcpu->arch.apf.send_user_only &&
6257              kvm_x86_ops->get_cpl(vcpu) == 0))
6258                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6259         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6260                 vcpu->arch.fault.error_code = 0;
6261                 vcpu->arch.fault.address = work->arch.token;
6262                 kvm_inject_page_fault(vcpu);
6263         }
6264 }
6265
6266 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6267                                  struct kvm_async_pf *work)
6268 {
6269         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6270         if (is_error_page(work->page))
6271                 work->arch.token = ~0; /* broadcast wakeup */
6272         else
6273                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6274
6275         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6276             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6277                 vcpu->arch.fault.error_code = 0;
6278                 vcpu->arch.fault.address = work->arch.token;
6279                 kvm_inject_page_fault(vcpu);
6280         }
6281         vcpu->arch.apf.halted = false;
6282 }
6283
6284 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6285 {
6286         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6287                 return true;
6288         else
6289                 return !kvm_event_needs_reinjection(vcpu) &&
6290                         kvm_x86_ops->interrupt_allowed(vcpu);
6291 }
6292
6293 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6294 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);