2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <linux/perf_event.h>
44 #include <trace/events/kvm.h>
46 #define CREATE_TRACE_POINTS
49 #include <asm/debugreg.h>
50 #include <asm/uaccess.h>
58 #define MAX_IO_MSRS 256
59 #define CR0_RESERVED_BITS \
60 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
61 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
62 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
63 #define CR4_RESERVED_BITS \
64 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
65 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
66 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
67 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
69 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
71 #define KVM_MAX_MCE_BANKS 32
72 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
79 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
84 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
85 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
87 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
88 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
89 struct kvm_cpuid_entry2 __user *entries);
91 struct kvm_x86_ops *kvm_x86_ops;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
95 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
97 #define KVM_NR_SHARED_MSRS 16
99 struct kvm_shared_msrs_global {
101 u32 msrs[KVM_NR_SHARED_MSRS];
104 struct kvm_shared_msrs {
105 struct user_return_notifier urn;
107 struct kvm_shared_msr_values {
110 } values[KVM_NR_SHARED_MSRS];
113 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
114 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116 struct kvm_stats_debugfs_item debugfs_entries[] = {
117 { "pf_fixed", VCPU_STAT(pf_fixed) },
118 { "pf_guest", VCPU_STAT(pf_guest) },
119 { "tlb_flush", VCPU_STAT(tlb_flush) },
120 { "invlpg", VCPU_STAT(invlpg) },
121 { "exits", VCPU_STAT(exits) },
122 { "io_exits", VCPU_STAT(io_exits) },
123 { "mmio_exits", VCPU_STAT(mmio_exits) },
124 { "signal_exits", VCPU_STAT(signal_exits) },
125 { "irq_window", VCPU_STAT(irq_window_exits) },
126 { "nmi_window", VCPU_STAT(nmi_window_exits) },
127 { "halt_exits", VCPU_STAT(halt_exits) },
128 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
129 { "hypercalls", VCPU_STAT(hypercalls) },
130 { "request_irq", VCPU_STAT(request_irq_exits) },
131 { "irq_exits", VCPU_STAT(irq_exits) },
132 { "host_state_reload", VCPU_STAT(host_state_reload) },
133 { "efer_reload", VCPU_STAT(efer_reload) },
134 { "fpu_reload", VCPU_STAT(fpu_reload) },
135 { "insn_emulation", VCPU_STAT(insn_emulation) },
136 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
137 { "irq_injections", VCPU_STAT(irq_injections) },
138 { "nmi_injections", VCPU_STAT(nmi_injections) },
139 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
140 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
141 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
142 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
143 { "mmu_flooded", VM_STAT(mmu_flooded) },
144 { "mmu_recycled", VM_STAT(mmu_recycled) },
145 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
146 { "mmu_unsync", VM_STAT(mmu_unsync) },
147 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
148 { "largepages", VM_STAT(lpages) },
152 static void kvm_on_user_return(struct user_return_notifier *urn)
155 struct kvm_shared_msrs *locals
156 = container_of(urn, struct kvm_shared_msrs, urn);
157 struct kvm_shared_msr_values *values;
159 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
160 values = &locals->values[slot];
161 if (values->host != values->curr) {
162 wrmsrl(shared_msrs_global.msrs[slot], values->host);
163 values->curr = values->host;
166 locals->registered = false;
167 user_return_notifier_unregister(urn);
170 static void shared_msr_update(unsigned slot, u32 msr)
172 struct kvm_shared_msrs *smsr;
175 smsr = &__get_cpu_var(shared_msrs);
176 /* only read, and nobody should modify it at this time,
177 * so don't need lock */
178 if (slot >= shared_msrs_global.nr) {
179 printk(KERN_ERR "kvm: invalid MSR slot!");
182 rdmsrl_safe(msr, &value);
183 smsr->values[slot].host = value;
184 smsr->values[slot].curr = value;
187 void kvm_define_shared_msr(unsigned slot, u32 msr)
189 if (slot >= shared_msrs_global.nr)
190 shared_msrs_global.nr = slot + 1;
191 shared_msrs_global.msrs[slot] = msr;
192 /* we need ensured the shared_msr_global have been updated */
195 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
197 static void kvm_shared_msr_cpu_online(void)
201 for (i = 0; i < shared_msrs_global.nr; ++i)
202 shared_msr_update(i, shared_msrs_global.msrs[i]);
205 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
207 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
209 if (((value ^ smsr->values[slot].curr) & mask) == 0)
211 smsr->values[slot].curr = value;
212 wrmsrl(shared_msrs_global.msrs[slot], value);
213 if (!smsr->registered) {
214 smsr->urn.on_user_return = kvm_on_user_return;
215 user_return_notifier_register(&smsr->urn);
216 smsr->registered = true;
219 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
221 static void drop_user_return_notifiers(void *ignore)
223 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
225 if (smsr->registered)
226 kvm_on_user_return(&smsr->urn);
229 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
231 if (irqchip_in_kernel(vcpu->kvm))
232 return vcpu->arch.apic_base;
234 return vcpu->arch.apic_base;
236 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
238 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
240 /* TODO: reserve bits check */
241 if (irqchip_in_kernel(vcpu->kvm))
242 kvm_lapic_set_base(vcpu, data);
244 vcpu->arch.apic_base = data;
246 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
248 #define EXCPT_BENIGN 0
249 #define EXCPT_CONTRIBUTORY 1
252 static int exception_class(int vector)
262 return EXCPT_CONTRIBUTORY;
269 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
270 unsigned nr, bool has_error, u32 error_code,
276 if (!vcpu->arch.exception.pending) {
278 vcpu->arch.exception.pending = true;
279 vcpu->arch.exception.has_error_code = has_error;
280 vcpu->arch.exception.nr = nr;
281 vcpu->arch.exception.error_code = error_code;
282 vcpu->arch.exception.reinject = reinject;
286 /* to check exception */
287 prev_nr = vcpu->arch.exception.nr;
288 if (prev_nr == DF_VECTOR) {
289 /* triple fault -> shutdown */
290 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
293 class1 = exception_class(prev_nr);
294 class2 = exception_class(nr);
295 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
296 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
297 /* generate double fault per SDM Table 5-5 */
298 vcpu->arch.exception.pending = true;
299 vcpu->arch.exception.has_error_code = true;
300 vcpu->arch.exception.nr = DF_VECTOR;
301 vcpu->arch.exception.error_code = 0;
303 /* replace previous exception with a new one in a hope
304 that instruction re-execution will regenerate lost
309 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
311 kvm_multiple_exception(vcpu, nr, false, 0, false);
313 EXPORT_SYMBOL_GPL(kvm_queue_exception);
315 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
317 kvm_multiple_exception(vcpu, nr, false, 0, true);
319 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
321 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
324 ++vcpu->stat.pf_guest;
325 vcpu->arch.cr2 = addr;
326 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
329 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
331 vcpu->arch.nmi_pending = 1;
333 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
335 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
337 kvm_multiple_exception(vcpu, nr, true, error_code, false);
339 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
341 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
343 kvm_multiple_exception(vcpu, nr, true, error_code, true);
345 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
348 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
349 * a #GP and return false.
351 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
353 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
355 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
358 EXPORT_SYMBOL_GPL(kvm_require_cpl);
361 * Load the pae pdptrs. Return true is they are all valid.
363 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
365 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
366 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
369 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
371 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
372 offset * sizeof(u64), sizeof(pdpte));
377 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
378 if (is_present_gpte(pdpte[i]) &&
379 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
386 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
387 __set_bit(VCPU_EXREG_PDPTR,
388 (unsigned long *)&vcpu->arch.regs_avail);
389 __set_bit(VCPU_EXREG_PDPTR,
390 (unsigned long *)&vcpu->arch.regs_dirty);
395 EXPORT_SYMBOL_GPL(load_pdptrs);
397 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
399 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
403 if (is_long_mode(vcpu) || !is_pae(vcpu))
406 if (!test_bit(VCPU_EXREG_PDPTR,
407 (unsigned long *)&vcpu->arch.regs_avail))
410 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
413 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
419 static int __kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
421 unsigned long old_cr0 = kvm_read_cr0(vcpu);
422 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
423 X86_CR0_CD | X86_CR0_NW;
428 if (cr0 & 0xffffffff00000000UL)
432 cr0 &= ~CR0_RESERVED_BITS;
434 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
437 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
440 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
442 if ((vcpu->arch.efer & EFER_LME)) {
447 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
452 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
456 kvm_x86_ops->set_cr0(vcpu, cr0);
458 if ((cr0 ^ old_cr0) & update_bits)
459 kvm_mmu_reset_context(vcpu);
463 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
465 if (__kvm_set_cr0(vcpu, cr0))
466 kvm_inject_gp(vcpu, 0);
468 EXPORT_SYMBOL_GPL(kvm_set_cr0);
470 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
472 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
474 EXPORT_SYMBOL_GPL(kvm_lmsw);
476 int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
478 unsigned long old_cr4 = kvm_read_cr4(vcpu);
479 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
481 if (cr4 & CR4_RESERVED_BITS)
484 if (is_long_mode(vcpu)) {
485 if (!(cr4 & X86_CR4_PAE))
487 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
488 && ((cr4 ^ old_cr4) & pdptr_bits)
489 && !load_pdptrs(vcpu, vcpu->arch.cr3))
492 if (cr4 & X86_CR4_VMXE)
495 kvm_x86_ops->set_cr4(vcpu, cr4);
497 if ((cr4 ^ old_cr4) & pdptr_bits)
498 kvm_mmu_reset_context(vcpu);
503 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
505 if (__kvm_set_cr4(vcpu, cr4))
506 kvm_inject_gp(vcpu, 0);
508 EXPORT_SYMBOL_GPL(kvm_set_cr4);
510 static int __kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
512 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
513 kvm_mmu_sync_roots(vcpu);
514 kvm_mmu_flush_tlb(vcpu);
518 if (is_long_mode(vcpu)) {
519 if (cr3 & CR3_L_MODE_RESERVED_BITS)
523 if (cr3 & CR3_PAE_RESERVED_BITS)
525 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
529 * We don't check reserved bits in nonpae mode, because
530 * this isn't enforced, and VMware depends on this.
535 * Does the new cr3 value map to physical memory? (Note, we
536 * catch an invalid cr3 even in real-mode, because it would
537 * cause trouble later on when we turn on paging anyway.)
539 * A real CPU would silently accept an invalid cr3 and would
540 * attempt to use it - with largely undefined (and often hard
541 * to debug) behavior on the guest side.
543 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
545 vcpu->arch.cr3 = cr3;
546 vcpu->arch.mmu.new_cr3(vcpu);
550 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
552 if (__kvm_set_cr3(vcpu, cr3))
553 kvm_inject_gp(vcpu, 0);
555 EXPORT_SYMBOL_GPL(kvm_set_cr3);
557 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
559 if (cr8 & CR8_RESERVED_BITS)
561 if (irqchip_in_kernel(vcpu->kvm))
562 kvm_lapic_set_tpr(vcpu, cr8);
564 vcpu->arch.cr8 = cr8;
568 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
570 if (__kvm_set_cr8(vcpu, cr8))
571 kvm_inject_gp(vcpu, 0);
573 EXPORT_SYMBOL_GPL(kvm_set_cr8);
575 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
577 if (irqchip_in_kernel(vcpu->kvm))
578 return kvm_lapic_get_cr8(vcpu);
580 return vcpu->arch.cr8;
582 EXPORT_SYMBOL_GPL(kvm_get_cr8);
584 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
588 vcpu->arch.db[dr] = val;
589 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
590 vcpu->arch.eff_db[dr] = val;
593 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
597 if (val & 0xffffffff00000000ULL)
599 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
602 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
606 if (val & 0xffffffff00000000ULL)
608 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
609 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
610 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
611 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
619 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
623 res = __kvm_set_dr(vcpu, dr, val);
625 kvm_queue_exception(vcpu, UD_VECTOR);
627 kvm_inject_gp(vcpu, 0);
631 EXPORT_SYMBOL_GPL(kvm_set_dr);
633 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
637 *val = vcpu->arch.db[dr];
640 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
644 *val = vcpu->arch.dr6;
647 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
651 *val = vcpu->arch.dr7;
658 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
660 if (_kvm_get_dr(vcpu, dr, val)) {
661 kvm_queue_exception(vcpu, UD_VECTOR);
666 EXPORT_SYMBOL_GPL(kvm_get_dr);
668 static inline u32 bit(int bitno)
670 return 1 << (bitno & 31);
674 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
675 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
677 * This list is modified at module load time to reflect the
678 * capabilities of the host cpu. This capabilities test skips MSRs that are
679 * kvm-specific. Those are put in the beginning of the list.
682 #define KVM_SAVE_MSRS_BEGIN 7
683 static u32 msrs_to_save[] = {
684 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
685 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
686 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
687 HV_X64_MSR_APIC_ASSIST_PAGE,
688 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
691 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
693 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
696 static unsigned num_msrs_to_save;
698 static u32 emulated_msrs[] = {
699 MSR_IA32_MISC_ENABLE,
702 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
704 u64 old_efer = vcpu->arch.efer;
706 if (efer & efer_reserved_bits)
710 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
713 if (efer & EFER_FFXSR) {
714 struct kvm_cpuid_entry2 *feat;
716 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
717 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
721 if (efer & EFER_SVME) {
722 struct kvm_cpuid_entry2 *feat;
724 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
725 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
730 efer |= vcpu->arch.efer & EFER_LMA;
732 kvm_x86_ops->set_efer(vcpu, efer);
734 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
735 kvm_mmu_reset_context(vcpu);
737 /* Update reserved bits */
738 if ((efer ^ old_efer) & EFER_NX)
739 kvm_mmu_reset_context(vcpu);
744 void kvm_enable_efer_bits(u64 mask)
746 efer_reserved_bits &= ~mask;
748 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
752 * Writes msr value into into the appropriate "register".
753 * Returns 0 on success, non-0 otherwise.
754 * Assumes vcpu_load() was already called.
756 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
758 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
762 * Adapt set_msr() to msr_io()'s calling convention
764 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
766 return kvm_set_msr(vcpu, index, *data);
769 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
773 struct pvclock_wall_clock wc;
774 struct timespec boot;
779 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
784 ++version; /* first time write, random junk */
788 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
791 * The guest calculates current wall clock time by adding
792 * system time (updated by kvm_write_guest_time below) to the
793 * wall clock specified here. guest system time equals host
794 * system time for us, thus we must fill in host boot time here.
798 wc.sec = boot.tv_sec;
799 wc.nsec = boot.tv_nsec;
800 wc.version = version;
802 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
805 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
808 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
810 uint32_t quotient, remainder;
812 /* Don't try to replace with do_div(), this one calculates
813 * "(dividend << 32) / divisor" */
815 : "=a" (quotient), "=d" (remainder)
816 : "0" (0), "1" (dividend), "r" (divisor) );
820 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
822 uint64_t nsecs = 1000000000LL;
827 tps64 = tsc_khz * 1000LL;
828 while (tps64 > nsecs*2) {
833 tps32 = (uint32_t)tps64;
834 while (tps32 <= (uint32_t)nsecs) {
839 hv_clock->tsc_shift = shift;
840 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
842 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
843 __func__, tsc_khz, hv_clock->tsc_shift,
844 hv_clock->tsc_to_system_mul);
847 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
849 static void kvm_write_guest_time(struct kvm_vcpu *v)
853 struct kvm_vcpu_arch *vcpu = &v->arch;
855 unsigned long this_tsc_khz;
857 if ((!vcpu->time_page))
860 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
861 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
862 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
863 vcpu->hv_clock_tsc_khz = this_tsc_khz;
865 put_cpu_var(cpu_tsc_khz);
867 /* Keep irq disabled to prevent changes to the clock */
868 local_irq_save(flags);
869 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
871 monotonic_to_bootbased(&ts);
872 local_irq_restore(flags);
874 /* With all the info we got, fill in the values */
876 vcpu->hv_clock.system_time = ts.tv_nsec +
877 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
879 vcpu->hv_clock.flags = 0;
882 * The interface expects us to write an even number signaling that the
883 * update is finished. Since the guest won't see the intermediate
884 * state, we just increase by 2 at the end.
886 vcpu->hv_clock.version += 2;
888 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
890 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
891 sizeof(vcpu->hv_clock));
893 kunmap_atomic(shared_kaddr, KM_USER0);
895 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
898 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
900 struct kvm_vcpu_arch *vcpu = &v->arch;
902 if (!vcpu->time_page)
904 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
908 static bool msr_mtrr_valid(unsigned msr)
911 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
912 case MSR_MTRRfix64K_00000:
913 case MSR_MTRRfix16K_80000:
914 case MSR_MTRRfix16K_A0000:
915 case MSR_MTRRfix4K_C0000:
916 case MSR_MTRRfix4K_C8000:
917 case MSR_MTRRfix4K_D0000:
918 case MSR_MTRRfix4K_D8000:
919 case MSR_MTRRfix4K_E0000:
920 case MSR_MTRRfix4K_E8000:
921 case MSR_MTRRfix4K_F0000:
922 case MSR_MTRRfix4K_F8000:
923 case MSR_MTRRdefType:
924 case MSR_IA32_CR_PAT:
932 static bool valid_pat_type(unsigned t)
934 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
937 static bool valid_mtrr_type(unsigned t)
939 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
942 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
946 if (!msr_mtrr_valid(msr))
949 if (msr == MSR_IA32_CR_PAT) {
950 for (i = 0; i < 8; i++)
951 if (!valid_pat_type((data >> (i * 8)) & 0xff))
954 } else if (msr == MSR_MTRRdefType) {
957 return valid_mtrr_type(data & 0xff);
958 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
959 for (i = 0; i < 8 ; i++)
960 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
966 return valid_mtrr_type(data & 0xff);
969 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
971 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
973 if (!mtrr_valid(vcpu, msr, data))
976 if (msr == MSR_MTRRdefType) {
977 vcpu->arch.mtrr_state.def_type = data;
978 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
979 } else if (msr == MSR_MTRRfix64K_00000)
981 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
982 p[1 + msr - MSR_MTRRfix16K_80000] = data;
983 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
984 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
985 else if (msr == MSR_IA32_CR_PAT)
986 vcpu->arch.pat = data;
987 else { /* Variable MTRRs */
988 int idx, is_mtrr_mask;
991 idx = (msr - 0x200) / 2;
992 is_mtrr_mask = msr - 0x200 - 2 * idx;
995 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
998 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1002 kvm_mmu_reset_context(vcpu);
1006 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1008 u64 mcg_cap = vcpu->arch.mcg_cap;
1009 unsigned bank_num = mcg_cap & 0xff;
1012 case MSR_IA32_MCG_STATUS:
1013 vcpu->arch.mcg_status = data;
1015 case MSR_IA32_MCG_CTL:
1016 if (!(mcg_cap & MCG_CTL_P))
1018 if (data != 0 && data != ~(u64)0)
1020 vcpu->arch.mcg_ctl = data;
1023 if (msr >= MSR_IA32_MC0_CTL &&
1024 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1025 u32 offset = msr - MSR_IA32_MC0_CTL;
1026 /* only 0 or all 1s can be written to IA32_MCi_CTL
1027 * some Linux kernels though clear bit 10 in bank 4 to
1028 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1029 * this to avoid an uncatched #GP in the guest
1031 if ((offset & 0x3) == 0 &&
1032 data != 0 && (data | (1 << 10)) != ~(u64)0)
1034 vcpu->arch.mce_banks[offset] = data;
1042 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1044 struct kvm *kvm = vcpu->kvm;
1045 int lm = is_long_mode(vcpu);
1046 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1047 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1048 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1049 : kvm->arch.xen_hvm_config.blob_size_32;
1050 u32 page_num = data & ~PAGE_MASK;
1051 u64 page_addr = data & PAGE_MASK;
1056 if (page_num >= blob_size)
1059 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1063 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1065 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1074 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1076 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1079 static bool kvm_hv_msr_partition_wide(u32 msr)
1083 case HV_X64_MSR_GUEST_OS_ID:
1084 case HV_X64_MSR_HYPERCALL:
1092 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1094 struct kvm *kvm = vcpu->kvm;
1097 case HV_X64_MSR_GUEST_OS_ID:
1098 kvm->arch.hv_guest_os_id = data;
1099 /* setting guest os id to zero disables hypercall page */
1100 if (!kvm->arch.hv_guest_os_id)
1101 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1103 case HV_X64_MSR_HYPERCALL: {
1108 /* if guest os id is not set hypercall should remain disabled */
1109 if (!kvm->arch.hv_guest_os_id)
1111 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1112 kvm->arch.hv_hypercall = data;
1115 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1116 addr = gfn_to_hva(kvm, gfn);
1117 if (kvm_is_error_hva(addr))
1119 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1120 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1121 if (copy_to_user((void __user *)addr, instructions, 4))
1123 kvm->arch.hv_hypercall = data;
1127 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1128 "data 0x%llx\n", msr, data);
1134 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1137 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1140 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1141 vcpu->arch.hv_vapic = data;
1144 addr = gfn_to_hva(vcpu->kvm, data >>
1145 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1146 if (kvm_is_error_hva(addr))
1148 if (clear_user((void __user *)addr, PAGE_SIZE))
1150 vcpu->arch.hv_vapic = data;
1153 case HV_X64_MSR_EOI:
1154 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1155 case HV_X64_MSR_ICR:
1156 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1157 case HV_X64_MSR_TPR:
1158 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1160 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1161 "data 0x%llx\n", msr, data);
1168 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1172 return set_efer(vcpu, data);
1174 data &= ~(u64)0x40; /* ignore flush filter disable */
1175 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1177 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1182 case MSR_FAM10H_MMIO_CONF_BASE:
1184 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1189 case MSR_AMD64_NB_CFG:
1191 case MSR_IA32_DEBUGCTLMSR:
1193 /* We support the non-activated case already */
1195 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1196 /* Values other than LBR and BTF are vendor-specific,
1197 thus reserved and should throw a #GP */
1200 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1203 case MSR_IA32_UCODE_REV:
1204 case MSR_IA32_UCODE_WRITE:
1205 case MSR_VM_HSAVE_PA:
1206 case MSR_AMD64_PATCH_LOADER:
1208 case 0x200 ... 0x2ff:
1209 return set_msr_mtrr(vcpu, msr, data);
1210 case MSR_IA32_APICBASE:
1211 kvm_set_apic_base(vcpu, data);
1213 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1214 return kvm_x2apic_msr_write(vcpu, msr, data);
1215 case MSR_IA32_MISC_ENABLE:
1216 vcpu->arch.ia32_misc_enable_msr = data;
1218 case MSR_KVM_WALL_CLOCK_NEW:
1219 case MSR_KVM_WALL_CLOCK:
1220 vcpu->kvm->arch.wall_clock = data;
1221 kvm_write_wall_clock(vcpu->kvm, data);
1223 case MSR_KVM_SYSTEM_TIME_NEW:
1224 case MSR_KVM_SYSTEM_TIME: {
1225 if (vcpu->arch.time_page) {
1226 kvm_release_page_dirty(vcpu->arch.time_page);
1227 vcpu->arch.time_page = NULL;
1230 vcpu->arch.time = data;
1232 /* we verify if the enable bit is set... */
1236 /* ...but clean it before doing the actual write */
1237 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1239 vcpu->arch.time_page =
1240 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1242 if (is_error_page(vcpu->arch.time_page)) {
1243 kvm_release_page_clean(vcpu->arch.time_page);
1244 vcpu->arch.time_page = NULL;
1247 kvm_request_guest_time_update(vcpu);
1250 case MSR_IA32_MCG_CTL:
1251 case MSR_IA32_MCG_STATUS:
1252 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1253 return set_msr_mce(vcpu, msr, data);
1255 /* Performance counters are not protected by a CPUID bit,
1256 * so we should check all of them in the generic path for the sake of
1257 * cross vendor migration.
1258 * Writing a zero into the event select MSRs disables them,
1259 * which we perfectly emulate ;-). Any other value should be at least
1260 * reported, some guests depend on them.
1262 case MSR_P6_EVNTSEL0:
1263 case MSR_P6_EVNTSEL1:
1264 case MSR_K7_EVNTSEL0:
1265 case MSR_K7_EVNTSEL1:
1266 case MSR_K7_EVNTSEL2:
1267 case MSR_K7_EVNTSEL3:
1269 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1270 "0x%x data 0x%llx\n", msr, data);
1272 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1273 * so we ignore writes to make it happy.
1275 case MSR_P6_PERFCTR0:
1276 case MSR_P6_PERFCTR1:
1277 case MSR_K7_PERFCTR0:
1278 case MSR_K7_PERFCTR1:
1279 case MSR_K7_PERFCTR2:
1280 case MSR_K7_PERFCTR3:
1281 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1282 "0x%x data 0x%llx\n", msr, data);
1284 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1285 if (kvm_hv_msr_partition_wide(msr)) {
1287 mutex_lock(&vcpu->kvm->lock);
1288 r = set_msr_hyperv_pw(vcpu, msr, data);
1289 mutex_unlock(&vcpu->kvm->lock);
1292 return set_msr_hyperv(vcpu, msr, data);
1295 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1296 return xen_hvm_config(vcpu, data);
1298 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1302 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1309 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1313 * Reads an msr value (of 'msr_index') into 'pdata'.
1314 * Returns 0 on success, non-0 otherwise.
1315 * Assumes vcpu_load() was already called.
1317 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1319 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1322 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1324 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1326 if (!msr_mtrr_valid(msr))
1329 if (msr == MSR_MTRRdefType)
1330 *pdata = vcpu->arch.mtrr_state.def_type +
1331 (vcpu->arch.mtrr_state.enabled << 10);
1332 else if (msr == MSR_MTRRfix64K_00000)
1334 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1335 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1336 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1337 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1338 else if (msr == MSR_IA32_CR_PAT)
1339 *pdata = vcpu->arch.pat;
1340 else { /* Variable MTRRs */
1341 int idx, is_mtrr_mask;
1344 idx = (msr - 0x200) / 2;
1345 is_mtrr_mask = msr - 0x200 - 2 * idx;
1348 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1351 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1358 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1361 u64 mcg_cap = vcpu->arch.mcg_cap;
1362 unsigned bank_num = mcg_cap & 0xff;
1365 case MSR_IA32_P5_MC_ADDR:
1366 case MSR_IA32_P5_MC_TYPE:
1369 case MSR_IA32_MCG_CAP:
1370 data = vcpu->arch.mcg_cap;
1372 case MSR_IA32_MCG_CTL:
1373 if (!(mcg_cap & MCG_CTL_P))
1375 data = vcpu->arch.mcg_ctl;
1377 case MSR_IA32_MCG_STATUS:
1378 data = vcpu->arch.mcg_status;
1381 if (msr >= MSR_IA32_MC0_CTL &&
1382 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1383 u32 offset = msr - MSR_IA32_MC0_CTL;
1384 data = vcpu->arch.mce_banks[offset];
1393 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1396 struct kvm *kvm = vcpu->kvm;
1399 case HV_X64_MSR_GUEST_OS_ID:
1400 data = kvm->arch.hv_guest_os_id;
1402 case HV_X64_MSR_HYPERCALL:
1403 data = kvm->arch.hv_hypercall;
1406 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1414 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1419 case HV_X64_MSR_VP_INDEX: {
1422 kvm_for_each_vcpu(r, v, vcpu->kvm)
1427 case HV_X64_MSR_EOI:
1428 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1429 case HV_X64_MSR_ICR:
1430 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1431 case HV_X64_MSR_TPR:
1432 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1434 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1441 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1446 case MSR_IA32_PLATFORM_ID:
1447 case MSR_IA32_UCODE_REV:
1448 case MSR_IA32_EBL_CR_POWERON:
1449 case MSR_IA32_DEBUGCTLMSR:
1450 case MSR_IA32_LASTBRANCHFROMIP:
1451 case MSR_IA32_LASTBRANCHTOIP:
1452 case MSR_IA32_LASTINTFROMIP:
1453 case MSR_IA32_LASTINTTOIP:
1456 case MSR_VM_HSAVE_PA:
1457 case MSR_P6_PERFCTR0:
1458 case MSR_P6_PERFCTR1:
1459 case MSR_P6_EVNTSEL0:
1460 case MSR_P6_EVNTSEL1:
1461 case MSR_K7_EVNTSEL0:
1462 case MSR_K7_PERFCTR0:
1463 case MSR_K8_INT_PENDING_MSG:
1464 case MSR_AMD64_NB_CFG:
1465 case MSR_FAM10H_MMIO_CONF_BASE:
1469 data = 0x500 | KVM_NR_VAR_MTRR;
1471 case 0x200 ... 0x2ff:
1472 return get_msr_mtrr(vcpu, msr, pdata);
1473 case 0xcd: /* fsb frequency */
1476 case MSR_IA32_APICBASE:
1477 data = kvm_get_apic_base(vcpu);
1479 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1480 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1482 case MSR_IA32_MISC_ENABLE:
1483 data = vcpu->arch.ia32_misc_enable_msr;
1485 case MSR_IA32_PERF_STATUS:
1486 /* TSC increment by tick */
1488 /* CPU multiplier */
1489 data |= (((uint64_t)4ULL) << 40);
1492 data = vcpu->arch.efer;
1494 case MSR_KVM_WALL_CLOCK:
1495 case MSR_KVM_WALL_CLOCK_NEW:
1496 data = vcpu->kvm->arch.wall_clock;
1498 case MSR_KVM_SYSTEM_TIME:
1499 case MSR_KVM_SYSTEM_TIME_NEW:
1500 data = vcpu->arch.time;
1502 case MSR_IA32_P5_MC_ADDR:
1503 case MSR_IA32_P5_MC_TYPE:
1504 case MSR_IA32_MCG_CAP:
1505 case MSR_IA32_MCG_CTL:
1506 case MSR_IA32_MCG_STATUS:
1507 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1508 return get_msr_mce(vcpu, msr, pdata);
1509 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1510 if (kvm_hv_msr_partition_wide(msr)) {
1512 mutex_lock(&vcpu->kvm->lock);
1513 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1514 mutex_unlock(&vcpu->kvm->lock);
1517 return get_msr_hyperv(vcpu, msr, pdata);
1521 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1524 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1532 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1535 * Read or write a bunch of msrs. All parameters are kernel addresses.
1537 * @return number of msrs set successfully.
1539 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1540 struct kvm_msr_entry *entries,
1541 int (*do_msr)(struct kvm_vcpu *vcpu,
1542 unsigned index, u64 *data))
1546 idx = srcu_read_lock(&vcpu->kvm->srcu);
1547 for (i = 0; i < msrs->nmsrs; ++i)
1548 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1550 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1556 * Read or write a bunch of msrs. Parameters are user addresses.
1558 * @return number of msrs set successfully.
1560 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1561 int (*do_msr)(struct kvm_vcpu *vcpu,
1562 unsigned index, u64 *data),
1565 struct kvm_msrs msrs;
1566 struct kvm_msr_entry *entries;
1571 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1575 if (msrs.nmsrs >= MAX_IO_MSRS)
1579 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1580 entries = kmalloc(size, GFP_KERNEL);
1585 if (copy_from_user(entries, user_msrs->entries, size))
1588 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1593 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1604 int kvm_dev_ioctl_check_extension(long ext)
1609 case KVM_CAP_IRQCHIP:
1611 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1612 case KVM_CAP_SET_TSS_ADDR:
1613 case KVM_CAP_EXT_CPUID:
1614 case KVM_CAP_CLOCKSOURCE:
1616 case KVM_CAP_NOP_IO_DELAY:
1617 case KVM_CAP_MP_STATE:
1618 case KVM_CAP_SYNC_MMU:
1619 case KVM_CAP_REINJECT_CONTROL:
1620 case KVM_CAP_IRQ_INJECT_STATUS:
1621 case KVM_CAP_ASSIGN_DEV_IRQ:
1623 case KVM_CAP_IOEVENTFD:
1625 case KVM_CAP_PIT_STATE2:
1626 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1627 case KVM_CAP_XEN_HVM:
1628 case KVM_CAP_ADJUST_CLOCK:
1629 case KVM_CAP_VCPU_EVENTS:
1630 case KVM_CAP_HYPERV:
1631 case KVM_CAP_HYPERV_VAPIC:
1632 case KVM_CAP_HYPERV_SPIN:
1633 case KVM_CAP_PCI_SEGMENT:
1634 case KVM_CAP_DEBUGREGS:
1635 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1638 case KVM_CAP_COALESCED_MMIO:
1639 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1642 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1644 case KVM_CAP_NR_VCPUS:
1647 case KVM_CAP_NR_MEMSLOTS:
1648 r = KVM_MEMORY_SLOTS;
1650 case KVM_CAP_PV_MMU: /* obsolete */
1657 r = KVM_MAX_MCE_BANKS;
1667 long kvm_arch_dev_ioctl(struct file *filp,
1668 unsigned int ioctl, unsigned long arg)
1670 void __user *argp = (void __user *)arg;
1674 case KVM_GET_MSR_INDEX_LIST: {
1675 struct kvm_msr_list __user *user_msr_list = argp;
1676 struct kvm_msr_list msr_list;
1680 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1683 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1684 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1687 if (n < msr_list.nmsrs)
1690 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1691 num_msrs_to_save * sizeof(u32)))
1693 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1695 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1700 case KVM_GET_SUPPORTED_CPUID: {
1701 struct kvm_cpuid2 __user *cpuid_arg = argp;
1702 struct kvm_cpuid2 cpuid;
1705 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1707 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1708 cpuid_arg->entries);
1713 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1718 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1721 mce_cap = KVM_MCE_CAP_SUPPORTED;
1723 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1735 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1737 kvm_x86_ops->vcpu_load(vcpu, cpu);
1738 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1739 unsigned long khz = cpufreq_quick_get(cpu);
1742 per_cpu(cpu_tsc_khz, cpu) = khz;
1744 kvm_request_guest_time_update(vcpu);
1747 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1749 kvm_x86_ops->vcpu_put(vcpu);
1750 kvm_put_guest_fpu(vcpu);
1753 static int is_efer_nx(void)
1755 unsigned long long efer = 0;
1757 rdmsrl_safe(MSR_EFER, &efer);
1758 return efer & EFER_NX;
1761 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1764 struct kvm_cpuid_entry2 *e, *entry;
1767 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1768 e = &vcpu->arch.cpuid_entries[i];
1769 if (e->function == 0x80000001) {
1774 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1775 entry->edx &= ~(1 << 20);
1776 printk(KERN_INFO "kvm: guest NX capability removed\n");
1780 /* when an old userspace process fills a new kernel module */
1781 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1782 struct kvm_cpuid *cpuid,
1783 struct kvm_cpuid_entry __user *entries)
1786 struct kvm_cpuid_entry *cpuid_entries;
1789 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1792 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1796 if (copy_from_user(cpuid_entries, entries,
1797 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1799 for (i = 0; i < cpuid->nent; i++) {
1800 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1801 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1802 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1803 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1804 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1805 vcpu->arch.cpuid_entries[i].index = 0;
1806 vcpu->arch.cpuid_entries[i].flags = 0;
1807 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1808 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1809 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1811 vcpu->arch.cpuid_nent = cpuid->nent;
1812 cpuid_fix_nx_cap(vcpu);
1814 kvm_apic_set_version(vcpu);
1815 kvm_x86_ops->cpuid_update(vcpu);
1818 vfree(cpuid_entries);
1823 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1824 struct kvm_cpuid2 *cpuid,
1825 struct kvm_cpuid_entry2 __user *entries)
1830 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1833 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1834 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1836 vcpu->arch.cpuid_nent = cpuid->nent;
1837 kvm_apic_set_version(vcpu);
1838 kvm_x86_ops->cpuid_update(vcpu);
1845 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1846 struct kvm_cpuid2 *cpuid,
1847 struct kvm_cpuid_entry2 __user *entries)
1852 if (cpuid->nent < vcpu->arch.cpuid_nent)
1855 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1856 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1861 cpuid->nent = vcpu->arch.cpuid_nent;
1865 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1868 entry->function = function;
1869 entry->index = index;
1870 cpuid_count(entry->function, entry->index,
1871 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1875 #define F(x) bit(X86_FEATURE_##x)
1877 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1878 u32 index, int *nent, int maxnent)
1880 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1881 #ifdef CONFIG_X86_64
1882 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1884 unsigned f_lm = F(LM);
1886 unsigned f_gbpages = 0;
1889 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1892 const u32 kvm_supported_word0_x86_features =
1893 F(FPU) | F(VME) | F(DE) | F(PSE) |
1894 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1895 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1896 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1897 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1898 0 /* Reserved, DS, ACPI */ | F(MMX) |
1899 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1900 0 /* HTT, TM, Reserved, PBE */;
1901 /* cpuid 0x80000001.edx */
1902 const u32 kvm_supported_word1_x86_features =
1903 F(FPU) | F(VME) | F(DE) | F(PSE) |
1904 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1905 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1906 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1907 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1908 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1909 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1910 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1912 const u32 kvm_supported_word4_x86_features =
1913 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1914 0 /* DS-CPL, VMX, SMX, EST */ |
1915 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1916 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1917 0 /* Reserved, DCA */ | F(XMM4_1) |
1918 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1919 0 /* Reserved, XSAVE, OSXSAVE */;
1920 /* cpuid 0x80000001.ecx */
1921 const u32 kvm_supported_word6_x86_features =
1922 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1923 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1924 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1925 0 /* SKINIT */ | 0 /* WDT */;
1927 /* all calls to cpuid_count() should be made on the same cpu */
1929 do_cpuid_1_ent(entry, function, index);
1934 entry->eax = min(entry->eax, (u32)0xb);
1937 entry->edx &= kvm_supported_word0_x86_features;
1938 entry->ecx &= kvm_supported_word4_x86_features;
1939 /* we support x2apic emulation even if host does not support
1940 * it since we emulate x2apic in software */
1941 entry->ecx |= F(X2APIC);
1943 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1944 * may return different values. This forces us to get_cpu() before
1945 * issuing the first command, and also to emulate this annoying behavior
1946 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1948 int t, times = entry->eax & 0xff;
1950 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1951 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1952 for (t = 1; t < times && *nent < maxnent; ++t) {
1953 do_cpuid_1_ent(&entry[t], function, 0);
1954 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1959 /* function 4 and 0xb have additional index. */
1963 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1964 /* read more entries until cache_type is zero */
1965 for (i = 1; *nent < maxnent; ++i) {
1966 cache_type = entry[i - 1].eax & 0x1f;
1969 do_cpuid_1_ent(&entry[i], function, i);
1971 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1979 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1980 /* read more entries until level_type is zero */
1981 for (i = 1; *nent < maxnent; ++i) {
1982 level_type = entry[i - 1].ecx & 0xff00;
1985 do_cpuid_1_ent(&entry[i], function, i);
1987 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1992 case KVM_CPUID_SIGNATURE: {
1993 char signature[12] = "KVMKVMKVM\0\0";
1994 u32 *sigptr = (u32 *)signature;
1996 entry->ebx = sigptr[0];
1997 entry->ecx = sigptr[1];
1998 entry->edx = sigptr[2];
2001 case KVM_CPUID_FEATURES:
2002 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2003 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2004 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2005 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2011 entry->eax = min(entry->eax, 0x8000001a);
2014 entry->edx &= kvm_supported_word1_x86_features;
2015 entry->ecx &= kvm_supported_word6_x86_features;
2019 kvm_x86_ops->set_supported_cpuid(function, entry);
2026 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2027 struct kvm_cpuid_entry2 __user *entries)
2029 struct kvm_cpuid_entry2 *cpuid_entries;
2030 int limit, nent = 0, r = -E2BIG;
2033 if (cpuid->nent < 1)
2035 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2036 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2038 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2042 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2043 limit = cpuid_entries[0].eax;
2044 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2045 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2046 &nent, cpuid->nent);
2048 if (nent >= cpuid->nent)
2051 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2052 limit = cpuid_entries[nent - 1].eax;
2053 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2054 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2055 &nent, cpuid->nent);
2060 if (nent >= cpuid->nent)
2063 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2067 if (nent >= cpuid->nent)
2070 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2074 if (nent >= cpuid->nent)
2078 if (copy_to_user(entries, cpuid_entries,
2079 nent * sizeof(struct kvm_cpuid_entry2)))
2085 vfree(cpuid_entries);
2090 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2091 struct kvm_lapic_state *s)
2093 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2098 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2099 struct kvm_lapic_state *s)
2101 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2102 kvm_apic_post_state_restore(vcpu);
2103 update_cr8_intercept(vcpu);
2108 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2109 struct kvm_interrupt *irq)
2111 if (irq->irq < 0 || irq->irq >= 256)
2113 if (irqchip_in_kernel(vcpu->kvm))
2116 kvm_queue_interrupt(vcpu, irq->irq, false);
2121 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2123 kvm_inject_nmi(vcpu);
2128 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2129 struct kvm_tpr_access_ctl *tac)
2133 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2137 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2141 unsigned bank_num = mcg_cap & 0xff, bank;
2144 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2146 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2149 vcpu->arch.mcg_cap = mcg_cap;
2150 /* Init IA32_MCG_CTL to all 1s */
2151 if (mcg_cap & MCG_CTL_P)
2152 vcpu->arch.mcg_ctl = ~(u64)0;
2153 /* Init IA32_MCi_CTL to all 1s */
2154 for (bank = 0; bank < bank_num; bank++)
2155 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2160 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2161 struct kvm_x86_mce *mce)
2163 u64 mcg_cap = vcpu->arch.mcg_cap;
2164 unsigned bank_num = mcg_cap & 0xff;
2165 u64 *banks = vcpu->arch.mce_banks;
2167 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2170 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2171 * reporting is disabled
2173 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2174 vcpu->arch.mcg_ctl != ~(u64)0)
2176 banks += 4 * mce->bank;
2178 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2179 * reporting is disabled for the bank
2181 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2183 if (mce->status & MCI_STATUS_UC) {
2184 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2185 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2186 printk(KERN_DEBUG "kvm: set_mce: "
2187 "injects mce exception while "
2188 "previous one is in progress!\n");
2189 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2192 if (banks[1] & MCI_STATUS_VAL)
2193 mce->status |= MCI_STATUS_OVER;
2194 banks[2] = mce->addr;
2195 banks[3] = mce->misc;
2196 vcpu->arch.mcg_status = mce->mcg_status;
2197 banks[1] = mce->status;
2198 kvm_queue_exception(vcpu, MC_VECTOR);
2199 } else if (!(banks[1] & MCI_STATUS_VAL)
2200 || !(banks[1] & MCI_STATUS_UC)) {
2201 if (banks[1] & MCI_STATUS_VAL)
2202 mce->status |= MCI_STATUS_OVER;
2203 banks[2] = mce->addr;
2204 banks[3] = mce->misc;
2205 banks[1] = mce->status;
2207 banks[1] |= MCI_STATUS_OVER;
2211 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2212 struct kvm_vcpu_events *events)
2214 events->exception.injected =
2215 vcpu->arch.exception.pending &&
2216 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2217 events->exception.nr = vcpu->arch.exception.nr;
2218 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2219 events->exception.error_code = vcpu->arch.exception.error_code;
2221 events->interrupt.injected =
2222 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2223 events->interrupt.nr = vcpu->arch.interrupt.nr;
2224 events->interrupt.soft = 0;
2225 events->interrupt.shadow =
2226 kvm_x86_ops->get_interrupt_shadow(vcpu,
2227 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2229 events->nmi.injected = vcpu->arch.nmi_injected;
2230 events->nmi.pending = vcpu->arch.nmi_pending;
2231 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2233 events->sipi_vector = vcpu->arch.sipi_vector;
2235 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2236 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2237 | KVM_VCPUEVENT_VALID_SHADOW);
2240 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2241 struct kvm_vcpu_events *events)
2243 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2244 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2245 | KVM_VCPUEVENT_VALID_SHADOW))
2248 vcpu->arch.exception.pending = events->exception.injected;
2249 vcpu->arch.exception.nr = events->exception.nr;
2250 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2251 vcpu->arch.exception.error_code = events->exception.error_code;
2253 vcpu->arch.interrupt.pending = events->interrupt.injected;
2254 vcpu->arch.interrupt.nr = events->interrupt.nr;
2255 vcpu->arch.interrupt.soft = events->interrupt.soft;
2256 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2257 kvm_pic_clear_isr_ack(vcpu->kvm);
2258 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2259 kvm_x86_ops->set_interrupt_shadow(vcpu,
2260 events->interrupt.shadow);
2262 vcpu->arch.nmi_injected = events->nmi.injected;
2263 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2264 vcpu->arch.nmi_pending = events->nmi.pending;
2265 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2267 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2268 vcpu->arch.sipi_vector = events->sipi_vector;
2273 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2274 struct kvm_debugregs *dbgregs)
2276 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2277 dbgregs->dr6 = vcpu->arch.dr6;
2278 dbgregs->dr7 = vcpu->arch.dr7;
2282 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2283 struct kvm_debugregs *dbgregs)
2288 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2289 vcpu->arch.dr6 = dbgregs->dr6;
2290 vcpu->arch.dr7 = dbgregs->dr7;
2295 long kvm_arch_vcpu_ioctl(struct file *filp,
2296 unsigned int ioctl, unsigned long arg)
2298 struct kvm_vcpu *vcpu = filp->private_data;
2299 void __user *argp = (void __user *)arg;
2301 struct kvm_lapic_state *lapic = NULL;
2304 case KVM_GET_LAPIC: {
2306 if (!vcpu->arch.apic)
2308 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2313 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2317 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2322 case KVM_SET_LAPIC: {
2324 if (!vcpu->arch.apic)
2326 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2331 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2333 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2339 case KVM_INTERRUPT: {
2340 struct kvm_interrupt irq;
2343 if (copy_from_user(&irq, argp, sizeof irq))
2345 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2352 r = kvm_vcpu_ioctl_nmi(vcpu);
2358 case KVM_SET_CPUID: {
2359 struct kvm_cpuid __user *cpuid_arg = argp;
2360 struct kvm_cpuid cpuid;
2363 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2365 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2370 case KVM_SET_CPUID2: {
2371 struct kvm_cpuid2 __user *cpuid_arg = argp;
2372 struct kvm_cpuid2 cpuid;
2375 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2377 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2378 cpuid_arg->entries);
2383 case KVM_GET_CPUID2: {
2384 struct kvm_cpuid2 __user *cpuid_arg = argp;
2385 struct kvm_cpuid2 cpuid;
2388 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2390 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2391 cpuid_arg->entries);
2395 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2401 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2404 r = msr_io(vcpu, argp, do_set_msr, 0);
2406 case KVM_TPR_ACCESS_REPORTING: {
2407 struct kvm_tpr_access_ctl tac;
2410 if (copy_from_user(&tac, argp, sizeof tac))
2412 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2416 if (copy_to_user(argp, &tac, sizeof tac))
2421 case KVM_SET_VAPIC_ADDR: {
2422 struct kvm_vapic_addr va;
2425 if (!irqchip_in_kernel(vcpu->kvm))
2428 if (copy_from_user(&va, argp, sizeof va))
2431 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2434 case KVM_X86_SETUP_MCE: {
2438 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2440 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2443 case KVM_X86_SET_MCE: {
2444 struct kvm_x86_mce mce;
2447 if (copy_from_user(&mce, argp, sizeof mce))
2449 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2452 case KVM_GET_VCPU_EVENTS: {
2453 struct kvm_vcpu_events events;
2455 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2458 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2463 case KVM_SET_VCPU_EVENTS: {
2464 struct kvm_vcpu_events events;
2467 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2470 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2473 case KVM_GET_DEBUGREGS: {
2474 struct kvm_debugregs dbgregs;
2476 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2479 if (copy_to_user(argp, &dbgregs,
2480 sizeof(struct kvm_debugregs)))
2485 case KVM_SET_DEBUGREGS: {
2486 struct kvm_debugregs dbgregs;
2489 if (copy_from_user(&dbgregs, argp,
2490 sizeof(struct kvm_debugregs)))
2493 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2504 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2508 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2510 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2514 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2517 kvm->arch.ept_identity_map_addr = ident_addr;
2521 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2522 u32 kvm_nr_mmu_pages)
2524 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2527 mutex_lock(&kvm->slots_lock);
2528 spin_lock(&kvm->mmu_lock);
2530 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2531 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2533 spin_unlock(&kvm->mmu_lock);
2534 mutex_unlock(&kvm->slots_lock);
2538 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2540 return kvm->arch.n_alloc_mmu_pages;
2543 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2546 struct kvm_mem_alias *alias;
2547 struct kvm_mem_aliases *aliases;
2549 aliases = kvm_aliases(kvm);
2551 for (i = 0; i < aliases->naliases; ++i) {
2552 alias = &aliases->aliases[i];
2553 if (alias->flags & KVM_ALIAS_INVALID)
2555 if (gfn >= alias->base_gfn
2556 && gfn < alias->base_gfn + alias->npages)
2557 return alias->target_gfn + gfn - alias->base_gfn;
2562 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2565 struct kvm_mem_alias *alias;
2566 struct kvm_mem_aliases *aliases;
2568 aliases = kvm_aliases(kvm);
2570 for (i = 0; i < aliases->naliases; ++i) {
2571 alias = &aliases->aliases[i];
2572 if (gfn >= alias->base_gfn
2573 && gfn < alias->base_gfn + alias->npages)
2574 return alias->target_gfn + gfn - alias->base_gfn;
2580 * Set a new alias region. Aliases map a portion of physical memory into
2581 * another portion. This is useful for memory windows, for example the PC
2584 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2585 struct kvm_memory_alias *alias)
2588 struct kvm_mem_alias *p;
2589 struct kvm_mem_aliases *aliases, *old_aliases;
2592 /* General sanity checks */
2593 if (alias->memory_size & (PAGE_SIZE - 1))
2595 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2597 if (alias->slot >= KVM_ALIAS_SLOTS)
2599 if (alias->guest_phys_addr + alias->memory_size
2600 < alias->guest_phys_addr)
2602 if (alias->target_phys_addr + alias->memory_size
2603 < alias->target_phys_addr)
2607 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2611 mutex_lock(&kvm->slots_lock);
2613 /* invalidate any gfn reference in case of deletion/shrinking */
2614 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2615 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2616 old_aliases = kvm->arch.aliases;
2617 rcu_assign_pointer(kvm->arch.aliases, aliases);
2618 synchronize_srcu_expedited(&kvm->srcu);
2619 kvm_mmu_zap_all(kvm);
2623 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2627 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2629 p = &aliases->aliases[alias->slot];
2630 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2631 p->npages = alias->memory_size >> PAGE_SHIFT;
2632 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2633 p->flags &= ~(KVM_ALIAS_INVALID);
2635 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2636 if (aliases->aliases[n - 1].npages)
2638 aliases->naliases = n;
2640 old_aliases = kvm->arch.aliases;
2641 rcu_assign_pointer(kvm->arch.aliases, aliases);
2642 synchronize_srcu_expedited(&kvm->srcu);
2647 mutex_unlock(&kvm->slots_lock);
2652 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2657 switch (chip->chip_id) {
2658 case KVM_IRQCHIP_PIC_MASTER:
2659 memcpy(&chip->chip.pic,
2660 &pic_irqchip(kvm)->pics[0],
2661 sizeof(struct kvm_pic_state));
2663 case KVM_IRQCHIP_PIC_SLAVE:
2664 memcpy(&chip->chip.pic,
2665 &pic_irqchip(kvm)->pics[1],
2666 sizeof(struct kvm_pic_state));
2668 case KVM_IRQCHIP_IOAPIC:
2669 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2678 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2683 switch (chip->chip_id) {
2684 case KVM_IRQCHIP_PIC_MASTER:
2685 raw_spin_lock(&pic_irqchip(kvm)->lock);
2686 memcpy(&pic_irqchip(kvm)->pics[0],
2688 sizeof(struct kvm_pic_state));
2689 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2691 case KVM_IRQCHIP_PIC_SLAVE:
2692 raw_spin_lock(&pic_irqchip(kvm)->lock);
2693 memcpy(&pic_irqchip(kvm)->pics[1],
2695 sizeof(struct kvm_pic_state));
2696 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2698 case KVM_IRQCHIP_IOAPIC:
2699 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2705 kvm_pic_update_irq(pic_irqchip(kvm));
2709 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2713 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2714 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2715 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2719 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2723 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2724 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2725 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2726 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2730 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2734 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2735 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2736 sizeof(ps->channels));
2737 ps->flags = kvm->arch.vpit->pit_state.flags;
2738 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2742 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2744 int r = 0, start = 0;
2745 u32 prev_legacy, cur_legacy;
2746 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2747 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2748 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2749 if (!prev_legacy && cur_legacy)
2751 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2752 sizeof(kvm->arch.vpit->pit_state.channels));
2753 kvm->arch.vpit->pit_state.flags = ps->flags;
2754 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2755 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2759 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2760 struct kvm_reinject_control *control)
2762 if (!kvm->arch.vpit)
2764 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2765 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2766 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2771 * Get (and clear) the dirty memory log for a memory slot.
2773 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2774 struct kvm_dirty_log *log)
2777 struct kvm_memory_slot *memslot;
2779 unsigned long is_dirty = 0;
2781 mutex_lock(&kvm->slots_lock);
2784 if (log->slot >= KVM_MEMORY_SLOTS)
2787 memslot = &kvm->memslots->memslots[log->slot];
2789 if (!memslot->dirty_bitmap)
2792 n = kvm_dirty_bitmap_bytes(memslot);
2794 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2795 is_dirty = memslot->dirty_bitmap[i];
2797 /* If nothing is dirty, don't bother messing with page tables. */
2799 struct kvm_memslots *slots, *old_slots;
2800 unsigned long *dirty_bitmap;
2802 spin_lock(&kvm->mmu_lock);
2803 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2804 spin_unlock(&kvm->mmu_lock);
2807 dirty_bitmap = vmalloc(n);
2810 memset(dirty_bitmap, 0, n);
2813 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2815 vfree(dirty_bitmap);
2818 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2819 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2821 old_slots = kvm->memslots;
2822 rcu_assign_pointer(kvm->memslots, slots);
2823 synchronize_srcu_expedited(&kvm->srcu);
2824 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2828 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2829 vfree(dirty_bitmap);
2832 vfree(dirty_bitmap);
2835 if (clear_user(log->dirty_bitmap, n))
2841 mutex_unlock(&kvm->slots_lock);
2845 long kvm_arch_vm_ioctl(struct file *filp,
2846 unsigned int ioctl, unsigned long arg)
2848 struct kvm *kvm = filp->private_data;
2849 void __user *argp = (void __user *)arg;
2852 * This union makes it completely explicit to gcc-3.x
2853 * that these two variables' stack usage should be
2854 * combined, not added together.
2857 struct kvm_pit_state ps;
2858 struct kvm_pit_state2 ps2;
2859 struct kvm_memory_alias alias;
2860 struct kvm_pit_config pit_config;
2864 case KVM_SET_TSS_ADDR:
2865 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2869 case KVM_SET_IDENTITY_MAP_ADDR: {
2873 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2875 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2880 case KVM_SET_MEMORY_REGION: {
2881 struct kvm_memory_region kvm_mem;
2882 struct kvm_userspace_memory_region kvm_userspace_mem;
2885 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2887 kvm_userspace_mem.slot = kvm_mem.slot;
2888 kvm_userspace_mem.flags = kvm_mem.flags;
2889 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2890 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2891 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2896 case KVM_SET_NR_MMU_PAGES:
2897 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2901 case KVM_GET_NR_MMU_PAGES:
2902 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2904 case KVM_SET_MEMORY_ALIAS:
2906 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2908 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2912 case KVM_CREATE_IRQCHIP: {
2913 struct kvm_pic *vpic;
2915 mutex_lock(&kvm->lock);
2918 goto create_irqchip_unlock;
2920 vpic = kvm_create_pic(kvm);
2922 r = kvm_ioapic_init(kvm);
2924 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2927 goto create_irqchip_unlock;
2930 goto create_irqchip_unlock;
2932 kvm->arch.vpic = vpic;
2934 r = kvm_setup_default_irq_routing(kvm);
2936 mutex_lock(&kvm->irq_lock);
2937 kvm_ioapic_destroy(kvm);
2938 kvm_destroy_pic(kvm);
2939 mutex_unlock(&kvm->irq_lock);
2941 create_irqchip_unlock:
2942 mutex_unlock(&kvm->lock);
2945 case KVM_CREATE_PIT:
2946 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2948 case KVM_CREATE_PIT2:
2950 if (copy_from_user(&u.pit_config, argp,
2951 sizeof(struct kvm_pit_config)))
2954 mutex_lock(&kvm->slots_lock);
2957 goto create_pit_unlock;
2959 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2963 mutex_unlock(&kvm->slots_lock);
2965 case KVM_IRQ_LINE_STATUS:
2966 case KVM_IRQ_LINE: {
2967 struct kvm_irq_level irq_event;
2970 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2973 if (irqchip_in_kernel(kvm)) {
2975 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2976 irq_event.irq, irq_event.level);
2977 if (ioctl == KVM_IRQ_LINE_STATUS) {
2979 irq_event.status = status;
2980 if (copy_to_user(argp, &irq_event,
2988 case KVM_GET_IRQCHIP: {
2989 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2990 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2996 if (copy_from_user(chip, argp, sizeof *chip))
2997 goto get_irqchip_out;
2999 if (!irqchip_in_kernel(kvm))
3000 goto get_irqchip_out;
3001 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3003 goto get_irqchip_out;
3005 if (copy_to_user(argp, chip, sizeof *chip))
3006 goto get_irqchip_out;
3014 case KVM_SET_IRQCHIP: {
3015 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3016 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3022 if (copy_from_user(chip, argp, sizeof *chip))
3023 goto set_irqchip_out;
3025 if (!irqchip_in_kernel(kvm))
3026 goto set_irqchip_out;
3027 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3029 goto set_irqchip_out;
3039 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3042 if (!kvm->arch.vpit)
3044 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3048 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3055 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3058 if (!kvm->arch.vpit)
3060 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3066 case KVM_GET_PIT2: {
3068 if (!kvm->arch.vpit)
3070 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3074 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3079 case KVM_SET_PIT2: {
3081 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3084 if (!kvm->arch.vpit)
3086 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3092 case KVM_REINJECT_CONTROL: {
3093 struct kvm_reinject_control control;
3095 if (copy_from_user(&control, argp, sizeof(control)))
3097 r = kvm_vm_ioctl_reinject(kvm, &control);
3103 case KVM_XEN_HVM_CONFIG: {
3105 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3106 sizeof(struct kvm_xen_hvm_config)))
3109 if (kvm->arch.xen_hvm_config.flags)
3114 case KVM_SET_CLOCK: {
3115 struct timespec now;
3116 struct kvm_clock_data user_ns;
3121 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3130 now_ns = timespec_to_ns(&now);
3131 delta = user_ns.clock - now_ns;
3132 kvm->arch.kvmclock_offset = delta;
3135 case KVM_GET_CLOCK: {
3136 struct timespec now;
3137 struct kvm_clock_data user_ns;
3141 now_ns = timespec_to_ns(&now);
3142 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3146 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3159 static void kvm_init_msr_list(void)
3164 /* skip the first msrs in the list. KVM-specific */
3165 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3166 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3169 msrs_to_save[j] = msrs_to_save[i];
3172 num_msrs_to_save = j;
3175 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3178 if (vcpu->arch.apic &&
3179 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3182 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3185 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3187 if (vcpu->arch.apic &&
3188 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3191 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3194 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3195 struct kvm_segment *var, int seg)
3197 kvm_x86_ops->set_segment(vcpu, var, seg);
3200 void kvm_get_segment(struct kvm_vcpu *vcpu,
3201 struct kvm_segment *var, int seg)
3203 kvm_x86_ops->get_segment(vcpu, var, seg);
3206 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3208 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3209 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3212 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3214 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3215 access |= PFERR_FETCH_MASK;
3216 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3219 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3221 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3222 access |= PFERR_WRITE_MASK;
3223 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3226 /* uses this to access any guest's mapped memory without checking CPL */
3227 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3229 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3232 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3233 struct kvm_vcpu *vcpu, u32 access,
3237 int r = X86EMUL_CONTINUE;
3240 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3241 unsigned offset = addr & (PAGE_SIZE-1);
3242 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3245 if (gpa == UNMAPPED_GVA) {
3246 r = X86EMUL_PROPAGATE_FAULT;
3249 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3251 r = X86EMUL_IO_NEEDED;
3263 /* used for instruction fetching */
3264 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3265 struct kvm_vcpu *vcpu, u32 *error)
3267 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3268 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3269 access | PFERR_FETCH_MASK, error);
3272 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3273 struct kvm_vcpu *vcpu, u32 *error)
3275 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3276 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3280 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3281 struct kvm_vcpu *vcpu, u32 *error)
3283 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3286 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3288 struct kvm_vcpu *vcpu,
3292 int r = X86EMUL_CONTINUE;
3295 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3296 PFERR_WRITE_MASK, error);
3297 unsigned offset = addr & (PAGE_SIZE-1);
3298 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3301 if (gpa == UNMAPPED_GVA) {
3302 r = X86EMUL_PROPAGATE_FAULT;
3305 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3307 r = X86EMUL_IO_NEEDED;
3319 static int emulator_read_emulated(unsigned long addr,
3322 unsigned int *error_code,
3323 struct kvm_vcpu *vcpu)
3327 if (vcpu->mmio_read_completed) {
3328 memcpy(val, vcpu->mmio_data, bytes);
3329 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3330 vcpu->mmio_phys_addr, *(u64 *)val);
3331 vcpu->mmio_read_completed = 0;
3332 return X86EMUL_CONTINUE;
3335 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3337 if (gpa == UNMAPPED_GVA)
3338 return X86EMUL_PROPAGATE_FAULT;
3340 /* For APIC access vmexit */
3341 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3344 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3345 == X86EMUL_CONTINUE)
3346 return X86EMUL_CONTINUE;
3350 * Is this MMIO handled locally?
3352 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3353 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3354 return X86EMUL_CONTINUE;
3357 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3359 vcpu->mmio_needed = 1;
3360 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3361 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3362 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3363 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3365 return X86EMUL_IO_NEEDED;
3368 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3369 const void *val, int bytes)
3373 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3376 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3380 static int emulator_write_emulated_onepage(unsigned long addr,
3383 unsigned int *error_code,
3384 struct kvm_vcpu *vcpu)
3388 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3390 if (gpa == UNMAPPED_GVA)
3391 return X86EMUL_PROPAGATE_FAULT;
3393 /* For APIC access vmexit */
3394 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3397 if (emulator_write_phys(vcpu, gpa, val, bytes))
3398 return X86EMUL_CONTINUE;
3401 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3403 * Is this MMIO handled locally?
3405 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3406 return X86EMUL_CONTINUE;
3408 vcpu->mmio_needed = 1;
3409 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3410 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3411 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3412 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3413 memcpy(vcpu->run->mmio.data, val, bytes);
3415 return X86EMUL_CONTINUE;
3418 int emulator_write_emulated(unsigned long addr,
3421 unsigned int *error_code,
3422 struct kvm_vcpu *vcpu)
3424 /* Crossing a page boundary? */
3425 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3428 now = -addr & ~PAGE_MASK;
3429 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3431 if (rc != X86EMUL_CONTINUE)
3437 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3441 #define CMPXCHG_TYPE(t, ptr, old, new) \
3442 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3444 #ifdef CONFIG_X86_64
3445 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3447 # define CMPXCHG64(ptr, old, new) \
3448 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3451 static int emulator_cmpxchg_emulated(unsigned long addr,
3455 unsigned int *error_code,
3456 struct kvm_vcpu *vcpu)
3463 /* guests cmpxchg8b have to be emulated atomically */
3464 if (bytes > 8 || (bytes & (bytes - 1)))
3467 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3469 if (gpa == UNMAPPED_GVA ||
3470 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3473 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3476 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3478 kaddr = kmap_atomic(page, KM_USER0);
3479 kaddr += offset_in_page(gpa);
3482 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3485 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3488 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3491 exchanged = CMPXCHG64(kaddr, old, new);
3496 kunmap_atomic(kaddr, KM_USER0);
3497 kvm_release_page_dirty(page);
3500 return X86EMUL_CMPXCHG_FAILED;
3502 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3504 return X86EMUL_CONTINUE;
3507 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3509 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3512 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3514 /* TODO: String I/O for in kernel device */
3517 if (vcpu->arch.pio.in)
3518 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3519 vcpu->arch.pio.size, pd);
3521 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3522 vcpu->arch.pio.port, vcpu->arch.pio.size,
3528 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3529 unsigned int count, struct kvm_vcpu *vcpu)
3531 if (vcpu->arch.pio.count)
3534 trace_kvm_pio(1, port, size, 1);
3536 vcpu->arch.pio.port = port;
3537 vcpu->arch.pio.in = 1;
3538 vcpu->arch.pio.count = count;
3539 vcpu->arch.pio.size = size;
3541 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3543 memcpy(val, vcpu->arch.pio_data, size * count);
3544 vcpu->arch.pio.count = 0;
3548 vcpu->run->exit_reason = KVM_EXIT_IO;
3549 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3550 vcpu->run->io.size = size;
3551 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3552 vcpu->run->io.count = count;
3553 vcpu->run->io.port = port;
3558 static int emulator_pio_out_emulated(int size, unsigned short port,
3559 const void *val, unsigned int count,
3560 struct kvm_vcpu *vcpu)
3562 trace_kvm_pio(0, port, size, 1);
3564 vcpu->arch.pio.port = port;
3565 vcpu->arch.pio.in = 0;
3566 vcpu->arch.pio.count = count;
3567 vcpu->arch.pio.size = size;
3569 memcpy(vcpu->arch.pio_data, val, size * count);
3571 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3572 vcpu->arch.pio.count = 0;
3576 vcpu->run->exit_reason = KVM_EXIT_IO;
3577 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3578 vcpu->run->io.size = size;
3579 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3580 vcpu->run->io.count = count;
3581 vcpu->run->io.port = port;
3586 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3588 return kvm_x86_ops->get_segment_base(vcpu, seg);
3591 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3593 kvm_mmu_invlpg(vcpu, address);
3594 return X86EMUL_CONTINUE;
3597 int emulate_clts(struct kvm_vcpu *vcpu)
3599 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3600 kvm_x86_ops->fpu_activate(vcpu);
3601 return X86EMUL_CONTINUE;
3604 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3606 return _kvm_get_dr(vcpu, dr, dest);
3609 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3612 return __kvm_set_dr(vcpu, dr, value);
3615 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3617 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3620 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3622 unsigned long value;
3626 value = kvm_read_cr0(vcpu);
3629 value = vcpu->arch.cr2;
3632 value = vcpu->arch.cr3;
3635 value = kvm_read_cr4(vcpu);
3638 value = kvm_get_cr8(vcpu);
3641 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3648 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3654 res = __kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3657 vcpu->arch.cr2 = val;
3660 res = __kvm_set_cr3(vcpu, val);
3663 res = __kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3666 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3669 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3676 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3678 return kvm_x86_ops->get_cpl(vcpu);
3681 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3683 kvm_x86_ops->get_gdt(vcpu, dt);
3686 static unsigned long emulator_get_cached_segment_base(int seg,
3687 struct kvm_vcpu *vcpu)
3689 return get_segment_base(vcpu, seg);
3692 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3693 struct kvm_vcpu *vcpu)
3695 struct kvm_segment var;
3697 kvm_get_segment(vcpu, &var, seg);
3704 set_desc_limit(desc, var.limit);
3705 set_desc_base(desc, (unsigned long)var.base);
3706 desc->type = var.type;
3708 desc->dpl = var.dpl;
3709 desc->p = var.present;
3710 desc->avl = var.avl;
3718 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3719 struct kvm_vcpu *vcpu)
3721 struct kvm_segment var;
3723 /* needed to preserve selector */
3724 kvm_get_segment(vcpu, &var, seg);
3726 var.base = get_desc_base(desc);
3727 var.limit = get_desc_limit(desc);
3729 var.limit = (var.limit << 12) | 0xfff;
3730 var.type = desc->type;
3731 var.present = desc->p;
3732 var.dpl = desc->dpl;
3737 var.avl = desc->avl;
3738 var.present = desc->p;
3739 var.unusable = !var.present;
3742 kvm_set_segment(vcpu, &var, seg);
3746 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3748 struct kvm_segment kvm_seg;
3750 kvm_get_segment(vcpu, &kvm_seg, seg);
3751 return kvm_seg.selector;
3754 static void emulator_set_segment_selector(u16 sel, int seg,
3755 struct kvm_vcpu *vcpu)
3757 struct kvm_segment kvm_seg;
3759 kvm_get_segment(vcpu, &kvm_seg, seg);
3760 kvm_seg.selector = sel;
3761 kvm_set_segment(vcpu, &kvm_seg, seg);
3764 static struct x86_emulate_ops emulate_ops = {
3765 .read_std = kvm_read_guest_virt_system,
3766 .write_std = kvm_write_guest_virt_system,
3767 .fetch = kvm_fetch_guest_virt,
3768 .read_emulated = emulator_read_emulated,
3769 .write_emulated = emulator_write_emulated,
3770 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3771 .pio_in_emulated = emulator_pio_in_emulated,
3772 .pio_out_emulated = emulator_pio_out_emulated,
3773 .get_cached_descriptor = emulator_get_cached_descriptor,
3774 .set_cached_descriptor = emulator_set_cached_descriptor,
3775 .get_segment_selector = emulator_get_segment_selector,
3776 .set_segment_selector = emulator_set_segment_selector,
3777 .get_cached_segment_base = emulator_get_cached_segment_base,
3778 .get_gdt = emulator_get_gdt,
3779 .get_cr = emulator_get_cr,
3780 .set_cr = emulator_set_cr,
3781 .cpl = emulator_get_cpl,
3782 .get_dr = emulator_get_dr,
3783 .set_dr = emulator_set_dr,
3784 .set_msr = kvm_set_msr,
3785 .get_msr = kvm_get_msr,
3788 static void cache_all_regs(struct kvm_vcpu *vcpu)
3790 kvm_register_read(vcpu, VCPU_REGS_RAX);
3791 kvm_register_read(vcpu, VCPU_REGS_RSP);
3792 kvm_register_read(vcpu, VCPU_REGS_RIP);
3793 vcpu->arch.regs_dirty = ~0;
3796 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3798 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3800 * an sti; sti; sequence only disable interrupts for the first
3801 * instruction. So, if the last instruction, be it emulated or
3802 * not, left the system with the INT_STI flag enabled, it
3803 * means that the last instruction is an sti. We should not
3804 * leave the flag on in this case. The same goes for mov ss
3806 if (!(int_shadow & mask))
3807 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3810 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3812 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3813 if (ctxt->exception == PF_VECTOR)
3814 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3815 else if (ctxt->error_code_valid)
3816 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3818 kvm_queue_exception(vcpu, ctxt->exception);
3821 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3823 ++vcpu->stat.insn_emulation_fail;
3824 trace_kvm_emulate_insn_failed(vcpu);
3825 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3826 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3827 vcpu->run->internal.ndata = 0;
3828 kvm_queue_exception(vcpu, UD_VECTOR);
3829 return EMULATE_FAIL;
3832 int emulate_instruction(struct kvm_vcpu *vcpu,
3838 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3840 kvm_clear_exception_queue(vcpu);
3841 vcpu->arch.mmio_fault_cr2 = cr2;
3843 * TODO: fix emulate.c to use guest_read/write_register
3844 * instead of direct ->regs accesses, can save hundred cycles
3845 * on Intel for instructions that don't read/change RSP, for
3848 cache_all_regs(vcpu);
3850 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3852 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3854 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3855 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3856 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3857 vcpu->arch.emulate_ctxt.mode =
3858 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3859 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3860 ? X86EMUL_MODE_VM86 : cs_l
3861 ? X86EMUL_MODE_PROT64 : cs_db
3862 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3863 memset(c, 0, sizeof(struct decode_cache));
3864 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3865 vcpu->arch.emulate_ctxt.interruptibility = 0;
3866 vcpu->arch.emulate_ctxt.exception = -1;
3868 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3869 trace_kvm_emulate_insn_start(vcpu);
3871 /* Only allow emulation of specific instructions on #UD
3872 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3873 if (emulation_type & EMULTYPE_TRAP_UD) {
3875 return EMULATE_FAIL;
3877 case 0x01: /* VMMCALL */
3878 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3879 return EMULATE_FAIL;
3881 case 0x34: /* sysenter */
3882 case 0x35: /* sysexit */
3883 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3884 return EMULATE_FAIL;
3886 case 0x05: /* syscall */
3887 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3888 return EMULATE_FAIL;
3891 return EMULATE_FAIL;
3894 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3895 return EMULATE_FAIL;
3898 ++vcpu->stat.insn_emulation;
3900 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3901 return EMULATE_DONE;
3902 if (emulation_type & EMULTYPE_SKIP)
3903 return EMULATE_FAIL;
3904 return handle_emulation_failure(vcpu);
3908 if (emulation_type & EMULTYPE_SKIP) {
3909 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3910 return EMULATE_DONE;
3913 /* this is needed for vmware backdor interface to work since it
3914 changes registers values during IO operation */
3915 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3918 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3920 if (r) { /* emulation failed */
3922 * if emulation was due to access to shadowed page table
3923 * and it failed try to unshadow page and re-entetr the
3924 * guest to let CPU execute the instruction.
3926 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3927 return EMULATE_DONE;
3929 return handle_emulation_failure(vcpu);
3932 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
3933 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3934 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
3935 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
3937 if (vcpu->arch.emulate_ctxt.exception >= 0) {
3938 inject_emulated_exception(vcpu);
3939 return EMULATE_DONE;
3942 if (vcpu->arch.pio.count) {
3943 if (!vcpu->arch.pio.in)
3944 vcpu->arch.pio.count = 0;
3945 return EMULATE_DO_MMIO;
3948 if (vcpu->mmio_needed) {
3949 if (vcpu->mmio_is_write)
3950 vcpu->mmio_needed = 0;
3951 return EMULATE_DO_MMIO;
3954 if (vcpu->arch.emulate_ctxt.restart)
3957 return EMULATE_DONE;
3959 EXPORT_SYMBOL_GPL(emulate_instruction);
3961 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
3963 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3964 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
3965 /* do not return to emulator after return from userspace */
3966 vcpu->arch.pio.count = 0;
3969 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
3971 static void bounce_off(void *info)
3976 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3979 struct cpufreq_freqs *freq = data;
3981 struct kvm_vcpu *vcpu;
3982 int i, send_ipi = 0;
3984 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3986 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3988 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3990 spin_lock(&kvm_lock);
3991 list_for_each_entry(kvm, &vm_list, vm_list) {
3992 kvm_for_each_vcpu(i, vcpu, kvm) {
3993 if (vcpu->cpu != freq->cpu)
3995 if (!kvm_request_guest_time_update(vcpu))
3997 if (vcpu->cpu != smp_processor_id())
4001 spin_unlock(&kvm_lock);
4003 if (freq->old < freq->new && send_ipi) {
4005 * We upscale the frequency. Must make the guest
4006 * doesn't see old kvmclock values while running with
4007 * the new frequency, otherwise we risk the guest sees
4008 * time go backwards.
4010 * In case we update the frequency for another cpu
4011 * (which might be in guest context) send an interrupt
4012 * to kick the cpu out of guest context. Next time
4013 * guest context is entered kvmclock will be updated,
4014 * so the guest will not see stale values.
4016 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4021 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4022 .notifier_call = kvmclock_cpufreq_notifier
4025 static void kvm_timer_init(void)
4029 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4030 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4031 CPUFREQ_TRANSITION_NOTIFIER);
4032 for_each_online_cpu(cpu) {
4033 unsigned long khz = cpufreq_get(cpu);
4036 per_cpu(cpu_tsc_khz, cpu) = khz;
4039 for_each_possible_cpu(cpu)
4040 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4044 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4046 static int kvm_is_in_guest(void)
4048 return percpu_read(current_vcpu) != NULL;
4051 static int kvm_is_user_mode(void)
4055 if (percpu_read(current_vcpu))
4056 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4058 return user_mode != 0;
4061 static unsigned long kvm_get_guest_ip(void)
4063 unsigned long ip = 0;
4065 if (percpu_read(current_vcpu))
4066 ip = kvm_rip_read(percpu_read(current_vcpu));
4071 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4072 .is_in_guest = kvm_is_in_guest,
4073 .is_user_mode = kvm_is_user_mode,
4074 .get_guest_ip = kvm_get_guest_ip,
4077 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4079 percpu_write(current_vcpu, vcpu);
4081 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4083 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4085 percpu_write(current_vcpu, NULL);
4087 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4089 int kvm_arch_init(void *opaque)
4092 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4095 printk(KERN_ERR "kvm: already loaded the other module\n");
4100 if (!ops->cpu_has_kvm_support()) {
4101 printk(KERN_ERR "kvm: no hardware support\n");
4105 if (ops->disabled_by_bios()) {
4106 printk(KERN_ERR "kvm: disabled by bios\n");
4111 r = kvm_mmu_module_init();
4115 kvm_init_msr_list();
4118 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4119 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4120 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4121 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4125 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4133 void kvm_arch_exit(void)
4135 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4137 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4138 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4139 CPUFREQ_TRANSITION_NOTIFIER);
4141 kvm_mmu_module_exit();
4144 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4146 ++vcpu->stat.halt_exits;
4147 if (irqchip_in_kernel(vcpu->kvm)) {
4148 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4151 vcpu->run->exit_reason = KVM_EXIT_HLT;
4155 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4157 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4160 if (is_long_mode(vcpu))
4163 return a0 | ((gpa_t)a1 << 32);
4166 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4168 u64 param, ingpa, outgpa, ret;
4169 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4170 bool fast, longmode;
4174 * hypercall generates UD from non zero cpl and real mode
4177 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4178 kvm_queue_exception(vcpu, UD_VECTOR);
4182 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4183 longmode = is_long_mode(vcpu) && cs_l == 1;
4186 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4187 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4188 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4189 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4190 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4191 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4193 #ifdef CONFIG_X86_64
4195 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4196 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4197 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4201 code = param & 0xffff;
4202 fast = (param >> 16) & 0x1;
4203 rep_cnt = (param >> 32) & 0xfff;
4204 rep_idx = (param >> 48) & 0xfff;
4206 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4209 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4210 kvm_vcpu_on_spin(vcpu);
4213 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4217 ret = res | (((u64)rep_done & 0xfff) << 32);
4219 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4221 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4222 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4228 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4230 unsigned long nr, a0, a1, a2, a3, ret;
4233 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4234 return kvm_hv_hypercall(vcpu);
4236 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4237 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4238 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4239 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4240 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4242 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4244 if (!is_long_mode(vcpu)) {
4252 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4258 case KVM_HC_VAPIC_POLL_IRQ:
4262 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4269 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4270 ++vcpu->stat.hypercalls;
4273 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4275 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4277 char instruction[3];
4278 unsigned long rip = kvm_rip_read(vcpu);
4281 * Blow out the MMU to ensure that no other VCPU has an active mapping
4282 * to ensure that the updated hypercall appears atomically across all
4285 kvm_mmu_zap_all(vcpu->kvm);
4287 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4289 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4292 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4294 struct desc_ptr dt = { limit, base };
4296 kvm_x86_ops->set_gdt(vcpu, &dt);
4299 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4301 struct desc_ptr dt = { limit, base };
4303 kvm_x86_ops->set_idt(vcpu, &dt);
4306 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4308 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4309 int j, nent = vcpu->arch.cpuid_nent;
4311 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4312 /* when no next entry is found, the current entry[i] is reselected */
4313 for (j = i + 1; ; j = (j + 1) % nent) {
4314 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4315 if (ej->function == e->function) {
4316 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4320 return 0; /* silence gcc, even though control never reaches here */
4323 /* find an entry with matching function, matching index (if needed), and that
4324 * should be read next (if it's stateful) */
4325 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4326 u32 function, u32 index)
4328 if (e->function != function)
4330 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4332 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4333 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4338 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4339 u32 function, u32 index)
4342 struct kvm_cpuid_entry2 *best = NULL;
4344 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4345 struct kvm_cpuid_entry2 *e;
4347 e = &vcpu->arch.cpuid_entries[i];
4348 if (is_matching_cpuid_entry(e, function, index)) {
4349 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4350 move_to_next_stateful_cpuid_entry(vcpu, i);
4355 * Both basic or both extended?
4357 if (((e->function ^ function) & 0x80000000) == 0)
4358 if (!best || e->function > best->function)
4363 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4365 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4367 struct kvm_cpuid_entry2 *best;
4369 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4370 if (!best || best->eax < 0x80000008)
4372 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4374 return best->eax & 0xff;
4379 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4381 u32 function, index;
4382 struct kvm_cpuid_entry2 *best;
4384 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4385 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4386 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4387 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4388 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4389 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4390 best = kvm_find_cpuid_entry(vcpu, function, index);
4392 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4393 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4394 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4395 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4397 kvm_x86_ops->skip_emulated_instruction(vcpu);
4398 trace_kvm_cpuid(function,
4399 kvm_register_read(vcpu, VCPU_REGS_RAX),
4400 kvm_register_read(vcpu, VCPU_REGS_RBX),
4401 kvm_register_read(vcpu, VCPU_REGS_RCX),
4402 kvm_register_read(vcpu, VCPU_REGS_RDX));
4404 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4407 * Check if userspace requested an interrupt window, and that the
4408 * interrupt window is open.
4410 * No need to exit to userspace if we already have an interrupt queued.
4412 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4414 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4415 vcpu->run->request_interrupt_window &&
4416 kvm_arch_interrupt_allowed(vcpu));
4419 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4421 struct kvm_run *kvm_run = vcpu->run;
4423 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4424 kvm_run->cr8 = kvm_get_cr8(vcpu);
4425 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4426 if (irqchip_in_kernel(vcpu->kvm))
4427 kvm_run->ready_for_interrupt_injection = 1;
4429 kvm_run->ready_for_interrupt_injection =
4430 kvm_arch_interrupt_allowed(vcpu) &&
4431 !kvm_cpu_has_interrupt(vcpu) &&
4432 !kvm_event_needs_reinjection(vcpu);
4435 static void vapic_enter(struct kvm_vcpu *vcpu)
4437 struct kvm_lapic *apic = vcpu->arch.apic;
4440 if (!apic || !apic->vapic_addr)
4443 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4445 vcpu->arch.apic->vapic_page = page;
4448 static void vapic_exit(struct kvm_vcpu *vcpu)
4450 struct kvm_lapic *apic = vcpu->arch.apic;
4453 if (!apic || !apic->vapic_addr)
4456 idx = srcu_read_lock(&vcpu->kvm->srcu);
4457 kvm_release_page_dirty(apic->vapic_page);
4458 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4459 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4462 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4466 if (!kvm_x86_ops->update_cr8_intercept)
4469 if (!vcpu->arch.apic)
4472 if (!vcpu->arch.apic->vapic_addr)
4473 max_irr = kvm_lapic_find_highest_irr(vcpu);
4480 tpr = kvm_lapic_get_cr8(vcpu);
4482 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4485 static void inject_pending_event(struct kvm_vcpu *vcpu)
4487 /* try to reinject previous events if any */
4488 if (vcpu->arch.exception.pending) {
4489 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4490 vcpu->arch.exception.has_error_code,
4491 vcpu->arch.exception.error_code);
4492 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4493 vcpu->arch.exception.has_error_code,
4494 vcpu->arch.exception.error_code,
4495 vcpu->arch.exception.reinject);
4499 if (vcpu->arch.nmi_injected) {
4500 kvm_x86_ops->set_nmi(vcpu);
4504 if (vcpu->arch.interrupt.pending) {
4505 kvm_x86_ops->set_irq(vcpu);
4509 /* try to inject new event if pending */
4510 if (vcpu->arch.nmi_pending) {
4511 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4512 vcpu->arch.nmi_pending = false;
4513 vcpu->arch.nmi_injected = true;
4514 kvm_x86_ops->set_nmi(vcpu);
4516 } else if (kvm_cpu_has_interrupt(vcpu)) {
4517 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4518 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4520 kvm_x86_ops->set_irq(vcpu);
4525 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4528 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4529 vcpu->run->request_interrupt_window;
4532 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4533 kvm_mmu_unload(vcpu);
4535 r = kvm_mmu_reload(vcpu);
4539 if (vcpu->requests) {
4540 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4541 __kvm_migrate_timers(vcpu);
4542 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4543 kvm_write_guest_time(vcpu);
4544 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4545 kvm_mmu_sync_roots(vcpu);
4546 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4547 kvm_x86_ops->tlb_flush(vcpu);
4548 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4550 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4554 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4555 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4559 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4560 vcpu->fpu_active = 0;
4561 kvm_x86_ops->fpu_deactivate(vcpu);
4567 kvm_x86_ops->prepare_guest_switch(vcpu);
4568 if (vcpu->fpu_active)
4569 kvm_load_guest_fpu(vcpu);
4571 atomic_set(&vcpu->guest_mode, 1);
4574 local_irq_disable();
4576 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4577 || need_resched() || signal_pending(current)) {
4578 atomic_set(&vcpu->guest_mode, 0);
4586 inject_pending_event(vcpu);
4588 /* enable NMI/IRQ window open exits if needed */
4589 if (vcpu->arch.nmi_pending)
4590 kvm_x86_ops->enable_nmi_window(vcpu);
4591 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4592 kvm_x86_ops->enable_irq_window(vcpu);
4594 if (kvm_lapic_enabled(vcpu)) {
4595 update_cr8_intercept(vcpu);
4596 kvm_lapic_sync_to_vapic(vcpu);
4599 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4603 if (unlikely(vcpu->arch.switch_db_regs)) {
4605 set_debugreg(vcpu->arch.eff_db[0], 0);
4606 set_debugreg(vcpu->arch.eff_db[1], 1);
4607 set_debugreg(vcpu->arch.eff_db[2], 2);
4608 set_debugreg(vcpu->arch.eff_db[3], 3);
4611 trace_kvm_entry(vcpu->vcpu_id);
4612 kvm_x86_ops->run(vcpu);
4615 * If the guest has used debug registers, at least dr7
4616 * will be disabled while returning to the host.
4617 * If we don't have active breakpoints in the host, we don't
4618 * care about the messed up debug address registers. But if
4619 * we have some of them active, restore the old state.
4621 if (hw_breakpoint_active())
4622 hw_breakpoint_restore();
4624 atomic_set(&vcpu->guest_mode, 0);
4631 * We must have an instruction between local_irq_enable() and
4632 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4633 * the interrupt shadow. The stat.exits increment will do nicely.
4634 * But we need to prevent reordering, hence this barrier():
4642 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4645 * Profile KVM exit RIPs:
4647 if (unlikely(prof_on == KVM_PROFILING)) {
4648 unsigned long rip = kvm_rip_read(vcpu);
4649 profile_hit(KVM_PROFILING, (void *)rip);
4653 kvm_lapic_sync_from_vapic(vcpu);
4655 r = kvm_x86_ops->handle_exit(vcpu);
4661 static int __vcpu_run(struct kvm_vcpu *vcpu)
4664 struct kvm *kvm = vcpu->kvm;
4666 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4667 pr_debug("vcpu %d received sipi with vector # %x\n",
4668 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4669 kvm_lapic_reset(vcpu);
4670 r = kvm_arch_vcpu_reset(vcpu);
4673 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4676 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4681 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4682 r = vcpu_enter_guest(vcpu);
4684 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4685 kvm_vcpu_block(vcpu);
4686 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4687 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4689 switch(vcpu->arch.mp_state) {
4690 case KVM_MP_STATE_HALTED:
4691 vcpu->arch.mp_state =
4692 KVM_MP_STATE_RUNNABLE;
4693 case KVM_MP_STATE_RUNNABLE:
4695 case KVM_MP_STATE_SIPI_RECEIVED:
4706 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4707 if (kvm_cpu_has_pending_timer(vcpu))
4708 kvm_inject_pending_timer_irqs(vcpu);
4710 if (dm_request_for_irq_injection(vcpu)) {
4712 vcpu->run->exit_reason = KVM_EXIT_INTR;
4713 ++vcpu->stat.request_irq_exits;
4715 if (signal_pending(current)) {
4717 vcpu->run->exit_reason = KVM_EXIT_INTR;
4718 ++vcpu->stat.signal_exits;
4720 if (need_resched()) {
4721 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4723 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4727 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4734 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4739 if (vcpu->sigset_active)
4740 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4742 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4743 kvm_vcpu_block(vcpu);
4744 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4749 /* re-sync apic's tpr */
4750 if (!irqchip_in_kernel(vcpu->kvm))
4751 kvm_set_cr8(vcpu, kvm_run->cr8);
4753 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4754 vcpu->arch.emulate_ctxt.restart) {
4755 if (vcpu->mmio_needed) {
4756 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4757 vcpu->mmio_read_completed = 1;
4758 vcpu->mmio_needed = 0;
4760 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4761 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4762 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4763 if (r != EMULATE_DONE) {
4768 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4769 kvm_register_write(vcpu, VCPU_REGS_RAX,
4770 kvm_run->hypercall.ret);
4772 r = __vcpu_run(vcpu);
4775 post_kvm_run_save(vcpu);
4776 if (vcpu->sigset_active)
4777 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4782 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4784 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4785 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4786 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4787 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4788 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4789 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4790 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4791 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4792 #ifdef CONFIG_X86_64
4793 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4794 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4795 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4796 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4797 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4798 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4799 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4800 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4803 regs->rip = kvm_rip_read(vcpu);
4804 regs->rflags = kvm_get_rflags(vcpu);
4809 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4811 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4812 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4813 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4814 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4815 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4816 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4817 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4818 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4819 #ifdef CONFIG_X86_64
4820 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4821 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4822 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4823 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4824 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4825 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4826 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4827 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4830 kvm_rip_write(vcpu, regs->rip);
4831 kvm_set_rflags(vcpu, regs->rflags);
4833 vcpu->arch.exception.pending = false;
4838 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4840 struct kvm_segment cs;
4842 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4846 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4848 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4849 struct kvm_sregs *sregs)
4853 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4854 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4855 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4856 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4857 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4858 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4860 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4861 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4863 kvm_x86_ops->get_idt(vcpu, &dt);
4864 sregs->idt.limit = dt.size;
4865 sregs->idt.base = dt.address;
4866 kvm_x86_ops->get_gdt(vcpu, &dt);
4867 sregs->gdt.limit = dt.size;
4868 sregs->gdt.base = dt.address;
4870 sregs->cr0 = kvm_read_cr0(vcpu);
4871 sregs->cr2 = vcpu->arch.cr2;
4872 sregs->cr3 = vcpu->arch.cr3;
4873 sregs->cr4 = kvm_read_cr4(vcpu);
4874 sregs->cr8 = kvm_get_cr8(vcpu);
4875 sregs->efer = vcpu->arch.efer;
4876 sregs->apic_base = kvm_get_apic_base(vcpu);
4878 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4880 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4881 set_bit(vcpu->arch.interrupt.nr,
4882 (unsigned long *)sregs->interrupt_bitmap);
4887 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4888 struct kvm_mp_state *mp_state)
4890 mp_state->mp_state = vcpu->arch.mp_state;
4894 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4895 struct kvm_mp_state *mp_state)
4897 vcpu->arch.mp_state = mp_state->mp_state;
4901 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4902 bool has_error_code, u32 error_code)
4904 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4905 int cs_db, cs_l, ret;
4906 cache_all_regs(vcpu);
4908 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4910 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4911 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4912 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4913 vcpu->arch.emulate_ctxt.mode =
4914 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4915 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4916 ? X86EMUL_MODE_VM86 : cs_l
4917 ? X86EMUL_MODE_PROT64 : cs_db
4918 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4919 memset(c, 0, sizeof(struct decode_cache));
4920 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4922 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
4923 tss_selector, reason, has_error_code,
4927 return EMULATE_FAIL;
4929 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4930 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4931 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4932 return EMULATE_DONE;
4934 EXPORT_SYMBOL_GPL(kvm_task_switch);
4936 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4937 struct kvm_sregs *sregs)
4939 int mmu_reset_needed = 0;
4940 int pending_vec, max_bits;
4943 dt.size = sregs->idt.limit;
4944 dt.address = sregs->idt.base;
4945 kvm_x86_ops->set_idt(vcpu, &dt);
4946 dt.size = sregs->gdt.limit;
4947 dt.address = sregs->gdt.base;
4948 kvm_x86_ops->set_gdt(vcpu, &dt);
4950 vcpu->arch.cr2 = sregs->cr2;
4951 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4952 vcpu->arch.cr3 = sregs->cr3;
4954 kvm_set_cr8(vcpu, sregs->cr8);
4956 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
4957 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4958 kvm_set_apic_base(vcpu, sregs->apic_base);
4960 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
4961 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4962 vcpu->arch.cr0 = sregs->cr0;
4964 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4965 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4966 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4967 load_pdptrs(vcpu, vcpu->arch.cr3);
4968 mmu_reset_needed = 1;
4971 if (mmu_reset_needed)
4972 kvm_mmu_reset_context(vcpu);
4974 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4975 pending_vec = find_first_bit(
4976 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4977 if (pending_vec < max_bits) {
4978 kvm_queue_interrupt(vcpu, pending_vec, false);
4979 pr_debug("Set back pending irq %d\n", pending_vec);
4980 if (irqchip_in_kernel(vcpu->kvm))
4981 kvm_pic_clear_isr_ack(vcpu->kvm);
4984 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4985 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4986 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4987 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4988 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4989 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4991 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4992 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4994 update_cr8_intercept(vcpu);
4996 /* Older userspace won't unhalt the vcpu on reset. */
4997 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4998 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5000 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5005 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5006 struct kvm_guest_debug *dbg)
5008 unsigned long rflags;
5011 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5013 if (vcpu->arch.exception.pending)
5015 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5016 kvm_queue_exception(vcpu, DB_VECTOR);
5018 kvm_queue_exception(vcpu, BP_VECTOR);
5022 * Read rflags as long as potentially injected trace flags are still
5025 rflags = kvm_get_rflags(vcpu);
5027 vcpu->guest_debug = dbg->control;
5028 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5029 vcpu->guest_debug = 0;
5031 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5032 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5033 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5034 vcpu->arch.switch_db_regs =
5035 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5037 for (i = 0; i < KVM_NR_DB_REGS; i++)
5038 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5039 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5042 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5043 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5044 get_segment_base(vcpu, VCPU_SREG_CS);
5047 * Trigger an rflags update that will inject or remove the trace
5050 kvm_set_rflags(vcpu, rflags);
5052 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5062 * Translate a guest virtual address to a guest physical address.
5064 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5065 struct kvm_translation *tr)
5067 unsigned long vaddr = tr->linear_address;
5071 idx = srcu_read_lock(&vcpu->kvm->srcu);
5072 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5073 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5074 tr->physical_address = gpa;
5075 tr->valid = gpa != UNMAPPED_GVA;
5082 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5084 struct i387_fxsave_struct *fxsave =
5085 &vcpu->arch.guest_fpu.state->fxsave;
5087 memcpy(fpu->fpr, fxsave->st_space, 128);
5088 fpu->fcw = fxsave->cwd;
5089 fpu->fsw = fxsave->swd;
5090 fpu->ftwx = fxsave->twd;
5091 fpu->last_opcode = fxsave->fop;
5092 fpu->last_ip = fxsave->rip;
5093 fpu->last_dp = fxsave->rdp;
5094 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5099 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5101 struct i387_fxsave_struct *fxsave =
5102 &vcpu->arch.guest_fpu.state->fxsave;
5104 memcpy(fxsave->st_space, fpu->fpr, 128);
5105 fxsave->cwd = fpu->fcw;
5106 fxsave->swd = fpu->fsw;
5107 fxsave->twd = fpu->ftwx;
5108 fxsave->fop = fpu->last_opcode;
5109 fxsave->rip = fpu->last_ip;
5110 fxsave->rdp = fpu->last_dp;
5111 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5116 void fx_init(struct kvm_vcpu *vcpu)
5118 fpu_alloc(&vcpu->arch.guest_fpu);
5119 fpu_finit(&vcpu->arch.guest_fpu);
5121 vcpu->arch.cr0 |= X86_CR0_ET;
5123 EXPORT_SYMBOL_GPL(fx_init);
5125 static void fx_free(struct kvm_vcpu *vcpu)
5127 fpu_free(&vcpu->arch.guest_fpu);
5130 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5132 if (vcpu->guest_fpu_loaded)
5135 vcpu->guest_fpu_loaded = 1;
5136 unlazy_fpu(current);
5137 fpu_restore_checking(&vcpu->arch.guest_fpu);
5141 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5143 if (!vcpu->guest_fpu_loaded)
5146 vcpu->guest_fpu_loaded = 0;
5147 fpu_save_init(&vcpu->arch.guest_fpu);
5148 ++vcpu->stat.fpu_reload;
5149 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5153 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5155 if (vcpu->arch.time_page) {
5156 kvm_release_page_dirty(vcpu->arch.time_page);
5157 vcpu->arch.time_page = NULL;
5161 kvm_x86_ops->vcpu_free(vcpu);
5164 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5167 return kvm_x86_ops->vcpu_create(kvm, id);
5170 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5174 vcpu->arch.mtrr_state.have_fixed = 1;
5176 r = kvm_arch_vcpu_reset(vcpu);
5178 r = kvm_mmu_setup(vcpu);
5185 kvm_x86_ops->vcpu_free(vcpu);
5189 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5192 kvm_mmu_unload(vcpu);
5196 kvm_x86_ops->vcpu_free(vcpu);
5199 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5201 vcpu->arch.nmi_pending = false;
5202 vcpu->arch.nmi_injected = false;
5204 vcpu->arch.switch_db_regs = 0;
5205 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5206 vcpu->arch.dr6 = DR6_FIXED_1;
5207 vcpu->arch.dr7 = DR7_FIXED_1;
5209 return kvm_x86_ops->vcpu_reset(vcpu);
5212 int kvm_arch_hardware_enable(void *garbage)
5215 * Since this may be called from a hotplug notifcation,
5216 * we can't get the CPU frequency directly.
5218 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5219 int cpu = raw_smp_processor_id();
5220 per_cpu(cpu_tsc_khz, cpu) = 0;
5223 kvm_shared_msr_cpu_online();
5225 return kvm_x86_ops->hardware_enable(garbage);
5228 void kvm_arch_hardware_disable(void *garbage)
5230 kvm_x86_ops->hardware_disable(garbage);
5231 drop_user_return_notifiers(garbage);
5234 int kvm_arch_hardware_setup(void)
5236 return kvm_x86_ops->hardware_setup();
5239 void kvm_arch_hardware_unsetup(void)
5241 kvm_x86_ops->hardware_unsetup();
5244 void kvm_arch_check_processor_compat(void *rtn)
5246 kvm_x86_ops->check_processor_compatibility(rtn);
5249 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5255 BUG_ON(vcpu->kvm == NULL);
5258 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5259 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5260 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5262 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5264 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5269 vcpu->arch.pio_data = page_address(page);
5271 r = kvm_mmu_create(vcpu);
5273 goto fail_free_pio_data;
5275 if (irqchip_in_kernel(kvm)) {
5276 r = kvm_create_lapic(vcpu);
5278 goto fail_mmu_destroy;
5281 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5283 if (!vcpu->arch.mce_banks) {
5285 goto fail_free_lapic;
5287 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5291 kvm_free_lapic(vcpu);
5293 kvm_mmu_destroy(vcpu);
5295 free_page((unsigned long)vcpu->arch.pio_data);
5300 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5304 kfree(vcpu->arch.mce_banks);
5305 kvm_free_lapic(vcpu);
5306 idx = srcu_read_lock(&vcpu->kvm->srcu);
5307 kvm_mmu_destroy(vcpu);
5308 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5309 free_page((unsigned long)vcpu->arch.pio_data);
5312 struct kvm *kvm_arch_create_vm(void)
5314 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5317 return ERR_PTR(-ENOMEM);
5319 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5320 if (!kvm->arch.aliases) {
5322 return ERR_PTR(-ENOMEM);
5325 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5326 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5328 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5329 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5331 rdtscll(kvm->arch.vm_init_tsc);
5336 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5339 kvm_mmu_unload(vcpu);
5343 static void kvm_free_vcpus(struct kvm *kvm)
5346 struct kvm_vcpu *vcpu;
5349 * Unpin any mmu pages first.
5351 kvm_for_each_vcpu(i, vcpu, kvm)
5352 kvm_unload_vcpu_mmu(vcpu);
5353 kvm_for_each_vcpu(i, vcpu, kvm)
5354 kvm_arch_vcpu_free(vcpu);
5356 mutex_lock(&kvm->lock);
5357 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5358 kvm->vcpus[i] = NULL;
5360 atomic_set(&kvm->online_vcpus, 0);
5361 mutex_unlock(&kvm->lock);
5364 void kvm_arch_sync_events(struct kvm *kvm)
5366 kvm_free_all_assigned_devices(kvm);
5369 void kvm_arch_destroy_vm(struct kvm *kvm)
5371 kvm_iommu_unmap_guest(kvm);
5373 kfree(kvm->arch.vpic);
5374 kfree(kvm->arch.vioapic);
5375 kvm_free_vcpus(kvm);
5376 kvm_free_physmem(kvm);
5377 if (kvm->arch.apic_access_page)
5378 put_page(kvm->arch.apic_access_page);
5379 if (kvm->arch.ept_identity_pagetable)
5380 put_page(kvm->arch.ept_identity_pagetable);
5381 cleanup_srcu_struct(&kvm->srcu);
5382 kfree(kvm->arch.aliases);
5386 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5387 struct kvm_memory_slot *memslot,
5388 struct kvm_memory_slot old,
5389 struct kvm_userspace_memory_region *mem,
5392 int npages = memslot->npages;
5394 /*To keep backward compatibility with older userspace,
5395 *x86 needs to hanlde !user_alloc case.
5398 if (npages && !old.rmap) {
5399 unsigned long userspace_addr;
5401 down_write(¤t->mm->mmap_sem);
5402 userspace_addr = do_mmap(NULL, 0,
5404 PROT_READ | PROT_WRITE,
5405 MAP_PRIVATE | MAP_ANONYMOUS,
5407 up_write(¤t->mm->mmap_sem);
5409 if (IS_ERR((void *)userspace_addr))
5410 return PTR_ERR((void *)userspace_addr);
5412 memslot->userspace_addr = userspace_addr;
5420 void kvm_arch_commit_memory_region(struct kvm *kvm,
5421 struct kvm_userspace_memory_region *mem,
5422 struct kvm_memory_slot old,
5426 int npages = mem->memory_size >> PAGE_SHIFT;
5428 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5431 down_write(¤t->mm->mmap_sem);
5432 ret = do_munmap(current->mm, old.userspace_addr,
5433 old.npages * PAGE_SIZE);
5434 up_write(¤t->mm->mmap_sem);
5437 "kvm_vm_ioctl_set_memory_region: "
5438 "failed to munmap memory\n");
5441 spin_lock(&kvm->mmu_lock);
5442 if (!kvm->arch.n_requested_mmu_pages) {
5443 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5444 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5447 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5448 spin_unlock(&kvm->mmu_lock);
5451 void kvm_arch_flush_shadow(struct kvm *kvm)
5453 kvm_mmu_zap_all(kvm);
5454 kvm_reload_remote_mmus(kvm);
5457 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5459 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5460 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5461 || vcpu->arch.nmi_pending ||
5462 (kvm_arch_interrupt_allowed(vcpu) &&
5463 kvm_cpu_has_interrupt(vcpu));
5466 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5469 int cpu = vcpu->cpu;
5471 if (waitqueue_active(&vcpu->wq)) {
5472 wake_up_interruptible(&vcpu->wq);
5473 ++vcpu->stat.halt_wakeup;
5477 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5478 if (atomic_xchg(&vcpu->guest_mode, 0))
5479 smp_send_reschedule(cpu);
5483 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5485 return kvm_x86_ops->interrupt_allowed(vcpu);
5488 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5490 unsigned long current_rip = kvm_rip_read(vcpu) +
5491 get_segment_base(vcpu, VCPU_SREG_CS);
5493 return current_rip == linear_rip;
5495 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5497 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5499 unsigned long rflags;
5501 rflags = kvm_x86_ops->get_rflags(vcpu);
5502 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5503 rflags &= ~X86_EFLAGS_TF;
5506 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5508 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5510 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5511 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5512 rflags |= X86_EFLAGS_TF;
5513 kvm_x86_ops->set_rflags(vcpu, rflags);
5515 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5517 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5518 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5519 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5520 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5521 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5522 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5523 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5524 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5525 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5526 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5527 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5528 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);