arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  82                                     struct kvm_cpuid_entry2 __user *entries);
  83
  84 struct kvm_x86_ops *kvm_x86_ops;
  85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  86
  87 int ignore_msrs = 0;
  88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  89
  90 struct kvm_stats_debugfs_item debugfs_entries[] = {
  91         { "pf_fixed", VCPU_STAT(pf_fixed) },
  92         { "pf_guest", VCPU_STAT(pf_guest) },
  93         { "tlb_flush", VCPU_STAT(tlb_flush) },
  94         { "invlpg", VCPU_STAT(invlpg) },
  95         { "exits", VCPU_STAT(exits) },
  96         { "io_exits", VCPU_STAT(io_exits) },
  97         { "mmio_exits", VCPU_STAT(mmio_exits) },
  98         { "signal_exits", VCPU_STAT(signal_exits) },
  99         { "irq_window", VCPU_STAT(irq_window_exits) },
 100         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 101         { "halt_exits", VCPU_STAT(halt_exits) },
 102         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 103         { "hypercalls", VCPU_STAT(hypercalls) },
 104         { "request_irq", VCPU_STAT(request_irq_exits) },
 105         { "irq_exits", VCPU_STAT(irq_exits) },
 106         { "host_state_reload", VCPU_STAT(host_state_reload) },
 107         { "efer_reload", VCPU_STAT(efer_reload) },
 108         { "fpu_reload", VCPU_STAT(fpu_reload) },
 109         { "insn_emulation", VCPU_STAT(insn_emulation) },
 110         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 111         { "irq_injections", VCPU_STAT(irq_injections) },
 112         { "nmi_injections", VCPU_STAT(nmi_injections) },
 113         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 114         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 115         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 116         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 117         { "mmu_flooded", VM_STAT(mmu_flooded) },
 118         { "mmu_recycled", VM_STAT(mmu_recycled) },
 119         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 120         { "mmu_unsync", VM_STAT(mmu_unsync) },
 121         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 122         { "largepages", VM_STAT(lpages) },
 123         { NULL }
 124 };
 125
 126 unsigned long segment_base(u16 selector)
 127 {
 128         struct descriptor_table gdt;
 129         struct desc_struct *d;
 130         unsigned long table_base;
 131         unsigned long v;
 132
 133         if (selector == 0)
 134                 return 0;
 135
 136         kvm_get_gdt(&gdt);
 137         table_base = gdt.base;
 138
 139         if (selector & 4) {           /* from ldt */
 140                 u16 ldt_selector = kvm_read_ldt();
 141
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = get_desc_base(d);
 146 #ifdef CONFIG_X86_64
 147         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 148                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 149 #endif
 150         return v;
 151 }
 152 EXPORT_SYMBOL_GPL(segment_base);
 153
 154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 155 {
 156         if (irqchip_in_kernel(vcpu->kvm))
 157                 return vcpu->arch.apic_base;
 158         else
 159                 return vcpu->arch.apic_base;
 160 }
 161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 162
 163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 164 {
 165         /* TODO: reserve bits check */
 166         if (irqchip_in_kernel(vcpu->kvm))
 167                 kvm_lapic_set_base(vcpu, data);
 168         else
 169                 vcpu->arch.apic_base = data;
 170 }
 171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 172
 173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 174 {
 175         WARN_ON(vcpu->arch.exception.pending);
 176         vcpu->arch.exception.pending = true;
 177         vcpu->arch.exception.has_error_code = false;
 178         vcpu->arch.exception.nr = nr;
 179 }
 180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 181
 182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 183                            u32 error_code)
 184 {
 185         ++vcpu->stat.pf_guest;
 186
 187         if (vcpu->arch.exception.pending) {
 188                 switch(vcpu->arch.exception.nr) {
 189                 case DF_VECTOR:
 190                         /* triple fault -> shutdown */
 191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 192                         return;
 193                 case PF_VECTOR:
 194                         vcpu->arch.exception.nr = DF_VECTOR;
 195                         vcpu->arch.exception.error_code = 0;
 196                         return;
 197                 default:
 198                         /* replace previous exception with a new one in a hope
 199                            that instruction re-execution will regenerate lost
 200                            exception */
 201                         vcpu->arch.exception.pending = false;
 202                         break;
 203                 }
 204         }
 205         vcpu->arch.cr2 = addr;
 206         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 207 }
 208
 209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 210 {
 211         vcpu->arch.nmi_pending = 1;
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 214
 215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 216 {
 217         WARN_ON(vcpu->arch.exception.pending);
 218         vcpu->arch.exception.pending = true;
 219         vcpu->arch.exception.has_error_code = true;
 220         vcpu->arch.exception.nr = nr;
 221         vcpu->arch.exception.error_code = error_code;
 222 }
 223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 224
 225 /*
 226  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 227  * a #GP and return false.
 228  */
 229 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 230 {
 231         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 232                 return true;
 233         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 234         return false;
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 237
 238 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
 239 {
 240         unsigned long rflags;
 241
 242         rflags = kvm_x86_ops->get_rflags(vcpu);
 243         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
 244                 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
 245         return rflags;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_get_rflags);
 248
 249 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 250 {
 251         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
 252                 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
 253         kvm_x86_ops->set_rflags(vcpu, rflags);
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_set_rflags);
 256
 257 /*
 258  * Load the pae pdptrs.  Return true is they are all valid.
 259  */
 260 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 261 {
 262         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 263         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 264         int i;
 265         int ret;
 266         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 267
 268         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 269                                   offset * sizeof(u64), sizeof(pdpte));
 270         if (ret < 0) {
 271                 ret = 0;
 272                 goto out;
 273         }
 274         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 275                 if (is_present_gpte(pdpte[i]) &&
 276                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 277                         ret = 0;
 278                         goto out;
 279                 }
 280         }
 281         ret = 1;
 282
 283         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 284         __set_bit(VCPU_EXREG_PDPTR,
 285                   (unsigned long *)&vcpu->arch.regs_avail);
 286         __set_bit(VCPU_EXREG_PDPTR,
 287                   (unsigned long *)&vcpu->arch.regs_dirty);
 288 out:
 289
 290         return ret;
 291 }
 292 EXPORT_SYMBOL_GPL(load_pdptrs);
 293
 294 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 295 {
 296         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 297         bool changed = true;
 298         int r;
 299
 300         if (is_long_mode(vcpu) || !is_pae(vcpu))
 301                 return false;
 302
 303         if (!test_bit(VCPU_EXREG_PDPTR,
 304                       (unsigned long *)&vcpu->arch.regs_avail))
 305                 return true;
 306
 307         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 308         if (r < 0)
 309                 goto out;
 310         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 311 out:
 312
 313         return changed;
 314 }
 315
 316 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 317 {
 318         if (cr0 & CR0_RESERVED_BITS) {
 319                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 320                        cr0, vcpu->arch.cr0);
 321                 kvm_inject_gp(vcpu, 0);
 322                 return;
 323         }
 324
 325         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 326                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 327                 kvm_inject_gp(vcpu, 0);
 328                 return;
 329         }
 330
 331         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 332                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 333                        "and a clear PE flag\n");
 334                 kvm_inject_gp(vcpu, 0);
 335                 return;
 336         }
 337
 338         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 339 #ifdef CONFIG_X86_64
 340                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 341                         int cs_db, cs_l;
 342
 343                         if (!is_pae(vcpu)) {
 344                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 345                                        "in long mode while PAE is disabled\n");
 346                                 kvm_inject_gp(vcpu, 0);
 347                                 return;
 348                         }
 349                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 350                         if (cs_l) {
 351                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 352                                        "in long mode while CS.L == 1\n");
 353                                 kvm_inject_gp(vcpu, 0);
 354                                 return;
 355
 356                         }
 357                 } else
 358 #endif
 359                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 360                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 361                                "reserved bits\n");
 362                         kvm_inject_gp(vcpu, 0);
 363                         return;
 364                 }
 365
 366         }
 367
 368         kvm_x86_ops->set_cr0(vcpu, cr0);
 369         vcpu->arch.cr0 = cr0;
 370
 371         kvm_mmu_reset_context(vcpu);
 372         return;
 373 }
 374 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 375
 376 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 377 {
 378         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 379 }
 380 EXPORT_SYMBOL_GPL(kvm_lmsw);
 381
 382 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 383 {
 384         unsigned long old_cr4 = vcpu->arch.cr4;
 385         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 386
 387         if (cr4 & CR4_RESERVED_BITS) {
 388                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 389                 kvm_inject_gp(vcpu, 0);
 390                 return;
 391         }
 392
 393         if (is_long_mode(vcpu)) {
 394                 if (!(cr4 & X86_CR4_PAE)) {
 395                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 396                                "in long mode\n");
 397                         kvm_inject_gp(vcpu, 0);
 398                         return;
 399                 }
 400         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 401                    && ((cr4 ^ old_cr4) & pdptr_bits)
 402                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 403                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 404                 kvm_inject_gp(vcpu, 0);
 405                 return;
 406         }
 407
 408         if (cr4 & X86_CR4_VMXE) {
 409                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 410                 kvm_inject_gp(vcpu, 0);
 411                 return;
 412         }
 413         kvm_x86_ops->set_cr4(vcpu, cr4);
 414         vcpu->arch.cr4 = cr4;
 415         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 416         kvm_mmu_reset_context(vcpu);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 419
 420 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 421 {
 422         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 423                 kvm_mmu_sync_roots(vcpu);
 424                 kvm_mmu_flush_tlb(vcpu);
 425                 return;
 426         }
 427
 428         if (is_long_mode(vcpu)) {
 429                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 430                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 431                         kvm_inject_gp(vcpu, 0);
 432                         return;
 433                 }
 434         } else {
 435                 if (is_pae(vcpu)) {
 436                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 437                                 printk(KERN_DEBUG
 438                                        "set_cr3: #GP, reserved bits\n");
 439                                 kvm_inject_gp(vcpu, 0);
 440                                 return;
 441                         }
 442                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 443                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 444                                        "reserved bits\n");
 445                                 kvm_inject_gp(vcpu, 0);
 446                                 return;
 447                         }
 448                 }
 449                 /*
 450                  * We don't check reserved bits in nonpae mode, because
 451                  * this isn't enforced, and VMware depends on this.
 452                  */
 453         }
 454
 455         /*
 456          * Does the new cr3 value map to physical memory? (Note, we
 457          * catch an invalid cr3 even in real-mode, because it would
 458          * cause trouble later on when we turn on paging anyway.)
 459          *
 460          * A real CPU would silently accept an invalid cr3 and would
 461          * attempt to use it - with largely undefined (and often hard
 462          * to debug) behavior on the guest side.
 463          */
 464         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 465                 kvm_inject_gp(vcpu, 0);
 466         else {
 467                 vcpu->arch.cr3 = cr3;
 468                 vcpu->arch.mmu.new_cr3(vcpu);
 469         }
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 472
 473 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 474 {
 475         if (cr8 & CR8_RESERVED_BITS) {
 476                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 477                 kvm_inject_gp(vcpu, 0);
 478                 return;
 479         }
 480         if (irqchip_in_kernel(vcpu->kvm))
 481                 kvm_lapic_set_tpr(vcpu, cr8);
 482         else
 483                 vcpu->arch.cr8 = cr8;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 486
 487 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 488 {
 489         if (irqchip_in_kernel(vcpu->kvm))
 490                 return kvm_lapic_get_cr8(vcpu);
 491         else
 492                 return vcpu->arch.cr8;
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 495
 496 static inline u32 bit(int bitno)
 497 {
 498         return 1 << (bitno & 31);
 499 }
 500
 501 /*
 502  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 503  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 504  *
 505  * This list is modified at module load time to reflect the
 506  * capabilities of the host cpu. This capabilities test skips MSRs that are
 507  * kvm-specific. Those are put in the beginning of the list.
 508  */
 509
 510 #define KVM_SAVE_MSRS_BEGIN     2
 511 static u32 msrs_to_save[] = {
 512         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 513         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 514         MSR_K6_STAR,
 515 #ifdef CONFIG_X86_64
 516         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 517 #endif
 518         MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 519 };
 520
 521 static unsigned num_msrs_to_save;
 522
 523 static u32 emulated_msrs[] = {
 524         MSR_IA32_MISC_ENABLE,
 525 };
 526
 527 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 528 {
 529         if (efer & efer_reserved_bits) {
 530                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 531                        efer);
 532                 kvm_inject_gp(vcpu, 0);
 533                 return;
 534         }
 535
 536         if (is_paging(vcpu)
 537             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 538                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 539                 kvm_inject_gp(vcpu, 0);
 540                 return;
 541         }
 542
 543         if (efer & EFER_FFXSR) {
 544                 struct kvm_cpuid_entry2 *feat;
 545
 546                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 547                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 548                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 549                         kvm_inject_gp(vcpu, 0);
 550                         return;
 551                 }
 552         }
 553
 554         if (efer & EFER_SVME) {
 555                 struct kvm_cpuid_entry2 *feat;
 556
 557                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 558                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 559                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 560                         kvm_inject_gp(vcpu, 0);
 561                         return;
 562                 }
 563         }
 564
 565         kvm_x86_ops->set_efer(vcpu, efer);
 566
 567         efer &= ~EFER_LMA;
 568         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 569
 570         vcpu->arch.shadow_efer = efer;
 571
 572         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 573         kvm_mmu_reset_context(vcpu);
 574 }
 575
 576 void kvm_enable_efer_bits(u64 mask)
 577 {
 578        efer_reserved_bits &= ~mask;
 579 }
 580 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 581
 582
 583 /*
 584  * Writes msr value into into the appropriate "register".
 585  * Returns 0 on success, non-0 otherwise.
 586  * Assumes vcpu_load() was already called.
 587  */
 588 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 589 {
 590         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 591 }
 592
 593 /*
 594  * Adapt set_msr() to msr_io()'s calling convention
 595  */
 596 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 597 {
 598         return kvm_set_msr(vcpu, index, *data);
 599 }
 600
 601 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 602 {
 603         static int version;
 604         struct pvclock_wall_clock wc;
 605         struct timespec now, sys, boot;
 606
 607         if (!wall_clock)
 608                 return;
 609
 610         version++;
 611
 612         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 613
 614         /*
 615          * The guest calculates current wall clock time by adding
 616          * system time (updated by kvm_write_guest_time below) to the
 617          * wall clock specified here.  guest system time equals host
 618          * system time for us, thus we must fill in host boot time here.
 619          */
 620         now = current_kernel_time();
 621         ktime_get_ts(&sys);
 622         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 623
 624         wc.sec = boot.tv_sec;
 625         wc.nsec = boot.tv_nsec;
 626         wc.version = version;
 627
 628         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 629
 630         version++;
 631         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 632 }
 633
 634 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 635 {
 636         uint32_t quotient, remainder;
 637
 638         /* Don't try to replace with do_div(), this one calculates
 639          * "(dividend << 32) / divisor" */
 640         __asm__ ( "divl %4"
 641                   : "=a" (quotient), "=d" (remainder)
 642                   : "0" (0), "1" (dividend), "r" (divisor) );
 643         return quotient;
 644 }
 645
 646 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 647 {
 648         uint64_t nsecs = 1000000000LL;
 649         int32_t  shift = 0;
 650         uint64_t tps64;
 651         uint32_t tps32;
 652
 653         tps64 = tsc_khz * 1000LL;
 654         while (tps64 > nsecs*2) {
 655                 tps64 >>= 1;
 656                 shift--;
 657         }
 658
 659         tps32 = (uint32_t)tps64;
 660         while (tps32 <= (uint32_t)nsecs) {
 661                 tps32 <<= 1;
 662                 shift++;
 663         }
 664
 665         hv_clock->tsc_shift = shift;
 666         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 667
 668         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 669                  __func__, tsc_khz, hv_clock->tsc_shift,
 670                  hv_clock->tsc_to_system_mul);
 671 }
 672
 673 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 674
 675 static void kvm_write_guest_time(struct kvm_vcpu *v)
 676 {
 677         struct timespec ts;
 678         unsigned long flags;
 679         struct kvm_vcpu_arch *vcpu = &v->arch;
 680         void *shared_kaddr;
 681         unsigned long this_tsc_khz;
 682
 683         if ((!vcpu->time_page))
 684                 return;
 685
 686         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 687         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 688                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 689                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 690         }
 691         put_cpu_var(cpu_tsc_khz);
 692
 693         /* Keep irq disabled to prevent changes to the clock */
 694         local_irq_save(flags);
 695         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 696         ktime_get_ts(&ts);
 697         local_irq_restore(flags);
 698
 699         /* With all the info we got, fill in the values */
 700
 701         vcpu->hv_clock.system_time = ts.tv_nsec +
 702                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 703         /*
 704          * The interface expects us to write an even number signaling that the
 705          * update is finished. Since the guest won't see the intermediate
 706          * state, we just increase by 2 at the end.
 707          */
 708         vcpu->hv_clock.version += 2;
 709
 710         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 711
 712         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 713                sizeof(vcpu->hv_clock));
 714
 715         kunmap_atomic(shared_kaddr, KM_USER0);
 716
 717         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 718 }
 719
 720 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 721 {
 722         struct kvm_vcpu_arch *vcpu = &v->arch;
 723
 724         if (!vcpu->time_page)
 725                 return 0;
 726         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 727         return 1;
 728 }
 729
 730 static bool msr_mtrr_valid(unsigned msr)
 731 {
 732         switch (msr) {
 733         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 734         case MSR_MTRRfix64K_00000:
 735         case MSR_MTRRfix16K_80000:
 736         case MSR_MTRRfix16K_A0000:
 737         case MSR_MTRRfix4K_C0000:
 738         case MSR_MTRRfix4K_C8000:
 739         case MSR_MTRRfix4K_D0000:
 740         case MSR_MTRRfix4K_D8000:
 741         case MSR_MTRRfix4K_E0000:
 742         case MSR_MTRRfix4K_E8000:
 743         case MSR_MTRRfix4K_F0000:
 744         case MSR_MTRRfix4K_F8000:
 745         case MSR_MTRRdefType:
 746         case MSR_IA32_CR_PAT:
 747                 return true;
 748         case 0x2f8:
 749                 return true;
 750         }
 751         return false;
 752 }
 753
 754 static bool valid_pat_type(unsigned t)
 755 {
 756         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 757 }
 758
 759 static bool valid_mtrr_type(unsigned t)
 760 {
 761         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 762 }
 763
 764 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 765 {
 766         int i;
 767
 768         if (!msr_mtrr_valid(msr))
 769                 return false;
 770
 771         if (msr == MSR_IA32_CR_PAT) {
 772                 for (i = 0; i < 8; i++)
 773                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 774                                 return false;
 775                 return true;
 776         } else if (msr == MSR_MTRRdefType) {
 777                 if (data & ~0xcff)
 778                         return false;
 779                 return valid_mtrr_type(data & 0xff);
 780         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 781                 for (i = 0; i < 8 ; i++)
 782                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 783                                 return false;
 784                 return true;
 785         }
 786
 787         /* variable MTRRs */
 788         return valid_mtrr_type(data & 0xff);
 789 }
 790
 791 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 792 {
 793         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 794
 795         if (!mtrr_valid(vcpu, msr, data))
 796                 return 1;
 797
 798         if (msr == MSR_MTRRdefType) {
 799                 vcpu->arch.mtrr_state.def_type = data;
 800                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 801         } else if (msr == MSR_MTRRfix64K_00000)
 802                 p[0] = data;
 803         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 804                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 805         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 806                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 807         else if (msr == MSR_IA32_CR_PAT)
 808                 vcpu->arch.pat = data;
 809         else {  /* Variable MTRRs */
 810                 int idx, is_mtrr_mask;
 811                 u64 *pt;
 812
 813                 idx = (msr - 0x200) / 2;
 814                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 815                 if (!is_mtrr_mask)
 816                         pt =
 817                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 818                 else
 819                         pt =
 820                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 821                 *pt = data;
 822         }
 823
 824         kvm_mmu_reset_context(vcpu);
 825         return 0;
 826 }
 827
 828 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 829 {
 830         u64 mcg_cap = vcpu->arch.mcg_cap;
 831         unsigned bank_num = mcg_cap & 0xff;
 832
 833         switch (msr) {
 834         case MSR_IA32_MCG_STATUS:
 835                 vcpu->arch.mcg_status = data;
 836                 break;
 837         case MSR_IA32_MCG_CTL:
 838                 if (!(mcg_cap & MCG_CTL_P))
 839                         return 1;
 840                 if (data != 0 && data != ~(u64)0)
 841                         return -1;
 842                 vcpu->arch.mcg_ctl = data;
 843                 break;
 844         default:
 845                 if (msr >= MSR_IA32_MC0_CTL &&
 846                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 847                         u32 offset = msr - MSR_IA32_MC0_CTL;
 848                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 849                         if ((offset & 0x3) == 0 &&
 850                             data != 0 && data != ~(u64)0)
 851                                 return -1;
 852                         vcpu->arch.mce_banks[offset] = data;
 853                         break;
 854                 }
 855                 return 1;
 856         }
 857         return 0;
 858 }
 859
 860 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 861 {
 862         switch (msr) {
 863         case MSR_EFER:
 864                 set_efer(vcpu, data);
 865                 break;
 866         case MSR_K7_HWCR:
 867                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 868                 if (data != 0) {
 869                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 870                                 data);
 871                         return 1;
 872                 }
 873                 break;
 874         case MSR_FAM10H_MMIO_CONF_BASE:
 875                 if (data != 0) {
 876                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 877                                 "0x%llx\n", data);
 878                         return 1;
 879                 }
 880                 break;
 881         case MSR_AMD64_NB_CFG:
 882                 break;
 883         case MSR_IA32_DEBUGCTLMSR:
 884                 if (!data) {
 885                         /* We support the non-activated case already */
 886                         break;
 887                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 888                         /* Values other than LBR and BTF are vendor-specific,
 889                            thus reserved and should throw a #GP */
 890                         return 1;
 891                 }
 892                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 893                         __func__, data);
 894                 break;
 895         case MSR_IA32_UCODE_REV:
 896         case MSR_IA32_UCODE_WRITE:
 897         case MSR_VM_HSAVE_PA:
 898         case MSR_AMD64_PATCH_LOADER:
 899                 break;
 900         case 0x200 ... 0x2ff:
 901                 return set_msr_mtrr(vcpu, msr, data);
 902         case MSR_IA32_APICBASE:
 903                 kvm_set_apic_base(vcpu, data);
 904                 break;
 905         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 906                 return kvm_x2apic_msr_write(vcpu, msr, data);
 907         case MSR_IA32_MISC_ENABLE:
 908                 vcpu->arch.ia32_misc_enable_msr = data;
 909                 break;
 910         case MSR_KVM_WALL_CLOCK:
 911                 vcpu->kvm->arch.wall_clock = data;
 912                 kvm_write_wall_clock(vcpu->kvm, data);
 913                 break;
 914         case MSR_KVM_SYSTEM_TIME: {
 915                 if (vcpu->arch.time_page) {
 916                         kvm_release_page_dirty(vcpu->arch.time_page);
 917                         vcpu->arch.time_page = NULL;
 918                 }
 919
 920                 vcpu->arch.time = data;
 921
 922                 /* we verify if the enable bit is set... */
 923                 if (!(data & 1))
 924                         break;
 925
 926                 /* ...but clean it before doing the actual write */
 927                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 928
 929                 vcpu->arch.time_page =
 930                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 931
 932                 if (is_error_page(vcpu->arch.time_page)) {
 933                         kvm_release_page_clean(vcpu->arch.time_page);
 934                         vcpu->arch.time_page = NULL;
 935                 }
 936
 937                 kvm_request_guest_time_update(vcpu);
 938                 break;
 939         }
 940         case MSR_IA32_MCG_CTL:
 941         case MSR_IA32_MCG_STATUS:
 942         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 943                 return set_msr_mce(vcpu, msr, data);
 944
 945         /* Performance counters are not protected by a CPUID bit,
 946          * so we should check all of them in the generic path for the sake of
 947          * cross vendor migration.
 948          * Writing a zero into the event select MSRs disables them,
 949          * which we perfectly emulate ;-). Any other value should be at least
 950          * reported, some guests depend on them.
 951          */
 952         case MSR_P6_EVNTSEL0:
 953         case MSR_P6_EVNTSEL1:
 954         case MSR_K7_EVNTSEL0:
 955         case MSR_K7_EVNTSEL1:
 956         case MSR_K7_EVNTSEL2:
 957         case MSR_K7_EVNTSEL3:
 958                 if (data != 0)
 959                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 960                                 "0x%x data 0x%llx\n", msr, data);
 961                 break;
 962         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 963          * so we ignore writes to make it happy.
 964          */
 965         case MSR_P6_PERFCTR0:
 966         case MSR_P6_PERFCTR1:
 967         case MSR_K7_PERFCTR0:
 968         case MSR_K7_PERFCTR1:
 969         case MSR_K7_PERFCTR2:
 970         case MSR_K7_PERFCTR3:
 971                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 972                         "0x%x data 0x%llx\n", msr, data);
 973                 break;
 974         default:
 975                 if (!ignore_msrs) {
 976                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 977                                 msr, data);
 978                         return 1;
 979                 } else {
 980                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 981                                 msr, data);
 982                         break;
 983                 }
 984         }
 985         return 0;
 986 }
 987 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 988
 989
 990 /*
 991  * Reads an msr value (of 'msr_index') into 'pdata'.
 992  * Returns 0 on success, non-0 otherwise.
 993  * Assumes vcpu_load() was already called.
 994  */
 995 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 996 {
 997         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 998 }
 999
1000 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1001 {
1002         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1003
1004         if (!msr_mtrr_valid(msr))
1005                 return 1;
1006
1007         if (msr == MSR_MTRRdefType)
1008                 *pdata = vcpu->arch.mtrr_state.def_type +
1009                          (vcpu->arch.mtrr_state.enabled << 10);
1010         else if (msr == MSR_MTRRfix64K_00000)
1011                 *pdata = p[0];
1012         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1013                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1014         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1015                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1016         else if (msr == MSR_IA32_CR_PAT)
1017                 *pdata = vcpu->arch.pat;
1018         else {  /* Variable MTRRs */
1019                 int idx, is_mtrr_mask;
1020                 u64 *pt;
1021
1022                 idx = (msr - 0x200) / 2;
1023                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1024                 if (!is_mtrr_mask)
1025                         pt =
1026                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1027                 else
1028                         pt =
1029                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1030                 *pdata = *pt;
1031         }
1032
1033         return 0;
1034 }
1035
1036 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1037 {
1038         u64 data;
1039         u64 mcg_cap = vcpu->arch.mcg_cap;
1040         unsigned bank_num = mcg_cap & 0xff;
1041
1042         switch (msr) {
1043         case MSR_IA32_P5_MC_ADDR:
1044         case MSR_IA32_P5_MC_TYPE:
1045                 data = 0;
1046                 break;
1047         case MSR_IA32_MCG_CAP:
1048                 data = vcpu->arch.mcg_cap;
1049                 break;
1050         case MSR_IA32_MCG_CTL:
1051                 if (!(mcg_cap & MCG_CTL_P))
1052                         return 1;
1053                 data = vcpu->arch.mcg_ctl;
1054                 break;
1055         case MSR_IA32_MCG_STATUS:
1056                 data = vcpu->arch.mcg_status;
1057                 break;
1058         default:
1059                 if (msr >= MSR_IA32_MC0_CTL &&
1060                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1061                         u32 offset = msr - MSR_IA32_MC0_CTL;
1062                         data = vcpu->arch.mce_banks[offset];
1063                         break;
1064                 }
1065                 return 1;
1066         }
1067         *pdata = data;
1068         return 0;
1069 }
1070
1071 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1072 {
1073         u64 data;
1074
1075         switch (msr) {
1076         case MSR_IA32_PLATFORM_ID:
1077         case MSR_IA32_UCODE_REV:
1078         case MSR_IA32_EBL_CR_POWERON:
1079         case MSR_IA32_DEBUGCTLMSR:
1080         case MSR_IA32_LASTBRANCHFROMIP:
1081         case MSR_IA32_LASTBRANCHTOIP:
1082         case MSR_IA32_LASTINTFROMIP:
1083         case MSR_IA32_LASTINTTOIP:
1084         case MSR_K8_SYSCFG:
1085         case MSR_K7_HWCR:
1086         case MSR_VM_HSAVE_PA:
1087         case MSR_P6_PERFCTR0:
1088         case MSR_P6_PERFCTR1:
1089         case MSR_P6_EVNTSEL0:
1090         case MSR_P6_EVNTSEL1:
1091         case MSR_K7_EVNTSEL0:
1092         case MSR_K7_PERFCTR0:
1093         case MSR_K8_INT_PENDING_MSG:
1094         case MSR_AMD64_NB_CFG:
1095         case MSR_FAM10H_MMIO_CONF_BASE:
1096                 data = 0;
1097                 break;
1098         case MSR_MTRRcap:
1099                 data = 0x500 | KVM_NR_VAR_MTRR;
1100                 break;
1101         case 0x200 ... 0x2ff:
1102                 return get_msr_mtrr(vcpu, msr, pdata);
1103         case 0xcd: /* fsb frequency */
1104                 data = 3;
1105                 break;
1106         case MSR_IA32_APICBASE:
1107                 data = kvm_get_apic_base(vcpu);
1108                 break;
1109         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1110                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1111                 break;
1112         case MSR_IA32_MISC_ENABLE:
1113                 data = vcpu->arch.ia32_misc_enable_msr;
1114                 break;
1115         case MSR_IA32_PERF_STATUS:
1116                 /* TSC increment by tick */
1117                 data = 1000ULL;
1118                 /* CPU multiplier */
1119                 data |= (((uint64_t)4ULL) << 40);
1120                 break;
1121         case MSR_EFER:
1122                 data = vcpu->arch.shadow_efer;
1123                 break;
1124         case MSR_KVM_WALL_CLOCK:
1125                 data = vcpu->kvm->arch.wall_clock;
1126                 break;
1127         case MSR_KVM_SYSTEM_TIME:
1128                 data = vcpu->arch.time;
1129                 break;
1130         case MSR_IA32_P5_MC_ADDR:
1131         case MSR_IA32_P5_MC_TYPE:
1132         case MSR_IA32_MCG_CAP:
1133         case MSR_IA32_MCG_CTL:
1134         case MSR_IA32_MCG_STATUS:
1135         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1136                 return get_msr_mce(vcpu, msr, pdata);
1137         default:
1138                 if (!ignore_msrs) {
1139                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1140                         return 1;
1141                 } else {
1142                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1143                         data = 0;
1144                 }
1145                 break;
1146         }
1147         *pdata = data;
1148         return 0;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1151
1152 /*
1153  * Read or write a bunch of msrs. All parameters are kernel addresses.
1154  *
1155  * @return number of msrs set successfully.
1156  */
1157 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1158                     struct kvm_msr_entry *entries,
1159                     int (*do_msr)(struct kvm_vcpu *vcpu,
1160                                   unsigned index, u64 *data))
1161 {
1162         int i;
1163
1164         vcpu_load(vcpu);
1165
1166         down_read(&vcpu->kvm->slots_lock);
1167         for (i = 0; i < msrs->nmsrs; ++i)
1168                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1169                         break;
1170         up_read(&vcpu->kvm->slots_lock);
1171
1172         vcpu_put(vcpu);
1173
1174         return i;
1175 }
1176
1177 /*
1178  * Read or write a bunch of msrs. Parameters are user addresses.
1179  *
1180  * @return number of msrs set successfully.
1181  */
1182 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1183                   int (*do_msr)(struct kvm_vcpu *vcpu,
1184                                 unsigned index, u64 *data),
1185                   int writeback)
1186 {
1187         struct kvm_msrs msrs;
1188         struct kvm_msr_entry *entries;
1189         int r, n;
1190         unsigned size;
1191
1192         r = -EFAULT;
1193         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1194                 goto out;
1195
1196         r = -E2BIG;
1197         if (msrs.nmsrs >= MAX_IO_MSRS)
1198                 goto out;
1199
1200         r = -ENOMEM;
1201         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1202         entries = vmalloc(size);
1203         if (!entries)
1204                 goto out;
1205
1206         r = -EFAULT;
1207         if (copy_from_user(entries, user_msrs->entries, size))
1208                 goto out_free;
1209
1210         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1211         if (r < 0)
1212                 goto out_free;
1213
1214         r = -EFAULT;
1215         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1216                 goto out_free;
1217
1218         r = n;
1219
1220 out_free:
1221         vfree(entries);
1222 out:
1223         return r;
1224 }
1225
1226 int kvm_dev_ioctl_check_extension(long ext)
1227 {
1228         int r;
1229
1230         switch (ext) {
1231         case KVM_CAP_IRQCHIP:
1232         case KVM_CAP_HLT:
1233         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1234         case KVM_CAP_SET_TSS_ADDR:
1235         case KVM_CAP_EXT_CPUID:
1236         case KVM_CAP_CLOCKSOURCE:
1237         case KVM_CAP_PIT:
1238         case KVM_CAP_NOP_IO_DELAY:
1239         case KVM_CAP_MP_STATE:
1240         case KVM_CAP_SYNC_MMU:
1241         case KVM_CAP_REINJECT_CONTROL:
1242         case KVM_CAP_IRQ_INJECT_STATUS:
1243         case KVM_CAP_ASSIGN_DEV_IRQ:
1244         case KVM_CAP_IRQFD:
1245         case KVM_CAP_IOEVENTFD:
1246         case KVM_CAP_PIT2:
1247         case KVM_CAP_PIT_STATE2:
1248         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1249                 r = 1;
1250                 break;
1251         case KVM_CAP_COALESCED_MMIO:
1252                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1253                 break;
1254         case KVM_CAP_VAPIC:
1255                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1256                 break;
1257         case KVM_CAP_NR_VCPUS:
1258                 r = KVM_MAX_VCPUS;
1259                 break;
1260         case KVM_CAP_NR_MEMSLOTS:
1261                 r = KVM_MEMORY_SLOTS;
1262                 break;
1263         case KVM_CAP_PV_MMU:    /* obsolete */
1264                 r = 0;
1265                 break;
1266         case KVM_CAP_IOMMU:
1267                 r = iommu_found();
1268                 break;
1269         case KVM_CAP_MCE:
1270                 r = KVM_MAX_MCE_BANKS;
1271                 break;
1272         default:
1273                 r = 0;
1274                 break;
1275         }
1276         return r;
1277
1278 }
1279
1280 long kvm_arch_dev_ioctl(struct file *filp,
1281                         unsigned int ioctl, unsigned long arg)
1282 {
1283         void __user *argp = (void __user *)arg;
1284         long r;
1285
1286         switch (ioctl) {
1287         case KVM_GET_MSR_INDEX_LIST: {
1288                 struct kvm_msr_list __user *user_msr_list = argp;
1289                 struct kvm_msr_list msr_list;
1290                 unsigned n;
1291
1292                 r = -EFAULT;
1293                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1294                         goto out;
1295                 n = msr_list.nmsrs;
1296                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1297                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1298                         goto out;
1299                 r = -E2BIG;
1300                 if (n < msr_list.nmsrs)
1301                         goto out;
1302                 r = -EFAULT;
1303                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1304                                  num_msrs_to_save * sizeof(u32)))
1305                         goto out;
1306                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1307                                  &emulated_msrs,
1308                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1309                         goto out;
1310                 r = 0;
1311                 break;
1312         }
1313         case KVM_GET_SUPPORTED_CPUID: {
1314                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1315                 struct kvm_cpuid2 cpuid;
1316
1317                 r = -EFAULT;
1318                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1319                         goto out;
1320                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1321                                                       cpuid_arg->entries);
1322                 if (r)
1323                         goto out;
1324
1325                 r = -EFAULT;
1326                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1327                         goto out;
1328                 r = 0;
1329                 break;
1330         }
1331         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1332                 u64 mce_cap;
1333
1334                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1335                 r = -EFAULT;
1336                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1337                         goto out;
1338                 r = 0;
1339                 break;
1340         }
1341         default:
1342                 r = -EINVAL;
1343         }
1344 out:
1345         return r;
1346 }
1347
1348 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1349 {
1350         kvm_x86_ops->vcpu_load(vcpu, cpu);
1351         if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0))
1352                 per_cpu(cpu_tsc_khz, cpu) = cpufreq_quick_get(cpu);
1353         kvm_request_guest_time_update(vcpu);
1354 }
1355
1356 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1357 {
1358         kvm_x86_ops->vcpu_put(vcpu);
1359         kvm_put_guest_fpu(vcpu);
1360 }
1361
1362 static int is_efer_nx(void)
1363 {
1364         unsigned long long efer = 0;
1365
1366         rdmsrl_safe(MSR_EFER, &efer);
1367         return efer & EFER_NX;
1368 }
1369
1370 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1371 {
1372         int i;
1373         struct kvm_cpuid_entry2 *e, *entry;
1374
1375         entry = NULL;
1376         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1377                 e = &vcpu->arch.cpuid_entries[i];
1378                 if (e->function == 0x80000001) {
1379                         entry = e;
1380                         break;
1381                 }
1382         }
1383         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1384                 entry->edx &= ~(1 << 20);
1385                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1386         }
1387 }
1388
1389 /* when an old userspace process fills a new kernel module */
1390 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1391                                     struct kvm_cpuid *cpuid,
1392                                     struct kvm_cpuid_entry __user *entries)
1393 {
1394         int r, i;
1395         struct kvm_cpuid_entry *cpuid_entries;
1396
1397         r = -E2BIG;
1398         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1399                 goto out;
1400         r = -ENOMEM;
1401         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1402         if (!cpuid_entries)
1403                 goto out;
1404         r = -EFAULT;
1405         if (copy_from_user(cpuid_entries, entries,
1406                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1407                 goto out_free;
1408         for (i = 0; i < cpuid->nent; i++) {
1409                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1410                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1411                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1412                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1413                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1414                 vcpu->arch.cpuid_entries[i].index = 0;
1415                 vcpu->arch.cpuid_entries[i].flags = 0;
1416                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1417                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1418                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1419         }
1420         vcpu->arch.cpuid_nent = cpuid->nent;
1421         cpuid_fix_nx_cap(vcpu);
1422         r = 0;
1423         kvm_apic_set_version(vcpu);
1424
1425 out_free:
1426         vfree(cpuid_entries);
1427 out:
1428         return r;
1429 }
1430
1431 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1432                                      struct kvm_cpuid2 *cpuid,
1433                                      struct kvm_cpuid_entry2 __user *entries)
1434 {
1435         int r;
1436
1437         r = -E2BIG;
1438         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1439                 goto out;
1440         r = -EFAULT;
1441         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1442                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1443                 goto out;
1444         vcpu->arch.cpuid_nent = cpuid->nent;
1445         kvm_apic_set_version(vcpu);
1446         return 0;
1447
1448 out:
1449         return r;
1450 }
1451
1452 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1453                                      struct kvm_cpuid2 *cpuid,
1454                                      struct kvm_cpuid_entry2 __user *entries)
1455 {
1456         int r;
1457
1458         r = -E2BIG;
1459         if (cpuid->nent < vcpu->arch.cpuid_nent)
1460                 goto out;
1461         r = -EFAULT;
1462         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1463                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1464                 goto out;
1465         return 0;
1466
1467 out:
1468         cpuid->nent = vcpu->arch.cpuid_nent;
1469         return r;
1470 }
1471
1472 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1473                            u32 index)
1474 {
1475         entry->function = function;
1476         entry->index = index;
1477         cpuid_count(entry->function, entry->index,
1478                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1479         entry->flags = 0;
1480 }
1481
1482 #define F(x) bit(X86_FEATURE_##x)
1483
1484 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1485                          u32 index, int *nent, int maxnent)
1486 {
1487         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1488         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1489 #ifdef CONFIG_X86_64
1490         unsigned f_lm = F(LM);
1491 #else
1492         unsigned f_lm = 0;
1493 #endif
1494
1495         /* cpuid 1.edx */
1496         const u32 kvm_supported_word0_x86_features =
1497                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1498                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1499                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1500                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1501                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1502                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1503                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1504                 0 /* HTT, TM, Reserved, PBE */;
1505         /* cpuid 0x80000001.edx */
1506         const u32 kvm_supported_word1_x86_features =
1507                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1508                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1509                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1510                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1511                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1512                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1513                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1514                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1515         /* cpuid 1.ecx */
1516         const u32 kvm_supported_word4_x86_features =
1517                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1518                 0 /* DS-CPL, VMX, SMX, EST */ |
1519                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1520                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1521                 0 /* Reserved, DCA */ | F(XMM4_1) |
1522                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1523                 0 /* Reserved, XSAVE, OSXSAVE */;
1524         /* cpuid 0x80000001.ecx */
1525         const u32 kvm_supported_word6_x86_features =
1526                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1527                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1528                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1529                 0 /* SKINIT */ | 0 /* WDT */;
1530
1531         /* all calls to cpuid_count() should be made on the same cpu */
1532         get_cpu();
1533         do_cpuid_1_ent(entry, function, index);
1534         ++*nent;
1535
1536         switch (function) {
1537         case 0:
1538                 entry->eax = min(entry->eax, (u32)0xb);
1539                 break;
1540         case 1:
1541                 entry->edx &= kvm_supported_word0_x86_features;
1542                 entry->ecx &= kvm_supported_word4_x86_features;
1543                 /* we support x2apic emulation even if host does not support
1544                  * it since we emulate x2apic in software */
1545                 entry->ecx |= F(X2APIC);
1546                 break;
1547         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1548          * may return different values. This forces us to get_cpu() before
1549          * issuing the first command, and also to emulate this annoying behavior
1550          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1551         case 2: {
1552                 int t, times = entry->eax & 0xff;
1553
1554                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1555                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1556                 for (t = 1; t < times && *nent < maxnent; ++t) {
1557                         do_cpuid_1_ent(&entry[t], function, 0);
1558                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1559                         ++*nent;
1560                 }
1561                 break;
1562         }
1563         /* function 4 and 0xb have additional index. */
1564         case 4: {
1565                 int i, cache_type;
1566
1567                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1568                 /* read more entries until cache_type is zero */
1569                 for (i = 1; *nent < maxnent; ++i) {
1570                         cache_type = entry[i - 1].eax & 0x1f;
1571                         if (!cache_type)
1572                                 break;
1573                         do_cpuid_1_ent(&entry[i], function, i);
1574                         entry[i].flags |=
1575                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1576                         ++*nent;
1577                 }
1578                 break;
1579         }
1580         case 0xb: {
1581                 int i, level_type;
1582
1583                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1584                 /* read more entries until level_type is zero */
1585                 for (i = 1; *nent < maxnent; ++i) {
1586                         level_type = entry[i - 1].ecx & 0xff00;
1587                         if (!level_type)
1588                                 break;
1589                         do_cpuid_1_ent(&entry[i], function, i);
1590                         entry[i].flags |=
1591                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1592                         ++*nent;
1593                 }
1594                 break;
1595         }
1596         case 0x80000000:
1597                 entry->eax = min(entry->eax, 0x8000001a);
1598                 break;
1599         case 0x80000001:
1600                 entry->edx &= kvm_supported_word1_x86_features;
1601                 entry->ecx &= kvm_supported_word6_x86_features;
1602                 break;
1603         }
1604         put_cpu();
1605 }
1606
1607 #undef F
1608
1609 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1610                                      struct kvm_cpuid_entry2 __user *entries)
1611 {
1612         struct kvm_cpuid_entry2 *cpuid_entries;
1613         int limit, nent = 0, r = -E2BIG;
1614         u32 func;
1615
1616         if (cpuid->nent < 1)
1617                 goto out;
1618         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1619                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1620         r = -ENOMEM;
1621         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1622         if (!cpuid_entries)
1623                 goto out;
1624
1625         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1626         limit = cpuid_entries[0].eax;
1627         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1628                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1629                              &nent, cpuid->nent);
1630         r = -E2BIG;
1631         if (nent >= cpuid->nent)
1632                 goto out_free;
1633
1634         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1635         limit = cpuid_entries[nent - 1].eax;
1636         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1637                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1638                              &nent, cpuid->nent);
1639         r = -E2BIG;
1640         if (nent >= cpuid->nent)
1641                 goto out_free;
1642
1643         r = -EFAULT;
1644         if (copy_to_user(entries, cpuid_entries,
1645                          nent * sizeof(struct kvm_cpuid_entry2)))
1646                 goto out_free;
1647         cpuid->nent = nent;
1648         r = 0;
1649
1650 out_free:
1651         vfree(cpuid_entries);
1652 out:
1653         return r;
1654 }
1655
1656 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1657                                     struct kvm_lapic_state *s)
1658 {
1659         vcpu_load(vcpu);
1660         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1661         vcpu_put(vcpu);
1662
1663         return 0;
1664 }
1665
1666 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1667                                     struct kvm_lapic_state *s)
1668 {
1669         vcpu_load(vcpu);
1670         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1671         kvm_apic_post_state_restore(vcpu);
1672         update_cr8_intercept(vcpu);
1673         vcpu_put(vcpu);
1674
1675         return 0;
1676 }
1677
1678 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1679                                     struct kvm_interrupt *irq)
1680 {
1681         if (irq->irq < 0 || irq->irq >= 256)
1682                 return -EINVAL;
1683         if (irqchip_in_kernel(vcpu->kvm))
1684                 return -ENXIO;
1685         vcpu_load(vcpu);
1686
1687         kvm_queue_interrupt(vcpu, irq->irq, false);
1688
1689         vcpu_put(vcpu);
1690
1691         return 0;
1692 }
1693
1694 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1695 {
1696         vcpu_load(vcpu);
1697         kvm_inject_nmi(vcpu);
1698         vcpu_put(vcpu);
1699
1700         return 0;
1701 }
1702
1703 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1704                                            struct kvm_tpr_access_ctl *tac)
1705 {
1706         if (tac->flags)
1707                 return -EINVAL;
1708         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1709         return 0;
1710 }
1711
1712 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1713                                         u64 mcg_cap)
1714 {
1715         int r;
1716         unsigned bank_num = mcg_cap & 0xff, bank;
1717
1718         r = -EINVAL;
1719         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1720                 goto out;
1721         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1722                 goto out;
1723         r = 0;
1724         vcpu->arch.mcg_cap = mcg_cap;
1725         /* Init IA32_MCG_CTL to all 1s */
1726         if (mcg_cap & MCG_CTL_P)
1727                 vcpu->arch.mcg_ctl = ~(u64)0;
1728         /* Init IA32_MCi_CTL to all 1s */
1729         for (bank = 0; bank < bank_num; bank++)
1730                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1731 out:
1732         return r;
1733 }
1734
1735 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1736                                       struct kvm_x86_mce *mce)
1737 {
1738         u64 mcg_cap = vcpu->arch.mcg_cap;
1739         unsigned bank_num = mcg_cap & 0xff;
1740         u64 *banks = vcpu->arch.mce_banks;
1741
1742         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1743                 return -EINVAL;
1744         /*
1745          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1746          * reporting is disabled
1747          */
1748         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1749             vcpu->arch.mcg_ctl != ~(u64)0)
1750                 return 0;
1751         banks += 4 * mce->bank;
1752         /*
1753          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1754          * reporting is disabled for the bank
1755          */
1756         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1757                 return 0;
1758         if (mce->status & MCI_STATUS_UC) {
1759                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1760                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1761                         printk(KERN_DEBUG "kvm: set_mce: "
1762                                "injects mce exception while "
1763                                "previous one is in progress!\n");
1764                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1765                         return 0;
1766                 }
1767                 if (banks[1] & MCI_STATUS_VAL)
1768                         mce->status |= MCI_STATUS_OVER;
1769                 banks[2] = mce->addr;
1770                 banks[3] = mce->misc;
1771                 vcpu->arch.mcg_status = mce->mcg_status;
1772                 banks[1] = mce->status;
1773                 kvm_queue_exception(vcpu, MC_VECTOR);
1774         } else if (!(banks[1] & MCI_STATUS_VAL)
1775                    || !(banks[1] & MCI_STATUS_UC)) {
1776                 if (banks[1] & MCI_STATUS_VAL)
1777                         mce->status |= MCI_STATUS_OVER;
1778                 banks[2] = mce->addr;
1779                 banks[3] = mce->misc;
1780                 banks[1] = mce->status;
1781         } else
1782                 banks[1] |= MCI_STATUS_OVER;
1783         return 0;
1784 }
1785
1786 long kvm_arch_vcpu_ioctl(struct file *filp,
1787                          unsigned int ioctl, unsigned long arg)
1788 {
1789         struct kvm_vcpu *vcpu = filp->private_data;
1790         void __user *argp = (void __user *)arg;
1791         int r;
1792         struct kvm_lapic_state *lapic = NULL;
1793
1794         switch (ioctl) {
1795         case KVM_GET_LAPIC: {
1796                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1797
1798                 r = -ENOMEM;
1799                 if (!lapic)
1800                         goto out;
1801                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1802                 if (r)
1803                         goto out;
1804                 r = -EFAULT;
1805                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1806                         goto out;
1807                 r = 0;
1808                 break;
1809         }
1810         case KVM_SET_LAPIC: {
1811                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1812                 r = -ENOMEM;
1813                 if (!lapic)
1814                         goto out;
1815                 r = -EFAULT;
1816                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1817                         goto out;
1818                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1819                 if (r)
1820                         goto out;
1821                 r = 0;
1822                 break;
1823         }
1824         case KVM_INTERRUPT: {
1825                 struct kvm_interrupt irq;
1826
1827                 r = -EFAULT;
1828                 if (copy_from_user(&irq, argp, sizeof irq))
1829                         goto out;
1830                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1831                 if (r)
1832                         goto out;
1833                 r = 0;
1834                 break;
1835         }
1836         case KVM_NMI: {
1837                 r = kvm_vcpu_ioctl_nmi(vcpu);
1838                 if (r)
1839                         goto out;
1840                 r = 0;
1841                 break;
1842         }
1843         case KVM_SET_CPUID: {
1844                 struct kvm_cpuid __user *cpuid_arg = argp;
1845                 struct kvm_cpuid cpuid;
1846
1847                 r = -EFAULT;
1848                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1849                         goto out;
1850                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1851                 if (r)
1852                         goto out;
1853                 break;
1854         }
1855         case KVM_SET_CPUID2: {
1856                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1857                 struct kvm_cpuid2 cpuid;
1858
1859                 r = -EFAULT;
1860                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1861                         goto out;
1862                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1863                                               cpuid_arg->entries);
1864                 if (r)
1865                         goto out;
1866                 break;
1867         }
1868         case KVM_GET_CPUID2: {
1869                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1870                 struct kvm_cpuid2 cpuid;
1871
1872                 r = -EFAULT;
1873                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1874                         goto out;
1875                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1876                                               cpuid_arg->entries);
1877                 if (r)
1878                         goto out;
1879                 r = -EFAULT;
1880                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1881                         goto out;
1882                 r = 0;
1883                 break;
1884         }
1885         case KVM_GET_MSRS:
1886                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1887                 break;
1888         case KVM_SET_MSRS:
1889                 r = msr_io(vcpu, argp, do_set_msr, 0);
1890                 break;
1891         case KVM_TPR_ACCESS_REPORTING: {
1892                 struct kvm_tpr_access_ctl tac;
1893
1894                 r = -EFAULT;
1895                 if (copy_from_user(&tac, argp, sizeof tac))
1896                         goto out;
1897                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1898                 if (r)
1899                         goto out;
1900                 r = -EFAULT;
1901                 if (copy_to_user(argp, &tac, sizeof tac))
1902                         goto out;
1903                 r = 0;
1904                 break;
1905         };
1906         case KVM_SET_VAPIC_ADDR: {
1907                 struct kvm_vapic_addr va;
1908
1909                 r = -EINVAL;
1910                 if (!irqchip_in_kernel(vcpu->kvm))
1911                         goto out;
1912                 r = -EFAULT;
1913                 if (copy_from_user(&va, argp, sizeof va))
1914                         goto out;
1915                 r = 0;
1916                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1917                 break;
1918         }
1919         case KVM_X86_SETUP_MCE: {
1920                 u64 mcg_cap;
1921
1922                 r = -EFAULT;
1923                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1924                         goto out;
1925                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1926                 break;
1927         }
1928         case KVM_X86_SET_MCE: {
1929                 struct kvm_x86_mce mce;
1930
1931                 r = -EFAULT;
1932                 if (copy_from_user(&mce, argp, sizeof mce))
1933                         goto out;
1934                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1935                 break;
1936         }
1937         default:
1938                 r = -EINVAL;
1939         }
1940 out:
1941         kfree(lapic);
1942         return r;
1943 }
1944
1945 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1946 {
1947         int ret;
1948
1949         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1950                 return -1;
1951         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1952         return ret;
1953 }
1954
1955 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1956                                               u64 ident_addr)
1957 {
1958         kvm->arch.ept_identity_map_addr = ident_addr;
1959         return 0;
1960 }
1961
1962 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1963                                           u32 kvm_nr_mmu_pages)
1964 {
1965         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1966                 return -EINVAL;
1967
1968         down_write(&kvm->slots_lock);
1969         spin_lock(&kvm->mmu_lock);
1970
1971         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1972         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1973
1974         spin_unlock(&kvm->mmu_lock);
1975         up_write(&kvm->slots_lock);
1976         return 0;
1977 }
1978
1979 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1980 {
1981         return kvm->arch.n_alloc_mmu_pages;
1982 }
1983
1984 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1985 {
1986         int i;
1987         struct kvm_mem_alias *alias;
1988
1989         for (i = 0; i < kvm->arch.naliases; ++i) {
1990                 alias = &kvm->arch.aliases[i];
1991                 if (gfn >= alias->base_gfn
1992                     && gfn < alias->base_gfn + alias->npages)
1993                         return alias->target_gfn + gfn - alias->base_gfn;
1994         }
1995         return gfn;
1996 }
1997
1998 /*
1999  * Set a new alias region.  Aliases map a portion of physical memory into
2000  * another portion.  This is useful for memory windows, for example the PC
2001  * VGA region.
2002  */
2003 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2004                                          struct kvm_memory_alias *alias)
2005 {
2006         int r, n;
2007         struct kvm_mem_alias *p;
2008
2009         r = -EINVAL;
2010         /* General sanity checks */
2011         if (alias->memory_size & (PAGE_SIZE - 1))
2012                 goto out;
2013         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2014                 goto out;
2015         if (alias->slot >= KVM_ALIAS_SLOTS)
2016                 goto out;
2017         if (alias->guest_phys_addr + alias->memory_size
2018             < alias->guest_phys_addr)
2019                 goto out;
2020         if (alias->target_phys_addr + alias->memory_size
2021             < alias->target_phys_addr)
2022                 goto out;
2023
2024         down_write(&kvm->slots_lock);
2025         spin_lock(&kvm->mmu_lock);
2026
2027         p = &kvm->arch.aliases[alias->slot];
2028         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2029         p->npages = alias->memory_size >> PAGE_SHIFT;
2030         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2031
2032         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2033                 if (kvm->arch.aliases[n - 1].npages)
2034                         break;
2035         kvm->arch.naliases = n;
2036
2037         spin_unlock(&kvm->mmu_lock);
2038         kvm_mmu_zap_all(kvm);
2039
2040         up_write(&kvm->slots_lock);
2041
2042         return 0;
2043
2044 out:
2045         return r;
2046 }
2047
2048 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2049 {
2050         int r;
2051
2052         r = 0;
2053         switch (chip->chip_id) {
2054         case KVM_IRQCHIP_PIC_MASTER:
2055                 memcpy(&chip->chip.pic,
2056                         &pic_irqchip(kvm)->pics[0],
2057                         sizeof(struct kvm_pic_state));
2058                 break;
2059         case KVM_IRQCHIP_PIC_SLAVE:
2060                 memcpy(&chip->chip.pic,
2061                         &pic_irqchip(kvm)->pics[1],
2062                         sizeof(struct kvm_pic_state));
2063                 break;
2064         case KVM_IRQCHIP_IOAPIC:
2065                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2066                 break;
2067         default:
2068                 r = -EINVAL;
2069                 break;
2070         }
2071         return r;
2072 }
2073
2074 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2075 {
2076         int r;
2077
2078         r = 0;
2079         switch (chip->chip_id) {
2080         case KVM_IRQCHIP_PIC_MASTER:
2081                 spin_lock(&pic_irqchip(kvm)->lock);
2082                 memcpy(&pic_irqchip(kvm)->pics[0],
2083                         &chip->chip.pic,
2084                         sizeof(struct kvm_pic_state));
2085                 spin_unlock(&pic_irqchip(kvm)->lock);
2086                 break;
2087         case KVM_IRQCHIP_PIC_SLAVE:
2088                 spin_lock(&pic_irqchip(kvm)->lock);
2089                 memcpy(&pic_irqchip(kvm)->pics[1],
2090                         &chip->chip.pic,
2091                         sizeof(struct kvm_pic_state));
2092                 spin_unlock(&pic_irqchip(kvm)->lock);
2093                 break;
2094         case KVM_IRQCHIP_IOAPIC:
2095                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2096                 break;
2097         default:
2098                 r = -EINVAL;
2099                 break;
2100         }
2101         kvm_pic_update_irq(pic_irqchip(kvm));
2102         return r;
2103 }
2104
2105 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2106 {
2107         int r = 0;
2108
2109         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2110         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2111         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2112         return r;
2113 }
2114
2115 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2116 {
2117         int r = 0;
2118
2119         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2120         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2121         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2122         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2123         return r;
2124 }
2125
2126 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2127 {
2128         int r = 0;
2129
2130         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2131         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2132                 sizeof(ps->channels));
2133         ps->flags = kvm->arch.vpit->pit_state.flags;
2134         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2135         return r;
2136 }
2137
2138 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2139 {
2140         int r = 0, start = 0;
2141         u32 prev_legacy, cur_legacy;
2142         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2143         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2144         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2145         if (!prev_legacy && cur_legacy)
2146                 start = 1;
2147         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2148                sizeof(kvm->arch.vpit->pit_state.channels));
2149         kvm->arch.vpit->pit_state.flags = ps->flags;
2150         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2151         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2152         return r;
2153 }
2154
2155 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2156                                  struct kvm_reinject_control *control)
2157 {
2158         if (!kvm->arch.vpit)
2159                 return -ENXIO;
2160         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2161         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2162         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2163         return 0;
2164 }
2165
2166 /*
2167  * Get (and clear) the dirty memory log for a memory slot.
2168  */
2169 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2170                                       struct kvm_dirty_log *log)
2171 {
2172         int r;
2173         int n;
2174         struct kvm_memory_slot *memslot;
2175         int is_dirty = 0;
2176
2177         down_write(&kvm->slots_lock);
2178
2179         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2180         if (r)
2181                 goto out;
2182
2183         /* If nothing is dirty, don't bother messing with page tables. */
2184         if (is_dirty) {
2185                 spin_lock(&kvm->mmu_lock);
2186                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2187                 spin_unlock(&kvm->mmu_lock);
2188                 memslot = &kvm->memslots[log->slot];
2189                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2190                 memset(memslot->dirty_bitmap, 0, n);
2191         }
2192         r = 0;
2193 out:
2194         up_write(&kvm->slots_lock);
2195         return r;
2196 }
2197
2198 long kvm_arch_vm_ioctl(struct file *filp,
2199                        unsigned int ioctl, unsigned long arg)
2200 {
2201         struct kvm *kvm = filp->private_data;
2202         void __user *argp = (void __user *)arg;
2203         int r = -ENOTTY;
2204         /*
2205          * This union makes it completely explicit to gcc-3.x
2206          * that these two variables' stack usage should be
2207          * combined, not added together.
2208          */
2209         union {
2210                 struct kvm_pit_state ps;
2211                 struct kvm_pit_state2 ps2;
2212                 struct kvm_memory_alias alias;
2213                 struct kvm_pit_config pit_config;
2214         } u;
2215
2216         switch (ioctl) {
2217         case KVM_SET_TSS_ADDR:
2218                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2219                 if (r < 0)
2220                         goto out;
2221                 break;
2222         case KVM_SET_IDENTITY_MAP_ADDR: {
2223                 u64 ident_addr;
2224
2225                 r = -EFAULT;
2226                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2227                         goto out;
2228                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2229                 if (r < 0)
2230                         goto out;
2231                 break;
2232         }
2233         case KVM_SET_MEMORY_REGION: {
2234                 struct kvm_memory_region kvm_mem;
2235                 struct kvm_userspace_memory_region kvm_userspace_mem;
2236
2237                 r = -EFAULT;
2238                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2239                         goto out;
2240                 kvm_userspace_mem.slot = kvm_mem.slot;
2241                 kvm_userspace_mem.flags = kvm_mem.flags;
2242                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2243                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2244                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2245                 if (r)
2246                         goto out;
2247                 break;
2248         }
2249         case KVM_SET_NR_MMU_PAGES:
2250                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2251                 if (r)
2252                         goto out;
2253                 break;
2254         case KVM_GET_NR_MMU_PAGES:
2255                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2256                 break;
2257         case KVM_SET_MEMORY_ALIAS:
2258                 r = -EFAULT;
2259                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2260                         goto out;
2261                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2262                 if (r)
2263                         goto out;
2264                 break;
2265         case KVM_CREATE_IRQCHIP:
2266                 r = -ENOMEM;
2267                 kvm->arch.vpic = kvm_create_pic(kvm);
2268                 if (kvm->arch.vpic) {
2269                         r = kvm_ioapic_init(kvm);
2270                         if (r) {
2271                                 kfree(kvm->arch.vpic);
2272                                 kvm->arch.vpic = NULL;
2273                                 goto out;
2274                         }
2275                 } else
2276                         goto out;
2277                 r = kvm_setup_default_irq_routing(kvm);
2278                 if (r) {
2279                         kfree(kvm->arch.vpic);
2280                         kfree(kvm->arch.vioapic);
2281                         goto out;
2282                 }
2283                 break;
2284         case KVM_CREATE_PIT:
2285                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2286                 goto create_pit;
2287         case KVM_CREATE_PIT2:
2288                 r = -EFAULT;
2289                 if (copy_from_user(&u.pit_config, argp,
2290                                    sizeof(struct kvm_pit_config)))
2291                         goto out;
2292         create_pit:
2293                 down_write(&kvm->slots_lock);
2294                 r = -EEXIST;
2295                 if (kvm->arch.vpit)
2296                         goto create_pit_unlock;
2297                 r = -ENOMEM;
2298                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2299                 if (kvm->arch.vpit)
2300                         r = 0;
2301         create_pit_unlock:
2302                 up_write(&kvm->slots_lock);
2303                 break;
2304         case KVM_IRQ_LINE_STATUS:
2305         case KVM_IRQ_LINE: {
2306                 struct kvm_irq_level irq_event;
2307
2308                 r = -EFAULT;
2309                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2310                         goto out;
2311                 if (irqchip_in_kernel(kvm)) {
2312                         __s32 status;
2313                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2314                                         irq_event.irq, irq_event.level);
2315                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2316                                 irq_event.status = status;
2317                                 if (copy_to_user(argp, &irq_event,
2318                                                         sizeof irq_event))
2319                                         goto out;
2320                         }
2321                         r = 0;
2322                 }
2323                 break;
2324         }
2325         case KVM_GET_IRQCHIP: {
2326                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2327                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2328
2329                 r = -ENOMEM;
2330                 if (!chip)
2331                         goto out;
2332                 r = -EFAULT;
2333                 if (copy_from_user(chip, argp, sizeof *chip))
2334                         goto get_irqchip_out;
2335                 r = -ENXIO;
2336                 if (!irqchip_in_kernel(kvm))
2337                         goto get_irqchip_out;
2338                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2339                 if (r)
2340                         goto get_irqchip_out;
2341                 r = -EFAULT;
2342                 if (copy_to_user(argp, chip, sizeof *chip))
2343                         goto get_irqchip_out;
2344                 r = 0;
2345         get_irqchip_out:
2346                 kfree(chip);
2347                 if (r)
2348                         goto out;
2349                 break;
2350         }
2351         case KVM_SET_IRQCHIP: {
2352                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2353                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2354
2355                 r = -ENOMEM;
2356                 if (!chip)
2357                         goto out;
2358                 r = -EFAULT;
2359                 if (copy_from_user(chip, argp, sizeof *chip))
2360                         goto set_irqchip_out;
2361                 r = -ENXIO;
2362                 if (!irqchip_in_kernel(kvm))
2363                         goto set_irqchip_out;
2364                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2365                 if (r)
2366                         goto set_irqchip_out;
2367                 r = 0;
2368         set_irqchip_out:
2369                 kfree(chip);
2370                 if (r)
2371                         goto out;
2372                 break;
2373         }
2374         case KVM_GET_PIT: {
2375                 r = -EFAULT;
2376                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2377                         goto out;
2378                 r = -ENXIO;
2379                 if (!kvm->arch.vpit)
2380                         goto out;
2381                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2382                 if (r)
2383                         goto out;
2384                 r = -EFAULT;
2385                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2386                         goto out;
2387                 r = 0;
2388                 break;
2389         }
2390         case KVM_SET_PIT: {
2391                 r = -EFAULT;
2392                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2393                         goto out;
2394                 r = -ENXIO;
2395                 if (!kvm->arch.vpit)
2396                         goto out;
2397                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2398                 if (r)
2399                         goto out;
2400                 r = 0;
2401                 break;
2402         }
2403         case KVM_GET_PIT2: {
2404                 r = -ENXIO;
2405                 if (!kvm->arch.vpit)
2406                         goto out;
2407                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2408                 if (r)
2409                         goto out;
2410                 r = -EFAULT;
2411                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2412                         goto out;
2413                 r = 0;
2414                 break;
2415         }
2416         case KVM_SET_PIT2: {
2417                 r = -EFAULT;
2418                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2419                         goto out;
2420                 r = -ENXIO;
2421                 if (!kvm->arch.vpit)
2422                         goto out;
2423                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2424                 if (r)
2425                         goto out;
2426                 r = 0;
2427                 break;
2428         }
2429         case KVM_REINJECT_CONTROL: {
2430                 struct kvm_reinject_control control;
2431                 r =  -EFAULT;
2432                 if (copy_from_user(&control, argp, sizeof(control)))
2433                         goto out;
2434                 r = kvm_vm_ioctl_reinject(kvm, &control);
2435                 if (r)
2436                         goto out;
2437                 r = 0;
2438                 break;
2439         }
2440         default:
2441                 ;
2442         }
2443 out:
2444         return r;
2445 }
2446
2447 static void kvm_init_msr_list(void)
2448 {
2449         u32 dummy[2];
2450         unsigned i, j;
2451
2452         /* skip the first msrs in the list. KVM-specific */
2453         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2454                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2455                         continue;
2456                 if (j < i)
2457                         msrs_to_save[j] = msrs_to_save[i];
2458                 j++;
2459         }
2460         num_msrs_to_save = j;
2461 }
2462
2463 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2464                            const void *v)
2465 {
2466         if (vcpu->arch.apic &&
2467             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2468                 return 0;
2469
2470         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2471 }
2472
2473 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2474 {
2475         if (vcpu->arch.apic &&
2476             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2477                 return 0;
2478
2479         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2480 }
2481
2482 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2483                                struct kvm_vcpu *vcpu)
2484 {
2485         void *data = val;
2486         int r = X86EMUL_CONTINUE;
2487
2488         while (bytes) {
2489                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2490                 unsigned offset = addr & (PAGE_SIZE-1);
2491                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2492                 int ret;
2493
2494                 if (gpa == UNMAPPED_GVA) {
2495                         r = X86EMUL_PROPAGATE_FAULT;
2496                         goto out;
2497                 }
2498                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2499                 if (ret < 0) {
2500                         r = X86EMUL_UNHANDLEABLE;
2501                         goto out;
2502                 }
2503
2504                 bytes -= toread;
2505                 data += toread;
2506                 addr += toread;
2507         }
2508 out:
2509         return r;
2510 }
2511
2512 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2513                                 struct kvm_vcpu *vcpu)
2514 {
2515         void *data = val;
2516         int r = X86EMUL_CONTINUE;
2517
2518         while (bytes) {
2519                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2520                 unsigned offset = addr & (PAGE_SIZE-1);
2521                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2522                 int ret;
2523
2524                 if (gpa == UNMAPPED_GVA) {
2525                         r = X86EMUL_PROPAGATE_FAULT;
2526                         goto out;
2527                 }
2528                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2529                 if (ret < 0) {
2530                         r = X86EMUL_UNHANDLEABLE;
2531                         goto out;
2532                 }
2533
2534                 bytes -= towrite;
2535                 data += towrite;
2536                 addr += towrite;
2537         }
2538 out:
2539         return r;
2540 }
2541
2542
2543 static int emulator_read_emulated(unsigned long addr,
2544                                   void *val,
2545                                   unsigned int bytes,
2546                                   struct kvm_vcpu *vcpu)
2547 {
2548         gpa_t                 gpa;
2549
2550         if (vcpu->mmio_read_completed) {
2551                 memcpy(val, vcpu->mmio_data, bytes);
2552                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2553                                vcpu->mmio_phys_addr, *(u64 *)val);
2554                 vcpu->mmio_read_completed = 0;
2555                 return X86EMUL_CONTINUE;
2556         }
2557
2558         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2559
2560         /* For APIC access vmexit */
2561         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2562                 goto mmio;
2563
2564         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2565                                 == X86EMUL_CONTINUE)
2566                 return X86EMUL_CONTINUE;
2567         if (gpa == UNMAPPED_GVA)
2568                 return X86EMUL_PROPAGATE_FAULT;
2569
2570 mmio:
2571         /*
2572          * Is this MMIO handled locally?
2573          */
2574         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2575                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2576                 return X86EMUL_CONTINUE;
2577         }
2578
2579         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2580
2581         vcpu->mmio_needed = 1;
2582         vcpu->mmio_phys_addr = gpa;
2583         vcpu->mmio_size = bytes;
2584         vcpu->mmio_is_write = 0;
2585
2586         return X86EMUL_UNHANDLEABLE;
2587 }
2588
2589 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2590                           const void *val, int bytes)
2591 {
2592         int ret;
2593
2594         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2595         if (ret < 0)
2596                 return 0;
2597         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2598         return 1;
2599 }
2600
2601 static int emulator_write_emulated_onepage(unsigned long addr,
2602                                            const void *val,
2603                                            unsigned int bytes,
2604                                            struct kvm_vcpu *vcpu)
2605 {
2606         gpa_t                 gpa;
2607
2608         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2609
2610         if (gpa == UNMAPPED_GVA) {
2611                 kvm_inject_page_fault(vcpu, addr, 2);
2612                 return X86EMUL_PROPAGATE_FAULT;
2613         }
2614
2615         /* For APIC access vmexit */
2616         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2617                 goto mmio;
2618
2619         if (emulator_write_phys(vcpu, gpa, val, bytes))
2620                 return X86EMUL_CONTINUE;
2621
2622 mmio:
2623         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2624         /*
2625          * Is this MMIO handled locally?
2626          */
2627         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2628                 return X86EMUL_CONTINUE;
2629
2630         vcpu->mmio_needed = 1;
2631         vcpu->mmio_phys_addr = gpa;
2632         vcpu->mmio_size = bytes;
2633         vcpu->mmio_is_write = 1;
2634         memcpy(vcpu->mmio_data, val, bytes);
2635
2636         return X86EMUL_CONTINUE;
2637 }
2638
2639 int emulator_write_emulated(unsigned long addr,
2640                                    const void *val,
2641                                    unsigned int bytes,
2642                                    struct kvm_vcpu *vcpu)
2643 {
2644         /* Crossing a page boundary? */
2645         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2646                 int rc, now;
2647
2648                 now = -addr & ~PAGE_MASK;
2649                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2650                 if (rc != X86EMUL_CONTINUE)
2651                         return rc;
2652                 addr += now;
2653                 val += now;
2654                 bytes -= now;
2655         }
2656         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2657 }
2658 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2659
2660 static int emulator_cmpxchg_emulated(unsigned long addr,
2661                                      const void *old,
2662                                      const void *new,
2663                                      unsigned int bytes,
2664                                      struct kvm_vcpu *vcpu)
2665 {
2666         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2667 #ifndef CONFIG_X86_64
2668         /* guests cmpxchg8b have to be emulated atomically */
2669         if (bytes == 8) {
2670                 gpa_t gpa;
2671                 struct page *page;
2672                 char *kaddr;
2673                 u64 val;
2674
2675                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2676
2677                 if (gpa == UNMAPPED_GVA ||
2678                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2679                         goto emul_write;
2680
2681                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2682                         goto emul_write;
2683
2684                 val = *(u64 *)new;
2685
2686                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2687
2688                 kaddr = kmap_atomic(page, KM_USER0);
2689                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2690                 kunmap_atomic(kaddr, KM_USER0);
2691                 kvm_release_page_dirty(page);
2692         }
2693 emul_write:
2694 #endif
2695
2696         return emulator_write_emulated(addr, new, bytes, vcpu);
2697 }
2698
2699 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2700 {
2701         return kvm_x86_ops->get_segment_base(vcpu, seg);
2702 }
2703
2704 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2705 {
2706         kvm_mmu_invlpg(vcpu, address);
2707         return X86EMUL_CONTINUE;
2708 }
2709
2710 int emulate_clts(struct kvm_vcpu *vcpu)
2711 {
2712         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2713         return X86EMUL_CONTINUE;
2714 }
2715
2716 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2717 {
2718         struct kvm_vcpu *vcpu = ctxt->vcpu;
2719
2720         switch (dr) {
2721         case 0 ... 3:
2722                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2723                 return X86EMUL_CONTINUE;
2724         default:
2725                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2726                 return X86EMUL_UNHANDLEABLE;
2727         }
2728 }
2729
2730 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2731 {
2732         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2733         int exception;
2734
2735         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2736         if (exception) {
2737                 /* FIXME: better handling */
2738                 return X86EMUL_UNHANDLEABLE;
2739         }
2740         return X86EMUL_CONTINUE;
2741 }
2742
2743 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2744 {
2745         u8 opcodes[4];
2746         unsigned long rip = kvm_rip_read(vcpu);
2747         unsigned long rip_linear;
2748
2749         if (!printk_ratelimit())
2750                 return;
2751
2752         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2753
2754         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2755
2756         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2757                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2758 }
2759 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2760
2761 static struct x86_emulate_ops emulate_ops = {
2762         .read_std            = kvm_read_guest_virt,
2763         .read_emulated       = emulator_read_emulated,
2764         .write_emulated      = emulator_write_emulated,
2765         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2766 };
2767
2768 static void cache_all_regs(struct kvm_vcpu *vcpu)
2769 {
2770         kvm_register_read(vcpu, VCPU_REGS_RAX);
2771         kvm_register_read(vcpu, VCPU_REGS_RSP);
2772         kvm_register_read(vcpu, VCPU_REGS_RIP);
2773         vcpu->arch.regs_dirty = ~0;
2774 }
2775
2776 int emulate_instruction(struct kvm_vcpu *vcpu,
2777                         unsigned long cr2,
2778                         u16 error_code,
2779                         int emulation_type)
2780 {
2781         int r, shadow_mask;
2782         struct decode_cache *c;
2783         struct kvm_run *run = vcpu->run;
2784
2785         kvm_clear_exception_queue(vcpu);
2786         vcpu->arch.mmio_fault_cr2 = cr2;
2787         /*
2788          * TODO: fix emulate.c to use guest_read/write_register
2789          * instead of direct ->regs accesses, can save hundred cycles
2790          * on Intel for instructions that don't read/change RSP, for
2791          * for example.
2792          */
2793         cache_all_regs(vcpu);
2794
2795         vcpu->mmio_is_write = 0;
2796         vcpu->arch.pio.string = 0;
2797
2798         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2799                 int cs_db, cs_l;
2800                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2801
2802                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2803                 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
2804                 vcpu->arch.emulate_ctxt.mode =
2805                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2806                         ? X86EMUL_MODE_REAL : cs_l
2807                         ? X86EMUL_MODE_PROT64 : cs_db
2808                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2809
2810                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2811
2812                 /* Only allow emulation of specific instructions on #UD
2813                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2814                 c = &vcpu->arch.emulate_ctxt.decode;
2815                 if (emulation_type & EMULTYPE_TRAP_UD) {
2816                         if (!c->twobyte)
2817                                 return EMULATE_FAIL;
2818                         switch (c->b) {
2819                         case 0x01: /* VMMCALL */
2820                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2821                                         return EMULATE_FAIL;
2822                                 break;
2823                         case 0x34: /* sysenter */
2824                         case 0x35: /* sysexit */
2825                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2826                                         return EMULATE_FAIL;
2827                                 break;
2828                         case 0x05: /* syscall */
2829                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2830                                         return EMULATE_FAIL;
2831                                 break;
2832                         default:
2833                                 return EMULATE_FAIL;
2834                         }
2835
2836                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2837                                 return EMULATE_FAIL;
2838                 }
2839
2840                 ++vcpu->stat.insn_emulation;
2841                 if (r)  {
2842                         ++vcpu->stat.insn_emulation_fail;
2843                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2844                                 return EMULATE_DONE;
2845                         return EMULATE_FAIL;
2846                 }
2847         }
2848
2849         if (emulation_type & EMULTYPE_SKIP) {
2850                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2851                 return EMULATE_DONE;
2852         }
2853
2854         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2855         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2856
2857         if (r == 0)
2858                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2859
2860         if (vcpu->arch.pio.string)
2861                 return EMULATE_DO_MMIO;
2862
2863         if ((r || vcpu->mmio_is_write) && run) {
2864                 run->exit_reason = KVM_EXIT_MMIO;
2865                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2866                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2867                 run->mmio.len = vcpu->mmio_size;
2868                 run->mmio.is_write = vcpu->mmio_is_write;
2869         }
2870
2871         if (r) {
2872                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2873                         return EMULATE_DONE;
2874                 if (!vcpu->mmio_needed) {
2875                         kvm_report_emulation_failure(vcpu, "mmio");
2876                         return EMULATE_FAIL;
2877                 }
2878                 return EMULATE_DO_MMIO;
2879         }
2880
2881         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2882
2883         if (vcpu->mmio_is_write) {
2884                 vcpu->mmio_needed = 0;
2885                 return EMULATE_DO_MMIO;
2886         }
2887
2888         return EMULATE_DONE;
2889 }
2890 EXPORT_SYMBOL_GPL(emulate_instruction);
2891
2892 static int pio_copy_data(struct kvm_vcpu *vcpu)
2893 {
2894         void *p = vcpu->arch.pio_data;
2895         gva_t q = vcpu->arch.pio.guest_gva;
2896         unsigned bytes;
2897         int ret;
2898
2899         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2900         if (vcpu->arch.pio.in)
2901                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2902         else
2903                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2904         return ret;
2905 }
2906
2907 int complete_pio(struct kvm_vcpu *vcpu)
2908 {
2909         struct kvm_pio_request *io = &vcpu->arch.pio;
2910         long delta;
2911         int r;
2912         unsigned long val;
2913
2914         if (!io->string) {
2915                 if (io->in) {
2916                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2917                         memcpy(&val, vcpu->arch.pio_data, io->size);
2918                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2919                 }
2920         } else {
2921                 if (io->in) {
2922                         r = pio_copy_data(vcpu);
2923                         if (r)
2924                                 return r;
2925                 }
2926
2927                 delta = 1;
2928                 if (io->rep) {
2929                         delta *= io->cur_count;
2930                         /*
2931                          * The size of the register should really depend on
2932                          * current address size.
2933                          */
2934                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2935                         val -= delta;
2936                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2937                 }
2938                 if (io->down)
2939                         delta = -delta;
2940                 delta *= io->size;
2941                 if (io->in) {
2942                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2943                         val += delta;
2944                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2945                 } else {
2946                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2947                         val += delta;
2948                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2949                 }
2950         }
2951
2952         io->count -= io->cur_count;
2953         io->cur_count = 0;
2954
2955         return 0;
2956 }
2957
2958 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2959 {
2960         /* TODO: String I/O for in kernel device */
2961         int r;
2962
2963         if (vcpu->arch.pio.in)
2964                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2965                                     vcpu->arch.pio.size, pd);
2966         else
2967                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2968                                      vcpu->arch.pio.size, pd);
2969         return r;
2970 }
2971
2972 static int pio_string_write(struct kvm_vcpu *vcpu)
2973 {
2974         struct kvm_pio_request *io = &vcpu->arch.pio;
2975         void *pd = vcpu->arch.pio_data;
2976         int i, r = 0;
2977
2978         for (i = 0; i < io->cur_count; i++) {
2979                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2980                                      io->port, io->size, pd)) {
2981                         r = -EOPNOTSUPP;
2982                         break;
2983                 }
2984                 pd += io->size;
2985         }
2986         return r;
2987 }
2988
2989 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
2990 {
2991         unsigned long val;
2992
2993         vcpu->run->exit_reason = KVM_EXIT_IO;
2994         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2995         vcpu->run->io.size = vcpu->arch.pio.size = size;
2996         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2997         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2998         vcpu->run->io.port = vcpu->arch.pio.port = port;
2999         vcpu->arch.pio.in = in;
3000         vcpu->arch.pio.string = 0;
3001         vcpu->arch.pio.down = 0;
3002         vcpu->arch.pio.rep = 0;
3003
3004         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3005                       size, 1);
3006
3007         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3008         memcpy(vcpu->arch.pio_data, &val, 4);
3009
3010         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3011                 complete_pio(vcpu);
3012                 return 1;
3013         }
3014         return 0;
3015 }
3016 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3017
3018 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3019                   int size, unsigned long count, int down,
3020                   gva_t address, int rep, unsigned port)
3021 {
3022         unsigned now, in_page;
3023         int ret = 0;
3024
3025         vcpu->run->exit_reason = KVM_EXIT_IO;
3026         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3027         vcpu->run->io.size = vcpu->arch.pio.size = size;
3028         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3029         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3030         vcpu->run->io.port = vcpu->arch.pio.port = port;
3031         vcpu->arch.pio.in = in;
3032         vcpu->arch.pio.string = 1;
3033         vcpu->arch.pio.down = down;
3034         vcpu->arch.pio.rep = rep;
3035
3036         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3037                       size, count);
3038
3039         if (!count) {
3040                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3041                 return 1;
3042         }
3043
3044         if (!down)
3045                 in_page = PAGE_SIZE - offset_in_page(address);
3046         else
3047                 in_page = offset_in_page(address) + size;
3048         now = min(count, (unsigned long)in_page / size);
3049         if (!now)
3050                 now = 1;
3051         if (down) {
3052                 /*
3053                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3054                  */
3055                 pr_unimpl(vcpu, "guest string pio down\n");
3056                 kvm_inject_gp(vcpu, 0);
3057                 return 1;
3058         }
3059         vcpu->run->io.count = now;
3060         vcpu->arch.pio.cur_count = now;
3061
3062         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3063                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3064
3065         vcpu->arch.pio.guest_gva = address;
3066
3067         if (!vcpu->arch.pio.in) {
3068                 /* string PIO write */
3069                 ret = pio_copy_data(vcpu);
3070                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3071                         kvm_inject_gp(vcpu, 0);
3072                         return 1;
3073                 }
3074                 if (ret == 0 && !pio_string_write(vcpu)) {
3075                         complete_pio(vcpu);
3076                         if (vcpu->arch.pio.count == 0)
3077                                 ret = 1;
3078                 }
3079         }
3080         /* no string PIO read support yet */
3081
3082         return ret;
3083 }
3084 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3085
3086 static void bounce_off(void *info)
3087 {
3088         /* nothing */
3089 }
3090
3091 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3092                                      void *data)
3093 {
3094         struct cpufreq_freqs *freq = data;
3095         struct kvm *kvm;
3096         struct kvm_vcpu *vcpu;
3097         int i, send_ipi = 0;
3098
3099         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3100                 return 0;
3101         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3102                 return 0;
3103         per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3104
3105         spin_lock(&kvm_lock);
3106         list_for_each_entry(kvm, &vm_list, vm_list) {
3107                 kvm_for_each_vcpu(i, vcpu, kvm) {
3108                         if (vcpu->cpu != freq->cpu)
3109                                 continue;
3110                         if (!kvm_request_guest_time_update(vcpu))
3111                                 continue;
3112                         if (vcpu->cpu != smp_processor_id())
3113                                 send_ipi++;
3114                 }
3115         }
3116         spin_unlock(&kvm_lock);
3117
3118         if (freq->old < freq->new && send_ipi) {
3119                 /*
3120                  * We upscale the frequency.  Must make the guest
3121                  * doesn't see old kvmclock values while running with
3122                  * the new frequency, otherwise we risk the guest sees
3123                  * time go backwards.
3124                  *
3125                  * In case we update the frequency for another cpu
3126                  * (which might be in guest context) send an interrupt
3127                  * to kick the cpu out of guest context.  Next time
3128                  * guest context is entered kvmclock will be updated,
3129                  * so the guest will not see stale values.
3130                  */
3131                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3132         }
3133         return 0;
3134 }
3135
3136 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3137         .notifier_call  = kvmclock_cpufreq_notifier
3138 };
3139
3140 static void kvm_timer_init(void)
3141 {
3142         int cpu;
3143
3144         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3145                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3146                                           CPUFREQ_TRANSITION_NOTIFIER);
3147                 for_each_online_cpu(cpu)
3148                         per_cpu(cpu_tsc_khz, cpu) = cpufreq_get(cpu);
3149         } else {
3150                 for_each_possible_cpu(cpu)
3151                         per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3152         }
3153 }
3154
3155 int kvm_arch_init(void *opaque)
3156 {
3157         int r;
3158         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3159
3160         if (kvm_x86_ops) {
3161                 printk(KERN_ERR "kvm: already loaded the other module\n");
3162                 r = -EEXIST;
3163                 goto out;
3164         }
3165
3166         if (!ops->cpu_has_kvm_support()) {
3167                 printk(KERN_ERR "kvm: no hardware support\n");
3168                 r = -EOPNOTSUPP;
3169                 goto out;
3170         }
3171         if (ops->disabled_by_bios()) {
3172                 printk(KERN_ERR "kvm: disabled by bios\n");
3173                 r = -EOPNOTSUPP;
3174                 goto out;
3175         }
3176
3177         r = kvm_mmu_module_init();
3178         if (r)
3179                 goto out;
3180
3181         kvm_init_msr_list();
3182
3183         kvm_x86_ops = ops;
3184         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3185         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3186         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3187                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3188
3189         kvm_timer_init();
3190
3191         return 0;
3192
3193 out:
3194         return r;
3195 }
3196
3197 void kvm_arch_exit(void)
3198 {
3199         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3200                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3201                                             CPUFREQ_TRANSITION_NOTIFIER);
3202         kvm_x86_ops = NULL;
3203         kvm_mmu_module_exit();
3204 }
3205
3206 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3207 {
3208         ++vcpu->stat.halt_exits;
3209         if (irqchip_in_kernel(vcpu->kvm)) {
3210                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3211                 return 1;
3212         } else {
3213                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3214                 return 0;
3215         }
3216 }
3217 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3218
3219 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3220                            unsigned long a1)
3221 {
3222         if (is_long_mode(vcpu))
3223                 return a0;
3224         else
3225                 return a0 | ((gpa_t)a1 << 32);
3226 }
3227
3228 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3229 {
3230         unsigned long nr, a0, a1, a2, a3, ret;
3231         int r = 1;
3232
3233         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3234         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3235         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3236         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3237         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3238
3239         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3240
3241         if (!is_long_mode(vcpu)) {
3242                 nr &= 0xFFFFFFFF;
3243                 a0 &= 0xFFFFFFFF;
3244                 a1 &= 0xFFFFFFFF;
3245                 a2 &= 0xFFFFFFFF;
3246                 a3 &= 0xFFFFFFFF;
3247         }
3248
3249         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3250                 ret = -KVM_EPERM;
3251                 goto out;
3252         }
3253
3254         switch (nr) {
3255         case KVM_HC_VAPIC_POLL_IRQ:
3256                 ret = 0;
3257                 break;
3258         case KVM_HC_MMU_OP:
3259                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3260                 break;
3261         default:
3262                 ret = -KVM_ENOSYS;
3263                 break;
3264         }
3265 out:
3266         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3267         ++vcpu->stat.hypercalls;
3268         return r;
3269 }
3270 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3271
3272 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3273 {
3274         char instruction[3];
3275         int ret = 0;
3276         unsigned long rip = kvm_rip_read(vcpu);
3277
3278
3279         /*
3280          * Blow out the MMU to ensure that no other VCPU has an active mapping
3281          * to ensure that the updated hypercall appears atomically across all
3282          * VCPUs.
3283          */
3284         kvm_mmu_zap_all(vcpu->kvm);
3285
3286         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3287         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3288             != X86EMUL_CONTINUE)
3289                 ret = -EFAULT;
3290
3291         return ret;
3292 }
3293
3294 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3295 {
3296         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3297 }
3298
3299 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3300 {
3301         struct descriptor_table dt = { limit, base };
3302
3303         kvm_x86_ops->set_gdt(vcpu, &dt);
3304 }
3305
3306 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3307 {
3308         struct descriptor_table dt = { limit, base };
3309
3310         kvm_x86_ops->set_idt(vcpu, &dt);
3311 }
3312
3313 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3314                    unsigned long *rflags)
3315 {
3316         kvm_lmsw(vcpu, msw);
3317         *rflags = kvm_get_rflags(vcpu);
3318 }
3319
3320 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3321 {
3322         unsigned long value;
3323
3324         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3325         switch (cr) {
3326         case 0:
3327                 value = vcpu->arch.cr0;
3328                 break;
3329         case 2:
3330                 value = vcpu->arch.cr2;
3331                 break;
3332         case 3:
3333                 value = vcpu->arch.cr3;
3334                 break;
3335         case 4:
3336                 value = vcpu->arch.cr4;
3337                 break;
3338         case 8:
3339                 value = kvm_get_cr8(vcpu);
3340                 break;
3341         default:
3342                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3343                 return 0;
3344         }
3345
3346         return value;
3347 }
3348
3349 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3350                      unsigned long *rflags)
3351 {
3352         switch (cr) {
3353         case 0:
3354                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3355                 *rflags = kvm_get_rflags(vcpu);
3356                 break;
3357         case 2:
3358                 vcpu->arch.cr2 = val;
3359                 break;
3360         case 3:
3361                 kvm_set_cr3(vcpu, val);
3362                 break;
3363         case 4:
3364                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3365                 break;
3366         case 8:
3367                 kvm_set_cr8(vcpu, val & 0xfUL);
3368                 break;
3369         default:
3370                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3371         }
3372 }
3373
3374 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3375 {
3376         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3377         int j, nent = vcpu->arch.cpuid_nent;
3378
3379         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3380         /* when no next entry is found, the current entry[i] is reselected */
3381         for (j = i + 1; ; j = (j + 1) % nent) {
3382                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3383                 if (ej->function == e->function) {
3384                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3385                         return j;
3386                 }
3387         }
3388         return 0; /* silence gcc, even though control never reaches here */
3389 }
3390
3391 /* find an entry with matching function, matching index (if needed), and that
3392  * should be read next (if it's stateful) */
3393 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3394         u32 function, u32 index)
3395 {
3396         if (e->function != function)
3397                 return 0;
3398         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3399                 return 0;
3400         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3401             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3402                 return 0;
3403         return 1;
3404 }
3405
3406 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3407                                               u32 function, u32 index)
3408 {
3409         int i;
3410         struct kvm_cpuid_entry2 *best = NULL;
3411
3412         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3413                 struct kvm_cpuid_entry2 *e;
3414
3415                 e = &vcpu->arch.cpuid_entries[i];
3416                 if (is_matching_cpuid_entry(e, function, index)) {
3417                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3418                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3419                         best = e;
3420                         break;
3421                 }
3422                 /*
3423                  * Both basic or both extended?
3424                  */
3425                 if (((e->function ^ function) & 0x80000000) == 0)
3426                         if (!best || e->function > best->function)
3427                                 best = e;
3428         }
3429         return best;
3430 }
3431
3432 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3433 {
3434         struct kvm_cpuid_entry2 *best;
3435
3436         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3437         if (best)
3438                 return best->eax & 0xff;
3439         return 36;
3440 }
3441
3442 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3443 {
3444         u32 function, index;
3445         struct kvm_cpuid_entry2 *best;
3446
3447         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3448         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3449         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3450         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3451         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3452         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3453         best = kvm_find_cpuid_entry(vcpu, function, index);
3454         if (best) {
3455                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3456                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3457                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3458                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3459         }
3460         kvm_x86_ops->skip_emulated_instruction(vcpu);
3461         trace_kvm_cpuid(function,
3462                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3463                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3464                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3465                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3466 }
3467 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3468
3469 /*
3470  * Check if userspace requested an interrupt window, and that the
3471  * interrupt window is open.
3472  *
3473  * No need to exit to userspace if we already have an interrupt queued.
3474  */
3475 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3476 {
3477         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3478                 vcpu->run->request_interrupt_window &&
3479                 kvm_arch_interrupt_allowed(vcpu));
3480 }
3481
3482 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3483 {
3484         struct kvm_run *kvm_run = vcpu->run;
3485
3486         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3487         kvm_run->cr8 = kvm_get_cr8(vcpu);
3488         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3489         if (irqchip_in_kernel(vcpu->kvm))
3490                 kvm_run->ready_for_interrupt_injection = 1;
3491         else
3492                 kvm_run->ready_for_interrupt_injection =
3493                         kvm_arch_interrupt_allowed(vcpu) &&
3494                         !kvm_cpu_has_interrupt(vcpu) &&
3495                         !kvm_event_needs_reinjection(vcpu);
3496 }
3497
3498 static void vapic_enter(struct kvm_vcpu *vcpu)
3499 {
3500         struct kvm_lapic *apic = vcpu->arch.apic;
3501         struct page *page;
3502
3503         if (!apic || !apic->vapic_addr)
3504                 return;
3505
3506         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3507
3508         vcpu->arch.apic->vapic_page = page;
3509 }
3510
3511 static void vapic_exit(struct kvm_vcpu *vcpu)
3512 {
3513         struct kvm_lapic *apic = vcpu->arch.apic;
3514
3515         if (!apic || !apic->vapic_addr)
3516                 return;
3517
3518         down_read(&vcpu->kvm->slots_lock);
3519         kvm_release_page_dirty(apic->vapic_page);
3520         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3521         up_read(&vcpu->kvm->slots_lock);
3522 }
3523
3524 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3525 {
3526         int max_irr, tpr;
3527
3528         if (!kvm_x86_ops->update_cr8_intercept)
3529                 return;
3530
3531         if (!vcpu->arch.apic)
3532                 return;
3533
3534         if (!vcpu->arch.apic->vapic_addr)
3535                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3536         else
3537                 max_irr = -1;
3538
3539         if (max_irr != -1)
3540                 max_irr >>= 4;
3541
3542         tpr = kvm_lapic_get_cr8(vcpu);
3543
3544         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3545 }
3546
3547 static void inject_pending_event(struct kvm_vcpu *vcpu)
3548 {
3549         /* try to reinject previous events if any */
3550         if (vcpu->arch.exception.pending) {
3551                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3552                                           vcpu->arch.exception.has_error_code,
3553                                           vcpu->arch.exception.error_code);
3554                 return;
3555         }
3556
3557         if (vcpu->arch.nmi_injected) {
3558                 kvm_x86_ops->set_nmi(vcpu);
3559                 return;
3560         }
3561
3562         if (vcpu->arch.interrupt.pending) {
3563                 kvm_x86_ops->set_irq(vcpu);
3564                 return;
3565         }
3566
3567         /* try to inject new event if pending */
3568         if (vcpu->arch.nmi_pending) {
3569                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3570                         vcpu->arch.nmi_pending = false;
3571                         vcpu->arch.nmi_injected = true;
3572                         kvm_x86_ops->set_nmi(vcpu);
3573                 }
3574         } else if (kvm_cpu_has_interrupt(vcpu)) {
3575                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3576                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3577                                             false);
3578                         kvm_x86_ops->set_irq(vcpu);
3579                 }
3580         }
3581 }
3582
3583 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3584 {
3585         int r;
3586         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3587                 vcpu->run->request_interrupt_window;
3588
3589         if (vcpu->requests)
3590                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3591                         kvm_mmu_unload(vcpu);
3592
3593         r = kvm_mmu_reload(vcpu);
3594         if (unlikely(r))
3595                 goto out;
3596
3597         if (vcpu->requests) {
3598                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3599                         __kvm_migrate_timers(vcpu);
3600                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3601                         kvm_write_guest_time(vcpu);
3602                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3603                         kvm_mmu_sync_roots(vcpu);
3604                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3605                         kvm_x86_ops->tlb_flush(vcpu);
3606                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3607                                        &vcpu->requests)) {
3608                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
3609                         r = 0;
3610                         goto out;
3611                 }
3612                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3613                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
3614                         r = 0;
3615                         goto out;
3616                 }
3617         }
3618
3619         preempt_disable();
3620
3621         kvm_x86_ops->prepare_guest_switch(vcpu);
3622         kvm_load_guest_fpu(vcpu);
3623
3624         local_irq_disable();
3625
3626         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3627         smp_mb__after_clear_bit();
3628
3629         if (vcpu->requests || need_resched() || signal_pending(current)) {
3630                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3631                 local_irq_enable();
3632                 preempt_enable();
3633                 r = 1;
3634                 goto out;
3635         }
3636
3637         inject_pending_event(vcpu);
3638
3639         /* enable NMI/IRQ window open exits if needed */
3640         if (vcpu->arch.nmi_pending)
3641                 kvm_x86_ops->enable_nmi_window(vcpu);
3642         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3643                 kvm_x86_ops->enable_irq_window(vcpu);
3644
3645         if (kvm_lapic_enabled(vcpu)) {
3646                 update_cr8_intercept(vcpu);
3647                 kvm_lapic_sync_to_vapic(vcpu);
3648         }
3649
3650         up_read(&vcpu->kvm->slots_lock);
3651
3652         kvm_guest_enter();
3653
3654         if (unlikely(vcpu->arch.switch_db_regs)) {
3655                 set_debugreg(0, 7);
3656                 set_debugreg(vcpu->arch.eff_db[0], 0);
3657                 set_debugreg(vcpu->arch.eff_db[1], 1);
3658                 set_debugreg(vcpu->arch.eff_db[2], 2);
3659                 set_debugreg(vcpu->arch.eff_db[3], 3);
3660         }
3661
3662         trace_kvm_entry(vcpu->vcpu_id);
3663         kvm_x86_ops->run(vcpu);
3664
3665         if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3666                 set_debugreg(current->thread.debugreg0, 0);
3667                 set_debugreg(current->thread.debugreg1, 1);
3668                 set_debugreg(current->thread.debugreg2, 2);
3669                 set_debugreg(current->thread.debugreg3, 3);
3670                 set_debugreg(current->thread.debugreg6, 6);
3671                 set_debugreg(current->thread.debugreg7, 7);
3672         }
3673
3674         set_bit(KVM_REQ_KICK, &vcpu->requests);
3675         local_irq_enable();
3676
3677         ++vcpu->stat.exits;
3678
3679         /*
3680          * We must have an instruction between local_irq_enable() and
3681          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3682          * the interrupt shadow.  The stat.exits increment will do nicely.
3683          * But we need to prevent reordering, hence this barrier():
3684          */
3685         barrier();
3686
3687         kvm_guest_exit();
3688
3689         preempt_enable();
3690
3691         down_read(&vcpu->kvm->slots_lock);
3692
3693         /*
3694          * Profile KVM exit RIPs:
3695          */
3696         if (unlikely(prof_on == KVM_PROFILING)) {
3697                 unsigned long rip = kvm_rip_read(vcpu);
3698                 profile_hit(KVM_PROFILING, (void *)rip);
3699         }
3700
3701
3702         kvm_lapic_sync_from_vapic(vcpu);
3703
3704         r = kvm_x86_ops->handle_exit(vcpu);
3705 out:
3706         return r;
3707 }
3708
3709
3710 static int __vcpu_run(struct kvm_vcpu *vcpu)
3711 {
3712         int r;
3713
3714         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3715                 pr_debug("vcpu %d received sipi with vector # %x\n",
3716                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3717                 kvm_lapic_reset(vcpu);
3718                 r = kvm_arch_vcpu_reset(vcpu);
3719                 if (r)
3720                         return r;
3721                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3722         }
3723
3724         down_read(&vcpu->kvm->slots_lock);
3725         vapic_enter(vcpu);
3726
3727         r = 1;
3728         while (r > 0) {
3729                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3730                         r = vcpu_enter_guest(vcpu);
3731                 else {
3732                         up_read(&vcpu->kvm->slots_lock);
3733                         kvm_vcpu_block(vcpu);
3734                         down_read(&vcpu->kvm->slots_lock);
3735                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3736                         {
3737                                 switch(vcpu->arch.mp_state) {
3738                                 case KVM_MP_STATE_HALTED:
3739                                         vcpu->arch.mp_state =
3740                                                 KVM_MP_STATE_RUNNABLE;
3741                                 case KVM_MP_STATE_RUNNABLE:
3742                                         break;
3743                                 case KVM_MP_STATE_SIPI_RECEIVED:
3744                                 default:
3745                                         r = -EINTR;
3746                                         break;
3747                                 }
3748                         }
3749                 }
3750
3751                 if (r <= 0)
3752                         break;
3753
3754                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3755                 if (kvm_cpu_has_pending_timer(vcpu))
3756                         kvm_inject_pending_timer_irqs(vcpu);
3757
3758                 if (dm_request_for_irq_injection(vcpu)) {
3759                         r = -EINTR;
3760                         vcpu->run->exit_reason = KVM_EXIT_INTR;
3761                         ++vcpu->stat.request_irq_exits;
3762                 }
3763                 if (signal_pending(current)) {
3764                         r = -EINTR;
3765                         vcpu->run->exit_reason = KVM_EXIT_INTR;
3766                         ++vcpu->stat.signal_exits;
3767                 }
3768                 if (need_resched()) {
3769                         up_read(&vcpu->kvm->slots_lock);
3770                         kvm_resched(vcpu);
3771                         down_read(&vcpu->kvm->slots_lock);
3772                 }
3773         }
3774
3775         up_read(&vcpu->kvm->slots_lock);
3776         post_kvm_run_save(vcpu);
3777
3778         vapic_exit(vcpu);
3779
3780         return r;
3781 }
3782
3783 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3784 {
3785         int r;
3786         sigset_t sigsaved;
3787
3788         vcpu_load(vcpu);
3789
3790         if (vcpu->sigset_active)
3791                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3792
3793         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3794                 kvm_vcpu_block(vcpu);
3795                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3796                 r = -EAGAIN;
3797                 goto out;
3798         }
3799
3800         /* re-sync apic's tpr */
3801         if (!irqchip_in_kernel(vcpu->kvm))
3802                 kvm_set_cr8(vcpu, kvm_run->cr8);
3803
3804         if (vcpu->arch.pio.cur_count) {
3805                 r = complete_pio(vcpu);
3806                 if (r)
3807                         goto out;
3808         }
3809 #if CONFIG_HAS_IOMEM
3810         if (vcpu->mmio_needed) {
3811                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3812                 vcpu->mmio_read_completed = 1;
3813                 vcpu->mmio_needed = 0;
3814
3815                 down_read(&vcpu->kvm->slots_lock);
3816                 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
3817                                         EMULTYPE_NO_DECODE);
3818                 up_read(&vcpu->kvm->slots_lock);
3819                 if (r == EMULATE_DO_MMIO) {
3820                         /*
3821                          * Read-modify-write.  Back to userspace.
3822                          */
3823                         r = 0;
3824                         goto out;
3825                 }
3826         }
3827 #endif
3828         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3829                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3830                                      kvm_run->hypercall.ret);
3831
3832         r = __vcpu_run(vcpu);
3833
3834 out:
3835         if (vcpu->sigset_active)
3836                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3837
3838         vcpu_put(vcpu);
3839         return r;
3840 }
3841
3842 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3843 {
3844         vcpu_load(vcpu);
3845
3846         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3847         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3848         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3849         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3850         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3851         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3852         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3853         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3854 #ifdef CONFIG_X86_64
3855         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3856         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3857         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3858         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3859         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3860         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3861         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3862         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3863 #endif
3864
3865         regs->rip = kvm_rip_read(vcpu);
3866         regs->rflags = kvm_get_rflags(vcpu);
3867
3868         vcpu_put(vcpu);
3869
3870         return 0;
3871 }
3872
3873 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3874 {
3875         vcpu_load(vcpu);
3876
3877         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3878         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3879         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3880         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3881         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3882         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3883         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3884         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3885 #ifdef CONFIG_X86_64
3886         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3887         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3888         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3889         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3890         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3891         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3892         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3893         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3894 #endif
3895
3896         kvm_rip_write(vcpu, regs->rip);
3897         kvm_set_rflags(vcpu, regs->rflags);
3898
3899         vcpu->arch.exception.pending = false;
3900
3901         vcpu_put(vcpu);
3902
3903         return 0;
3904 }
3905
3906 void kvm_get_segment(struct kvm_vcpu *vcpu,
3907                      struct kvm_segment *var, int seg)
3908 {
3909         kvm_x86_ops->get_segment(vcpu, var, seg);
3910 }
3911
3912 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3913 {
3914         struct kvm_segment cs;
3915
3916         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3917         *db = cs.db;
3918         *l = cs.l;
3919 }
3920 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3921
3922 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3923                                   struct kvm_sregs *sregs)
3924 {
3925         struct descriptor_table dt;
3926
3927         vcpu_load(vcpu);
3928
3929         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3930         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3931         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3932         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3933         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3934         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3935
3936         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3937         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3938
3939         kvm_x86_ops->get_idt(vcpu, &dt);
3940         sregs->idt.limit = dt.limit;
3941         sregs->idt.base = dt.base;
3942         kvm_x86_ops->get_gdt(vcpu, &dt);
3943         sregs->gdt.limit = dt.limit;
3944         sregs->gdt.base = dt.base;
3945
3946         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3947         sregs->cr0 = vcpu->arch.cr0;
3948         sregs->cr2 = vcpu->arch.cr2;
3949         sregs->cr3 = vcpu->arch.cr3;
3950         sregs->cr4 = vcpu->arch.cr4;
3951         sregs->cr8 = kvm_get_cr8(vcpu);
3952         sregs->efer = vcpu->arch.shadow_efer;
3953         sregs->apic_base = kvm_get_apic_base(vcpu);
3954
3955         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3956
3957         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3958                 set_bit(vcpu->arch.interrupt.nr,
3959                         (unsigned long *)sregs->interrupt_bitmap);
3960
3961         vcpu_put(vcpu);
3962
3963         return 0;
3964 }
3965
3966 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3967                                     struct kvm_mp_state *mp_state)
3968 {
3969         vcpu_load(vcpu);
3970         mp_state->mp_state = vcpu->arch.mp_state;
3971         vcpu_put(vcpu);
3972         return 0;
3973 }
3974
3975 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3976                                     struct kvm_mp_state *mp_state)
3977 {
3978         vcpu_load(vcpu);
3979         vcpu->arch.mp_state = mp_state->mp_state;
3980         vcpu_put(vcpu);
3981         return 0;
3982 }
3983
3984 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3985                         struct kvm_segment *var, int seg)
3986 {
3987         kvm_x86_ops->set_segment(vcpu, var, seg);
3988 }
3989
3990 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3991                                    struct kvm_segment *kvm_desct)
3992 {
3993         kvm_desct->base = get_desc_base(seg_desc);
3994         kvm_desct->limit = get_desc_limit(seg_desc);
3995         if (seg_desc->g) {
3996                 kvm_desct->limit <<= 12;
3997                 kvm_desct->limit |= 0xfff;
3998         }
3999         kvm_desct->selector = selector;
4000         kvm_desct->type = seg_desc->type;
4001         kvm_desct->present = seg_desc->p;
4002         kvm_desct->dpl = seg_desc->dpl;
4003         kvm_desct->db = seg_desc->d;
4004         kvm_desct->s = seg_desc->s;
4005         kvm_desct->l = seg_desc->l;
4006         kvm_desct->g = seg_desc->g;
4007         kvm_desct->avl = seg_desc->avl;
4008         if (!selector)
4009                 kvm_desct->unusable = 1;
4010         else
4011                 kvm_desct->unusable = 0;
4012         kvm_desct->padding = 0;
4013 }
4014
4015 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4016                                           u16 selector,
4017                                           struct descriptor_table *dtable)
4018 {
4019         if (selector & 1 << 2) {
4020                 struct kvm_segment kvm_seg;
4021
4022                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4023
4024                 if (kvm_seg.unusable)
4025                         dtable->limit = 0;
4026                 else
4027                         dtable->limit = kvm_seg.limit;
4028                 dtable->base = kvm_seg.base;
4029         }
4030         else
4031                 kvm_x86_ops->get_gdt(vcpu, dtable);
4032 }
4033
4034 /* allowed just for 8 bytes segments */
4035 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4036                                          struct desc_struct *seg_desc)
4037 {
4038         struct descriptor_table dtable;
4039         u16 index = selector >> 3;
4040
4041         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4042
4043         if (dtable.limit < index * 8 + 7) {
4044                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4045                 return 1;
4046         }
4047         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4048 }
4049
4050 /* allowed just for 8 bytes segments */
4051 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4052                                          struct desc_struct *seg_desc)
4053 {
4054         struct descriptor_table dtable;
4055         u16 index = selector >> 3;
4056
4057         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4058
4059         if (dtable.limit < index * 8 + 7)
4060                 return 1;
4061         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4062 }
4063
4064 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4065                              struct desc_struct *seg_desc)
4066 {
4067         u32 base_addr = get_desc_base(seg_desc);
4068
4069         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4070 }
4071
4072 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4073 {
4074         struct kvm_segment kvm_seg;
4075
4076         kvm_get_segment(vcpu, &kvm_seg, seg);
4077         return kvm_seg.selector;
4078 }
4079
4080 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4081                                                 u16 selector,
4082                                                 struct kvm_segment *kvm_seg)
4083 {
4084         struct desc_struct seg_desc;
4085
4086         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4087                 return 1;
4088         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4089         return 0;
4090 }
4091
4092 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4093 {
4094         struct kvm_segment segvar = {
4095                 .base = selector << 4,
4096                 .limit = 0xffff,
4097                 .selector = selector,
4098                 .type = 3,
4099                 .present = 1,
4100                 .dpl = 3,
4101                 .db = 0,
4102                 .s = 1,
4103                 .l = 0,
4104                 .g = 0,
4105                 .avl = 0,
4106                 .unusable = 0,
4107         };
4108         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4109         return 0;
4110 }
4111
4112 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4113 {
4114         return (seg != VCPU_SREG_LDTR) &&
4115                 (seg != VCPU_SREG_TR) &&
4116                 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4117 }
4118
4119 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4120                                 int type_bits, int seg)
4121 {
4122         struct kvm_segment kvm_seg;
4123
4124         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4125                 return kvm_load_realmode_segment(vcpu, selector, seg);
4126         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4127                 return 1;
4128         kvm_seg.type |= type_bits;
4129
4130         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4131             seg != VCPU_SREG_LDTR)
4132                 if (!kvm_seg.s)
4133                         kvm_seg.unusable = 1;
4134
4135         kvm_set_segment(vcpu, &kvm_seg, seg);
4136         return 0;
4137 }
4138
4139 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4140                                 struct tss_segment_32 *tss)
4141 {
4142         tss->cr3 = vcpu->arch.cr3;
4143         tss->eip = kvm_rip_read(vcpu);
4144         tss->eflags = kvm_get_rflags(vcpu);
4145         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4146         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4147         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4148         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4149         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4150         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4151         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4152         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4153         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4154         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4155         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4156         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4157         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4158         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4159         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4160 }
4161
4162 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4163                                   struct tss_segment_32 *tss)
4164 {
4165         kvm_set_cr3(vcpu, tss->cr3);
4166
4167         kvm_rip_write(vcpu, tss->eip);
4168         kvm_set_rflags(vcpu, tss->eflags | 2);
4169
4170         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4171         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4172         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4173         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4174         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4175         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4176         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4177         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4178
4179         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4180                 return 1;
4181
4182         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4183                 return 1;
4184
4185         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4186                 return 1;
4187
4188         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4189                 return 1;
4190
4191         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4192                 return 1;
4193
4194         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4195                 return 1;
4196
4197         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4198                 return 1;
4199         return 0;
4200 }
4201
4202 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4203                                 struct tss_segment_16 *tss)
4204 {
4205         tss->ip = kvm_rip_read(vcpu);
4206         tss->flag = kvm_get_rflags(vcpu);
4207         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4208         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4209         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4210         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4211         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4212         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4213         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4214         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4215
4216         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4217         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4218         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4219         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4220         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4221 }
4222
4223 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4224                                  struct tss_segment_16 *tss)
4225 {
4226         kvm_rip_write(vcpu, tss->ip);
4227         kvm_set_rflags(vcpu, tss->flag | 2);
4228         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4229         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4230         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4231         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4232         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4233         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4234         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4235         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4236
4237         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4238                 return 1;
4239
4240         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4241                 return 1;
4242
4243         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4244                 return 1;
4245
4246         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4247                 return 1;
4248
4249         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4250                 return 1;
4251         return 0;
4252 }
4253
4254 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4255                               u16 old_tss_sel, u32 old_tss_base,
4256                               struct desc_struct *nseg_desc)
4257 {
4258         struct tss_segment_16 tss_segment_16;
4259         int ret = 0;
4260
4261         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4262                            sizeof tss_segment_16))
4263                 goto out;
4264
4265         save_state_to_tss16(vcpu, &tss_segment_16);
4266
4267         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4268                             sizeof tss_segment_16))
4269                 goto out;
4270
4271         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4272                            &tss_segment_16, sizeof tss_segment_16))
4273                 goto out;
4274
4275         if (old_tss_sel != 0xffff) {
4276                 tss_segment_16.prev_task_link = old_tss_sel;
4277
4278                 if (kvm_write_guest(vcpu->kvm,
4279                                     get_tss_base_addr(vcpu, nseg_desc),
4280                                     &tss_segment_16.prev_task_link,
4281                                     sizeof tss_segment_16.prev_task_link))
4282                         goto out;
4283         }
4284
4285         if (load_state_from_tss16(vcpu, &tss_segment_16))
4286                 goto out;
4287
4288         ret = 1;
4289 out:
4290         return ret;
4291 }
4292
4293 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4294                        u16 old_tss_sel, u32 old_tss_base,
4295                        struct desc_struct *nseg_desc)
4296 {
4297         struct tss_segment_32 tss_segment_32;
4298         int ret = 0;
4299
4300         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4301                            sizeof tss_segment_32))
4302                 goto out;
4303
4304         save_state_to_tss32(vcpu, &tss_segment_32);
4305
4306         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4307                             sizeof tss_segment_32))
4308                 goto out;
4309
4310         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4311                            &tss_segment_32, sizeof tss_segment_32))
4312                 goto out;
4313
4314         if (old_tss_sel != 0xffff) {
4315                 tss_segment_32.prev_task_link = old_tss_sel;
4316
4317                 if (kvm_write_guest(vcpu->kvm,
4318                                     get_tss_base_addr(vcpu, nseg_desc),
4319                                     &tss_segment_32.prev_task_link,
4320                                     sizeof tss_segment_32.prev_task_link))
4321                         goto out;
4322         }
4323
4324         if (load_state_from_tss32(vcpu, &tss_segment_32))
4325                 goto out;
4326
4327         ret = 1;
4328 out:
4329         return ret;
4330 }
4331
4332 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4333 {
4334         struct kvm_segment tr_seg;
4335         struct desc_struct cseg_desc;
4336         struct desc_struct nseg_desc;
4337         int ret = 0;
4338         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4339         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4340
4341         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4342
4343         /* FIXME: Handle errors. Failure to read either TSS or their
4344          * descriptors should generate a pagefault.
4345          */
4346         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4347                 goto out;
4348
4349         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4350                 goto out;
4351
4352         if (reason != TASK_SWITCH_IRET) {
4353                 int cpl;
4354
4355                 cpl = kvm_x86_ops->get_cpl(vcpu);
4356                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4357                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4358                         return 1;
4359                 }
4360         }
4361
4362         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4363                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4364                 return 1;
4365         }
4366
4367         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4368                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4369                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4370         }
4371
4372         if (reason == TASK_SWITCH_IRET) {
4373                 u32 eflags = kvm_get_rflags(vcpu);
4374                 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4375         }
4376
4377         /* set back link to prev task only if NT bit is set in eflags
4378            note that old_tss_sel is not used afetr this point */
4379         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4380                 old_tss_sel = 0xffff;
4381
4382         /* set back link to prev task only if NT bit is set in eflags
4383            note that old_tss_sel is not used afetr this point */
4384         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4385                 old_tss_sel = 0xffff;
4386
4387         if (nseg_desc.type & 8)
4388                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4389                                          old_tss_base, &nseg_desc);
4390         else
4391                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4392                                          old_tss_base, &nseg_desc);
4393
4394         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4395                 u32 eflags = kvm_get_rflags(vcpu);
4396                 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4397         }
4398
4399         if (reason != TASK_SWITCH_IRET) {
4400                 nseg_desc.type |= (1 << 1);
4401                 save_guest_segment_descriptor(vcpu, tss_selector,
4402                                               &nseg_desc);
4403         }
4404
4405         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4406         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4407         tr_seg.type = 11;
4408         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4409 out:
4410         return ret;
4411 }
4412 EXPORT_SYMBOL_GPL(kvm_task_switch);
4413
4414 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4415                                   struct kvm_sregs *sregs)
4416 {
4417         int mmu_reset_needed = 0;
4418         int pending_vec, max_bits;
4419         struct descriptor_table dt;
4420
4421         vcpu_load(vcpu);
4422
4423         dt.limit = sregs->idt.limit;
4424         dt.base = sregs->idt.base;
4425         kvm_x86_ops->set_idt(vcpu, &dt);
4426         dt.limit = sregs->gdt.limit;
4427         dt.base = sregs->gdt.base;
4428         kvm_x86_ops->set_gdt(vcpu, &dt);
4429
4430         vcpu->arch.cr2 = sregs->cr2;
4431         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4432         vcpu->arch.cr3 = sregs->cr3;
4433
4434         kvm_set_cr8(vcpu, sregs->cr8);
4435
4436         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4437         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4438         kvm_set_apic_base(vcpu, sregs->apic_base);
4439
4440         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4441
4442         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4443         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4444         vcpu->arch.cr0 = sregs->cr0;
4445
4446         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4447         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4448         if (!is_long_mode(vcpu) && is_pae(vcpu))
4449                 load_pdptrs(vcpu, vcpu->arch.cr3);
4450
4451         if (mmu_reset_needed)
4452                 kvm_mmu_reset_context(vcpu);
4453
4454         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4455         pending_vec = find_first_bit(
4456                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4457         if (pending_vec < max_bits) {
4458                 kvm_queue_interrupt(vcpu, pending_vec, false);
4459                 pr_debug("Set back pending irq %d\n", pending_vec);
4460                 if (irqchip_in_kernel(vcpu->kvm))
4461                         kvm_pic_clear_isr_ack(vcpu->kvm);
4462         }
4463
4464         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4465         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4466         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4467         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4468         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4469         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4470
4471         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4472         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4473
4474         update_cr8_intercept(vcpu);
4475
4476         /* Older userspace won't unhalt the vcpu on reset. */
4477         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4478             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4479             !(vcpu->arch.cr0 & X86_CR0_PE))
4480                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4481
4482         vcpu_put(vcpu);
4483
4484         return 0;
4485 }
4486
4487 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4488                                         struct kvm_guest_debug *dbg)
4489 {
4490         unsigned long rflags;
4491         int i;
4492
4493         vcpu_load(vcpu);
4494
4495         /*
4496          * Read rflags as long as potentially injected trace flags are still
4497          * filtered out.
4498          */
4499         rflags = kvm_get_rflags(vcpu);
4500
4501         vcpu->guest_debug = dbg->control;
4502         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
4503                 vcpu->guest_debug = 0;
4504
4505         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
4506                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4507                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4508                 vcpu->arch.switch_db_regs =
4509                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4510         } else {
4511                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4512                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4513                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4514         }
4515
4516         /*
4517          * Trigger an rflags update that will inject or remove the trace
4518          * flags.
4519          */
4520         kvm_set_rflags(vcpu, rflags);
4521
4522         kvm_x86_ops->set_guest_debug(vcpu, dbg);
4523
4524         if (vcpu->guest_debug & KVM_GUESTDBG_INJECT_DB)
4525                 kvm_queue_exception(vcpu, DB_VECTOR);
4526         else if (vcpu->guest_debug & KVM_GUESTDBG_INJECT_BP)
4527                 kvm_queue_exception(vcpu, BP_VECTOR);
4528
4529         vcpu_put(vcpu);
4530
4531         return 0;
4532 }
4533
4534 /*
4535  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4536  * we have asm/x86/processor.h
4537  */
4538 struct fxsave {
4539         u16     cwd;
4540         u16     swd;
4541         u16     twd;
4542         u16     fop;
4543         u64     rip;
4544         u64     rdp;
4545         u32     mxcsr;
4546         u32     mxcsr_mask;
4547         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4548 #ifdef CONFIG_X86_64
4549         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4550 #else
4551         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4552 #endif
4553 };
4554
4555 /*
4556  * Translate a guest virtual address to a guest physical address.
4557  */
4558 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4559                                     struct kvm_translation *tr)
4560 {
4561         unsigned long vaddr = tr->linear_address;
4562         gpa_t gpa;
4563
4564         vcpu_load(vcpu);
4565         down_read(&vcpu->kvm->slots_lock);
4566         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4567         up_read(&vcpu->kvm->slots_lock);
4568         tr->physical_address = gpa;
4569         tr->valid = gpa != UNMAPPED_GVA;
4570         tr->writeable = 1;
4571         tr->usermode = 0;
4572         vcpu_put(vcpu);
4573
4574         return 0;
4575 }
4576
4577 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4578 {
4579         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4580
4581         vcpu_load(vcpu);
4582
4583         memcpy(fpu->fpr, fxsave->st_space, 128);
4584         fpu->fcw = fxsave->cwd;
4585         fpu->fsw = fxsave->swd;
4586         fpu->ftwx = fxsave->twd;
4587         fpu->last_opcode = fxsave->fop;
4588         fpu->last_ip = fxsave->rip;
4589         fpu->last_dp = fxsave->rdp;
4590         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4591
4592         vcpu_put(vcpu);
4593
4594         return 0;
4595 }
4596
4597 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4598 {
4599         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4600
4601         vcpu_load(vcpu);
4602
4603         memcpy(fxsave->st_space, fpu->fpr, 128);
4604         fxsave->cwd = fpu->fcw;
4605         fxsave->swd = fpu->fsw;
4606         fxsave->twd = fpu->ftwx;
4607         fxsave->fop = fpu->last_opcode;
4608         fxsave->rip = fpu->last_ip;
4609         fxsave->rdp = fpu->last_dp;
4610         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4611
4612         vcpu_put(vcpu);
4613
4614         return 0;
4615 }
4616
4617 void fx_init(struct kvm_vcpu *vcpu)
4618 {
4619         unsigned after_mxcsr_mask;
4620
4621         /*
4622          * Touch the fpu the first time in non atomic context as if
4623          * this is the first fpu instruction the exception handler
4624          * will fire before the instruction returns and it'll have to
4625          * allocate ram with GFP_KERNEL.
4626          */
4627         if (!used_math())
4628                 kvm_fx_save(&vcpu->arch.host_fx_image);
4629
4630         /* Initialize guest FPU by resetting ours and saving into guest's */
4631         preempt_disable();
4632         kvm_fx_save(&vcpu->arch.host_fx_image);
4633         kvm_fx_finit();
4634         kvm_fx_save(&vcpu->arch.guest_fx_image);
4635         kvm_fx_restore(&vcpu->arch.host_fx_image);
4636         preempt_enable();
4637
4638         vcpu->arch.cr0 |= X86_CR0_ET;
4639         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4640         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4641         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4642                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4643 }
4644 EXPORT_SYMBOL_GPL(fx_init);
4645
4646 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4647 {
4648         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4649                 return;
4650
4651         vcpu->guest_fpu_loaded = 1;
4652         kvm_fx_save(&vcpu->arch.host_fx_image);
4653         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4654 }
4655 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4656
4657 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4658 {
4659         if (!vcpu->guest_fpu_loaded)
4660                 return;
4661
4662         vcpu->guest_fpu_loaded = 0;
4663         kvm_fx_save(&vcpu->arch.guest_fx_image);
4664         kvm_fx_restore(&vcpu->arch.host_fx_image);
4665         ++vcpu->stat.fpu_reload;
4666 }
4667 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4668
4669 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4670 {
4671         if (vcpu->arch.time_page) {
4672                 kvm_release_page_dirty(vcpu->arch.time_page);
4673                 vcpu->arch.time_page = NULL;
4674         }
4675
4676         kvm_x86_ops->vcpu_free(vcpu);
4677 }
4678
4679 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4680                                                 unsigned int id)
4681 {
4682         return kvm_x86_ops->vcpu_create(kvm, id);
4683 }
4684
4685 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4686 {
4687         int r;
4688
4689         /* We do fxsave: this must be aligned. */
4690         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4691
4692         vcpu->arch.mtrr_state.have_fixed = 1;
4693         vcpu_load(vcpu);
4694         r = kvm_arch_vcpu_reset(vcpu);
4695         if (r == 0)
4696                 r = kvm_mmu_setup(vcpu);
4697         vcpu_put(vcpu);
4698         if (r < 0)
4699                 goto free_vcpu;
4700
4701         return 0;
4702 free_vcpu:
4703         kvm_x86_ops->vcpu_free(vcpu);
4704         return r;
4705 }
4706
4707 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4708 {
4709         vcpu_load(vcpu);
4710         kvm_mmu_unload(vcpu);
4711         vcpu_put(vcpu);
4712
4713         kvm_x86_ops->vcpu_free(vcpu);
4714 }
4715
4716 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4717 {
4718         vcpu->arch.nmi_pending = false;
4719         vcpu->arch.nmi_injected = false;
4720
4721         vcpu->arch.switch_db_regs = 0;
4722         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4723         vcpu->arch.dr6 = DR6_FIXED_1;
4724         vcpu->arch.dr7 = DR7_FIXED_1;
4725
4726         return kvm_x86_ops->vcpu_reset(vcpu);
4727 }
4728
4729 int kvm_arch_hardware_enable(void *garbage)
4730 {
4731         /*
4732          * Since this may be called from a hotplug notifcation,
4733          * we can't get the CPU frequency directly.
4734          */
4735         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4736                 int cpu = raw_smp_processor_id();
4737                 per_cpu(cpu_tsc_khz, cpu) = 0;
4738         }
4739         return kvm_x86_ops->hardware_enable(garbage);
4740 }
4741
4742 void kvm_arch_hardware_disable(void *garbage)
4743 {
4744         kvm_x86_ops->hardware_disable(garbage);
4745 }
4746
4747 int kvm_arch_hardware_setup(void)
4748 {
4749         return kvm_x86_ops->hardware_setup();
4750 }
4751
4752 void kvm_arch_hardware_unsetup(void)
4753 {
4754         kvm_x86_ops->hardware_unsetup();
4755 }
4756
4757 void kvm_arch_check_processor_compat(void *rtn)
4758 {
4759         kvm_x86_ops->check_processor_compatibility(rtn);
4760 }
4761
4762 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4763 {
4764         struct page *page;
4765         struct kvm *kvm;
4766         int r;
4767
4768         BUG_ON(vcpu->kvm == NULL);
4769         kvm = vcpu->kvm;
4770
4771         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4772         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4773                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4774         else
4775                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4776
4777         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4778         if (!page) {
4779                 r = -ENOMEM;
4780                 goto fail;
4781         }
4782         vcpu->arch.pio_data = page_address(page);
4783
4784         r = kvm_mmu_create(vcpu);
4785         if (r < 0)
4786                 goto fail_free_pio_data;
4787
4788         if (irqchip_in_kernel(kvm)) {
4789                 r = kvm_create_lapic(vcpu);
4790                 if (r < 0)
4791                         goto fail_mmu_destroy;
4792         }
4793
4794         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4795                                        GFP_KERNEL);
4796         if (!vcpu->arch.mce_banks) {
4797                 r = -ENOMEM;
4798                 goto fail_mmu_destroy;
4799         }
4800         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4801
4802         return 0;
4803
4804 fail_mmu_destroy:
4805         kvm_mmu_destroy(vcpu);
4806 fail_free_pio_data:
4807         free_page((unsigned long)vcpu->arch.pio_data);
4808 fail:
4809         return r;
4810 }
4811
4812 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4813 {
4814         kvm_free_lapic(vcpu);
4815         down_read(&vcpu->kvm->slots_lock);
4816         kvm_mmu_destroy(vcpu);
4817         up_read(&vcpu->kvm->slots_lock);
4818         free_page((unsigned long)vcpu->arch.pio_data);
4819 }
4820
4821 struct  kvm *kvm_arch_create_vm(void)
4822 {
4823         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4824
4825         if (!kvm)
4826                 return ERR_PTR(-ENOMEM);
4827
4828         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4829         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4830
4831         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4832         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4833
4834         rdtscll(kvm->arch.vm_init_tsc);
4835
4836         return kvm;
4837 }
4838
4839 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4840 {
4841         vcpu_load(vcpu);
4842         kvm_mmu_unload(vcpu);
4843         vcpu_put(vcpu);
4844 }
4845
4846 static void kvm_free_vcpus(struct kvm *kvm)
4847 {
4848         unsigned int i;
4849         struct kvm_vcpu *vcpu;
4850
4851         /*
4852          * Unpin any mmu pages first.
4853          */
4854         kvm_for_each_vcpu(i, vcpu, kvm)
4855                 kvm_unload_vcpu_mmu(vcpu);
4856         kvm_for_each_vcpu(i, vcpu, kvm)
4857                 kvm_arch_vcpu_free(vcpu);
4858
4859         mutex_lock(&kvm->lock);
4860         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4861                 kvm->vcpus[i] = NULL;
4862
4863         atomic_set(&kvm->online_vcpus, 0);
4864         mutex_unlock(&kvm->lock);
4865 }
4866
4867 void kvm_arch_sync_events(struct kvm *kvm)
4868 {
4869         kvm_free_all_assigned_devices(kvm);
4870 }
4871
4872 void kvm_arch_destroy_vm(struct kvm *kvm)
4873 {
4874         kvm_iommu_unmap_guest(kvm);
4875         kvm_free_pit(kvm);
4876         kfree(kvm->arch.vpic);
4877         kfree(kvm->arch.vioapic);
4878         kvm_free_vcpus(kvm);
4879         kvm_free_physmem(kvm);
4880         if (kvm->arch.apic_access_page)
4881                 put_page(kvm->arch.apic_access_page);
4882         if (kvm->arch.ept_identity_pagetable)
4883                 put_page(kvm->arch.ept_identity_pagetable);
4884         kfree(kvm);
4885 }
4886
4887 int kvm_arch_set_memory_region(struct kvm *kvm,
4888                                 struct kvm_userspace_memory_region *mem,
4889                                 struct kvm_memory_slot old,
4890                                 int user_alloc)
4891 {
4892         int npages = mem->memory_size >> PAGE_SHIFT;
4893         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4894
4895         /*To keep backward compatibility with older userspace,
4896          *x86 needs to hanlde !user_alloc case.
4897          */
4898         if (!user_alloc) {
4899                 if (npages && !old.rmap) {
4900                         unsigned long userspace_addr;
4901
4902                         down_write(&current->mm->mmap_sem);
4903                         userspace_addr = do_mmap(NULL, 0,
4904                                                  npages * PAGE_SIZE,
4905                                                  PROT_READ | PROT_WRITE,
4906                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4907                                                  0);
4908                         up_write(&current->mm->mmap_sem);
4909
4910                         if (IS_ERR((void *)userspace_addr))
4911                                 return PTR_ERR((void *)userspace_addr);
4912
4913                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4914                         spin_lock(&kvm->mmu_lock);
4915                         memslot->userspace_addr = userspace_addr;
4916                         spin_unlock(&kvm->mmu_lock);
4917                 } else {
4918                         if (!old.user_alloc && old.rmap) {
4919                                 int ret;
4920
4921                                 down_write(&current->mm->mmap_sem);
4922                                 ret = do_munmap(current->mm, old.userspace_addr,
4923                                                 old.npages * PAGE_SIZE);
4924                                 up_write(&current->mm->mmap_sem);
4925                                 if (ret < 0)
4926                                         printk(KERN_WARNING
4927                                        "kvm_vm_ioctl_set_memory_region: "
4928                                        "failed to munmap memory\n");
4929                         }
4930                 }
4931         }
4932
4933         spin_lock(&kvm->mmu_lock);
4934         if (!kvm->arch.n_requested_mmu_pages) {
4935                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4936                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4937         }
4938
4939         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4940         spin_unlock(&kvm->mmu_lock);
4941
4942         return 0;
4943 }
4944
4945 void kvm_arch_flush_shadow(struct kvm *kvm)
4946 {
4947         kvm_mmu_zap_all(kvm);
4948         kvm_reload_remote_mmus(kvm);
4949 }
4950
4951 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4952 {
4953         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4954                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4955                 || vcpu->arch.nmi_pending ||
4956                 (kvm_arch_interrupt_allowed(vcpu) &&
4957                  kvm_cpu_has_interrupt(vcpu));
4958 }
4959
4960 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4961 {
4962         int me;
4963         int cpu = vcpu->cpu;
4964
4965         if (waitqueue_active(&vcpu->wq)) {
4966                 wake_up_interruptible(&vcpu->wq);
4967                 ++vcpu->stat.halt_wakeup;
4968         }
4969
4970         me = get_cpu();
4971         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4972                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4973                         smp_send_reschedule(cpu);
4974         put_cpu();
4975 }
4976
4977 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4978 {
4979         return kvm_x86_ops->interrupt_allowed(vcpu);
4980 }
4981
4982 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4983 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4984 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4985 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4986 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
4987 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
4988 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
4989 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
4990 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
4991 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
4992 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);