1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <trace/events/power.h>
16 #include <linux/hw_breakpoint.h>
17 #include <asm/system.h>
19 #include <asm/syscalls.h>
21 #include <asm/uaccess.h>
23 #include <asm/debugreg.h>
25 unsigned long idle_halt;
26 EXPORT_SYMBOL(idle_halt);
27 unsigned long idle_nomwait;
28 EXPORT_SYMBOL(idle_nomwait);
30 struct kmem_cache *task_xstate_cachep;
32 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
35 if (src->thread.xstate) {
36 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
38 if (!dst->thread.xstate)
40 WARN_ON((unsigned long)dst->thread.xstate & 15);
41 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
46 void free_thread_xstate(struct task_struct *tsk)
48 if (tsk->thread.xstate) {
49 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
50 tsk->thread.xstate = NULL;
54 void free_thread_info(struct thread_info *ti)
56 free_thread_xstate(ti->task);
57 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
60 void arch_task_cache_init(void)
63 kmem_cache_create("task_xstate", xstate_size,
64 __alignof__(union thread_xstate),
65 SLAB_PANIC | SLAB_NOTRACK, NULL);
69 * Free current thread data structures etc..
71 void exit_thread(void)
73 struct task_struct *me = current;
74 struct thread_struct *t = &me->thread;
75 unsigned long *bp = t->io_bitmap_ptr;
78 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
80 t->io_bitmap_ptr = NULL;
81 clear_thread_flag(TIF_IO_BITMAP);
83 * Careful, clear this in the TSS too:
85 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
92 void show_regs(struct pt_regs *regs)
95 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs),
99 void show_regs_common(void)
101 const char *board, *product;
103 board = dmi_get_system_info(DMI_BOARD_NAME);
106 product = dmi_get_system_info(DMI_PRODUCT_NAME);
110 printk(KERN_CONT "\n");
111 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",
112 current->pid, current->comm, print_tainted(),
113 init_utsname()->release,
114 (int)strcspn(init_utsname()->version, " "),
115 init_utsname()->version, board, product);
118 void flush_thread(void)
120 struct task_struct *tsk = current;
122 flush_ptrace_hw_breakpoint(tsk);
123 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
125 * Forget coprocessor state..
127 tsk->fpu_counter = 0;
132 static void hard_disable_TSC(void)
134 write_cr4(read_cr4() | X86_CR4_TSD);
137 void disable_TSC(void)
140 if (!test_and_set_thread_flag(TIF_NOTSC))
142 * Must flip the CPU state synchronously with
143 * TIF_NOTSC in the current running context.
149 static void hard_enable_TSC(void)
151 write_cr4(read_cr4() & ~X86_CR4_TSD);
154 static void enable_TSC(void)
157 if (test_and_clear_thread_flag(TIF_NOTSC))
159 * Must flip the CPU state synchronously with
160 * TIF_NOTSC in the current running context.
166 int get_tsc_mode(unsigned long adr)
170 if (test_thread_flag(TIF_NOTSC))
171 val = PR_TSC_SIGSEGV;
175 return put_user(val, (unsigned int __user *)adr);
178 int set_tsc_mode(unsigned int val)
180 if (val == PR_TSC_SIGSEGV)
182 else if (val == PR_TSC_ENABLE)
190 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
191 struct tss_struct *tss)
193 struct thread_struct *prev, *next;
195 prev = &prev_p->thread;
196 next = &next_p->thread;
198 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
199 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
200 unsigned long debugctl = get_debugctlmsr();
202 debugctl &= ~DEBUGCTLMSR_BTF;
203 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
204 debugctl |= DEBUGCTLMSR_BTF;
206 update_debugctlmsr(debugctl);
209 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
210 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
211 /* prev and next are different */
212 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
218 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
220 * Copy the relevant range of the IO bitmap.
221 * Normally this is 128 bytes or less:
223 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
224 max(prev->io_bitmap_max, next->io_bitmap_max));
225 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
227 * Clear any possible leftover bits:
229 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
231 propagate_user_return_notify(prev_p, next_p);
234 int sys_fork(struct pt_regs *regs)
236 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
240 * This is trivial, and on the face of it looks like it
241 * could equally well be done in user mode.
243 * Not so, for quite unobvious reasons - register pressure.
244 * In user mode vfork() cannot have a stack frame, and if
245 * done by calling the "clone()" system call directly, you
246 * do not have enough call-clobbered registers to hold all
247 * the information you need.
249 int sys_vfork(struct pt_regs *regs)
251 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
256 sys_clone(unsigned long clone_flags, unsigned long newsp,
257 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
261 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
265 * This gets run with %si containing the
266 * function to call, and %di containing
269 extern void kernel_thread_helper(void);
272 * Create a kernel thread
274 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
278 memset(®s, 0, sizeof(regs));
280 regs.si = (unsigned long) fn;
281 regs.di = (unsigned long) arg;
286 regs.fs = __KERNEL_PERCPU;
287 regs.gs = __KERNEL_STACK_CANARY;
289 regs.ss = __KERNEL_DS;
293 regs.ip = (unsigned long) kernel_thread_helper;
294 regs.cs = __KERNEL_CS | get_kernel_rpl();
295 regs.flags = X86_EFLAGS_IF | 0x2;
297 /* Ok, create the new process.. */
298 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
300 EXPORT_SYMBOL(kernel_thread);
303 * sys_execve() executes a new program.
305 long sys_execve(char __user *name, char __user * __user *argv,
306 char __user * __user *envp, struct pt_regs *regs)
311 filename = getname(name);
312 error = PTR_ERR(filename);
313 if (IS_ERR(filename))
315 error = do_execve(filename, argv, envp, regs);
319 /* Make sure we don't return using sysenter.. */
320 set_thread_flag(TIF_IRET);
329 * Idle related variables and functions
331 unsigned long boot_option_idle_override = 0;
332 EXPORT_SYMBOL(boot_option_idle_override);
335 * Powermanagement idle function, if any..
337 void (*pm_idle)(void);
338 EXPORT_SYMBOL(pm_idle);
342 * This halt magic was a workaround for ancient floppy DMA
343 * wreckage. It should be safe to remove.
345 static int hlt_counter;
346 void disable_hlt(void)
350 EXPORT_SYMBOL(disable_hlt);
352 void enable_hlt(void)
356 EXPORT_SYMBOL(enable_hlt);
358 static inline int hlt_use_halt(void)
360 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
363 static inline int hlt_use_halt(void)
370 * We use this if we don't have any better
373 void default_idle(void)
375 if (hlt_use_halt()) {
376 trace_power_start(POWER_CSTATE, 1);
377 current_thread_info()->status &= ~TS_POLLING;
379 * TS_POLLING-cleared state must be visible before we
385 safe_halt(); /* enables interrupts racelessly */
388 current_thread_info()->status |= TS_POLLING;
391 /* loop is done by the caller */
395 #ifdef CONFIG_APM_MODULE
396 EXPORT_SYMBOL(default_idle);
399 void stop_this_cpu(void *dummy)
405 set_cpu_online(smp_processor_id(), false);
406 disable_local_APIC();
409 if (hlt_works(smp_processor_id()))
414 static void do_nothing(void *unused)
419 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
420 * pm_idle and update to new pm_idle value. Required while changing pm_idle
421 * handler on SMP systems.
423 * Caller must have changed pm_idle to the new value before the call. Old
424 * pm_idle value will not be used by any CPU after the return of this function.
426 void cpu_idle_wait(void)
429 /* kick all the CPUs so that they exit out of pm_idle */
430 smp_call_function(do_nothing, NULL, 1);
432 EXPORT_SYMBOL_GPL(cpu_idle_wait);
435 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
436 * which can obviate IPI to trigger checking of need_resched.
437 * We execute MONITOR against need_resched and enter optimized wait state
438 * through MWAIT. Whenever someone changes need_resched, we would be woken
439 * up from MWAIT (without an IPI).
441 * New with Core Duo processors, MWAIT can take some hints based on CPU
444 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
446 trace_power_start(POWER_CSTATE, (ax>>4)+1);
447 if (!need_resched()) {
448 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
449 clflush((void *)¤t_thread_info()->flags);
451 __monitor((void *)¤t_thread_info()->flags, 0, 0);
458 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
459 static void mwait_idle(void)
461 if (!need_resched()) {
462 trace_power_start(POWER_CSTATE, 1);
463 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
464 clflush((void *)¤t_thread_info()->flags);
466 __monitor((void *)¤t_thread_info()->flags, 0, 0);
477 * On SMP it's slightly faster (but much more power-consuming!)
478 * to poll the ->work.need_resched flag instead of waiting for the
479 * cross-CPU IPI to arrive. Use this option with caution.
481 static void poll_idle(void)
483 trace_power_start(POWER_CSTATE, 0);
485 while (!need_resched())
491 * mwait selection logic:
493 * It depends on the CPU. For AMD CPUs that support MWAIT this is
494 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
495 * then depend on a clock divisor and current Pstate of the core. If
496 * all cores of a processor are in halt state (C1) the processor can
497 * enter the C1E (C1 enhanced) state. If mwait is used this will never
500 * idle=mwait overrides this decision and forces the usage of mwait.
502 static int __cpuinitdata force_mwait;
504 #define MWAIT_INFO 0x05
505 #define MWAIT_ECX_EXTENDED_INFO 0x01
506 #define MWAIT_EDX_C1 0xf0
508 static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
510 u32 eax, ebx, ecx, edx;
515 if (c->cpuid_level < MWAIT_INFO)
518 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
519 /* Check, whether EDX has extended info about MWAIT */
520 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
524 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
527 return (edx & MWAIT_EDX_C1);
531 * Check for AMD CPUs, where APIC timer interrupt does not wake up CPU from C1e.
532 * For more information see
533 * - Erratum #400 for NPT family 0xf and family 0x10 CPUs
534 * - Erratum #365 for family 0x11 (not affected because C1e not in use)
536 static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
539 if (c->x86_vendor != X86_VENDOR_AMD)
542 /* Family 0x0f models < rev F do not have C1E */
543 if (c->x86 == 0x0F && c->x86_model >= 0x40)
546 if (c->x86 == 0x10) {
548 * check OSVW bit for CPUs that are not affected
551 if (cpu_has(c, X86_FEATURE_OSVW)) {
552 rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
554 rdmsrl(MSR_AMD64_OSVW_STATUS, val);
566 static cpumask_var_t c1e_mask;
567 static int c1e_detected;
569 void c1e_remove_cpu(int cpu)
571 if (c1e_mask != NULL)
572 cpumask_clear_cpu(cpu, c1e_mask);
576 * C1E aware idle routine. We check for C1E active in the interrupt
577 * pending message MSR. If we detect C1E, then we handle it the same
578 * way as C3 power states (local apic timer and TSC stop)
580 static void c1e_idle(void)
588 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
589 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
591 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
592 mark_tsc_unstable("TSC halt in AMD C1E");
593 printk(KERN_INFO "System has AMD C1E enabled\n");
594 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
599 int cpu = smp_processor_id();
601 if (!cpumask_test_cpu(cpu, c1e_mask)) {
602 cpumask_set_cpu(cpu, c1e_mask);
604 * Force broadcast so ACPI can not interfere.
606 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
608 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
611 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
616 * The switch back from broadcast mode needs to be
617 * called with interrupts disabled.
620 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
626 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
629 if (pm_idle == poll_idle && smp_num_siblings > 1) {
630 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
631 " performance may degrade.\n");
637 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
639 * One CPU supports mwait => All CPUs supports mwait
641 printk(KERN_INFO "using mwait in idle threads.\n");
642 pm_idle = mwait_idle;
643 } else if (check_c1e_idle(c)) {
644 printk(KERN_INFO "using C1E aware idle routine\n");
647 pm_idle = default_idle;
650 void __init init_c1e_mask(void)
652 /* If we're using c1e_idle, we need to allocate c1e_mask. */
653 if (pm_idle == c1e_idle)
654 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
657 static int __init idle_setup(char *str)
662 if (!strcmp(str, "poll")) {
663 printk("using polling idle threads.\n");
665 } else if (!strcmp(str, "mwait"))
667 else if (!strcmp(str, "halt")) {
669 * When the boot option of idle=halt is added, halt is
670 * forced to be used for CPU idle. In such case CPU C2/C3
671 * won't be used again.
672 * To continue to load the CPU idle driver, don't touch
673 * the boot_option_idle_override.
675 pm_idle = default_idle;
678 } else if (!strcmp(str, "nomwait")) {
680 * If the boot option of "idle=nomwait" is added,
681 * it means that mwait will be disabled for CPU C2/C3
682 * states. In such case it won't touch the variable
683 * of boot_option_idle_override.
690 boot_option_idle_override = 1;
693 early_param("idle", idle_setup);
695 unsigned long arch_align_stack(unsigned long sp)
697 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
698 sp -= get_random_int() % 8192;
702 unsigned long arch_randomize_brk(struct mm_struct *mm)
704 unsigned long range_end = mm->brk + 0x02000000;
705 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;