2 * AMD CPU Microcode Update Driver for Linux
3 * Copyright (C) 2008 Advanced Micro Devices Inc.
5 * Author: Peter Oruba <peter.oruba@amd.com>
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors.
13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/firmware.h>
20 #include <linux/pci_ids.h>
21 #include <linux/uaccess.h>
22 #include <linux/vmalloc.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
27 #include <asm/microcode.h>
28 #include <asm/processor.h>
31 MODULE_DESCRIPTION("AMD Microcode Update Driver");
32 MODULE_AUTHOR("Peter Oruba");
33 MODULE_LICENSE("GPL v2");
35 #define UCODE_MAGIC 0x00414d44
36 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
37 #define UCODE_UCODE_TYPE 0x00000001
39 struct equiv_cpu_entry {
41 u32 fixed_errata_mask;
42 u32 fixed_errata_compare;
45 } __attribute__((packed));
47 struct microcode_header_amd {
53 u32 mc_patch_data_checksum;
62 } __attribute__((packed));
64 struct microcode_amd {
65 struct microcode_header_amd hdr;
69 #define SECTION_HDR_SIZE 8
70 #define CONTAINER_HDR_SZ 12
72 static struct equiv_cpu_entry *equiv_cpu_table;
74 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
76 struct cpuinfo_x86 *c = &cpu_data(cpu);
79 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
80 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
84 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
85 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
90 static int get_matching_microcode(int cpu, struct microcode_header_amd *mc_hdr,
93 unsigned int current_cpu_id;
97 BUG_ON(equiv_cpu_table == NULL);
98 current_cpu_id = cpuid_eax(0x00000001);
100 while (equiv_cpu_table[i].installed_cpu != 0) {
101 if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
102 equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
111 if (mc_hdr->processor_rev_id != equiv_cpu_id)
114 /* ucode might be chipset specific -- currently we don't support this */
115 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
116 pr_err("CPU%d: chipset specific code not yet supported\n",
121 if (mc_hdr->patch_id <= rev)
127 static int apply_microcode_amd(int cpu)
130 int cpu_num = raw_smp_processor_id();
131 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
132 struct microcode_amd *mc_amd = uci->mc;
134 /* We should bind the task to the CPU */
135 BUG_ON(cpu_num != cpu);
140 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
141 /* get patch id after patching */
142 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
144 /* check current patch id and patch's id for match */
145 if (rev != mc_amd->hdr.patch_id) {
146 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
147 cpu, mc_amd->hdr.patch_id);
151 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
152 uci->cpu_sig.rev = rev;
157 static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
159 struct cpuinfo_x86 *c = &cpu_data(cpu);
160 u32 max_size, actual_size;
162 #define F1XH_MPB_MAX_SIZE 2048
163 #define F14H_MPB_MAX_SIZE 1824
164 #define F15H_MPB_MAX_SIZE 4096
168 max_size = F14H_MPB_MAX_SIZE;
171 max_size = F15H_MPB_MAX_SIZE;
174 max_size = F1XH_MPB_MAX_SIZE;
178 actual_size = *(u32 *)(buf + 4);
180 if (actual_size + SECTION_HDR_SIZE > size || actual_size > max_size) {
181 pr_err("section size mismatch\n");
188 static struct microcode_header_amd *
189 get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
191 struct microcode_header_amd *mc = NULL;
192 unsigned int actual_size = 0;
194 if (*(u32 *)buf != UCODE_UCODE_TYPE) {
195 pr_err("invalid type field in container file section header\n");
199 actual_size = verify_ucode_size(cpu, buf, size);
203 mc = vzalloc(actual_size);
207 get_ucode_data(mc, buf + SECTION_HDR_SIZE, actual_size);
208 *mc_size = actual_size + SECTION_HDR_SIZE;
214 static int install_equiv_cpu_table(const u8 *buf)
216 unsigned int *ibuf = (unsigned int *)buf;
217 unsigned int type = ibuf[1];
218 unsigned int size = ibuf[2];
220 if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
221 pr_err("empty section/"
222 "invalid type field in container file section header\n");
226 equiv_cpu_table = vmalloc(size);
227 if (!equiv_cpu_table) {
228 pr_err("failed to allocate equivalent CPU table\n");
232 get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
234 /* add header length */
235 return size + CONTAINER_HDR_SZ;
238 static void free_equiv_cpu_table(void)
240 vfree(equiv_cpu_table);
241 equiv_cpu_table = NULL;
244 static enum ucode_state
245 generic_load_microcode(int cpu, const u8 *data, size_t size)
247 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
248 struct microcode_header_amd *mc_hdr = NULL;
249 unsigned int mc_size, leftover;
251 const u8 *ucode_ptr = data;
253 unsigned int new_rev = uci->cpu_sig.rev;
254 enum ucode_state state = UCODE_OK;
256 offset = install_equiv_cpu_table(ucode_ptr);
258 pr_err("failed to create equivalent cpu table\n");
263 leftover = size - offset;
266 mc_hdr = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
270 if (get_matching_microcode(cpu, mc_hdr, new_rev)) {
272 new_rev = mc_hdr->patch_id;
277 ucode_ptr += mc_size;
282 state = UCODE_NFOUND;
289 pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
290 cpu, uci->cpu_sig.rev, new_rev);
297 free_equiv_cpu_table();
302 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
304 const char *fw_name = "amd-ucode/microcode_amd.bin";
305 const struct firmware *fw;
306 enum ucode_state ret = UCODE_NFOUND;
308 if (request_firmware(&fw, fw_name, device)) {
309 pr_err("failed to load file %s\n", fw_name);
314 if (*(u32 *)fw->data != UCODE_MAGIC) {
315 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
319 ret = generic_load_microcode(cpu, fw->data, fw->size);
322 release_firmware(fw);
328 static enum ucode_state
329 request_microcode_user(int cpu, const void __user *buf, size_t size)
331 pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
335 static void microcode_fini_cpu_amd(int cpu)
337 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
343 static struct microcode_ops microcode_amd_ops = {
344 .request_microcode_user = request_microcode_user,
345 .request_microcode_fw = request_microcode_amd,
346 .collect_cpu_info = collect_cpu_info_amd,
347 .apply_microcode = apply_microcode_amd,
348 .microcode_fini_cpu = microcode_fini_cpu_amd,
351 struct microcode_ops * __init init_amd_microcode(void)
353 return µcode_amd_ops;