arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11
  12 #include <asm/sigcontext.h>
  13 #include <asm/processor.h>
  14 #include <asm/math_emu.h>
  15 #include <asm/uaccess.h>
  16 #include <asm/ptrace.h>
  17 #include <asm/i387.h>
  18 #include <asm/user.h>
  19
  20 #ifdef CONFIG_X86_64
  21 # include <asm/sigcontext32.h>
  22 # include <asm/user32.h>
  23 #else
  24 # define save_i387_xstate_ia32          save_i387_xstate
  25 # define restore_i387_xstate_ia32       restore_i387_xstate
  26 # define _fpstate_ia32          _fpstate
  27 # define _xstate_ia32           _xstate
  28 # define sig_xstate_ia32_size   sig_xstate_size
  29 # define fx_sw_reserved_ia32    fx_sw_reserved
  30 # define user_i387_ia32_struct  user_i387_struct
  31 # define user32_fxsr_struct     user_fxsr_struct
  32 #endif
  33
  34 #ifdef CONFIG_MATH_EMULATION
  35 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  36 #else
  37 # define HAVE_HWFP              1
  38 #endif
  39
  40 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  41 unsigned int xstate_size;
  42 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  43 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  44
  45 void __cpuinit mxcsr_feature_mask_init(void)
  46 {
  47         unsigned long mask = 0;
  48
  49         clts();
  50         if (cpu_has_fxsr) {
  51                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  52                 asm volatile("fxsave %0" : : "m" (fx_scratch));
  53                 mask = fx_scratch.mxcsr_mask;
  54                 if (mask == 0)
  55                         mask = 0x0000ffbf;
  56         }
  57         mxcsr_feature_mask &= mask;
  58         stts();
  59 }
  60
  61 void __cpuinit init_thread_xstate(void)
  62 {
  63         if (!HAVE_HWFP) {
  64                 xstate_size = sizeof(struct i387_soft_struct);
  65                 return;
  66         }
  67
  68         if (cpu_has_xsave) {
  69                 xsave_cntxt_init();
  70                 return;
  71         }
  72
  73         if (cpu_has_fxsr)
  74                 xstate_size = sizeof(struct i387_fxsave_struct);
  75 #ifdef CONFIG_X86_32
  76         else
  77                 xstate_size = sizeof(struct i387_fsave_struct);
  78 #endif
  79 }
  80
  81 #ifdef CONFIG_X86_64
  82 /*
  83  * Called at bootup to set up the initial FPU state that is later cloned
  84  * into all processes.
  85  */
  86 void __cpuinit fpu_init(void)
  87 {
  88         unsigned long oldcr0 = read_cr0();
  89
  90         set_in_cr4(X86_CR4_OSFXSR);
  91         set_in_cr4(X86_CR4_OSXMMEXCPT);
  92
  93         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  94
  95         /*
  96          * Boot processor to setup the FP and extended state context info.
  97          */
  98         if (!smp_processor_id())
  99                 init_thread_xstate();
 100         xsave_init();
 101
 102         mxcsr_feature_mask_init();
 103         /* clean state in init */
 104         if (cpu_has_xsave)
 105                 current_thread_info()->status = TS_XSAVE;
 106         else
 107                 current_thread_info()->status = 0;
 108         clear_used_math();
 109 }
 110 #endif  /* CONFIG_X86_64 */
 111
 112 /*
 113  * The _current_ task is using the FPU for the first time
 114  * so initialize it and set the mxcsr to its default
 115  * value at reset if we support XMM instructions and then
 116  * remeber the current task has used the FPU.
 117  */
 118 int init_fpu(struct task_struct *tsk)
 119 {
 120         if (tsk_used_math(tsk)) {
 121                 if (HAVE_HWFP && tsk == current)
 122                         unlazy_fpu(tsk);
 123                 return 0;
 124         }
 125
 126         /*
 127          * Memory allocation at the first usage of the FPU and other state.
 128          */
 129         if (!tsk->thread.xstate) {
 130                 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
 131                                                       GFP_KERNEL);
 132                 if (!tsk->thread.xstate)
 133                         return -ENOMEM;
 134         }
 135
 136 #ifdef CONFIG_X86_32
 137         if (!HAVE_HWFP) {
 138                 memset(tsk->thread.xstate, 0, xstate_size);
 139                 finit_task(tsk);
 140                 set_stopped_child_used_math(tsk);
 141                 return 0;
 142         }
 143 #endif
 144
 145         if (cpu_has_fxsr) {
 146                 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
 147
 148                 memset(fx, 0, xstate_size);
 149                 fx->cwd = 0x37f;
 150                 if (cpu_has_xmm)
 151                         fx->mxcsr = MXCSR_DEFAULT;
 152         } else {
 153                 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
 154                 memset(fp, 0, xstate_size);
 155                 fp->cwd = 0xffff037fu;
 156                 fp->swd = 0xffff0000u;
 157                 fp->twd = 0xffffffffu;
 158                 fp->fos = 0xffff0000u;
 159         }
 160         /*
 161          * Only the device not available exception or ptrace can call init_fpu.
 162          */
 163         set_stopped_child_used_math(tsk);
 164         return 0;
 165 }
 166
 167 /*
 168  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 169  * as the "regset->n" for the xstate regset will be updated based on the feature
 170  * capabilites supported by the xsave.
 171  */
 172 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 173 {
 174         return tsk_used_math(target) ? regset->n : 0;
 175 }
 176
 177 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 178 {
 179         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 180 }
 181
 182 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 183                 unsigned int pos, unsigned int count,
 184                 void *kbuf, void __user *ubuf)
 185 {
 186         int ret;
 187
 188         if (!cpu_has_fxsr)
 189                 return -ENODEV;
 190
 191         ret = init_fpu(target);
 192         if (ret)
 193                 return ret;
 194
 195         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 196                                    &target->thread.xstate->fxsave, 0, -1);
 197 }
 198
 199 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 200                 unsigned int pos, unsigned int count,
 201                 const void *kbuf, const void __user *ubuf)
 202 {
 203         int ret;
 204
 205         if (!cpu_has_fxsr)
 206                 return -ENODEV;
 207
 208         ret = init_fpu(target);
 209         if (ret)
 210                 return ret;
 211
 212         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 213                                  &target->thread.xstate->fxsave, 0, -1);
 214
 215         /*
 216          * mxcsr reserved bits must be masked to zero for security reasons.
 217          */
 218         target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
 219
 220         /*
 221          * update the header bits in the xsave header, indicating the
 222          * presence of FP and SSE state.
 223          */
 224         if (cpu_has_xsave)
 225                 target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 226
 227         return ret;
 228 }
 229
 230 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 231                 unsigned int pos, unsigned int count,
 232                 void *kbuf, void __user *ubuf)
 233 {
 234         int ret;
 235
 236         if (!cpu_has_xsave)
 237                 return -ENODEV;
 238
 239         ret = init_fpu(target);
 240         if (ret)
 241                 return ret;
 242
 243         /*
 244          * Copy the 48bytes defined by the software first into the xstate
 245          * memory layout in the thread struct, so that we can copy the entire
 246          * xstateregs to the user using one user_regset_copyout().
 247          */
 248         memcpy(&target->thread.xstate->fxsave.sw_reserved,
 249                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 250
 251         /*
 252          * Copy the xstate memory layout.
 253          */
 254         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 255                                   &target->thread.xstate->xsave, 0, -1);
 256         return ret;
 257 }
 258
 259 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 260                   unsigned int pos, unsigned int count,
 261                   const void *kbuf, const void __user *ubuf)
 262 {
 263         int ret;
 264         struct xsave_hdr_struct *xsave_hdr;
 265
 266         if (!cpu_has_xsave)
 267                 return -ENODEV;
 268
 269         ret = init_fpu(target);
 270         if (ret)
 271                 return ret;
 272
 273         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 274                                  &target->thread.xstate->xsave, 0, -1);
 275
 276         /*
 277          * mxcsr reserved bits must be masked to zero for security reasons.
 278          */
 279         target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
 280
 281         xsave_hdr = &target->thread.xstate->xsave.xsave_hdr;
 282
 283         xsave_hdr->xstate_bv &= pcntxt_mask;
 284         /*
 285          * These bits must be zero.
 286          */
 287         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 288
 289         return ret;
 290 }
 291
 292 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 293
 294 /*
 295  * FPU tag word conversions.
 296  */
 297
 298 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 299 {
 300         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 301
 302         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 303         tmp = ~twd;
 304         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 305         /* and move the valid bits to the lower byte. */
 306         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 307         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 308         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 309
 310         return tmp;
 311 }
 312
 313 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 314 #define FP_EXP_TAG_VALID        0
 315 #define FP_EXP_TAG_ZERO         1
 316 #define FP_EXP_TAG_SPECIAL      2
 317 #define FP_EXP_TAG_EMPTY        3
 318
 319 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 320 {
 321         struct _fpxreg *st;
 322         u32 tos = (fxsave->swd >> 11) & 7;
 323         u32 twd = (unsigned long) fxsave->twd;
 324         u32 tag;
 325         u32 ret = 0xffff0000u;
 326         int i;
 327
 328         for (i = 0; i < 8; i++, twd >>= 1) {
 329                 if (twd & 0x1) {
 330                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 331
 332                         switch (st->exponent & 0x7fff) {
 333                         case 0x7fff:
 334                                 tag = FP_EXP_TAG_SPECIAL;
 335                                 break;
 336                         case 0x0000:
 337                                 if (!st->significand[0] &&
 338                                     !st->significand[1] &&
 339                                     !st->significand[2] &&
 340                                     !st->significand[3])
 341                                         tag = FP_EXP_TAG_ZERO;
 342                                 else
 343                                         tag = FP_EXP_TAG_SPECIAL;
 344                                 break;
 345                         default:
 346                                 if (st->significand[3] & 0x8000)
 347                                         tag = FP_EXP_TAG_VALID;
 348                                 else
 349                                         tag = FP_EXP_TAG_SPECIAL;
 350                                 break;
 351                         }
 352                 } else {
 353                         tag = FP_EXP_TAG_EMPTY;
 354                 }
 355                 ret |= tag << (2 * i);
 356         }
 357         return ret;
 358 }
 359
 360 /*
 361  * FXSR floating point environment conversions.
 362  */
 363
 364 static void
 365 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 366 {
 367         struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
 368         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 369         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 370         int i;
 371
 372         env->cwd = fxsave->cwd | 0xffff0000u;
 373         env->swd = fxsave->swd | 0xffff0000u;
 374         env->twd = twd_fxsr_to_i387(fxsave);
 375
 376 #ifdef CONFIG_X86_64
 377         env->fip = fxsave->rip;
 378         env->foo = fxsave->rdp;
 379         if (tsk == current) {
 380                 /*
 381                  * should be actually ds/cs at fpu exception time, but
 382                  * that information is not available in 64bit mode.
 383                  */
 384                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
 385                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
 386         } else {
 387                 struct pt_regs *regs = task_pt_regs(tsk);
 388
 389                 env->fos = 0xffff0000 | tsk->thread.ds;
 390                 env->fcs = regs->cs;
 391         }
 392 #else
 393         env->fip = fxsave->fip;
 394         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 395         env->foo = fxsave->foo;
 396         env->fos = fxsave->fos;
 397 #endif
 398
 399         for (i = 0; i < 8; ++i)
 400                 memcpy(&to[i], &from[i], sizeof(to[0]));
 401 }
 402
 403 static void convert_to_fxsr(struct task_struct *tsk,
 404                             const struct user_i387_ia32_struct *env)
 405
 406 {
 407         struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
 408         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 409         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 410         int i;
 411
 412         fxsave->cwd = env->cwd;
 413         fxsave->swd = env->swd;
 414         fxsave->twd = twd_i387_to_fxsr(env->twd);
 415         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 416 #ifdef CONFIG_X86_64
 417         fxsave->rip = env->fip;
 418         fxsave->rdp = env->foo;
 419         /* cs and ds ignored */
 420 #else
 421         fxsave->fip = env->fip;
 422         fxsave->fcs = (env->fcs & 0xffff);
 423         fxsave->foo = env->foo;
 424         fxsave->fos = env->fos;
 425 #endif
 426
 427         for (i = 0; i < 8; ++i)
 428                 memcpy(&to[i], &from[i], sizeof(from[0]));
 429 }
 430
 431 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 432                unsigned int pos, unsigned int count,
 433                void *kbuf, void __user *ubuf)
 434 {
 435         struct user_i387_ia32_struct env;
 436         int ret;
 437
 438         ret = init_fpu(target);
 439         if (ret)
 440                 return ret;
 441
 442         if (!HAVE_HWFP)
 443                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 444
 445         if (!cpu_has_fxsr) {
 446                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 447                                            &target->thread.xstate->fsave, 0,
 448                                            -1);
 449         }
 450
 451         if (kbuf && pos == 0 && count == sizeof(env)) {
 452                 convert_from_fxsr(kbuf, target);
 453                 return 0;
 454         }
 455
 456         convert_from_fxsr(&env, target);
 457
 458         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 459 }
 460
 461 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 462                unsigned int pos, unsigned int count,
 463                const void *kbuf, const void __user *ubuf)
 464 {
 465         struct user_i387_ia32_struct env;
 466         int ret;
 467
 468         ret = init_fpu(target);
 469         if (ret)
 470                 return ret;
 471
 472         if (!HAVE_HWFP)
 473                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 474
 475         if (!cpu_has_fxsr) {
 476                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 477                                           &target->thread.xstate->fsave, 0, -1);
 478         }
 479
 480         if (pos > 0 || count < sizeof(env))
 481                 convert_from_fxsr(&env, target);
 482
 483         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 484         if (!ret)
 485                 convert_to_fxsr(target, &env);
 486
 487         /*
 488          * update the header bit in the xsave header, indicating the
 489          * presence of FP.
 490          */
 491         if (cpu_has_xsave)
 492                 target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 493         return ret;
 494 }
 495
 496 /*
 497  * Signal frame handlers.
 498  */
 499
 500 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 501 {
 502         struct task_struct *tsk = current;
 503         struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
 504
 505         fp->status = fp->swd;
 506         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
 507                 return -1;
 508         return 1;
 509 }
 510
 511 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 512 {
 513         struct task_struct *tsk = current;
 514         struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
 515         struct user_i387_ia32_struct env;
 516         int err = 0;
 517
 518         convert_from_fxsr(&env, tsk);
 519         if (__copy_to_user(buf, &env, sizeof(env)))
 520                 return -1;
 521
 522         err |= __put_user(fx->swd, &buf->status);
 523         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 524         if (err)
 525                 return -1;
 526
 527         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
 528                 return -1;
 529         return 1;
 530 }
 531
 532 static int save_i387_xsave(void __user *buf)
 533 {
 534         struct task_struct *tsk = current;
 535         struct _fpstate_ia32 __user *fx = buf;
 536         int err = 0;
 537
 538         /*
 539          * For legacy compatible, we always set FP/SSE bits in the bit
 540          * vector while saving the state to the user context.
 541          * This will enable us capturing any changes(during sigreturn) to
 542          * the FP/SSE bits by the legacy applications which don't touch
 543          * xstate_bv in the xsave header.
 544          *
 545          * xsave aware applications can change the xstate_bv in the xsave
 546          * header as well as change any contents in the memory layout.
 547          * xrestore as part of sigreturn will capture all the changes.
 548          */
 549         tsk->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 550
 551         if (save_i387_fxsave(fx) < 0)
 552                 return -1;
 553
 554         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
 555                              sizeof(struct _fpx_sw_bytes));
 556         err |= __put_user(FP_XSTATE_MAGIC2,
 557                           (__u32 __user *) (buf + sig_xstate_ia32_size
 558                                             - FP_XSTATE_MAGIC2_SIZE));
 559         if (err)
 560                 return -1;
 561
 562         return 1;
 563 }
 564
 565 int save_i387_xstate_ia32(void __user *buf)
 566 {
 567         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 568         struct task_struct *tsk = current;
 569
 570         if (!used_math())
 571                 return 0;
 572
 573         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
 574                 return -EACCES;
 575         /*
 576          * This will cause a "finit" to be triggered by the next
 577          * attempted FPU operation by the 'current' process.
 578          */
 579         clear_used_math();
 580
 581         if (!HAVE_HWFP) {
 582                 return fpregs_soft_get(current, NULL,
 583                                        0, sizeof(struct user_i387_ia32_struct),
 584                                        NULL, fp) ? -1 : 1;
 585         }
 586
 587         unlazy_fpu(tsk);
 588
 589         if (cpu_has_xsave)
 590                 return save_i387_xsave(fp);
 591         if (cpu_has_fxsr)
 592                 return save_i387_fxsave(fp);
 593         else
 594                 return save_i387_fsave(fp);
 595 }
 596
 597 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 598 {
 599         struct task_struct *tsk = current;
 600
 601         return __copy_from_user(&tsk->thread.xstate->fsave, buf,
 602                                 sizeof(struct i387_fsave_struct));
 603 }
 604
 605 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
 606                                unsigned int size)
 607 {
 608         struct task_struct *tsk = current;
 609         struct user_i387_ia32_struct env;
 610         int err;
 611
 612         err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
 613                                size);
 614         /* mxcsr reserved bits must be masked to zero for security reasons */
 615         tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
 616         if (err || __copy_from_user(&env, buf, sizeof(env)))
 617                 return 1;
 618         convert_to_fxsr(tsk, &env);
 619
 620         return 0;
 621 }
 622
 623 static int restore_i387_xsave(void __user *buf)
 624 {
 625         struct _fpx_sw_bytes fx_sw_user;
 626         struct _fpstate_ia32 __user *fx_user =
 627                         ((struct _fpstate_ia32 __user *) buf);
 628         struct i387_fxsave_struct __user *fx =
 629                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
 630         struct xsave_hdr_struct *xsave_hdr =
 631                                 &current->thread.xstate->xsave.xsave_hdr;
 632         u64 mask;
 633         int err;
 634
 635         if (check_for_xstate(fx, buf, &fx_sw_user))
 636                 goto fx_only;
 637
 638         mask = fx_sw_user.xstate_bv;
 639
 640         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
 641
 642         xsave_hdr->xstate_bv &= pcntxt_mask;
 643         /*
 644          * These bits must be zero.
 645          */
 646         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 647
 648         /*
 649          * Init the state that is not present in the memory layout
 650          * and enabled by the OS.
 651          */
 652         mask = ~(pcntxt_mask & ~mask);
 653         xsave_hdr->xstate_bv &= mask;
 654
 655         return err;
 656 fx_only:
 657         /*
 658          * Couldn't find the extended state information in the memory
 659          * layout. Restore the FP/SSE and init the other extended state
 660          * enabled by the OS.
 661          */
 662         xsave_hdr->xstate_bv = XSTATE_FPSSE;
 663         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
 664 }
 665
 666 int restore_i387_xstate_ia32(void __user *buf)
 667 {
 668         int err;
 669         struct task_struct *tsk = current;
 670         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 671
 672         if (HAVE_HWFP)
 673                 clear_fpu(tsk);
 674
 675         if (!buf) {
 676                 if (used_math()) {
 677                         clear_fpu(tsk);
 678                         clear_used_math();
 679                 }
 680
 681                 return 0;
 682         } else
 683                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
 684                         return -EACCES;
 685
 686         if (!used_math()) {
 687                 err = init_fpu(tsk);
 688                 if (err)
 689                         return err;
 690         }
 691
 692         if (HAVE_HWFP) {
 693                 if (cpu_has_xsave)
 694                         err = restore_i387_xsave(buf);
 695                 else if (cpu_has_fxsr)
 696                         err = restore_i387_fxsave(fp, sizeof(struct
 697                                                            i387_fxsave_struct));
 698                 else
 699                         err = restore_i387_fsave(fp);
 700         } else {
 701                 err = fpregs_soft_set(current, NULL,
 702                                       0, sizeof(struct user_i387_ia32_struct),
 703                                       NULL, fp) != 0;
 704         }
 705         set_used_math();
 706
 707         return err;
 708 }
 709
 710 /*
 711  * FPU state for core dumps.
 712  * This is only used for a.out dumps now.
 713  * It is declared generically using elf_fpregset_t (which is
 714  * struct user_i387_struct) but is in fact only used for 32-bit
 715  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 716  */
 717 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 718 {
 719         struct task_struct *tsk = current;
 720         int fpvalid;
 721
 722         fpvalid = !!used_math();
 723         if (fpvalid)
 724                 fpvalid = !fpregs_get(tsk, NULL,
 725                                       0, sizeof(struct user_i387_ia32_struct),
 726                                       fpu, NULL);
 727
 728         return fpvalid;
 729 }
 730 EXPORT_SYMBOL(dump_fpu);
 731
 732 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */