arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/user.h>
  20
  21 #ifdef CONFIG_X86_64
  22 # include <asm/sigcontext32.h>
  23 # include <asm/user32.h>
  24 #else
  25 # define save_i387_xstate_ia32          save_i387_xstate
  26 # define restore_i387_xstate_ia32       restore_i387_xstate
  27 # define _fpstate_ia32          _fpstate
  28 # define _xstate_ia32           _xstate
  29 # define sig_xstate_ia32_size   sig_xstate_size
  30 # define fx_sw_reserved_ia32    fx_sw_reserved
  31 # define user_i387_ia32_struct  user_i387_struct
  32 # define user32_fxsr_struct     user_fxsr_struct
  33 #endif
  34
  35 #ifdef CONFIG_MATH_EMULATION
  36 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  37 #else
  38 # define HAVE_HWFP              1
  39 #endif
  40
  41 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  42 unsigned int xstate_size;
  43 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  44 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  45
  46 void __cpuinit mxcsr_feature_mask_init(void)
  47 {
  48         unsigned long mask = 0;
  49
  50         clts();
  51         if (cpu_has_fxsr) {
  52                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  53                 asm volatile("fxsave %0" : : "m" (fx_scratch));
  54                 mask = fx_scratch.mxcsr_mask;
  55                 if (mask == 0)
  56                         mask = 0x0000ffbf;
  57         }
  58         mxcsr_feature_mask &= mask;
  59         stts();
  60 }
  61
  62 static void __cpuinit init_thread_xstate(void)
  63 {
  64         /*
  65          * Note that xstate_size might be overwriten later during
  66          * xsave_init().
  67          */
  68
  69         if (!HAVE_HWFP) {
  70                 /*
  71                  * Disable xsave as we do not support it if i387
  72                  * emulation is enabled.
  73                  */
  74                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
  75                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
  76                 xstate_size = sizeof(struct i387_soft_struct);
  77                 return;
  78         }
  79
  80         if (cpu_has_fxsr)
  81                 xstate_size = sizeof(struct i387_fxsave_struct);
  82 #ifdef CONFIG_X86_32
  83         else
  84                 xstate_size = sizeof(struct i387_fsave_struct);
  85 #endif
  86 }
  87
  88 /*
  89  * Called at bootup to set up the initial FPU state that is later cloned
  90  * into all processes.
  91  */
  92
  93 void __cpuinit fpu_init(void)
  94 {
  95         unsigned long cr0;
  96         unsigned long cr4_mask = 0;
  97
  98         if (cpu_has_fxsr)
  99                 cr4_mask |= X86_CR4_OSFXSR;
 100         if (cpu_has_xmm)
 101                 cr4_mask |= X86_CR4_OSXMMEXCPT;
 102         if (cr4_mask)
 103                 set_in_cr4(cr4_mask);
 104
 105         cr0 = read_cr0();
 106         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
 107         if (!HAVE_HWFP)
 108                 cr0 |= X86_CR0_EM;
 109         write_cr0(cr0);
 110
 111         if (!smp_processor_id())
 112                 init_thread_xstate();
 113
 114         mxcsr_feature_mask_init();
 115         /* clean state in init */
 116         current_thread_info()->status = 0;
 117         clear_used_math();
 118 }
 119
 120 void fpu_finit(struct fpu *fpu)
 121 {
 122 #ifdef CONFIG_X86_32
 123         if (!HAVE_HWFP) {
 124                 finit_soft_fpu(&fpu->state->soft);
 125                 return;
 126         }
 127 #endif
 128
 129         if (cpu_has_fxsr) {
 130                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
 131
 132                 memset(fx, 0, xstate_size);
 133                 fx->cwd = 0x37f;
 134                 if (cpu_has_xmm)
 135                         fx->mxcsr = MXCSR_DEFAULT;
 136         } else {
 137                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 138                 memset(fp, 0, xstate_size);
 139                 fp->cwd = 0xffff037fu;
 140                 fp->swd = 0xffff0000u;
 141                 fp->twd = 0xffffffffu;
 142                 fp->fos = 0xffff0000u;
 143         }
 144 }
 145 EXPORT_SYMBOL_GPL(fpu_finit);
 146
 147 /*
 148  * The _current_ task is using the FPU for the first time
 149  * so initialize it and set the mxcsr to its default
 150  * value at reset if we support XMM instructions and then
 151  * remeber the current task has used the FPU.
 152  */
 153 int init_fpu(struct task_struct *tsk)
 154 {
 155         int ret;
 156
 157         if (tsk_used_math(tsk)) {
 158                 if (HAVE_HWFP && tsk == current)
 159                         unlazy_fpu(tsk);
 160                 return 0;
 161         }
 162
 163         /*
 164          * Memory allocation at the first usage of the FPU and other state.
 165          */
 166         ret = fpu_alloc(&tsk->thread.fpu);
 167         if (ret)
 168                 return ret;
 169
 170         fpu_finit(&tsk->thread.fpu);
 171
 172         set_stopped_child_used_math(tsk);
 173         return 0;
 174 }
 175
 176 /*
 177  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 178  * as the "regset->n" for the xstate regset will be updated based on the feature
 179  * capabilites supported by the xsave.
 180  */
 181 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 182 {
 183         return tsk_used_math(target) ? regset->n : 0;
 184 }
 185
 186 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 187 {
 188         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 189 }
 190
 191 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 192                 unsigned int pos, unsigned int count,
 193                 void *kbuf, void __user *ubuf)
 194 {
 195         int ret;
 196
 197         if (!cpu_has_fxsr)
 198                 return -ENODEV;
 199
 200         ret = init_fpu(target);
 201         if (ret)
 202                 return ret;
 203
 204         sanitize_i387_state(target);
 205
 206         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 207                                    &target->thread.fpu.state->fxsave, 0, -1);
 208 }
 209
 210 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 211                 unsigned int pos, unsigned int count,
 212                 const void *kbuf, const void __user *ubuf)
 213 {
 214         int ret;
 215
 216         if (!cpu_has_fxsr)
 217                 return -ENODEV;
 218
 219         ret = init_fpu(target);
 220         if (ret)
 221                 return ret;
 222
 223         sanitize_i387_state(target);
 224
 225         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 226                                  &target->thread.fpu.state->fxsave, 0, -1);
 227
 228         /*
 229          * mxcsr reserved bits must be masked to zero for security reasons.
 230          */
 231         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 232
 233         /*
 234          * update the header bits in the xsave header, indicating the
 235          * presence of FP and SSE state.
 236          */
 237         if (cpu_has_xsave)
 238                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 239
 240         return ret;
 241 }
 242
 243 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 244                 unsigned int pos, unsigned int count,
 245                 void *kbuf, void __user *ubuf)
 246 {
 247         int ret;
 248
 249         if (!cpu_has_xsave)
 250                 return -ENODEV;
 251
 252         ret = init_fpu(target);
 253         if (ret)
 254                 return ret;
 255
 256         /*
 257          * Copy the 48bytes defined by the software first into the xstate
 258          * memory layout in the thread struct, so that we can copy the entire
 259          * xstateregs to the user using one user_regset_copyout().
 260          */
 261         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 262                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 263
 264         /*
 265          * Copy the xstate memory layout.
 266          */
 267         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 268                                   &target->thread.fpu.state->xsave, 0, -1);
 269         return ret;
 270 }
 271
 272 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 273                   unsigned int pos, unsigned int count,
 274                   const void *kbuf, const void __user *ubuf)
 275 {
 276         int ret;
 277         struct xsave_hdr_struct *xsave_hdr;
 278
 279         if (!cpu_has_xsave)
 280                 return -ENODEV;
 281
 282         ret = init_fpu(target);
 283         if (ret)
 284                 return ret;
 285
 286         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 287                                  &target->thread.fpu.state->xsave, 0, -1);
 288
 289         /*
 290          * mxcsr reserved bits must be masked to zero for security reasons.
 291          */
 292         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 293
 294         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 295
 296         xsave_hdr->xstate_bv &= pcntxt_mask;
 297         /*
 298          * These bits must be zero.
 299          */
 300         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 301
 302         return ret;
 303 }
 304
 305 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 306
 307 /*
 308  * FPU tag word conversions.
 309  */
 310
 311 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 312 {
 313         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 314
 315         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 316         tmp = ~twd;
 317         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 318         /* and move the valid bits to the lower byte. */
 319         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 320         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 321         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 322
 323         return tmp;
 324 }
 325
 326 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 327 #define FP_EXP_TAG_VALID        0
 328 #define FP_EXP_TAG_ZERO         1
 329 #define FP_EXP_TAG_SPECIAL      2
 330 #define FP_EXP_TAG_EMPTY        3
 331
 332 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 333 {
 334         struct _fpxreg *st;
 335         u32 tos = (fxsave->swd >> 11) & 7;
 336         u32 twd = (unsigned long) fxsave->twd;
 337         u32 tag;
 338         u32 ret = 0xffff0000u;
 339         int i;
 340
 341         for (i = 0; i < 8; i++, twd >>= 1) {
 342                 if (twd & 0x1) {
 343                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 344
 345                         switch (st->exponent & 0x7fff) {
 346                         case 0x7fff:
 347                                 tag = FP_EXP_TAG_SPECIAL;
 348                                 break;
 349                         case 0x0000:
 350                                 if (!st->significand[0] &&
 351                                     !st->significand[1] &&
 352                                     !st->significand[2] &&
 353                                     !st->significand[3])
 354                                         tag = FP_EXP_TAG_ZERO;
 355                                 else
 356                                         tag = FP_EXP_TAG_SPECIAL;
 357                                 break;
 358                         default:
 359                                 if (st->significand[3] & 0x8000)
 360                                         tag = FP_EXP_TAG_VALID;
 361                                 else
 362                                         tag = FP_EXP_TAG_SPECIAL;
 363                                 break;
 364                         }
 365                 } else {
 366                         tag = FP_EXP_TAG_EMPTY;
 367                 }
 368                 ret |= tag << (2 * i);
 369         }
 370         return ret;
 371 }
 372
 373 /*
 374  * FXSR floating point environment conversions.
 375  */
 376
 377 static void
 378 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 379 {
 380         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 381         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 382         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 383         int i;
 384
 385         env->cwd = fxsave->cwd | 0xffff0000u;
 386         env->swd = fxsave->swd | 0xffff0000u;
 387         env->twd = twd_fxsr_to_i387(fxsave);
 388
 389 #ifdef CONFIG_X86_64
 390         env->fip = fxsave->rip;
 391         env->foo = fxsave->rdp;
 392         /*
 393          * should be actually ds/cs at fpu exception time, but
 394          * that information is not available in 64bit mode.
 395          */
 396         env->fcs = task_pt_regs(tsk)->cs;
 397         if (tsk == current) {
 398                 savesegment(ds, env->fos);
 399         } else {
 400                 env->fos = tsk->thread.ds;
 401         }
 402         env->fos |= 0xffff0000;
 403 #else
 404         env->fip = fxsave->fip;
 405         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 406         env->foo = fxsave->foo;
 407         env->fos = fxsave->fos;
 408 #endif
 409
 410         for (i = 0; i < 8; ++i)
 411                 memcpy(&to[i], &from[i], sizeof(to[0]));
 412 }
 413
 414 static void convert_to_fxsr(struct task_struct *tsk,
 415                             const struct user_i387_ia32_struct *env)
 416
 417 {
 418         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 419         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 420         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 421         int i;
 422
 423         fxsave->cwd = env->cwd;
 424         fxsave->swd = env->swd;
 425         fxsave->twd = twd_i387_to_fxsr(env->twd);
 426         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 427 #ifdef CONFIG_X86_64
 428         fxsave->rip = env->fip;
 429         fxsave->rdp = env->foo;
 430         /* cs and ds ignored */
 431 #else
 432         fxsave->fip = env->fip;
 433         fxsave->fcs = (env->fcs & 0xffff);
 434         fxsave->foo = env->foo;
 435         fxsave->fos = env->fos;
 436 #endif
 437
 438         for (i = 0; i < 8; ++i)
 439                 memcpy(&to[i], &from[i], sizeof(from[0]));
 440 }
 441
 442 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 443                unsigned int pos, unsigned int count,
 444                void *kbuf, void __user *ubuf)
 445 {
 446         struct user_i387_ia32_struct env;
 447         int ret;
 448
 449         ret = init_fpu(target);
 450         if (ret)
 451                 return ret;
 452
 453         if (!HAVE_HWFP)
 454                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 455
 456         if (!cpu_has_fxsr) {
 457                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 458                                            &target->thread.fpu.state->fsave, 0,
 459                                            -1);
 460         }
 461
 462         sanitize_i387_state(target);
 463
 464         if (kbuf && pos == 0 && count == sizeof(env)) {
 465                 convert_from_fxsr(kbuf, target);
 466                 return 0;
 467         }
 468
 469         convert_from_fxsr(&env, target);
 470
 471         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 472 }
 473
 474 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 475                unsigned int pos, unsigned int count,
 476                const void *kbuf, const void __user *ubuf)
 477 {
 478         struct user_i387_ia32_struct env;
 479         int ret;
 480
 481         ret = init_fpu(target);
 482         if (ret)
 483                 return ret;
 484
 485         sanitize_i387_state(target);
 486
 487         if (!HAVE_HWFP)
 488                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 489
 490         if (!cpu_has_fxsr) {
 491                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 492                                           &target->thread.fpu.state->fsave, 0, -1);
 493         }
 494
 495         if (pos > 0 || count < sizeof(env))
 496                 convert_from_fxsr(&env, target);
 497
 498         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 499         if (!ret)
 500                 convert_to_fxsr(target, &env);
 501
 502         /*
 503          * update the header bit in the xsave header, indicating the
 504          * presence of FP.
 505          */
 506         if (cpu_has_xsave)
 507                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 508         return ret;
 509 }
 510
 511 /*
 512  * Signal frame handlers.
 513  */
 514
 515 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 516 {
 517         struct task_struct *tsk = current;
 518         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
 519
 520         fp->status = fp->swd;
 521         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
 522                 return -1;
 523         return 1;
 524 }
 525
 526 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 527 {
 528         struct task_struct *tsk = current;
 529         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
 530         struct user_i387_ia32_struct env;
 531         int err = 0;
 532
 533         convert_from_fxsr(&env, tsk);
 534         if (__copy_to_user(buf, &env, sizeof(env)))
 535                 return -1;
 536
 537         err |= __put_user(fx->swd, &buf->status);
 538         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 539         if (err)
 540                 return -1;
 541
 542         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
 543                 return -1;
 544         return 1;
 545 }
 546
 547 static int save_i387_xsave(void __user *buf)
 548 {
 549         struct task_struct *tsk = current;
 550         struct _fpstate_ia32 __user *fx = buf;
 551         int err = 0;
 552
 553
 554         sanitize_i387_state(tsk);
 555
 556         /*
 557          * For legacy compatible, we always set FP/SSE bits in the bit
 558          * vector while saving the state to the user context.
 559          * This will enable us capturing any changes(during sigreturn) to
 560          * the FP/SSE bits by the legacy applications which don't touch
 561          * xstate_bv in the xsave header.
 562          *
 563          * xsave aware applications can change the xstate_bv in the xsave
 564          * header as well as change any contents in the memory layout.
 565          * xrestore as part of sigreturn will capture all the changes.
 566          */
 567         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 568
 569         if (save_i387_fxsave(fx) < 0)
 570                 return -1;
 571
 572         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
 573                              sizeof(struct _fpx_sw_bytes));
 574         err |= __put_user(FP_XSTATE_MAGIC2,
 575                           (__u32 __user *) (buf + sig_xstate_ia32_size
 576                                             - FP_XSTATE_MAGIC2_SIZE));
 577         if (err)
 578                 return -1;
 579
 580         return 1;
 581 }
 582
 583 int save_i387_xstate_ia32(void __user *buf)
 584 {
 585         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 586         struct task_struct *tsk = current;
 587
 588         if (!used_math())
 589                 return 0;
 590
 591         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
 592                 return -EACCES;
 593         /*
 594          * This will cause a "finit" to be triggered by the next
 595          * attempted FPU operation by the 'current' process.
 596          */
 597         clear_used_math();
 598
 599         if (!HAVE_HWFP) {
 600                 return fpregs_soft_get(current, NULL,
 601                                        0, sizeof(struct user_i387_ia32_struct),
 602                                        NULL, fp) ? -1 : 1;
 603         }
 604
 605         unlazy_fpu(tsk);
 606
 607         if (cpu_has_xsave)
 608                 return save_i387_xsave(fp);
 609         if (cpu_has_fxsr)
 610                 return save_i387_fxsave(fp);
 611         else
 612                 return save_i387_fsave(fp);
 613 }
 614
 615 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 616 {
 617         struct task_struct *tsk = current;
 618
 619         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
 620                                 sizeof(struct i387_fsave_struct));
 621 }
 622
 623 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
 624                                unsigned int size)
 625 {
 626         struct task_struct *tsk = current;
 627         struct user_i387_ia32_struct env;
 628         int err;
 629
 630         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
 631                                size);
 632         /* mxcsr reserved bits must be masked to zero for security reasons */
 633         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 634         if (err || __copy_from_user(&env, buf, sizeof(env)))
 635                 return 1;
 636         convert_to_fxsr(tsk, &env);
 637
 638         return 0;
 639 }
 640
 641 static int restore_i387_xsave(void __user *buf)
 642 {
 643         struct _fpx_sw_bytes fx_sw_user;
 644         struct _fpstate_ia32 __user *fx_user =
 645                         ((struct _fpstate_ia32 __user *) buf);
 646         struct i387_fxsave_struct __user *fx =
 647                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
 648         struct xsave_hdr_struct *xsave_hdr =
 649                                 &current->thread.fpu.state->xsave.xsave_hdr;
 650         u64 mask;
 651         int err;
 652
 653         if (check_for_xstate(fx, buf, &fx_sw_user))
 654                 goto fx_only;
 655
 656         mask = fx_sw_user.xstate_bv;
 657
 658         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
 659
 660         xsave_hdr->xstate_bv &= pcntxt_mask;
 661         /*
 662          * These bits must be zero.
 663          */
 664         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 665
 666         /*
 667          * Init the state that is not present in the memory layout
 668          * and enabled by the OS.
 669          */
 670         mask = ~(pcntxt_mask & ~mask);
 671         xsave_hdr->xstate_bv &= mask;
 672
 673         return err;
 674 fx_only:
 675         /*
 676          * Couldn't find the extended state information in the memory
 677          * layout. Restore the FP/SSE and init the other extended state
 678          * enabled by the OS.
 679          */
 680         xsave_hdr->xstate_bv = XSTATE_FPSSE;
 681         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
 682 }
 683
 684 int restore_i387_xstate_ia32(void __user *buf)
 685 {
 686         int err;
 687         struct task_struct *tsk = current;
 688         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 689
 690         if (HAVE_HWFP)
 691                 clear_fpu(tsk);
 692
 693         if (!buf) {
 694                 if (used_math()) {
 695                         clear_fpu(tsk);
 696                         clear_used_math();
 697                 }
 698
 699                 return 0;
 700         } else
 701                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
 702                         return -EACCES;
 703
 704         if (!used_math()) {
 705                 err = init_fpu(tsk);
 706                 if (err)
 707                         return err;
 708         }
 709
 710         if (HAVE_HWFP) {
 711                 if (cpu_has_xsave)
 712                         err = restore_i387_xsave(buf);
 713                 else if (cpu_has_fxsr)
 714                         err = restore_i387_fxsave(fp, sizeof(struct
 715                                                            i387_fxsave_struct));
 716                 else
 717                         err = restore_i387_fsave(fp);
 718         } else {
 719                 err = fpregs_soft_set(current, NULL,
 720                                       0, sizeof(struct user_i387_ia32_struct),
 721                                       NULL, fp) != 0;
 722         }
 723         set_used_math();
 724
 725         return err;
 726 }
 727
 728 /*
 729  * FPU state for core dumps.
 730  * This is only used for a.out dumps now.
 731  * It is declared generically using elf_fpregset_t (which is
 732  * struct user_i387_struct) but is in fact only used for 32-bit
 733  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 734  */
 735 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 736 {
 737         struct task_struct *tsk = current;
 738         int fpvalid;
 739
 740         fpvalid = !!used_math();
 741         if (fpvalid)
 742                 fpvalid = !fpregs_get(tsk, NULL,
 743                                       0, sizeof(struct user_i387_ia32_struct),
 744                                       fpu, NULL);
 745
 746         return fpvalid;
 747 }
 748 EXPORT_SYMBOL(dump_fpu);
 749
 750 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */