1 /* Various workarounds for chipset bugs.
2 This code runs very early and can't use the regular PCI subsystem
3 The entries are keyed to PCI bridges which usually identify chipsets
5 This is only for whole classes of chipsets with specific problems which
6 need early invasive action (e.g. before the timers are initialized).
7 Most PCI device specific workarounds can be done later and should be
9 Mainboard specific bugs should be handled by DMI entries.
10 CPU specific bugs in setup.c */
12 #include <linux/pci.h>
13 #include <linux/acpi.h>
14 #include <linux/delay.h>
15 #include <linux/dmi.h>
16 #include <linux/pci_ids.h>
17 #include <linux/bcma/bcma.h>
18 #include <linux/bcma/bcma_regs.h>
19 #include <asm/pci-direct.h>
21 #include <asm/io_apic.h>
23 #include <asm/iommu.h>
27 #define dev_err(msg) pr_err("pci 0000:%02x:%02x.%d: %s", bus, slot, func, msg)
29 static void __init fix_hypertransport_config(int num, int slot, int func)
33 * we found a hypertransport bus
34 * make sure that we are broadcasting
35 * interrupts to all cpus on the ht bus
36 * if we're using extended apic ids
38 htcfg = read_pci_config(num, slot, func, 0x68);
39 if (htcfg & (1 << 18)) {
40 printk(KERN_INFO "Detected use of extended apic ids "
41 "on hypertransport bus\n");
42 if ((htcfg & (1 << 17)) == 0) {
43 printk(KERN_INFO "Enabling hypertransport extended "
44 "apic interrupt broadcast\n");
45 printk(KERN_INFO "Note this is a bios bug, "
46 "please contact your hw vendor\n");
48 write_pci_config(num, slot, func, 0x68, htcfg);
55 static void __init via_bugs(int num, int slot, int func)
57 #ifdef CONFIG_GART_IOMMU
58 if ((max_pfn > MAX_DMA32_PFN || force_iommu) &&
59 !gart_iommu_aperture_allowed) {
61 "Looks like a VIA chipset. Disabling IOMMU."
62 " Override with iommu=allowed\n");
63 gart_iommu_aperture_disabled = 1;
69 #ifdef CONFIG_X86_IO_APIC
71 static int __init nvidia_hpet_check(struct acpi_table_header *header)
75 #endif /* CONFIG_X86_IO_APIC */
76 #endif /* CONFIG_ACPI */
78 static void __init nvidia_bugs(int num, int slot, int func)
81 #ifdef CONFIG_X86_IO_APIC
83 * Only applies to Nvidia root ports (bus 0) and not to
84 * Nvidia graphics cards with PCI ports on secondary buses.
90 * All timer overrides on Nvidia are
91 * wrong unless HPET is enabled.
92 * Unfortunately that's not true on many Asus boards.
93 * We don't know yet how to detect this automatically, but
94 * at least allow a command line override.
96 if (acpi_use_timer_override)
99 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
100 acpi_skip_timer_override = 1;
101 printk(KERN_INFO "Nvidia board "
102 "detected. Ignoring ACPI "
103 "timer override.\n");
104 printk(KERN_INFO "If you got timer trouble "
105 "try acpi_use_timer_override\n");
109 /* RED-PEN skip them on mptables too? */
113 #if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
114 static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
119 b = read_pci_config_byte(num, slot, func, 0xac);
121 write_pci_config_byte(num, slot, func, 0xac, b);
123 d = read_pci_config(num, slot, func, 0x70);
125 write_pci_config(num, slot, func, 0x70, d);
127 d = read_pci_config(num, slot, func, 0x8);
132 static void __init ati_bugs(int num, int slot, int func)
137 if (acpi_use_timer_override)
140 d = ati_ixp4x0_rev(num, slot, func);
142 acpi_skip_timer_override = 1;
144 /* check for IRQ0 interrupt swap */
145 outb(0x72, 0xcd6); b = inb(0xcd7);
147 acpi_skip_timer_override = 1;
150 if (acpi_skip_timer_override) {
151 printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
152 printk(KERN_INFO "Ignoring ACPI timer override.\n");
153 printk(KERN_INFO "If you got timer trouble "
154 "try acpi_use_timer_override\n");
158 static u32 __init ati_sbx00_rev(int num, int slot, int func)
162 d = read_pci_config(num, slot, func, 0x8);
168 static void __init ati_bugs_contd(int num, int slot, int func)
172 rev = ati_sbx00_rev(num, slot, func);
174 acpi_fix_pin2_polarity = 1;
177 * SB600: revisions 0x11, 0x12, 0x13, 0x14, ...
178 * SB700: revisions 0x39, 0x3a, ...
179 * SB800: revisions 0x40, 0x41, ...
184 if (acpi_use_timer_override)
187 /* check for IRQ0 interrupt swap */
188 d = read_pci_config(num, slot, func, 0x64);
190 acpi_skip_timer_override = 1;
192 if (acpi_skip_timer_override) {
193 printk(KERN_INFO "SB600 revision 0x%x\n", rev);
194 printk(KERN_INFO "Ignoring ACPI timer override.\n");
195 printk(KERN_INFO "If you got timer trouble "
196 "try acpi_use_timer_override\n");
200 static void __init ati_bugs(int num, int slot, int func)
204 static void __init ati_bugs_contd(int num, int slot, int func)
209 #define BCM4331_MMIO_SIZE 16384
210 #define BCM4331_PM_CAP 0x40
211 #define bcma_aread32(reg) ioread32(mmio + 1 * BCMA_CORE_SIZE + reg)
212 #define bcma_awrite32(reg, val) iowrite32(val, mmio + 1 * BCMA_CORE_SIZE + reg)
214 static void __init apple_airport_reset(int bus, int slot, int func)
221 if (!dmi_match(DMI_SYS_VENDOR, "Apple Inc."))
224 /* Card may have been put into PCI_D3hot by grub quirk */
225 pmcsr = read_pci_config_16(bus, slot, func, BCM4331_PM_CAP + PCI_PM_CTRL);
227 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) {
228 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
229 write_pci_config_16(bus, slot, func, BCM4331_PM_CAP + PCI_PM_CTRL, pmcsr);
232 pmcsr = read_pci_config_16(bus, slot, func, BCM4331_PM_CAP + PCI_PM_CTRL);
233 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) {
234 dev_err("Cannot power up Apple AirPort card\n");
239 addr = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
240 addr |= (u64)read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_1) << 32;
241 addr &= PCI_BASE_ADDRESS_MEM_MASK;
243 mmio = early_ioremap(addr, BCM4331_MMIO_SIZE);
245 dev_err("Cannot iomap Apple AirPort card\n");
249 pr_info("Resetting Apple AirPort card (left enabled by EFI)\n");
251 for (i = 0; bcma_aread32(BCMA_RESET_ST) && i < 30; i++)
254 bcma_awrite32(BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
255 bcma_aread32(BCMA_RESET_CTL);
258 bcma_awrite32(BCMA_RESET_CTL, 0);
259 bcma_aread32(BCMA_RESET_CTL);
262 early_iounmap(mmio, BCM4331_MMIO_SIZE);
265 #define QFLAG_APPLY_ONCE 0x1
266 #define QFLAG_APPLIED 0x2
267 #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
274 void (*f)(int num, int slot, int func);
277 static struct chipset early_qrk[] __initdata = {
278 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
279 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
280 { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
281 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
282 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
283 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
284 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
285 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
286 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
287 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
288 { PCI_VENDOR_ID_BROADCOM, 0x4331,
289 PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
293 static void __init early_pci_scan_bus(int bus);
296 * check_dev_quirk - apply early quirks to a given PCI device
299 * @func: PCI function
301 * Check the vendor & device ID against the early quirks table.
303 * If the device is single function, let early_pci_scan_bus() know so we don't
304 * poke at this device again.
306 static int __init check_dev_quirk(int num, int slot, int func)
315 class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
318 return -1; /* no class, treat as single function */
320 vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
322 device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
324 for (i = 0; early_qrk[i].f != NULL; i++) {
325 if (((early_qrk[i].vendor == PCI_ANY_ID) ||
326 (early_qrk[i].vendor == vendor)) &&
327 ((early_qrk[i].device == PCI_ANY_ID) ||
328 (early_qrk[i].device == device)) &&
329 (!((early_qrk[i].class ^ class) &
330 early_qrk[i].class_mask))) {
331 if ((early_qrk[i].flags &
332 QFLAG_DONE) != QFLAG_DONE)
333 early_qrk[i].f(num, slot, func);
334 early_qrk[i].flags |= QFLAG_APPLIED;
338 type = read_pci_config_byte(num, slot, func,
341 if ((type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {
342 sec = read_pci_config_byte(num, slot, func, PCI_SECONDARY_BUS);
344 early_pci_scan_bus(sec);
353 static void __init early_pci_scan_bus(int bus)
357 /* Poor man's PCI discovery */
358 for (slot = 0; slot < 32; slot++)
359 for (func = 0; func < 8; func++) {
360 /* Only probe function 0 on single fn devices */
361 if (check_dev_quirk(bus, slot, func))
366 void __init early_quirks(void)
368 if (!early_pci_allowed())
371 early_pci_scan_bus(0);