10 INTERCEPT_SELECTIVE_CR0,
34 INTERCEPT_TASK_SWITCH,
35 INTERCEPT_FERR_FREEZE,
53 struct __attribute__ ((__packed__)) vmcb_control_area {
55 u16 intercept_dr_read;
56 u16 intercept_dr_write;
57 u32 intercept_exceptions;
60 u16 pause_filter_count;
76 u32 exit_int_info_err;
89 #define TLB_CONTROL_DO_NOTHING 0
90 #define TLB_CONTROL_FLUSH_ALL_ASID 1
92 #define V_TPR_MASK 0x0f
95 #define V_IRQ_MASK (1 << V_IRQ_SHIFT)
97 #define V_INTR_PRIO_SHIFT 16
98 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
100 #define V_IGN_TPR_SHIFT 20
101 #define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)
103 #define V_INTR_MASKING_SHIFT 24
104 #define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)
106 #define SVM_INTERRUPT_SHADOW_MASK 1
108 #define SVM_IOIO_STR_SHIFT 2
109 #define SVM_IOIO_REP_SHIFT 3
110 #define SVM_IOIO_SIZE_SHIFT 4
111 #define SVM_IOIO_ASIZE_SHIFT 7
113 #define SVM_IOIO_TYPE_MASK 1
114 #define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT)
115 #define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT)
116 #define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT)
117 #define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT)
119 #define SVM_VM_CR_VALID_MASK 0x001fULL
120 #define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL
121 #define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL
123 struct __attribute__ ((__packed__)) vmcb_seg {
130 struct __attribute__ ((__packed__)) vmcb_save_area {
137 struct vmcb_seg gdtr;
138 struct vmcb_seg ldtr;
139 struct vmcb_seg idtr;
175 struct __attribute__ ((__packed__)) vmcb {
176 struct vmcb_control_area control;
177 struct vmcb_save_area save;
180 #define SVM_CPUID_FEATURE_SHIFT 2
181 #define SVM_CPUID_FUNC 0x8000000a
183 #define SVM_VM_CR_SVM_DISABLE 4
185 #define SVM_SELECTOR_S_SHIFT 4
186 #define SVM_SELECTOR_DPL_SHIFT 5
187 #define SVM_SELECTOR_P_SHIFT 7
188 #define SVM_SELECTOR_AVL_SHIFT 8
189 #define SVM_SELECTOR_L_SHIFT 9
190 #define SVM_SELECTOR_DB_SHIFT 10
191 #define SVM_SELECTOR_G_SHIFT 11
193 #define SVM_SELECTOR_TYPE_MASK (0xf)
194 #define SVM_SELECTOR_S_MASK (1 << SVM_SELECTOR_S_SHIFT)
195 #define SVM_SELECTOR_DPL_MASK (3 << SVM_SELECTOR_DPL_SHIFT)
196 #define SVM_SELECTOR_P_MASK (1 << SVM_SELECTOR_P_SHIFT)
197 #define SVM_SELECTOR_AVL_MASK (1 << SVM_SELECTOR_AVL_SHIFT)
198 #define SVM_SELECTOR_L_MASK (1 << SVM_SELECTOR_L_SHIFT)
199 #define SVM_SELECTOR_DB_MASK (1 << SVM_SELECTOR_DB_SHIFT)
200 #define SVM_SELECTOR_G_MASK (1 << SVM_SELECTOR_G_SHIFT)
202 #define SVM_SELECTOR_WRITE_MASK (1 << 1)
203 #define SVM_SELECTOR_READ_MASK SVM_SELECTOR_WRITE_MASK
204 #define SVM_SELECTOR_CODE_MASK (1 << 3)
206 #define INTERCEPT_CR0_READ 0
207 #define INTERCEPT_CR3_READ 3
208 #define INTERCEPT_CR4_READ 4
209 #define INTERCEPT_CR8_READ 8
210 #define INTERCEPT_CR0_WRITE (16 + 0)
211 #define INTERCEPT_CR3_WRITE (16 + 3)
212 #define INTERCEPT_CR4_WRITE (16 + 4)
213 #define INTERCEPT_CR8_WRITE (16 + 8)
215 #define INTERCEPT_DR0_MASK 1
216 #define INTERCEPT_DR1_MASK (1 << 1)
217 #define INTERCEPT_DR2_MASK (1 << 2)
218 #define INTERCEPT_DR3_MASK (1 << 3)
219 #define INTERCEPT_DR4_MASK (1 << 4)
220 #define INTERCEPT_DR5_MASK (1 << 5)
221 #define INTERCEPT_DR6_MASK (1 << 6)
222 #define INTERCEPT_DR7_MASK (1 << 7)
224 #define SVM_EVTINJ_VEC_MASK 0xff
226 #define SVM_EVTINJ_TYPE_SHIFT 8
227 #define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT)
229 #define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
230 #define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT)
231 #define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT)
232 #define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT)
234 #define SVM_EVTINJ_VALID (1 << 31)
235 #define SVM_EVTINJ_VALID_ERR (1 << 11)
237 #define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK
238 #define SVM_EXITINTINFO_TYPE_MASK SVM_EVTINJ_TYPE_MASK
240 #define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR
241 #define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI
242 #define SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT
243 #define SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT
245 #define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID
246 #define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR
248 #define SVM_EXITINFOSHIFT_TS_REASON_IRET 36
249 #define SVM_EXITINFOSHIFT_TS_REASON_JMP 38
250 #define SVM_EXITINFOSHIFT_TS_HAS_ERROR_CODE 44
252 #define SVM_EXIT_READ_CR0 0x000
253 #define SVM_EXIT_READ_CR3 0x003
254 #define SVM_EXIT_READ_CR4 0x004
255 #define SVM_EXIT_READ_CR8 0x008
256 #define SVM_EXIT_WRITE_CR0 0x010
257 #define SVM_EXIT_WRITE_CR3 0x013
258 #define SVM_EXIT_WRITE_CR4 0x014
259 #define SVM_EXIT_WRITE_CR8 0x018
260 #define SVM_EXIT_READ_DR0 0x020
261 #define SVM_EXIT_READ_DR1 0x021
262 #define SVM_EXIT_READ_DR2 0x022
263 #define SVM_EXIT_READ_DR3 0x023
264 #define SVM_EXIT_READ_DR4 0x024
265 #define SVM_EXIT_READ_DR5 0x025
266 #define SVM_EXIT_READ_DR6 0x026
267 #define SVM_EXIT_READ_DR7 0x027
268 #define SVM_EXIT_WRITE_DR0 0x030
269 #define SVM_EXIT_WRITE_DR1 0x031
270 #define SVM_EXIT_WRITE_DR2 0x032
271 #define SVM_EXIT_WRITE_DR3 0x033
272 #define SVM_EXIT_WRITE_DR4 0x034
273 #define SVM_EXIT_WRITE_DR5 0x035
274 #define SVM_EXIT_WRITE_DR6 0x036
275 #define SVM_EXIT_WRITE_DR7 0x037
276 #define SVM_EXIT_EXCP_BASE 0x040
277 #define SVM_EXIT_INTR 0x060
278 #define SVM_EXIT_NMI 0x061
279 #define SVM_EXIT_SMI 0x062
280 #define SVM_EXIT_INIT 0x063
281 #define SVM_EXIT_VINTR 0x064
282 #define SVM_EXIT_CR0_SEL_WRITE 0x065
283 #define SVM_EXIT_IDTR_READ 0x066
284 #define SVM_EXIT_GDTR_READ 0x067
285 #define SVM_EXIT_LDTR_READ 0x068
286 #define SVM_EXIT_TR_READ 0x069
287 #define SVM_EXIT_IDTR_WRITE 0x06a
288 #define SVM_EXIT_GDTR_WRITE 0x06b
289 #define SVM_EXIT_LDTR_WRITE 0x06c
290 #define SVM_EXIT_TR_WRITE 0x06d
291 #define SVM_EXIT_RDTSC 0x06e
292 #define SVM_EXIT_RDPMC 0x06f
293 #define SVM_EXIT_PUSHF 0x070
294 #define SVM_EXIT_POPF 0x071
295 #define SVM_EXIT_CPUID 0x072
296 #define SVM_EXIT_RSM 0x073
297 #define SVM_EXIT_IRET 0x074
298 #define SVM_EXIT_SWINT 0x075
299 #define SVM_EXIT_INVD 0x076
300 #define SVM_EXIT_PAUSE 0x077
301 #define SVM_EXIT_HLT 0x078
302 #define SVM_EXIT_INVLPG 0x079
303 #define SVM_EXIT_INVLPGA 0x07a
304 #define SVM_EXIT_IOIO 0x07b
305 #define SVM_EXIT_MSR 0x07c
306 #define SVM_EXIT_TASK_SWITCH 0x07d
307 #define SVM_EXIT_FERR_FREEZE 0x07e
308 #define SVM_EXIT_SHUTDOWN 0x07f
309 #define SVM_EXIT_VMRUN 0x080
310 #define SVM_EXIT_VMMCALL 0x081
311 #define SVM_EXIT_VMLOAD 0x082
312 #define SVM_EXIT_VMSAVE 0x083
313 #define SVM_EXIT_STGI 0x084
314 #define SVM_EXIT_CLGI 0x085
315 #define SVM_EXIT_SKINIT 0x086
316 #define SVM_EXIT_RDTSCP 0x087
317 #define SVM_EXIT_ICEBP 0x088
318 #define SVM_EXIT_WBINVD 0x089
319 #define SVM_EXIT_MONITOR 0x08a
320 #define SVM_EXIT_MWAIT 0x08b
321 #define SVM_EXIT_MWAIT_COND 0x08c
322 #define SVM_EXIT_NPF 0x400
324 #define SVM_EXIT_ERR -1
326 #define SVM_CR0_SELECTIVE_MASK (X86_CR0_TS | X86_CR0_MP)
328 #define SVM_VMLOAD ".byte 0x0f, 0x01, 0xda"
329 #define SVM_VMRUN ".byte 0x0f, 0x01, 0xd8"
330 #define SVM_VMSAVE ".byte 0x0f, 0x01, 0xdb"
331 #define SVM_CLGI ".byte 0x0f, 0x01, 0xdd"
332 #define SVM_STGI ".byte 0x0f, 0x01, 0xdc"
333 #define SVM_INVLPGA ".byte 0x0f, 0x01, 0xdf"