x86, pvops: Remove hooks for {rd,wr}msr_safe_regs
[pandora-kernel.git] / arch / x86 / include / asm / paravirt.h
1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4  * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/pgtable_types.h>
8 #include <asm/asm.h>
9
10 #include <asm/paravirt_types.h>
11
12 #ifndef __ASSEMBLY__
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
16
17 static inline int paravirt_enabled(void)
18 {
19         return pv_info.paravirt_enabled;
20 }
21
22 static inline void load_sp0(struct tss_struct *tss,
23                              struct thread_struct *thread)
24 {
25         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
26 }
27
28 /* The paravirtualized CPUID instruction. */
29 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
30                            unsigned int *ecx, unsigned int *edx)
31 {
32         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
33 }
34
35 /*
36  * These special macros can be used to get or set a debugging register
37  */
38 static inline unsigned long paravirt_get_debugreg(int reg)
39 {
40         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
41 }
42 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
43 static inline void set_debugreg(unsigned long val, int reg)
44 {
45         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
46 }
47
48 static inline void clts(void)
49 {
50         PVOP_VCALL0(pv_cpu_ops.clts);
51 }
52
53 static inline unsigned long read_cr0(void)
54 {
55         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
56 }
57
58 static inline void write_cr0(unsigned long x)
59 {
60         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
61 }
62
63 static inline unsigned long read_cr2(void)
64 {
65         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
66 }
67
68 static inline void write_cr2(unsigned long x)
69 {
70         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
71 }
72
73 static inline unsigned long read_cr3(void)
74 {
75         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
76 }
77
78 static inline void write_cr3(unsigned long x)
79 {
80         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
81 }
82
83 static inline unsigned long read_cr4(void)
84 {
85         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
86 }
87 static inline unsigned long read_cr4_safe(void)
88 {
89         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
90 }
91
92 static inline void write_cr4(unsigned long x)
93 {
94         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
95 }
96
97 #ifdef CONFIG_X86_64
98 static inline unsigned long read_cr8(void)
99 {
100         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
101 }
102
103 static inline void write_cr8(unsigned long x)
104 {
105         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
106 }
107 #endif
108
109 static inline void arch_safe_halt(void)
110 {
111         PVOP_VCALL0(pv_irq_ops.safe_halt);
112 }
113
114 static inline void halt(void)
115 {
116         PVOP_VCALL0(pv_irq_ops.halt);
117 }
118
119 static inline void wbinvd(void)
120 {
121         PVOP_VCALL0(pv_cpu_ops.wbinvd);
122 }
123
124 #define get_kernel_rpl()  (pv_info.kernel_rpl)
125
126 static inline u64 paravirt_read_msr(unsigned msr, int *err)
127 {
128         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
129 }
130
131 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
132 {
133         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
134 }
135
136 /* These should all do BUG_ON(_err), but our headers are too tangled. */
137 #define rdmsr(msr, val1, val2)                  \
138 do {                                            \
139         int _err;                               \
140         u64 _l = paravirt_read_msr(msr, &_err); \
141         val1 = (u32)_l;                         \
142         val2 = _l >> 32;                        \
143 } while (0)
144
145 #define wrmsr(msr, val1, val2)                  \
146 do {                                            \
147         paravirt_write_msr(msr, val1, val2);    \
148 } while (0)
149
150 #define rdmsrl(msr, val)                        \
151 do {                                            \
152         int _err;                               \
153         val = paravirt_read_msr(msr, &_err);    \
154 } while (0)
155
156 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
157 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
158
159 /* rdmsr with exception handling */
160 #define rdmsr_safe(msr, a, b)                   \
161 ({                                              \
162         int _err;                               \
163         u64 _l = paravirt_read_msr(msr, &_err); \
164         (*a) = (u32)_l;                         \
165         (*b) = _l >> 32;                        \
166         _err;                                   \
167 })
168
169 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
170 {
171         int err;
172
173         *p = paravirt_read_msr(msr, &err);
174         return err;
175 }
176
177 static inline u64 paravirt_read_tsc(void)
178 {
179         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
180 }
181
182 #define rdtscl(low)                             \
183 do {                                            \
184         u64 _l = paravirt_read_tsc();           \
185         low = (int)_l;                          \
186 } while (0)
187
188 #define rdtscll(val) (val = paravirt_read_tsc())
189
190 static inline unsigned long long paravirt_sched_clock(void)
191 {
192         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
193 }
194
195 struct static_key;
196 extern struct static_key paravirt_steal_enabled;
197 extern struct static_key paravirt_steal_rq_enabled;
198
199 static inline u64 paravirt_steal_clock(int cpu)
200 {
201         return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
202 }
203
204 static inline unsigned long long paravirt_read_pmc(int counter)
205 {
206         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
207 }
208
209 #define rdpmc(counter, low, high)               \
210 do {                                            \
211         u64 _l = paravirt_read_pmc(counter);    \
212         low = (u32)_l;                          \
213         high = _l >> 32;                        \
214 } while (0)
215
216 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
217 {
218         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
219 }
220
221 #define rdtscp(low, high, aux)                          \
222 do {                                                    \
223         int __aux;                                      \
224         unsigned long __val = paravirt_rdtscp(&__aux);  \
225         (low) = (u32)__val;                             \
226         (high) = (u32)(__val >> 32);                    \
227         (aux) = __aux;                                  \
228 } while (0)
229
230 #define rdtscpll(val, aux)                              \
231 do {                                                    \
232         unsigned long __aux;                            \
233         val = paravirt_rdtscp(&__aux);                  \
234         (aux) = __aux;                                  \
235 } while (0)
236
237 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
238 {
239         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
240 }
241
242 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
243 {
244         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
245 }
246
247 static inline void load_TR_desc(void)
248 {
249         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
250 }
251 static inline void load_gdt(const struct desc_ptr *dtr)
252 {
253         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
254 }
255 static inline void load_idt(const struct desc_ptr *dtr)
256 {
257         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
258 }
259 static inline void set_ldt(const void *addr, unsigned entries)
260 {
261         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
262 }
263 static inline void store_gdt(struct desc_ptr *dtr)
264 {
265         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
266 }
267 static inline void store_idt(struct desc_ptr *dtr)
268 {
269         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
270 }
271 static inline unsigned long paravirt_store_tr(void)
272 {
273         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
274 }
275 #define store_tr(tr)    ((tr) = paravirt_store_tr())
276 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
277 {
278         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
279 }
280
281 #ifdef CONFIG_X86_64
282 static inline void load_gs_index(unsigned int gs)
283 {
284         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
285 }
286 #endif
287
288 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
289                                    const void *desc)
290 {
291         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
292 }
293
294 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
295                                    void *desc, int type)
296 {
297         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
298 }
299
300 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
301 {
302         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
303 }
304 static inline void set_iopl_mask(unsigned mask)
305 {
306         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
307 }
308
309 /* The paravirtualized I/O functions */
310 static inline void slow_down_io(void)
311 {
312         pv_cpu_ops.io_delay();
313 #ifdef REALLY_SLOW_IO
314         pv_cpu_ops.io_delay();
315         pv_cpu_ops.io_delay();
316         pv_cpu_ops.io_delay();
317 #endif
318 }
319
320 #ifdef CONFIG_SMP
321 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
322                                     unsigned long start_esp)
323 {
324         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
325                     phys_apicid, start_eip, start_esp);
326 }
327 #endif
328
329 static inline void paravirt_activate_mm(struct mm_struct *prev,
330                                         struct mm_struct *next)
331 {
332         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
333 }
334
335 static inline void arch_dup_mmap(struct mm_struct *oldmm,
336                                  struct mm_struct *mm)
337 {
338         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
339 }
340
341 static inline void arch_exit_mmap(struct mm_struct *mm)
342 {
343         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
344 }
345
346 static inline void __flush_tlb(void)
347 {
348         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
349 }
350 static inline void __flush_tlb_global(void)
351 {
352         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
353 }
354 static inline void __flush_tlb_single(unsigned long addr)
355 {
356         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
357 }
358
359 static inline void flush_tlb_others(const struct cpumask *cpumask,
360                                     struct mm_struct *mm,
361                                     unsigned long va)
362 {
363         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
364 }
365
366 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
367 {
368         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
369 }
370
371 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
372 {
373         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
374 }
375
376 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
377 {
378         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
379 }
380 static inline void paravirt_release_pte(unsigned long pfn)
381 {
382         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
383 }
384
385 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
386 {
387         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
388 }
389
390 static inline void paravirt_release_pmd(unsigned long pfn)
391 {
392         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
393 }
394
395 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
396 {
397         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
398 }
399 static inline void paravirt_release_pud(unsigned long pfn)
400 {
401         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
402 }
403
404 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
405                               pte_t *ptep)
406 {
407         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
408 }
409 static inline void pmd_update(struct mm_struct *mm, unsigned long addr,
410                               pmd_t *pmdp)
411 {
412         PVOP_VCALL3(pv_mmu_ops.pmd_update, mm, addr, pmdp);
413 }
414
415 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
416                                     pte_t *ptep)
417 {
418         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
419 }
420
421 static inline void pmd_update_defer(struct mm_struct *mm, unsigned long addr,
422                                     pmd_t *pmdp)
423 {
424         PVOP_VCALL3(pv_mmu_ops.pmd_update_defer, mm, addr, pmdp);
425 }
426
427 static inline pte_t __pte(pteval_t val)
428 {
429         pteval_t ret;
430
431         if (sizeof(pteval_t) > sizeof(long))
432                 ret = PVOP_CALLEE2(pteval_t,
433                                    pv_mmu_ops.make_pte,
434                                    val, (u64)val >> 32);
435         else
436                 ret = PVOP_CALLEE1(pteval_t,
437                                    pv_mmu_ops.make_pte,
438                                    val);
439
440         return (pte_t) { .pte = ret };
441 }
442
443 static inline pteval_t pte_val(pte_t pte)
444 {
445         pteval_t ret;
446
447         if (sizeof(pteval_t) > sizeof(long))
448                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
449                                    pte.pte, (u64)pte.pte >> 32);
450         else
451                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
452                                    pte.pte);
453
454         return ret;
455 }
456
457 static inline pgd_t __pgd(pgdval_t val)
458 {
459         pgdval_t ret;
460
461         if (sizeof(pgdval_t) > sizeof(long))
462                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
463                                    val, (u64)val >> 32);
464         else
465                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
466                                    val);
467
468         return (pgd_t) { ret };
469 }
470
471 static inline pgdval_t pgd_val(pgd_t pgd)
472 {
473         pgdval_t ret;
474
475         if (sizeof(pgdval_t) > sizeof(long))
476                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
477                                     pgd.pgd, (u64)pgd.pgd >> 32);
478         else
479                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
480                                     pgd.pgd);
481
482         return ret;
483 }
484
485 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
486 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
487                                            pte_t *ptep)
488 {
489         pteval_t ret;
490
491         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
492                          mm, addr, ptep);
493
494         return (pte_t) { .pte = ret };
495 }
496
497 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
498                                            pte_t *ptep, pte_t pte)
499 {
500         if (sizeof(pteval_t) > sizeof(long))
501                 /* 5 arg words */
502                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
503         else
504                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
505                             mm, addr, ptep, pte.pte);
506 }
507
508 static inline void set_pte(pte_t *ptep, pte_t pte)
509 {
510         if (sizeof(pteval_t) > sizeof(long))
511                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
512                             pte.pte, (u64)pte.pte >> 32);
513         else
514                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
515                             pte.pte);
516 }
517
518 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
519                               pte_t *ptep, pte_t pte)
520 {
521         if (sizeof(pteval_t) > sizeof(long))
522                 /* 5 arg words */
523                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
524         else
525                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
526 }
527
528 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
529 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
530                               pmd_t *pmdp, pmd_t pmd)
531 {
532         if (sizeof(pmdval_t) > sizeof(long))
533                 /* 5 arg words */
534                 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
535         else
536                 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
537                             native_pmd_val(pmd));
538 }
539 #endif
540
541 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
542 {
543         pmdval_t val = native_pmd_val(pmd);
544
545         if (sizeof(pmdval_t) > sizeof(long))
546                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
547         else
548                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
549 }
550
551 #if PAGETABLE_LEVELS >= 3
552 static inline pmd_t __pmd(pmdval_t val)
553 {
554         pmdval_t ret;
555
556         if (sizeof(pmdval_t) > sizeof(long))
557                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
558                                    val, (u64)val >> 32);
559         else
560                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
561                                    val);
562
563         return (pmd_t) { ret };
564 }
565
566 static inline pmdval_t pmd_val(pmd_t pmd)
567 {
568         pmdval_t ret;
569
570         if (sizeof(pmdval_t) > sizeof(long))
571                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
572                                     pmd.pmd, (u64)pmd.pmd >> 32);
573         else
574                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
575                                     pmd.pmd);
576
577         return ret;
578 }
579
580 static inline void set_pud(pud_t *pudp, pud_t pud)
581 {
582         pudval_t val = native_pud_val(pud);
583
584         if (sizeof(pudval_t) > sizeof(long))
585                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
586                             val, (u64)val >> 32);
587         else
588                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
589                             val);
590 }
591 #if PAGETABLE_LEVELS == 4
592 static inline pud_t __pud(pudval_t val)
593 {
594         pudval_t ret;
595
596         if (sizeof(pudval_t) > sizeof(long))
597                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
598                                    val, (u64)val >> 32);
599         else
600                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
601                                    val);
602
603         return (pud_t) { ret };
604 }
605
606 static inline pudval_t pud_val(pud_t pud)
607 {
608         pudval_t ret;
609
610         if (sizeof(pudval_t) > sizeof(long))
611                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
612                                     pud.pud, (u64)pud.pud >> 32);
613         else
614                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
615                                     pud.pud);
616
617         return ret;
618 }
619
620 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
621 {
622         pgdval_t val = native_pgd_val(pgd);
623
624         if (sizeof(pgdval_t) > sizeof(long))
625                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
626                             val, (u64)val >> 32);
627         else
628                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
629                             val);
630 }
631
632 static inline void pgd_clear(pgd_t *pgdp)
633 {
634         set_pgd(pgdp, __pgd(0));
635 }
636
637 static inline void pud_clear(pud_t *pudp)
638 {
639         set_pud(pudp, __pud(0));
640 }
641
642 #endif  /* PAGETABLE_LEVELS == 4 */
643
644 #endif  /* PAGETABLE_LEVELS >= 3 */
645
646 #ifdef CONFIG_X86_PAE
647 /* Special-case pte-setting operations for PAE, which can't update a
648    64-bit pte atomically */
649 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
650 {
651         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
652                     pte.pte, pte.pte >> 32);
653 }
654
655 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
656                              pte_t *ptep)
657 {
658         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
659 }
660
661 static inline void pmd_clear(pmd_t *pmdp)
662 {
663         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
664 }
665 #else  /* !CONFIG_X86_PAE */
666 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
667 {
668         set_pte(ptep, pte);
669 }
670
671 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
672                              pte_t *ptep)
673 {
674         set_pte_at(mm, addr, ptep, __pte(0));
675 }
676
677 static inline void pmd_clear(pmd_t *pmdp)
678 {
679         set_pmd(pmdp, __pmd(0));
680 }
681 #endif  /* CONFIG_X86_PAE */
682
683 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
684 static inline void arch_start_context_switch(struct task_struct *prev)
685 {
686         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
687 }
688
689 static inline void arch_end_context_switch(struct task_struct *next)
690 {
691         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
692 }
693
694 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
695 static inline void arch_enter_lazy_mmu_mode(void)
696 {
697         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
698 }
699
700 static inline void arch_leave_lazy_mmu_mode(void)
701 {
702         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
703 }
704
705 void arch_flush_lazy_mmu_mode(void);
706
707 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
708                                 phys_addr_t phys, pgprot_t flags)
709 {
710         pv_mmu_ops.set_fixmap(idx, phys, flags);
711 }
712
713 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
714
715 static inline int arch_spin_is_locked(struct arch_spinlock *lock)
716 {
717         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
718 }
719
720 static inline int arch_spin_is_contended(struct arch_spinlock *lock)
721 {
722         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
723 }
724 #define arch_spin_is_contended  arch_spin_is_contended
725
726 static __always_inline void arch_spin_lock(struct arch_spinlock *lock)
727 {
728         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
729 }
730
731 static __always_inline void arch_spin_lock_flags(struct arch_spinlock *lock,
732                                                   unsigned long flags)
733 {
734         PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
735 }
736
737 static __always_inline int arch_spin_trylock(struct arch_spinlock *lock)
738 {
739         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
740 }
741
742 static __always_inline void arch_spin_unlock(struct arch_spinlock *lock)
743 {
744         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
745 }
746
747 #endif
748
749 #ifdef CONFIG_X86_32
750 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
751 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
752
753 /* save and restore all caller-save registers, except return value */
754 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
755 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
756
757 #define PV_FLAGS_ARG "0"
758 #define PV_EXTRA_CLOBBERS
759 #define PV_VEXTRA_CLOBBERS
760 #else
761 /* save and restore all caller-save registers, except return value */
762 #define PV_SAVE_ALL_CALLER_REGS                                         \
763         "push %rcx;"                                                    \
764         "push %rdx;"                                                    \
765         "push %rsi;"                                                    \
766         "push %rdi;"                                                    \
767         "push %r8;"                                                     \
768         "push %r9;"                                                     \
769         "push %r10;"                                                    \
770         "push %r11;"
771 #define PV_RESTORE_ALL_CALLER_REGS                                      \
772         "pop %r11;"                                                     \
773         "pop %r10;"                                                     \
774         "pop %r9;"                                                      \
775         "pop %r8;"                                                      \
776         "pop %rdi;"                                                     \
777         "pop %rsi;"                                                     \
778         "pop %rdx;"                                                     \
779         "pop %rcx;"
780
781 /* We save some registers, but all of them, that's too much. We clobber all
782  * caller saved registers but the argument parameter */
783 #define PV_SAVE_REGS "pushq %%rdi;"
784 #define PV_RESTORE_REGS "popq %%rdi;"
785 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
786 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
787 #define PV_FLAGS_ARG "D"
788 #endif
789
790 /*
791  * Generate a thunk around a function which saves all caller-save
792  * registers except for the return value.  This allows C functions to
793  * be called from assembler code where fewer than normal registers are
794  * available.  It may also help code generation around calls from C
795  * code if the common case doesn't use many registers.
796  *
797  * When a callee is wrapped in a thunk, the caller can assume that all
798  * arg regs and all scratch registers are preserved across the
799  * call. The return value in rax/eax will not be saved, even for void
800  * functions.
801  */
802 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
803         extern typeof(func) __raw_callee_save_##func;                   \
804         static void *__##func##__ __used = func;                        \
805                                                                         \
806         asm(".pushsection .text;"                                       \
807             "__raw_callee_save_" #func ": "                             \
808             PV_SAVE_ALL_CALLER_REGS                                     \
809             "call " #func ";"                                           \
810             PV_RESTORE_ALL_CALLER_REGS                                  \
811             "ret;"                                                      \
812             ".popsection")
813
814 /* Get a reference to a callee-save function */
815 #define PV_CALLEE_SAVE(func)                                            \
816         ((struct paravirt_callee_save) { __raw_callee_save_##func })
817
818 /* Promise that "func" already uses the right calling convention */
819 #define __PV_IS_CALLEE_SAVE(func)                       \
820         ((struct paravirt_callee_save) { func })
821
822 static inline notrace unsigned long arch_local_save_flags(void)
823 {
824         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
825 }
826
827 static inline notrace void arch_local_irq_restore(unsigned long f)
828 {
829         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
830 }
831
832 static inline notrace void arch_local_irq_disable(void)
833 {
834         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
835 }
836
837 static inline notrace void arch_local_irq_enable(void)
838 {
839         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
840 }
841
842 static inline notrace unsigned long arch_local_irq_save(void)
843 {
844         unsigned long f;
845
846         f = arch_local_save_flags();
847         arch_local_irq_disable();
848         return f;
849 }
850
851
852 /* Make sure as little as possible of this mess escapes. */
853 #undef PARAVIRT_CALL
854 #undef __PVOP_CALL
855 #undef __PVOP_VCALL
856 #undef PVOP_VCALL0
857 #undef PVOP_CALL0
858 #undef PVOP_VCALL1
859 #undef PVOP_CALL1
860 #undef PVOP_VCALL2
861 #undef PVOP_CALL2
862 #undef PVOP_VCALL3
863 #undef PVOP_CALL3
864 #undef PVOP_VCALL4
865 #undef PVOP_CALL4
866
867 extern void default_banner(void);
868
869 #else  /* __ASSEMBLY__ */
870
871 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
872 771:;                                           \
873         ops;                                    \
874 772:;                                           \
875         .pushsection .parainstructions,"a";     \
876          .align algn;                           \
877          word 771b;                             \
878          .byte ptype;                           \
879          .byte 772b-771b;                       \
880          .short clobbers;                       \
881         .popsection
882
883
884 #define COND_PUSH(set, mask, reg)                       \
885         .if ((~(set)) & mask); push %reg; .endif
886 #define COND_POP(set, mask, reg)                        \
887         .if ((~(set)) & mask); pop %reg; .endif
888
889 #ifdef CONFIG_X86_64
890
891 #define PV_SAVE_REGS(set)                       \
892         COND_PUSH(set, CLBR_RAX, rax);          \
893         COND_PUSH(set, CLBR_RCX, rcx);          \
894         COND_PUSH(set, CLBR_RDX, rdx);          \
895         COND_PUSH(set, CLBR_RSI, rsi);          \
896         COND_PUSH(set, CLBR_RDI, rdi);          \
897         COND_PUSH(set, CLBR_R8, r8);            \
898         COND_PUSH(set, CLBR_R9, r9);            \
899         COND_PUSH(set, CLBR_R10, r10);          \
900         COND_PUSH(set, CLBR_R11, r11)
901 #define PV_RESTORE_REGS(set)                    \
902         COND_POP(set, CLBR_R11, r11);           \
903         COND_POP(set, CLBR_R10, r10);           \
904         COND_POP(set, CLBR_R9, r9);             \
905         COND_POP(set, CLBR_R8, r8);             \
906         COND_POP(set, CLBR_RDI, rdi);           \
907         COND_POP(set, CLBR_RSI, rsi);           \
908         COND_POP(set, CLBR_RDX, rdx);           \
909         COND_POP(set, CLBR_RCX, rcx);           \
910         COND_POP(set, CLBR_RAX, rax)
911
912 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
913 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
914 #define PARA_INDIRECT(addr)     *addr(%rip)
915 #else
916 #define PV_SAVE_REGS(set)                       \
917         COND_PUSH(set, CLBR_EAX, eax);          \
918         COND_PUSH(set, CLBR_EDI, edi);          \
919         COND_PUSH(set, CLBR_ECX, ecx);          \
920         COND_PUSH(set, CLBR_EDX, edx)
921 #define PV_RESTORE_REGS(set)                    \
922         COND_POP(set, CLBR_EDX, edx);           \
923         COND_POP(set, CLBR_ECX, ecx);           \
924         COND_POP(set, CLBR_EDI, edi);           \
925         COND_POP(set, CLBR_EAX, eax)
926
927 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
928 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
929 #define PARA_INDIRECT(addr)     *%cs:addr
930 #endif
931
932 #define INTERRUPT_RETURN                                                \
933         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
934                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
935
936 #define DISABLE_INTERRUPTS(clobbers)                                    \
937         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
938                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
939                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
940                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
941
942 #define ENABLE_INTERRUPTS(clobbers)                                     \
943         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
944                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
945                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
946                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
947
948 #define USERGS_SYSRET32                                                 \
949         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
950                   CLBR_NONE,                                            \
951                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
952
953 #ifdef CONFIG_X86_32
954 #define GET_CR0_INTO_EAX                                \
955         push %ecx; push %edx;                           \
956         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
957         pop %edx; pop %ecx
958
959 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
960         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
961                   CLBR_NONE,                                            \
962                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
963
964
965 #else   /* !CONFIG_X86_32 */
966
967 /*
968  * If swapgs is used while the userspace stack is still current,
969  * there's no way to call a pvop.  The PV replacement *must* be
970  * inlined, or the swapgs instruction must be trapped and emulated.
971  */
972 #define SWAPGS_UNSAFE_STACK                                             \
973         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
974                   swapgs)
975
976 /*
977  * Note: swapgs is very special, and in practise is either going to be
978  * implemented with a single "swapgs" instruction or something very
979  * special.  Either way, we don't need to save any registers for
980  * it.
981  */
982 #define SWAPGS                                                          \
983         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
984                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
985                  )
986
987 #define GET_CR2_INTO_RAX                                \
988         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
989
990 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
991         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
992                   CLBR_NONE,                                            \
993                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
994
995 #define USERGS_SYSRET64                                                 \
996         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
997                   CLBR_NONE,                                            \
998                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
999
1000 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1001         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1002                   CLBR_NONE,                                            \
1003                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1004 #endif  /* CONFIG_X86_32 */
1005
1006 #endif /* __ASSEMBLY__ */
1007 #else  /* CONFIG_PARAVIRT */
1008 # define default_banner x86_init_noop
1009 #endif /* !CONFIG_PARAVIRT */
1010 #endif /* _ASM_X86_PARAVIRT_H */